LTC2053

LTC2053/LTC2053-SYNC Precision, Rail-to-Rail, Zero-Drift, Resistor-Programmable Instrumentation Amplifier FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO 116dB CMRR Independent of Gain Maximum Offset Voltage: 10µV Maximum Offset Voltage Drift: 50nV/°C Rail-to-Rail Input Rail-to-Rail Output 2-Resistor Programmable Gain Supply Operation: 2.7V to ±5.5V Typical Noise: 2.5µVP-P (0.01Hz to 10Hz) Typical Supply Current: 750µA LTC2053-SYNC Allows Synchronization to External Clock Available in MS8 and 3mm × 3mm × 0.8mm DFN Packages The LTC®2053 is a high precision instrumentation amplifier. The CMRR is typically 116dB with a single or dual 5V supply and is independent of gain. The input offset voltage is guaranteed below 10µV with a temperature drift of less than 50nV/°C. The LTC2053 is easy to use; the gain is adjustable with two external resistors, like a traditional op amp. The LTC2053 uses charge balanced sampled data techniques to convert a differential input voltage into a single ended signal that is in turn amplified by a zero-drift operational amplifier. The differential inputs operate from rail-to-rail and the single ended output swings from rail-to-rail. The LTC2053 can be used in single supply applications, as low as 2.7V. It can also be used with dual ± 5.5V supplies. The LTC2053 requires no external clock, while the LTC2053-SYNC has a CLK pin to synchronize to an external clock. The LTC2053 is available in an MS8 surface mount package. For space limited applications, the LTC2053 is available in a 3mm × 3mm × 0.8mm dual fine pitch leadless package (DFN). , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. APPLICATIO S ■ ■ ■ ■ ■ Thermocouple Amplifiers Electronic Scales Medical Instrumentation Strain Gauge Amplifiers High Resolution Data Acquisition TYPICAL APPLICATIO 3V Differential Bridge Amplifier 0.1µF 8 2 Typical Input Referred Offset vs Input Common Mode Voltage (VS = 3V) 15 10 5 0 –5 G = 10 –10 G=1 –15 2053 TA01 – LTC2053 7 6 5 1, 4 GAIN = 1+ 0.1µF R1 10Ω R2 10k R2 R1 OUT 3 + INPUT OFFSET VOLTAGE (µV) R < 10k VS = 3V VREF = 0V TA = 25°C 0 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) U G = 1000 G = 100 3.0 2053 TA01b U U 2053syncfb 1 LTC2053/LTC2053-SYNC ABSOLUTE (Note 1) AXI U RATI GS LTC2053I, LTC2053I-SYNC ................ – 40°C to 85°C LTC2053H ........................................ – 40°C to 125°C Storage Temperature Range MS8 Package ................................... – 65°C to 150°C DD Package ...................................... – 65°C to 125°C Lead Temperature (Soldering, 10 sec).................. 300°C Total Supply Voltage (V + to V –) ............................... 11V Input Current ...................................................... ±10mA ⏐VIN+ – VREF⏐ ........................................................ 5.5V ⏐VIN– – VREF⏐ ........................................................ 5.5V Output Short Circuit Duration .......................... Indefinite Operating Temperature Range LTC2053C, LTC2053C-SYNC ................... 0°C to 70°C PACKAGE/ORDER I FOR ATIO LTC2053CMS8 LTC2053IMS8 LTC2053HMS8 ORDER PART NUMBER TOP VIEW EN/CLK† –IN +IN V– 1 2 3 4 8 7 6 5 V+ OUT RG REF MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 200°C/W † LTC2053CMS8-SYNC LTC2053IMS8-SYNC MS8 PART MARKING LTVT LTJY LTAFB *LTBNP PIN 1 IS EN ON LTC2053, CLK ON LTC2053-SYNC *The temperature grade (C, I, or H) is indicated on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS PARAMETER Gain Error Gain Nonlinearity Input Offset Voltage (Note 2) Average Input Offset Drift (Note 2) Average Input Bias Current (Note 3) Average Input Offset Current (Note 3) Input Noise Voltage Common Mode Rejection Ratio (Notes 4, 5) CONDITIONS AV = 1 The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 3V, V – = 0V, REF = 200mV. Output voltage swing is referenced to V –. All other specifications reference the OUT pin to the REF pin. MIN ● ● ● ● ● ● ● ● ● ● ● ● AV = 1, LTC2053 AV = 1, LTC2053-SYNC VCM = 200mV TA = – 40°C to 85°C TA = 85°C to 125°C VCM = 1.2V VCM = 1.2V DC to 10Hz AV = 1, VCM = 0V to 3V, LTC2053C, LTC2053C-SYNC AV = 1, VCM = 0.1V to 2.9V, LTC2053I, LTC2053I-SYNC AV = 1, VCM = 0V to 3V, LTC2053I, LTC2053I-SYNC AV = 1, VCM = 0.1V to 2.9V, LTC2053H AV = 1, VCM = 0V to 3V, LTC2053H 2 U U W WW U W TOP VIEW EN –IN +IN V– 1 2 3 4 8 V+ 7 OUT 6 RG 5 REF ORDER PART NUMBER LTC2053CDD LTC2053IDD LTC2053HDD DD PART MARKING *LAEQ DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 160°C/W UNDERSIDE METAL INTERNALLY CONNECTED TO V– (PCB CONNECTION OPTIONAL) TYP 0.001 3 3 –5 –1 4 1 2.5 MAX 0.01 12 15 ± 10 ± 50 –2.5 10 3 UNITS % ppm ppm µV nV/°C µV/°C nA nA µVP-P dB dB dB dB dB 2053syncfb 100 100 95 100 85 113 113 113 LTC2053/LTC2053-SYNC The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 3V, V – = 0V, REF = 200mV. Output voltage swing is referenced to V –. All other specifications reference the OUT pin to the REF pin. PARAMETER Power Supply Rejection Ratio (Note 6) Output Voltage Swing High Output Voltage Swing Low Supply Current Supply Current, Shutdown EN/CLK Pin Input Low Voltage, VIL EN/CLK Pin Input High Voltage, VIH EN/CLK Pin Input Current Internal Op Amp Gain Bandwidth Slew Rate Internal Sampling Frequency VEN/CLK = V– 2.5 – 0.5 200 0.2 3 –10 No Load VEN ≥ 2.5V, LTC2053 Only CONDITIONS VS = 2.7V to 6V RL RL = 10k to V – = 2k to V – ● ● ● ● ● ELECTRICAL CHARACTERISTICS MIN 110 2.85 2.95 TYP 116 2.94 2.98 MAX UNITS dB V V 20 0.75 1 10 0.5 mV mA µA V V µA kHz V/µs kHz The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 0V, REF = 200mV. Output voltage swing is referenced to V–. All other specifications reference the OUT pin to the REF pin. PARAMETER Gain Error Gain Nonlinearity Input Offset Voltage (Note 2) Average Input Offset Drift (Note 2) Average Input Bias Current (Note 3) Average Input Offset Current (Note 3) Common Mode Rejection Ratio (Notes 4, 5) CONDITIONS AV = 1 AV = 1 VCM = 200mV TA = – 40°C to 85°C TA = 85°C to 125°C VCM = 1.2V VCM = 1.2V AV = 1, VCM = 0V to 5V, LTC2053C AV = 1, VCM = 0V to 5V, LTC2053C-SYNC AV = 1, VCM = 0.1V to 4.9V, LTC2053I AV = 1, VCM = 0.1V to 4.9V, LTC2053I-SYNC AV = 1, VCM = 0V to 5V, LTC2053I, LTC2053I-SYNC AV = 1, VCM = 0.1V to 4.9V, LTC2053H AV = 1, VCM = 0V to 5V, LTC2053H VS = 2.7V to 6V RL RL = 10k to V – No Load VEN ≥ 4.5V, LTC2053 Only 4.5 VEN/CLK = V – –1 200 0.2 3 –10 = 2k to V – ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● MIN TYP 0.001 3 –5 –1 4 1 MAX 0.01 10 ± 10 ±50 –2.5 10 3 UNITS % ppm µV nV/°C µV/°C nA nA dB dB dB dB dB dB dB dB V V 105 100 105 100 95 100 85 110 4.85 4.95 116 116 116 116 116 Power Supply Rejection Ratio (Note 6) Output Voltage Swing High Output Voltage Swing Low Supply Current Supply Current, Shutdown EN/CLK Pin Input Low Voltage, VIL EN/CLK Pin Input High Voltage, VIH EN/CLK Pin Input Current Internal Op Amp Gain Bandwidth Slew Rate Internal Sampling Frequency 116 4.94 4.98 20 0.85 1.1 10 0.5 mV mA µA V V µA kHz V/µs kHz 2053syncfb 3 LTC2053/LTC2053-SYNC The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V + = 5V, V – = – 5V, REF = 0V. PARAMETER Gain Error Gain Nonlinearity Input Offset Voltage (Note 2) Average Input Offset Drift (Note 2) Average Input Bias Current (Note 3) Average Input Offset Current (Note 3) Common Mode Rejection Ratio (Notes 4, 5) (Notes 4, 5) CONDITIONS AV = 1 AV = 1 VCM = 0V TA = – 40°C to 85°C TA = 85°C to 125°C VCM = 1V VCM = 1V AV = 1, VCM = – 5V to 5V, LTC2053C AV = 1, VCM = – 5V to 5V, LTC2053C-SYNC AV = 1, VCM = – 4.9V to 4.9V, LTC2053I AV = 1, VCM = – 4.9V to 4.9V, LTC2053I-SYNC AV = 1, VCM = – 5V to 5V, LTC2053I, LTC2053I-SYNC AV = 1, VCM = – 4.9V to 4.9V, LTC2053H AV = 1, VCM = – 5V to 5V, LTC2053H VS = 2.7V to 11V RL = 2k to GND, C and I Grades RL = 10k to GND, All Grades RL = 2k to GND, LTC2053H Only No Load VEN ≥ 4.5V, LTC2053 Only ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ELECTRICAL CHARACTERISTICS MIN TYP 0.001 3 10 –1 4 1 MAX 0.01 10 ± 20 ± 50 –2.5 10 3 UNITS % ppm µV nV/°C µV/°C nA nA dB dB dB dB dB dB dB dB V V V 105 100 105 100 95 100 90 110 ± 4.5 ± 4.6 ± 4.4 118 118 118 118 118 Power Supply Rejection Ratio (Note 6) Maximum Output Voltage Swing 116 ± 4.8 ± 4.9 ± 4.8 0.95 1.3 20 – 4.5 0.5 Supply Current Supply Current, Shutdown EN Pin Input Low Voltage, VIL CLK Pin Input Low Voltage, VIL EN/CLK Pin Input High Voltage, VIH EN/CLK Pin Input Current Internal Op Amp Gain Bandwidth Slew Rate Internal Sampling Frequency mA µA V V V µA kHz V/µs kHz 4.5 VEN/CLK = V– –3 200 0.2 3 – 20 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: These parameters are guaranteed by design. Thermocouple effects preclude measurement of these voltage levels in high speed automatic test systems. VOS is measured to a limit determined by test equipment capability. Note 3: If the total source resistance is less than 10k, no DC errors result from the input bias currents or the mismatch of the input bias currents or the mismatch of the resistances connected to –IN and +IN. Note 4: The CMRR with a voltage gain, AV, larger than 10 is 120dB (typ). Note 5: At temperatures above 70°C, the common mode rejection ratio lowers when the common mode input voltage is within 100mV of the supply rails. Note 6: The power supply rejection ratio (PSRR) measurement accuracy depends on the proximity of the power supply bypass capacitor to the device under test. Because of this, the PSRR is 100% tested to relaxed limits at final test. However, their values are guaranteed by design to meet the data sheet limits. 2053syncfb 4 LTC2053/LTC2053-SYNC TYPICAL PERFOR A CE CHARACTERISTICS Input Offset Voltage vs Input Common Mode Voltage 15 10 5 0 –5 G = 10 –10 G=1 –15 –15 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) VS = 3V VREF = 0V TA = 25°C G = 1000 G = 100 0 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) Input Offset Voltage vs Input Common Mode Voltage 20 VS = 3V 15 VREF = 0V G = 10 10 5 0 –5 –10 –15 –20 0 TA = 25°C TA = 70°C TA = –55°C 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 3.0 TA = 85°C 20 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) Input Offset Voltage vs Input Common Mode Voltage 60 40 20 0 TA = 25°C –20 –40 –60 TA = 125°C H-GRADE PARTS VS = 3V VREF = 0V G = 10 60 40 20 0 INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) INPUT OFFSET VOLTAGE (µV) TA = 85°C 0 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) UW 2053 G01 2053 G04 Input Offset Voltage vs Input Common Mode Voltage 15 VS = 5V VREF = 0V 10 TA = 25°C 5 0 –5 –10 G = 10 G = 100 G=1 G = 1000 20 Input Offset Voltage vs Input Common Mode Voltage VS = ± 5V 15 VREF = 0V TA = 25°C 10 5 0 –5 –10 –15 G=1 G=100 G=10 G=1000 3.0 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 –20 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 2053 G02 2053 G03 Input Offset Voltage vs Input Common Mode Voltage VS = 5V 15 VREF = 0V G = 10 10 5 0 –5 –10 –15 –20 0 TA = 25°C TA = 85°C TA = 70°C 20 Input Offset Voltage vs Input Common Mode Voltage VS = ± 5V 15 VREF = 0V G = 10 10 5 0 –5 –10 –15 –20 TA = –55°C TA = 70°C TA = 25°C TA = 85°C TA = –55°C 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 2053 G05 2053 G06 Input Offset Voltage vs Input Common Mode Voltage H-GRADE PARTS VS = 5V VREF = 0V G = 10 100 Input Offset Voltage vs Input Common Mode Voltage H-GRADE PARTS 80 VS = ± 5V 60 VREF = 0V G = 10 40 20 0 –20 –40 –60 –80 –100 TA = 125°C –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 TA = 25°C TA = 85°C TA = 85°C –20 –40 –60 TA = 25°C TA = 125°C 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 3.0 2053 G07 2053 G08 2053 G09 2053syncfb 5 LTC2053/LTC2053-SYNC TYPICAL PERFOR A CE CHARACTERISTICS Error Due to Input RS vs Input Common Mode (CIN < 100pF) 60 ADDITIONAL OFFSET ERROR (µV) ADDITIONAL OFFSET ERROR (µV) 40 20 0 20 10 0 –10 –20 –30 ADDITIONAL OFFSET ERROR (µV) VS = 3V VREF = 0V R+ = R– = RS CIN < 100pF G = 10 TA = 25°C RS = 5k RS = 0k RS = 10k –20 –40 –60 RS SMALL CIN RS 0 + – RS = 15k RS = 20k 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) Error Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) 50 40 ADDITIONAL OFFSET ERROR (µV) 30 20 10 0 –10 –20 –30 –40 –50 0 ADDITIONAL OFFSET ERROR (µV) RIN+ = 0k, RIN– = 15k R+ = 0k, R– = 10k ADDITIONAL OFFSET ERROR (µV) VS = 3V VREF = 0V CIN < 100pF G = 10 TA = 25°C R+ = 0k, R– = 15k R+ = 0k, R– = 5k R R+ = 5k, R– = 0k + – + R = 10k, R = 0k + – R+ =15k, R– = 0k 3.0 SMALL CIN R– 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) Error Due to Input RS vs Input Common Mode (CIN > 1µF) 40 ADDITIONAL OFFSET ERROR (µV) ADDITIONAL OFFSET ERROR (µV) RS = 5k RS = 1k RS = 500Ω ADDITIONAL OFFSET ERROR (µV) VS = 3V 30 VREF =–0V R + = R = RS C > 1µF 20 IN G = 10 T = 25°C 10 A 0 –10 –20 –30 –40 0 RS BIG CIN RS + – RS = 15k RS = 10k RS = 5k 2.5 1.0 1.5 2.0 0.5 INPUT COMMON MODE VOLTAGE (V) 6 UW 2053 G10 2053 G13 Error Due to Input RS vs Input Common Mode (CIN < 100pF) 30 VS = 5V VREF = 0V R+ = R– = RS CIN < 100pF G = 10 TA = 25°C 25 RS = 20k 20 15 10 5 0 –5 –10 –15 –20 –25 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 Error Due to Input RS vs Input Common Mode (CIN < 100pF) VS = ± 5V VREF = 0V R+ = R– = RS CIN < 100pF G = 10 TA = 25°C RS = 20k RS = 15k RS = 15k RS = 10k RS = 5k RS = 10k 3.0 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 2053 G11 2053 G12 Error Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) 40 VS = 5V 30 VREF = 0V CIN < 100pF 20 G = 10 TA = 25°C 10 0 –10 –20 –30 –40 0 RIN+ =20k, RIN– = 0k 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 RIN+ =10k, RIN– = 0k RIN+ =15k, RIN– = 0k RIN+ = 0k, RIN– = 20k 40 Error Due to Input RS Mismatch vs Input Common Mode (CIN < 100pF) VS = ± 5V 30 VREF = 0V CIN < 100pF 20 G = 10 TA = 25°C 10 0 –10 –20 R+ =20k, R– = 0k –30 –40 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 R+ =15k, R– = 0k R+ = 0k, R– = 20k RIN+ = 0k, RIN– = 10k R+ = 0k, R– = 15k 2053 G14 2053 G15 Error Due to Input RS vs Input Common Mode (CIN > 1µF) 70 VS = 5V VREF = 0V 50 R+ = R– = RS CIN > 1µF 30 G = 10 TA = 25°C 10 –10 –30 –50 –70 Error Due to Input RS vs Input Common Mode (CIN > 1µF) 80 VS = ± 5V 60 VREF =–0V R + = R = RS 40 CIN > 1µF G = 10 20 TA = 25°C 0 –20 –40 –60 –80 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 RS = 10k RS = 5k RS = 1k RS = 500Ω RS = 10k 3.0 0 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 2053 G16 2053 G17 2053 G18 2053syncfb LTC2053/LTC2053-SYNC TYPICAL PERFOR A CE CHARACTERISTICS Error Due to Input RS Mismatch vs Input Common Mode (CIN >1µF) 200 ADDITIONAL OFFSET ERROR (µV) ADDITIONAL OFFSET ERROR (µV) VS = 3V 150 VREF = 0V TA = 25°C 100 50 0 –50 R+ BIG CIN R– –200 0 1.0 1.5 2.0 2.5 0.5 INPUT COMMON MODE VOLTAGE (V) 3.0 R+ = 100Ω, R– = 0k R+ = 500Ω, R– = 0k + – R+ =1k, R– = 0k R+ = 0k, R– = 1k R+ = 0k, R– = 500Ω R+ = 0k, R– = 100Ω ADDITIONAL OFFSET ERROR (µV) –100 –150 Offset Voltage vs Temperature 80 60 INPUT OFFSET VOLTAGE (µV) 40 20 0 VS = 3V –20 –40 –60 –80 –50 –25 0 25 50 75 100 125 VS = 5V VOS (µV) VS = ±5V VOS (µV) TEMPERATURE (°C) 2053 G22 Gain Nonlinearity, G = 1 10 8 6 NONLINEARITY (ppm) 4 2 0 –2 –4 –6 –8 NONLINEARITY (ppm) VS = ± 2.5V VREF = 0V G=1 RL = 10k TA = 25°C CMRR (db) –10 –2.4 –1.9 –1.4 –0.9 –0.4 0.1 0.6 OUTPUT VOLTAGE (V) UW 2053 G19 Error Due to Input RS Mismatch vs Input Common Mode (CIN >1µF) 200 150 100 50 0 50 R+ = 100Ω, R– = 0k R+ = 500Ω, R– = 0k R+ =1k, R– = 0k VS = 5V VREF = 0V TA = 25°C R+ = 0k, R– = 1k R+ = 0k, R– = 500Ω R+ = 0k, R– = 100Ω 150 Error Due to Input RS Mismatch vs Input Common Mode (CIN >1µF) VS = ± 5V VREF = 0V 100 TA = 25°C 50 0 –50 R+ = 100Ω, R– = 0k R+ = 500Ω, R– = 0k R+ =1k, R– = 0k R+ = 0k, R– = 1k R+ = 0k, R– = 500Ω R+ = 0k, R– = 100Ω –100 –150 –200 0 –100 –150 2 3 4 1 INPUT COMMON MODE VOLTAGE (V) 5 –5 –1 1 3 –3 INPUT COMMON MODE VOLTAGE (V) 5 2053 G20 2053 G21 VOS vs REF (Pin 5) 30 20 10 0 –10 –20 –30 VS = 3V VS = 5V VIN+ = VIN– = REF G = 10 TA = 25°C 60 40 20 0 VOS vs REF (Pin 5) VIN+ = VIN– = REF G = 10 TA = 25°C VS = 10V –20 –40 –60 0 1 2 VREF (V) 3 4 2053 G23 0 1 2 3 5 4 VREF (V) 6 7 8 9 2053 G24 Gain Nonlinearity, G = 10 10 VS = ± 2.5V 8 VREF = 0V G = 10 6 RL = 10k 4 TA = 25°C 2 0 –2 –4 –6 –8 CMRR vs Frequency 130 120 110 100 R+ = 10k, R– = 0k 90 80 R– 70 R+ + – 1 R+ = 0k, R– = 10k 10 100 FREQUENCY (Hz) 1000 2053 G27 VS = 3V, 5V, ± 5V VIN = 1VP-P R+ = R– = 1k R+ = R– = 10k 1.1 1.6 –10 –2.4 –1.4 0.6 –0.4 1.6 OUTPUT VOLTAGE (V) 2.6 2053 G26 2053 G25 2053syncfb 7 LTC2053/LTC2053-SYNC TYPICAL PERFOR A CE CHARACTERISTICS Input Voltage Noise Density vs Frequency 300 INPUT REFERRED NOISE DENSITY (nV/√Hz) 250 200 150 100 50 0 INPUT REFERRED NOISE VOLTAGE (µV) 2 1 0 –1 –2 –3 INPUT REFERRED NOISE VOLTAGE (µV) G = 10 TA = 25°C VS = ± 5V VS = 5V VS = 3V 1 10 100 1000 FREQUENCY (Hz) Output Voltage Swing vs Output Current 5.0 4.5 TA = 25°C VS = 5V, SOURCING OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0.01 VS = 3V, SINKING VS = 5V, SINKING VS = 3V, SOURCING SUPPLY CURRENT 1 0.1 OUTPUT CURRENT (mA) Low Gain Settling Time vs Settling Accuracy 8 7 35 SETTLING TIME (ms) SETTLING TIME (ms) 6 5 4 3 2 1 0 0.0001 25 20 15 10 5 0 CLOCK FREQUENCY (kHz) VS = 5V dVOUT = 1V G < 100 TA = 25°C 0.01 0.001 SETTLING ACCURACY (%) 8 UW 2053 G28 2053 G31 Input Referred Noise in 10Hz Bandwidth 3 VS = 3V TA = 25°C Input Referred Noise in 10Hz Bandwidth 3 2 1 0 –1 –2 –3 VS = 5V TA = 25°C 10000 0 2 4 6 TIME (s) 8 10 2053 G29 0 2 4 6 TIME (s) 8 10 2053 G30 Output Voltage Swing vs Output Current 5 4 3 2 1 0 –1 –2 –3 –4 10 Supply Current vs Supply Voltage 1.00 0.95 TA = 125°C 0.90 0.85 0.80 0.75 0.70 0.65 TA = – 55°C TA = 85°C TA = 0°C VS = ±5V TA = 25°C SOURCING SINKING 1 0.1 OUTPUT CURRENT (mA) 10 2053 G32 –5 0.01 0.60 2.5 4.5 6.5 8.5 SUPPLY VOLTAGE (V) 10.5 2053 G33 Settling Time vs Gain 3.40 VS = 5V dVOUT = 1V 0.1% ACCURACY TA = 25°C 30 Internal Clock Frequency vs Supply Voltage 3.35 3.30 TA = 125°C 3.25 TA = 85°C 3.20 3.15 TA = 25°C TA = – 55°C 6.5 8.5 SUPPLY VOLTAGE (V) 10.5 2053 G36 0.1 2053 G34 1 10 100 GAIN (V/V) 1000 10000 2053 G35 3.10 2.5 4.5 2053syncfb LTC2053/LTC2053-SYNC PI FU CTIO S EN (Pin 1, LTC2053 Only): Active Low Enable Pin. CLK (Pin 1, LTC2053-SYNC Only): Clock input for synchronizing to external system clock. –IN (Pin 2): Inverting Input. +IN (Pin 3): Noninverting Input. V – (Pin 4): Negative Supply. REF (Pin 5): Voltage Reference (VREF) for Amplifier Output. RG (Pin 6): Inverting Input of Internal Op Amp. With a resistor, R2, connected between the OUT pin and the RG pin and a resistor, R1, between the RG pin and the REF pin, the DC gain is given by 1 + R2 / R1. OUT (Pin 7): Amplifier Output. VOUT = GAIN (V+IN – V–IN) + VREF V + (Pin 8): Positive Supply. BLOCK DIAGRA APPLICATIO S I FOR ATIO Theory of Operation The LTC2053 uses an internal capacitor (CS) to sample a differential input signal riding on a DC common mode voltage (see Block Diagram). This capacitor’s charge is transferred to a second internal hold capacitor (CH) translating the common mode of the input differential signal to that of the REF pin. The resulting signal is amplified by a zero-drift op amp in the noninverting configuration. The RG pin is the negative input of this op amp and allows external programmability of the DC gain. Simple filtering can be realized by using an external capacitor across the feedback resistor. Input Voltage Range The input common mode voltage range of the LTC2053 is rail-to-rail. However, the following equation limits the size of the differential input voltage: V – ≤ (V+IN – V–IN) + VREF ≤ V + – 1.3 U W W U U U U U 8 V+ +IN 3 –IN 2 CS CH ZERO-DRIFT OP AMP OUT 7 + – REF 5 6 RG 4 V– 1 EN/CLK* 2053 BD *NOTE: PIN 1 IS EN ON THE LTC2053 AND CLK ON THE LTC2053-SYNC. Where V+IN and V–IN are the voltages of the +IN and –IN pins respectively, VREF is the voltage at the REF pin and V+ is the positive supply voltage. For example, with a 3V single supply and a 0V to 100mV differential input voltage, VREF must be between 0V and 1.6V. ± 5 Volt Operation When using the LTC2053 with supplies over 5.5V, care must be taken to limit the maximum difference between any of the input pins (+IN or –IN) and the REF pin to 5.5V; if not, the device will be damaged. For example, if rail-torail input operation is desired when the supplies are at ± 5V, the REF pin should be 0V, ± 0.5V. As a second example, if V + is 10V and V – and REF are at 0V, the inputs should not exceed 5.5V. 2053syncfb 9 LTC2053/LTC2053-SYNC APPLICATIO S I FOR ATIO Settling Time The sampling rate is 3kHz and the input sampling period during which CS is charged to the input differential voltage VIN is approximately 150µs. First assume that on each input sampling period, CS is charged fully to VIN. Since CS = CH (= 1000pF), a change in the input will settle to N bits of accuracy at the op amp noninverting input after N clock cycles or 333µs(N). The settling time at the OUT pin is also affected by the settling of the internal op amp. Since the gain bandwidth of the internal op amp is typically 200kHz, the settling time is dominated by the switched capacitor front end for gains below 100 (see Typical Performance Characteristics). Input Current Whenever the differential input VIN changes, CH must be charged up to the new input voltage via CS. This results in an input charging current during each input sampling period. Eventually, CH and CS will reach VIN and, ideally, the input current would go to zero for DC inputs. In reality, there are additional parasitic capacitors which disturb the charge on CS every cycle even if VIN is a DC voltage. For example, the parasitic bottom plate capacitor on CS must be charged from the voltage on the REF pin to the voltage on the –IN pin every cycle. The resulting input charging current decays exponentially during each input sampling period with a time constant equal to RSCS. If the voltage disturbance due to these currents settles before the end of the sampling period, there will be no errors due to source resistance or the source resistance mismatch between –IN and +IN. With RS less than 10k, no DC errors occur due to this input current. In the Typical Performance Characteristics section of this data sheet, there are curves showing the additional error from non-zero source resistance in the inputs. If there are no large capacitors across the inputs, the amplifier is less sensitive to source resistance and source resistance mismatch. When large capacitors are placed across the inputs, the input charging currents described above result in larger DC errors, especially with source resistor mismatches. Power Supply Bypassing The LTC2053 uses a sampled data technique and therefore contains some clocked digital circuitry. It is therefore sensistive to supply bypassing. For single or dual supply operation, a 0.1µF ceramic capacitor must be connected between Pin 8 (V +) and Pin 4 (V –) with leads as short as possible. SINGLE SUPPLY, UNITY GAIN 5V 8 V+IN 3 + VD + 7 V–IN – 2 – 4 5 0V < V+IN < 5V 0V < V–IN < 5V 0V < VD < 3.7V VOUT = VD 10 U DUAL SUPPLY 5V 8 V+IN 6 VOUT V–IN 3 W U U + VD + 7 – 2 – 4 –5V 5 6 R2 R1 VOUT VREF –5V < V–IN < 5V AND ⏐V–IN – VREF⏐ < 5.5V –5V < V+IN < 5V AND ⏐V+IN – VREF⏐ < 5.5V –5V < VD + VREF < 3.7V VOUT = 1 + ( R2 R1 ) VD + VREF 2053 F01 Figure 1 2053syncfb LTC2053/LTC2053-SYNC APPLICATIO S I FOR ATIO Synchronizing to an External Clock (LTC2053-SYNC Only) The LTC2053 has an internally generated sample clock that is typically 3kHz. There is no need to provide the LTC2053 with a clock. However, in some applications, it may be desirable for the user to control the sampling frequency more precisely to avoid undesirable aliasing. This can be done with the LTC2053-SYNC. This device uses PIN 1 as a clock input whereas the LTC2053 uses Pin 1 as an enable pin. If CLK (PIN 1) is left floating on the LTC2053-SYNC, the device will run on its internal oscillator, similar to the LTC2053. However, if not externally synchronizing to a system clock, it is recommended that the LTC2053 be used instead of the LTC2053-SYNC because the LTC2053-SYNC is sensitive to parasitic capacitance on the CLK pin when left floating. Clocking the LTC2053-SYNC is accomplished by driving the CLK pin at 8 times the desired sample clock frequency. This completely disables the internal clock. For example, to achieve the nominal LTC2053 sample clock rate of 3kHz, a 24kHz external clock should be applied to the CLK pin of the LTC2053-SYNC. If a square wave is used to drive the CLK pin, a 5µs RC time constant should be placed in front of the CLK pin to maintain low offset voltage performance (see Figure 2). This avoids internal and external coupling of the high frequency components of the external clock at the instant the LTC2053-SYNC holds the sampled input. LTC2053-SYNC Input Offset vs Sample Frequency 20 15 10 INPUT OFFSET (µV) INPUT BIAS CURRENT (nA) 14 12 VS = ±5V 10 8 6 4 INPUT REFERRED NOISE VOLTAGE (µVPP) VS = 5V VREF = 0 VCM = 1V 5 0 –5 –10 Typ LTC2053 Sample Frequency –15 –20 0 4000 6000 8000 10000 2000 SAMPLE FREQUENCY (Hz) (=FCLK/8) 2053 F03 VS = 5V VS = 3V 2 0 0 4000 6000 8000 10000 2000 SAMPLE FREQUENCY (Hz) (=FCLK/8) 2053 F04 U The LTC2053-SYNC is tested with a sample clock of 3kHz (fCLK = 24kHz) to the same specifications as the LTC2053. In addition the LTC2053-SYNC is tested at 1/2 and 2X this frequency to verify proper operation. The curves in the Typical Performance Characteristics section of this datasheet apply to the LTC2053-SYNC when driving it with a 24kHz clock at PIN1 (fCLK = 24kHz, 3kHz sample clock rate). Below are three curves that show the behavior of the LTC2053-SYNC as the clock frequency is varied. The offset is essentially unaffected over a 2:1 increase or decrease of the typical LTC2053 sample clock speed. The bias current is directly proportional to the clock speed. The noise is roughly proportional to the square root of the clock frequency. For optimum noise and bias current performance, drive the LTC2053-SYNC with a nominal 24kHz external clock (3kHz sample clock). 5V 8 V+IN 3 1kΩ 4.7nF 1 CLK 2 7 6 R2 R1 0V VOUT EXTERNAL CLOCK 5V W U U + VD + – 4 V–IN – 5 LTC2053-SYNC 2053 F02 Figure 2 LTC2053-SYNC Average Input Bias Current vs Sample Frequency 12 10 8 Typ LTC2053 Sample Frequency 6 4 2 0 LTC2053-SYNC Input Referred Noise vs Sample Frequency VS = 5V TA = 25°C Noise in 10Hz Bandwidth Typ LTC2053 Sample Frequency 0 4000 6000 8000 2000 SAMPLE FREQUENCY (FCLK/8) 10000 2053 F05 2053syncfb 11 LTC2053/LTC2053-SYNC TYPICAL APPLICATIO S Precision Current Source 5V 2 R VOUT i – LTC2053 RG REF 6 0.1µF 3+ 5 EN 4 1 2.7k LOAD 10k VC Precision Doubler (General Purpose) 5V 0.1µF VIN 3 + – 4 LTC2053 2 1 5 6 0.1µF –5V 2053 TA04 12 U 8 Precision ÷2 (Low Noise 2.5V Reference) 8V 0.1µF 8 1 LT1027 4 –5 2 1µF 3 7 + – 1 1k 8 LTC2053 7 6 2.5V (110nV/√Hz) 2 4 5 VC i = — , i ≤ 5mA R 0 < VOUT < (5V – VC) 0.1µF 2053 TA02 0.1µF 2053 TA03 Precision Inversion (General Purpose) 5V 0.1µF 8 7 VOUT VIN 3 + – 1 8 LTC2053 7 6 VOUT 2 4 5 VOUT = 2VIN 0.1µF 0.1µF VOUT = –VIN –5V 2053 TA05 2053syncfb LTC2053/LTC2053-SYNC TYPICAL APPLICATIO S Differential Thermocouple Amplifier 5V 10M 1M 1M 10M 8 0.1µF 0°C → 500°C TYPE K THERMOCOUPLE (40.6µV/°C) U YELLOW ORANGE + – 10k 3 10k 2 0.001µF 0.001µF 1 + LTC2053 – RG EN 4 REF 5 6 7 249k 1% 0.1µF 100Ω 10mV/°C THERMAL COUPLING 5V 0.1µF 5V 1k 1% SCALE FACTOR TRIM 2 4 – + 6 1 LT1025 3 VO – R 4 5 200k LTC2050 3 2 2053 TA06 High Side Power Supply Current Sense 0.0015Ω VREG 0.1µF 2 8 LTC2053 3 7 6 10k 5 1,4 0.1µF LOAD OUT 100mV/A OF LOAD CURRENT ILOAD – + 150Ω 2053 TA07 2053syncfb 13 LTC2053/LTC2053-SYNC PACKAGE DESCRIPTIO U MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 3.20 – 3.45 (.126 – .136) 0.65 (.0256) BSC 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 8 7 65 0.52 (.0205) REF DETAIL “A” 0° – 6° TYP 4.90 ± 0.152 (.193 ± .006) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 1 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.127 ± 0.076 (.005 ± .003) MSOP (MS8) 0204 5.23 (.206) MIN 0.42 ± 0.038 (.0165 ± .0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) GAUGE PLANE 23 4 0.86 (.034) REF 1.10 (.043) MAX NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.65 (.0256) BSC 2053syncfb 14 LTC2053/LTC2053-SYNC PACKAGE DESCRIPTIO U DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) 0.675 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5 0.38 ± 0.10 8 3.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 1203 3.5 ± 0.05 1.65 ± 0.05 2.15 ± 0.05 (2 SIDES) 1.65 ± 0.10 (2 SIDES) 0.200 REF 0.75 ± 0.05 4 0.25 ± 0.05 2.38 ± 0.10 (2 SIDES) 1 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 2053syncfb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC2053/LTC2053-SYNC TYPICAL APPLICATIO 1.21k 3 PT100* 3-WIRE RTD RELATED PARTS PART NUMBER LT1167 DESCRIPTION Single Resistor Gain Programmable, Precision Instrumentation Amplifier COMMENTS Single Gain Set Resistor: G = 1 to 10,000, Low Noise: 7.5nV√Hz SOT-23/MS8 Package SOT-23/MS8 Package, 150µA/OP Amp MS8 Package, 100µV Max VOS, 250nV/°C Max Drift LTC2050/LTC2051 Zero-Drift Single/Dual Operation Amplifier LTC2054/LTC2055 Zero-Drift µPower Operational Amplifier LTC6800 Single Supply, Zero Drift, Rail-to-Rail Input and Output Instrumentation Amplifier 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U Linearized Platinum RTD Amplifier 5V 0.1µF 2 *CONFORMING TO IEC751 OR DIN43760 RT = RO (1 + 3.908 • 10–3T – 5.775 • 10–7T2), RO = 100Ω (e.g. 100Ω AT 0°C, 175.9Ω AT 200°C, 247.1Ω AT 400°C) – + 1 8 LTC2053 4 5 6 7 0.1µF 2.7k 10k 5V 16.9k i ≈ 1mA 5V 2 0.1µF 7 6 1M 0.1µF 10k CW 24.9k 5k 16.2k – + 1 8 LTC2053 249k 49.9Ω LT1634-1.25 10mV/°C 0°C – 400°C (±0.1°C) 3 4 5 11k CW LINEARITY ZERO 953Ω 39.2k 0.1µF GAIN CW 100Ω 2053 TA08 2053syncfb LT/TP 0205 Rev B 1K • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2001