FEATURES
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LTC2216/LTC2215 16-Bit, 80Msps/65Msps Low Noise ADC DESCRIPTION
The LTC®2216/LTC2215 are 80Msps/65Msps sampling 16bit A/D converters designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is fixed at 2.75VP-P. The LTC2216/LTC2215 are perfect for demanding communications applications, with AC performance that includes 81.5dBFS noise floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 85fsRMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC specs include ±3.5LSB INL, ±1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Sample Rate: 80Msps/65Msps 81.5dBFS Noise Floor 100dB SFDR SFDR >95dB at 70MHz 85fsRMS Jitter 2.75VP-P Input Range 400MHz Full Power Bandwidth S/H Optional Internal Dither Optional Data Output Randomizer LVDS or CMOS Outputs Single 3.3V Supply Power Dissipation: 970mW/700mW Clock Duty Cycle Stabilizer Pin-Compatible with LTC2208, LTC2217 64-Pin (9mm × 9mm) QFN Package
APPLICATIONS
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Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE
TYPICAL APPLICATION
3.3V SENSE VCM 2.2μF 1.575V COMMON MODE BIAS VOLTAGE INTERNAL ADC REFERENCE GENERATOR OVDD 0.5V TO 3.6V 1μF OF CLKOUT D15 • • • D0 OGND CLOCK/DUTY CYCLE CONTROL VDD GND ENC
+
LTC2216: 64k Point FFT, fIN = 4.9MHz, –1dBFS
0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130
0 10 20 30 FREQUENCY (MHz) 40
22165 TA01b
ANALOG INPUT AIN–
S/H AMP
–
16-BIT PIPELINED ADC CORE
CORRECTION LOGIC AND SHIFT REGISTER
OUTPUT DRIVERS
CMOS OR LVDS
3.3V 1μF 1μF 1μF
22165 TA01
ENC
–
SHDN
DITH
MODE
LVDS
RAND
ADC CONTROL INPUTS
AMPLITUDE (dBFS)
AIN+
+
22165f
1
LTC2216/LTC2215 ABSOLUTE MAXIMUM RATINGS
OVDD = VDD (Notes 1 and 2)
PIN CONFIGURATION
TOP VIEW 64 NC 63 RAND 62 MODE 61 LVDS 60 OF+/OFA 59 OF–/DA15 58 D15+/DA14 57 D15–/DA13 56 D14+/DA12 55 D14–/DA11 54 D13+/DA10 53 D13–/DA9 52 D12+/DA8 51 D12–/DA7 50 OGND 49 OVDD SENSE 1 GND 2 VCM 3 GND 4 VDD 5 VDD 6 GND 7 AIN+ 8 AIN– 9 GND 10 GND 11 ENC+ 12 ENC– 13 GND 14 VDD 15 VDD 16 65 48 D11+/DA6 47 D11–/DA5 46 D10+/DA4 45 D10–/DA3 44 D9+/DA2 43 D9–/DA1 42 D8+/DA0 41 D8–/CLKOUTA 40 CLKOUT+/CLKOUTB 39 CLKOUT –/OFB 38 D7+/DB15 37 D7–/DB14 36 D6+/DB13 35 D6–/DB12 34 D5+/DB11 33 D5–/DB10
Supply Voltage (VDD) ................................... –0.3V to 4V Digital Output Supply Voltage (OVDD) .......... –0.3V to 4V Digital Output Ground Voltage (OGND)........ –0.3V to 1V Analog Input Voltage (Note 3) ..... –0.3V to (VDD + 0.3V) Digital Input Voltage .................... –0.3V to (VDD + 0.3V) Digital Output Voltage ................–0.3V to (OVDD + 0.3V) Power Dissipation.............................................2000mW Operating Temperature Range LTC2215C/LTC2216C ............................... 0°C to 70°C LTC2215I/LTC2216I..............................–40°C to 85°C Storage Temperature Range ..................–65°C to 150°C
TJMAX = 150°C, θJA = 20°C/W EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH LTC2215CUP#PBF LTC2215IUP#PBF LTC2216CUP#PBF LTC2216IUP#PBF LEAD BASED FINISH LTC2215CUP LTC2215IUP LTC2216CUP LTC2216IUP TAPE AND REEL LTC2215CUP#TRPBF LTC2215IUP#TRPBF LTC2216CUP#TRPBF LTC2216IUP#TRPBF TAPE AND REEL LTC2215CUP#TR LTC2215IUP#TR LTC2216CUP#TR LTC2216IUP#TR PART MARKING LTC2215UP LTC2215UP LTC2216UP LTC2216UP PART MARKING LTC2215UP LTC2215UP LTC2216UP LTC2216UP PACKAGE DESCRIPTION 64-Lead (9mm × 9mm) Plastic QFN 64-Lead (9mm × 9mm) Plastic QFN 64-Lead (9mm × 9mm) Plastic QFN 64-Lead (9mm × 9mm) Plastic QFN PACKAGE DESCRIPTION 64-Lead (9mm × 9mm) Plastic QFN 64-Lead (9mm × 9mm) Plastic QFN 64-Lead (9mm × 9mm) Plastic QFN 64-Lead (9mm × 9mm) Plastic QFN TEMPERATURE RANGE 0°C to 70°C –40°C to 85°C 0°C to 70°C –40°C to 85°C TEMPERATURE RANGE 0°C to 70°C –40°C to 85°C 0°C to 70°C –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
VDD 17 GND 18 SHDN 19 DITH 20 –/DB0 21 D0 +/DB1 22 DO D1–/DB2 23 D1+/DB3 24 D2–/DB4 25 D2+/DB5 26 D3–/DB6 27 D3+/DB7 28 D4–/DB8 29 D4+/DB9 30 OGND 31 OVDD 32
22165f
2
LTC2216/LTC2215
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4)
PARAMETER Integral Linearity Error Differential Linearity Error Offset Error Offset Drift Gain Error Full-Scale Drift Transition Noise External Reference Internal Reference External Reference External Reference
l
CONVERTER CHARACTERISTICS
CONDITIONS
MIN
l l l
TYP ±1.2 0.16/–0.2 ±1.5 ±4 ±0.3 –65 ±12 2
MAX ±3.5 ±1 ±8 ±1
UNITS LSB LSB mV μV/°C %FS
ppm/°C ppm/°C
Differential Analog Input (Note 5) Differential Analog Input (Note 6)
LSBRMS
ANALOG INPUT
SYMBOL VIN VIN, CM IIN ISENSE IMODE ILVDS CIN tAP tJITTER CMRR BW-3dB PARAMETER
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4)
CONDITIONS 3.135V ≤ VDD ≤ 3.465V Differential Input (Note 7) 0V ≤ AIN+, AIN– ≤ VDD 0V ≤ SENSE ≤ VDD
l l l
MIN 1.2 –1 –3
TYP 2.75 1.575
MAX 1.8 1 3
UNITS VP-P V μA μA μA μA pF pF ns fs RMS dB MHz
Analog Input Range (AIN+ – AIN–) Analog Input Common Mode Analog Input Leakage Current SENSE Input Leakage Current MODE Pin Pull-Down Current to GND LVDS Pin Pull-Down Current to GND Analog Input Capacitance Sample-and-Hold Acquisition Delay Time Sample-and-Hold Aperture Jitter Analog Input Common Mode Rejection Ratio Full Power Bandwidth
10 10 Sample Mode ENC+ < ENC– Hold Mode ENC+ > ENC– 9.1 1.8 0.35 85 1.2V < (AIN+ = AIN–)
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