LTC2440

LTC2440 24-Bit High Speed Differential ∆Σ ADC with Selectable Speed/Resolution FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Up to 3.5kHz Output Rate Selectable Speed/Resolution 2µVRMS Noise at 880Hz Output Rate 200nVRMS Noise at 6.9Hz Output Rate with Simultaneous 50/60Hz Rejection 0.0005% INL, No Missing Codes Autosleep Enables 20µA Operation at 6.9Hz < 5µV Offset (4.5V < VCC < 5.5V, – 40°C to 85°C) Differential Input and Differential Reference with GND to VCC Common Mode Range No Latency, Each Conversion is Accurate Even After an Input Step Internal Oscillator—No External Components Pin Compatible with the LTC2410 24-Bit ADC in Narrow 16-Lead SSOP Package The LTC®2440 is a high speed 24-bit No Latency ∆ΣTM ADC with 5ppm INL and 5µV offset. It uses proprietary deltasigma architecture enabling variable speed and resolution with no latency. Ten speed/resolution combinations (6.9Hz/ 200nVRMS to 3.5kHz/25µVRMS) are programmed through a simple serial interface. Alternatively, by tying a single pin HIGH or LOW, a fast (880Hz/2µVRMS) or ultralow noise (6.9Hz, 200nVRMS, 50/60Hz rejection) speed/resolution combination can be easily selected. The accuracy (offset, full-scale, linearity, drift) and power dissipation are independent of the speed selected. Since there is no latency, a speed/resolution change may be made between conversions with no degradation in performance. Following each conversion cycle, the LTC2440 automatically enters a low power sleep state. Power dissipation may be reduced by increasing the duration of this sleep state. For example, running at the 3.5kHz conversion speed but reading data at a 100Hz rate draws 240 µA average current (1.1mW) while reading data at a 7Hz output rate draws only 25µA (125µW).The LTC2440 communicates through a flexible 3-wire or 4-wire digital interface that is compatible with the LTC2410 and is available in a narrow 16-lead SSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. No Latency ∆Σ is a trademark of Linear Technology Corporation. APPLICATIO S ■ ■ ■ ■ ■ High Speed Multiplexing Weight Scales Auto Ranging 6-Digit DVMs Direct Temperature Measurement High Speed Data Acquisition TYPICAL APPLICATIO 4.5V TO 5.5V Simple 24-Bit 2-Speed Acquisition System 100 VCC = 5V VREF = 5V VIN+ = VIN– = 0V VCC BUSY RMS NOISE (µV) 2 3 REFERENCE VOLTAGE 0.1V TO VCC ANALOG INPUT –0.5VREF TO 0.5VREF 4 5 6 15 10 2µV AT 880Hz 200nV AT 6.9Hz 1 (50/60Hz REJECTION) 1, 8, 9, 16 LTC2440 14 FO REF + 13 REF – SCK 12 IN + SDO 11 IN – CS 7 SDI 10 EXT GND 3-WIRE SPI INTERFACE VCC 6.9Hz, 200nV NOISE, 50/60Hz REJECTION 10-SPEED SERIAL PROGRAMMABLE 880Hz OUTPUT RATE, 2µV NOISE 2440 TA01 0.1 1 10 100 1000 CONVERSION RATE (Hz) 10000 2440 TA02 2440 TA01 U Speed vs RMS Noise sn2440, 2440fas U U 1 LTC2440 ABSOLUTE (Notes 1, 2) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW GND VCC REF + REF – IN + IN – SDI GND 1 2 3 4 5 6 7 8 16 GND 15 BUSY 14 FO 13 SCK 12 SDO 11 CS 10 EXT 9 GND Supply Voltage (VCC) to GND .......................– 0.3V to 6V Analog Input Pins Voltage to GND .................................... – 0.3V to (VCC + 0.3V) Reference Input Pins Voltage to GND .................................... – 0.3V to (VCC + 0.3V) Digital Input Voltage to GND ........ – 0.3V to (VCC + 0.3V) Digital Output Voltage to GND ..... – 0.3V to (VCC + 0.3V) Operating Temperature Range LTC2440C ............................................... 0°C to 70°C LTC2440I ............................................ – 40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER LTC2440CGN LTC2440IGN GN PART MARKING 2440 2440I GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 125°C, θJA = 110°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4) PARAMETER Resolution (No Missing Codes) Integral Nonlinearity Offset Error Offset Error Drift Positive Full-Scale Error Positive Full-Scale Error Drift Negative Full-Scale Error Negative Full-Scale Error Drift Total Unadjusted Error CONDITIONS 0.1V ≤ VREF ≤ VCC, –0.5 • VREF ≤ VIN ≤ 0.5 • VREF, (Note 5) VCC = 5V, REF+ = 5V, REF– = GND, VINCM = 2.5V, (Note 6) REF+ = 2.5V, REF– = GND, VINCM = 1.25V, (Note 6) 2.5V ≤ REF+ ≤ VCC, REF– = GND, GND ≤ IN+ = IN– ≤ VCC (Note 12) 2.5V ≤ REF+ ≤ VCC, REF– = GND, GND ≤ IN+ = IN– ≤ VCC REF + = 5V, REF – = GND, IN + = 3.75V, IN – = 1.25V REF + = 2.5V, REF – = GND, IN + = 1.875V, IN – = 0.625V 2.5V ≤ REF+ ≤ VCC, REF– = GND, IN+ = 0.75REF+, IN– = 0.25 • REF+ REF + = 5V, REF – = GND, IN + = 1.25V, IN – = 3.75V REF + = 2.5V, REF – = GND, IN + = 0.625V, IN – = 1.875V 2.5V ≤ REF+ ≤ VCC, REF– = GND, IN+ = 0.25 • REF+, IN– = 0.75 • REF+ 5V ≤ VCC ≤ 5.5V, REF+ = 2.5V, REF– = GND, VINCM = 1.25V 5V ≤ VCC ≤ 5.5V, REF+ = 5V, REF– = GND, VINCM = 2.5V REF+ = 2.5V, REF– = GND, VINCM = 1.25V, (Note 6) 2.5V ≤ REF+ ≤ VCC, REF– = GND, GND ≤ IN– = IN+ ≤ VCC ● ● ● ● ● ● ● ELECTRICAL CHARACTERISTICS MIN 24 TYP 5 3 2.5 20 10 10 0.2 10 10 0.2 15 15 15 120 MAX 15 5 UNITS Bits ppm of VREF ppm of VREF µV nV/°C 30 50 ppm of VREF ppm of VREF ppm of VREF/°C 30 50 ppm of VREF ppm of VREF ppm of VREF/°C ppm of VREF ppm of VREF ppm of VREF dB Input Common Mode Rejection DC sn2440, 2440fas 2 U W U U WW W LTC2440 A ALOG I PUT A D REFERE CE The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) PARAMETER Absolute/Common Mode IN+ Voltage Absolute/Common Mode IN– Voltage Input Differential Voltage Range (IN+ – IN–) Absolute/Common Mode REF+ Voltage Absolute/Common Mode REF– Voltage Reference Differential Voltage Range (REF+ – REF–) IN+ Sampling Capacitance IN– Sampling Capacitance REF+ Sampling Capacitance REF– Sampling Capacitance Leakage Current, Inputs and Reference Average Input/Reference Current During Sampling CS = VCC, IN+ = GND, IN– REF+ = 5V, REF– = GND = GND, ● SYMBOL IN+ IN– VIN REF+ REF– VREF CS(IN+) CS(IN–) CS(REF+) CS(REF–) IDC_LEAK(IN+, IN–, REF+, REF–) ISAMPLE(IN+, IN–, REF+, REF–) DIGITAL I PUTS A D DIGITAL OUTPUTS SYMBOL VIH VIL VIH VIL IIN IIN CIN CIN VOH VOL VOH VOL IOZ PARAMETER High Level Input Voltage CS, FO Low Level Input Voltage CS, FO High Level Input Voltage SCK Low Level Input Voltage SCK Digital Input Current CS, FO Digital Input Current SCK Digital Input Capacitance CS, FO Digital Input Capacitance SCK High Level Output Voltage SDO, BUSY Low Level Output Voltage SDO, BUSY High Level Output Voltage SCK Low Level Output Voltage SCK Hi-Z Output Leakage SDO (Note 8) IO = –800µA IO = 1.6mA IO = –800µA (Note 9) IO = 1.6mA (Note 9) CONDITIONS 4.5V ≤ VCC ≤ 5.5V 4.5V ≤ VCC ≤ 5.5V The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) MIN ● ● ● ● ● ● 4.5V ≤ VCC ≤ 5.5V (Note 8) 4.5V ≤ VCC ≤ 5.5V (Note 8) 0V ≤ VIN ≤ VCC 0V ≤ VIN ≤ VCC (Note 8) U U U U U U CONDITIONS ● ● ● ● ● ● MIN GND – 0.3V GND – 0.3V –VREF/2 0.1 GND 0.1 TYP MAX VCC + 0.3V VCC + 0.3V VREF/2 VCC VCC – 0.1V VCC UNITS V V V V V V pF pF pF pF 3.5 3.5 3.5 3.5 –100 10 100 nA Varies, See Applications Section TYP MAX UNITS V 2.5 0.8 2.5 0.8 –10 –10 10 10 10 10 V V V µA µA pF pF V ● ● ● ● ● VCC – 0.5V 0.4V VCC – 0.5V 0.4V –10 10 V V V µA sn2440, 2440fas 3 LTC2440 POWER REQUIRE E TS SYMBOL VCC ICC PARAMETER Supply Voltage Supply Current Conversion Mode Sleep Mode CS = 0V (Note 7) CS = VCC (Note 7) The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) CONDITIONS ● ● ● TI I G CHARACTERISTICS SYMBOL fEOSC tHEO tLEO tCONV PARAMETER External Oscillator Frequency Range External Oscillator High Period External Oscillator Low Period Conversion Time The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) CONDITIONS ● ● ● fISCK DISCK fESCK tLESCK tHESCK tDOUT_ISCK tDOUT_ESCK t1 t2 t3 t4 tKQMAX tKQMIN t5 t7 t8 Internal SCK Frequency Internal SCK Duty Cycle External SCK Frequency Range External SCK Low Period External SCK High Period Internal SCK 32-Bit Data Output Time External SCK 32-Bit Data Output Time CS ↓ to SDO Low Z CS ↑ to SDO High Z CS ↓ to SCK ↓ CS ↓ to SCK ↑ SCK ↓ to SDO Valid SDO Hold After SCK ↓ SCK Set-Up Before CS ↓ SDI Setup Before SCK ↑ SDI Hold After SCK ↑ Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: All voltage values are with respect to GND. Note 3: VCC = 4.5 to 5.5V unless otherwise specified. VREF = REF + – REF –, VREFCM = (REF + + REF –)/2; VIN = IN + – IN –, VINCM = (IN + + IN –)/2. Note 4: FO pin tied to GND or to external conversion clock source with fEOSC = 10MHz unless otherwise specified. Note 5: Guaranteed by design, not subject to test. Note 6: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. 4 UW MIN 4.5 TYP MAX 5.5 UNITS V mA µA 8 8 11 30 UW MIN 0.1 25 25 0.99 126 TYP MAX 20 10000 10000 UNITS MHz ns ns ms ms ms OSR = 256 (SDI = 0) OSR = 32768 (SDI = 1) External Oscillator (Note 10, 13) Internal Oscillator (Note 9) External Oscillator (Notes 9, 10) (Note 9) (Note 8) (Note 8) (Note 8) Internal Oscillator (Notes 9, 11) External Oscillator (Notes 9, 10) (Note 8) (Note 12) (Note 12) (Note 9) (Notes 8, 12) (Note 5) ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● 1.13 145 1.33 170 40 • OSR + 170 fEOSC(kHz) 0.8 45 25 25 41.6 35.3 320/fEOSC 32/fESCK 0 0 5 25 25 15 50 10 10 Note 5 Note 5 25 25 30.9 0.9 fEOSC/10 1 55 20 MHz Hz % MHz ns ns µs s s ns ns µs ns ns ns ns ns ns Note 7: The converter uses the internal oscillator. Note 8: The converter is in external SCK mode of operation such that the SCK pin is used as a digital input. The frequency of the clock signal driving SCK during the data output is fESCK and is expressed in Hz. Note 9: The converter is in internal SCK mode of operation such that the SCK pin is used as a digital output. In this mode of operation, the SCK pin has a total equivalent load capacitance of CLOAD = 20pF. Note 10: The external oscillator is connected to the FO pin. The external oscillator frequency, fEOSC, is expressed in kHz. Note 11: The converter uses the internal oscillator. FO = 0V. Note 12: Guaranteed by design and test correlation. Note 13: There is an internal reset that adds an additional 1µs (typical) to the conversion time. sn2440, 2440fas LTC2440 TYPICAL PERFOR A CE CHARACTERISTICS Integral Nonlinearity fOUT = 3.5kHz 10 VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C INL ERROR (ppm OF VREF) INL ERROR (ppm OF VREF) 0 0 INL ERROR (ppm OF VREF) –5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) Integral Nonlinearity fOUT = 440Hz 10 VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C INL ERROR (ppm OF VREF) 10 INL ERROR (ppm OF VREF) INL ERROR (ppm OF VREF) 0 –5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) Integral Nonlinearity fOUT = 55Hz 10 VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C INL ERROR (ppm OF VREF) 10 INL ERROR (ppm OF VREF) 0 0 INL ERROR (ppm OF VREF) –5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) UW 1.5 2 2440 G01 Integral Nonlinearity fOUT = 1.76kHz 10 VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C 10 Integral Nonlinearity fOUT = 880Hz VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C 0 –5 –5 2.5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) 1.5 2 2.5 2440 G02 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) 1.5 2 2.5 2440 G03 Integral Nonlinearity fOUT = 220Hz VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C 10 Integral Nonlinearity fOUT = 110Hz VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C 0 0 –5 –5 1.5 2 2.5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) 1.5 2 2.5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) 1.5 2 2.5 2440 G04 2440 G05 2440 G06 Integral Nonlinearity fOUT = 27.5Hz VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C 10 Integral Nonlinearity fOUT = 13.75Hz VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C 0 –5 –5 1.5 2 2.5 2440 G07 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) 1.5 2 2.5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) 1.5 2 2.5 2440 G08 2440 G09 sn2440, 2440fas 5 LTC2440 TYPICAL PERFOR A CE CHARACTERISTICS Integral Nonlinearity fOUT = 6.875Hz 10 VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V FO = GND TA = 25°C 10.0 INL ERROR (ppm OF VREF) INL ERROR (ppm OF VREF) INL ERROR (ppm OF VREF) 0 –5 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) Integral Nonlinearity vs Temperature 10 VCC = 5V VREF = 2.5V VREF+ = 2.5V – 5 VREF = GND VINCM = 1.25V OSR = 32768 FO = GND 10 –FULL-SCALE ERROR (ppm OF VREF) INL ERROR (ppm OF VREF) INL ERROR (ppm OF VREF) TA = – 55°C 0 TA = 25°C –5 TA = 125°C –10 –1.25 –0.75 0.25 –0.25 VIN (V) +Full-Scale Error vs VREF 20 10 +FULL-SCALE ERROR (ppm OF VREF) FULL-SCALE ERROR (ppm OF VREF) 10 8 7 6 5 4 3 VREF = 2.5V 2 VREF+ = 2.5V – 1 VREF = GND VINCM = 1.25V 0 4.7 4.5 OSR = 32768 FO = GND TA = 25°C 5.1 4.9 VCC (V) 5.3 5.5 2440 G17 FULL-SCALE ERROR (ppm OF VREF) 0 –10 –20 0 1 3 2 VREF (V) 6 UW 2440 G10 Integral Nonlinearity vs Conversion Rate VCC = 5V VREF = 5V VREF+ = 5V VREF– = GND –2.5V ≤ VIN ≤ 2.5V VINCM = 2.5V FO = GND TA = 25°C Integral Nonlinearity vs VINCM 10 VINCM = 3.75V 5 VINCM = 2.5V 0 VINCM = 1.25V –5 VCC = 5V OSR = 32768 FO = GND VREF = 2.5V VREF+ = 2.5V TA = 25°C VREF– = GND –10 –0.75 –0.25 0.25 –1.25 VIN (V) 7.5 5.0 2.5 0 1.5 2 2.5 0 500 1000 1500 2000 2500 3000 3500 CONVERSION RATE (Hz) 2440 G11 0.75 1.25 2440 G12 Integral Nonlinearity vs Temperature VCC = 5V VREF = 5V VREF+ = 5V – 5 VREF = GND VINCM = 2.5V OSR = 32768 FO = GND 20 –Full-Scale Error vs VREF 10 0 TA = 125°C TA = 25°C 0 TA = – 25°C –5 –10 0.75 1.25 2440 G13 –10 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 VIN (V) 1.5 2 2.5 –20 0 1 3 2 VREF (V) 4 5 2440 G15 2440 G14 –Full-Scale Error vs VCC 0 9 +Full-Scale Error vs VCC OSR = 32768 VREF = 2.5V –1 VREF+ = 2.5V FO = GND – = GND T = 25°C V –2 VREF = 1.25V A INCM –3 –4 –5 –6 –7 –8 –9 –10 4.5 4.7 5.1 4.9 VCC (V) 5.3 5.5 2440 G18 4 5 2440 G16 sn2440, 2440fas LTC2440 TYPICAL PERFOR A CE CHARACTERISTICS Negative Full-Scale Error vs Temperature 20 FULL-SCALE ERROR (ppm OF VREF) FULL-SCALE ERROR (ppm OF VREF) 15 10 4.5V 5 0 –5 –10 –15 –20 –55 –25 5.5V 5V 10 5 0 –5 4.5V –10 –15 –20 –55 –25 5V VCC = 4.5V VREF = 4.5V VREF+ = 4.5V VREF– = GND VINCM = 2.25V OSR = 32768 FO = GND VCC = 5.5V, 5V VREF = 5V VREF+ = 5V VREF– = GND VINCM = 2.5V OSR = 32768 FO = GND 95 125 2440 G20 5.5V OFFSET ERROR (ppm OF VREF) VCC = 4.5V VREF = 4.5V VREF+ = 4.5V VREF– = GND VINCM = 2.25V OSR = 32768 FO = GND VCC = 5.5V, 5V VREF = 5V VREF+ = 5V VREF– = GND VINCM = 2.5V OSR = 32768 FO = GND 35 5 65 TEMPERATURE (°C) Offset Error vs Conversion Rate VCC = 5V VREF = 5V VREF+ = 5V – 2.5 VREF = GND 5.0 VIN+ = VIN– = GND FO = GND TA = 25°C 5.0 OFFSET ERROR (ppm OF VREF) OFFSET ERROR (ppm OF VREF) 0 RMS NOISE (µV) –2.5 –5.0 0 500 1000 1500 2000 2500 3000 3500 CONVERSION RATE (Hz) 2440 G22 Offset Error vs Temperature 5.0 20 18 2.5 LINEARITY (BITS) VCC = 5V 0 VCC = 4.5V VREF = 2.5V VREF+ = 2.5V VREF– = GND VIN+ = VIN– = GND OSR = 256 FO = GND –25 VCC = 5.5V, 5V VREF = 5V VREF+ = 5V VREF– = GND VIN+ = VIN– = GND OSR = 256 FO = GND 95 125 2440 G25 OFFSET ERROR (µV) VCC = 5.5V VCC = 4.5V 12 10 8 6 4 2 EXTERNAL CLOCK 10MHz (OR INTERNAL OSCILLATOR) EXTERNAL CLOCK 20MHz RMS NOISE (µV) –2.5 –5.0 –55 5 35 65 TEMPERATURE (°C) UW 95 2440 G19 Positive Full-Scale Error vs Temperature 20 15 5.0 Offset Error vs VCC VREF = 2.5V VREF+ = 2.5V VREF– = GND + – 2.5 VIN = VIN = GND OSR = 32768 FO = GND TA = 25°C 0 –2.5 125 35 5 65 TEMPERATURE (°C) –5.0 4.5 4.7 5.1 4.9 VCC (V) 5.3 5.5 2440 G21 Offset Error vs VINCM VCC = 5V VREF = 5V VREF+ = 5V – 2.5 VREF = GND VIN+ = VIN– = VINCM OSR = 32768 FO = GND TA = 25°C RMS Noise vs Temperature 3.5 3.0 2.5 2.0 1.5 1.0 VCC = 4.5V VREF = 2.5V VREF+ = 2.5V VREF– = GND VIN+ = VIN– = GND OSR = 256 FO = GND –25 VCC = 5.5V, 5V VREF = 5V VREF+ = 5V VREF– = GND VIN+ = VIN– = GND OSR = 256 FO = GND 95 125 2440 G24 VCC = 4.5V VCC = 5V VCC = 5.5V 0 –2.5 –5.0 0 1 3 2 VINCM (V) 4 5 2440 G23 0.5 –55 5 35 65 TEMPERATURE (°C) INL vs Output Rate (OSR = 128) External Clock Sweep 10MHz to 20MHz 5 RMS Noise vs Output Rate (OSR = 128) External Clock Sweep 10MHz to 20MHz 16 14 4 3 2 VREF = VCC = 5V TEMP = 25°C SWEEP (VIN – VREF/2) TO VREF/2 2500 3000 3500 OUTPUT RATE (Hz) 4000 2440 G26 1 VREF = VCC = 5V TEMP = 25°C VIN ± VREF/2 2500 3000 3500 OUTPUT RATE (Hz) 4000 2440 G27 0 2000 0 2000 sn2440, 2440fas 7 LTC2440 PI FU CTIO S GND (Pins 1, 8, 9, 16): Ground. Multiple ground pins internally connected for optimum ground current flow and VCC decoupling. Connect each one of these pins to a ground plane through a low impedance connection. All four pins must be connected to ground for proper operation. VCC (Pin 2): Positive Supply Voltage. Bypass to GND (Pin 1) with a 10µF tantalum capacitor in parallel with 0.1µF ceramic capacitor as close to the part as possible. REF + (Pin 3), REF – (Pin 4): Differential Reference Input. The voltage on these pins can have any value between GND and VCC as long as the reference positive input, REF +, is maintained more positive than the reference negative input, REF –, by at least 0.1V. IN + (Pin 5), IN – (Pin 6): Differential Analog Input. The voltage on these pins can have any value between GND – 0.3V and VCC + 0.3V. Within these limits the converter bipolar input range (VIN = IN+ – IN–) extends from – 0.5 • (VREF ) to 0.5 • (VREF ). Outside this input range the converter produces unique overrange and underrange output codes. SDI (Pin 7): Serial Data Input. This pin is used to select the speed/resolution of the converter. If SDI is grounded (pin compatible with LTC2410) the device outputs data at 880Hz with 21 bits effective resolution. By tying SDI HIGH, the converter enters the ultralow noise mode (200nVRMS) with simultaneous 50/60Hz rejection at 6.9Hz output rate. SDI may be driven logic HIGH or LOW anytime during the conversion or sleep state in order to change the speed/resolution. The conversion immediately following the data output cycle will be valid and performed at the newly selected output rate/resolution. SDI may also be programmed by a serial input data stream under control of SCK during the data output cycle. One of ten speed/resolution ranges (from 6.9Hz/200nVRMS to 3.5kHz/21µVRMS) may be selected. The first conversion following a new selection is valid and performed at the newly selected speed/resolution. EXT (Pin 10): Internal/External SCK Selection Pin. This pin is used to select internal or external SCK for outputting data. If EXT is tied low (pin compatible with the LTC2410), the device is in the external SCK mode and data is shifted out the device under the control of a user applied serial clock. If EXT is tied high, the internal serial clock mode is selected. The device generates its own SCK signal and outputs this on the SCK pin. A framing signal BUSY (Pin 15) goes low indicating data is being output. CS (Pin 11): Active LOW Digital Input. A LOW on this pin enables the SDO digital output and wakes up the ADC. Following each conversion the ADC automatically enters the Sleep mode and remains in this low power state as long as CS is HIGH. A LOW-to-HIGH transition on CS during the Data Output transfer aborts the data transfer and starts a new conversion. SDO (Pin 12): Three-State Digital Output. During the Data Output period, this pin is used as serial data output. When the chip select CS is HIGH (CS = VCC) the SDO pin is in a high impedance state. During the Conversion and Sleep periods, this pin is used as the conversion status output. The conversion status can be observed by pulling CS LOW. SCK (Pin 13): Bidirectional Digital Clock Pin. In Internal Serial Clock Operation mode, SCK is used as digital output for the internal serial interface clock during the Data Output period. In External Serial Clock Operation mode, SCK is used as digital input for the external serial interface clock during the Data Output period. The Serial Clock Operation mode is determined by the logic level applied to the EXT pin. FO (Pin 14): Frequency Control Pin. Digital input that controls the internal conversion clock. When FO is connected to VCC or GND, the converter uses its internal oscillator running at 9MHz. The conversion rate is determined by the selected OSR such that tCONV (in ms) = (40 • OSR + 170)/ 9000 (tCONV = 1.137ms at OSR = 256, tCONV = 146ms at OSR = 32768). The first null is located at 8/tCONV, 7kHz at OSR = 256 and 55Hz (simultaneous 50/60Hz) at OSR = 32768. When FO is driven by an oscillator with frequency fEOSC (in kHz), the conversion time becomes tCONV = (40 • OSR + 170)/fEOSC (in ms) and the first null remains 8/tCONV. BUSY (Pin 15): Conversion in Progress Indicator. For compatibility with the LTC2410, this pin should not be tied to ground. This pin is HIGH while the conversion is in progress and goes LOW indicating the conversion is complete and data is ready. It remains low during the sleep and data output states. At the conclusion of the data output state, it goes HIGH indicating a new conversion has begun. sn2440, 2440fas 8 U U U LTC2440 FU CTIO AL BLOCK DIAGRA VCC GND AUTOCALIBRATION AND CONTROL IN + IN – + –∫ ∫ ∫ ∑ ADC SERIAL INTERFACE DAC +– REF + REF – Figure 1. Functional Block Diagram TEST CIRCUITS SDO 1.69k CLOAD = 20pF SDO Hi-Z TO VOH VOL TO VOH VOH TO Hi-Z 2440 TA03 APPLICATIO S I FOR ATIO CONVERTER OPERATION Converter Operation Cycle The LTC2440 is a high speed, delta-sigma analog-todigital converter with an easy to use 4-wire serial interface (see Figure 1). Its operation is made up of three states. The converter operating cycle begins with the conversion, followed by the low power sleep state and ends with the data output (see Figure 2). The 4-wire interface consists of serial data input (SDI), serial data output (SDO), serial clock (SCK) and chip select (CS). The interface, timing, W INTERNAL OSCILLATOR FO (INT/EXT) SDO SCK CS SDI BUSY 2440 F01 U W U U U U DECIMATING FIR EXT VCC 1.69k CLOAD = 20pF Hi-Z TO VOL VOH TO VOL VOL TO Hi-Z 2440 TA04 CONVERT SLEEP FALSE CS = LOW AND SCK TRUE DATA OUTPUT 2440 F02 Figure 2. LTC2440 State Transition Diagram sn2440, 2440fas 9 LTC2440 APPLICATIO S I FOR ATIO operation cycle and data out format is compatible with the LTC2410. Initially, the LTC2440 performs a conversion. Once the conversion is complete, the device enters the sleep state. While in this sleep state, power consumption is reduced below 10µA. The part remains in the sleep state as long as CS is HIGH. The conversion result is held indefinitely in a static shift register while the converter is in the sleep state. Once CS is pulled LOW, the device begins outputting the conversion result. There is no latency in the conversion result. The data output corresponds to the conversion just performed. This result is shifted out on the serial data out pin (SDO) under the control of the serial clock (SCK). Data is updated on the falling edge of SCK allowing the user to reliably latch data on the rising edge of SCK (see Figure 3). The data output state is concluded once 32-bits are read out of the ADC or when CS is brought HIGH. The device automatically initiates a new conversion and the cycle repeats. Through timing control of the CS, SCK and EXT pins, the LTC2440 offers several flexible modes of operation (internal or external SCK). These various modes do not require programming configuration registers; moreover, they do not disturb the cyclic operation described above. These modes of operation are described in detail in the Serial Interface Timing Modes section. Ease of Use The LTC2440 data output has no latency, filter settling delay or redundant data associated with the conversion cycle. There is a one-to-one correspondence between the conversion and the output data. Therefore, multiplexing multiple analog voltages is easy. Speed/resolution adjustments may be made seamlessly between two conversions without settling errors. The LTC2440 performs offset and full-scale calibrations every conversion cycle. This calibration is transparent to the user and has no effect on the cyclic operation described above. The advantage of continuous calibration is extreme stability of offset and full-scale readings with respect to time, supply voltage change and temperature drift. 10 U Power-Up Sequence The LTC2440 automatically enters an internal reset state when the power supply voltage VCC drops below approximately 2.2V. This feature guarantees the integrity of the conversion result and of the serial interface mode selection. When the VCC voltage rises above this critical threshold, the converter creates an internal power-on-reset (POR) signal with a duration of approximately 0.5ms. The POR signal clears all internal registers. Following the POR signal, the LTC2440 starts a normal conversion cycle and follows the succession of states described above. The first conversion result following POR is accurate within the specifications of the device if the power supply voltage is restored within the operating range (4.5V to 5.5V) before the end of the POR time interval. Reference Voltage Range This converter accepts a truly differential external reference voltage. The absolute/common mode voltage specification for the REF + and REF – pins covers the entire range from GND to VCC. For correct converter operation, the REF + pin must always be more positive than the REF – pin. The LTC2440 can accept a differential reference voltage from 0.1V to VCC. The converter output noise is determined by the thermal noise of the front-end circuits, and as such, its value in microvolts is nearly constant with reference voltage. A decrease in reference voltage will not significantly improve the converter’s effective resolution. On the other hand, a reduced reference voltage will improve the converter’s overall INL performance. Input Voltage Range The analog input is truly differential with an absolute/ common mode range for the IN+ and IN– input pins extending from GND – 0.3V to VCC + 0.3V. Outside these limits, the ESD protection devices begin to turn on and the errors due to input leakage current increase rapidly. Within these limits, the LTC2440 converts the bipolar differential input signal, VIN = IN+ – IN–, from – FS = – 0.5 • VREF to +FS = 0.5 • VREF where VREF = sn2440, 2440fas W U U LTC2440 APPLICATIO S I FOR ATIO REF+ – REF–. Outside this range, the converter indicates the overrange or the underrange condition using distinct output codes. Output Data Format The LTC2440 serial output data stream is 32-bits long. The first 3-bits represent status information indicating the sign and conversion state. The next 24-bits are the conversion result, MSB first. The remaining 5-bits are sub LSBs beyond the 24-bit level that may be included in averaging or discarded without loss of resolution. In the case of ultrahigh resolution modes, more than 24 effective bits of performance are possible (see Table 3). Under these conditions, sub LSBs are included in the conversion result and represent useful information beyond the 24-bit level. The third and fourth bit together are also used to indicate an underrange condition (the differential input voltage is below –FS) or an overrange condition (the differential input voltage is above +FS). For input conditions in excess of twice full scale (|VIN| ≥ VREF), the converter may indicate either overrange or underrange. Once the input returns to the normal operating range, the conversion result is immediately accurate within the specifications of the device. Bit 31 (first output bit) is the end of conversion (EOC) indicator. This bit is available at the SDO pin during the conversion and sleep states whenever the CS pin is LOW. This bit is HIGH during the conversion and goes LOW when the conversion is complete. Bit 30 (second output bit) is a dummy bit (DMY) and is always LOW. Bit 29 (third output bit) is the conversion result sign CS BIT 31 SDO Hi-Z EOC BIT 30 “0” BIT 29 SIG SCK 1 2 BUSY 2440 F03 SLEEP Figure 3. Output Data Timing sn2440, 2440fas U indicator (SIG). If VIN is >0, this bit is HIGH. If VIN is