LTC2905CDDB

LTC2904/LTC2905 Precision Dual Supply Monitors with Pin-Selectable Thresholds FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Monitors Two Inputs Simultaneously Nine Threshold Combinations Three Supply Tolerances (5%, 7.5%, 10%) Guaranteed Threshold Accuracy: ±1.5% of Monitored Voltage Over Temperature Internal VCC Auto Select Power Supply Glitch Immunity 200ms Reset Time Delay (LTC2904 Only) Adjustable Reset Time Delay (LTC2905 Only) Open Drain RST Output Guaranteed RST for V1 ≥ 1V or V2 ≥ 1V Low Profile (1mm) SOT-23 (ThinSOTTM) and Plastic (3mm x 2mm) DFN Packages The LTC®2904/LTC2905 are dual supply monitors intended for systems with two supply voltages. The dual supply monitors have a common reset output with delay (200ms for the LTC2904 and adjustable using an external capacitor for the LTC2905). This product provides a precise, space-conscious and micropower solution for supply monitoring. The LTC2904/LTC2905 feature a tight 1.5% threshold accuracy over the whole operating temperature range, and glitch immunity to ensure reliable reset operation without false triggering. The open drain RST output is guaranteed to be in the correct state for inputs down to 1V. The LTC2904/LTC2905 also feature three programming input pins, which program the threshold and tolerance level without requiring any external components. These three programming pins provide a total of 27 different voltage level and tolerance combinations, eliminating the need to have different parts for development and implementation of different systems with different voltage levels requiring monitoring function. APPLICATIO S ■ ■ ■ ■ Desktop and Notebook Computers Handheld Devices Network Servers Core, I/O Monitor , LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. TYPICAL APPLICATIO 5V, 3.3V Dual Supply Monitor with 5% Tolerance DC/DC CONVERTER 5V 3.3V SYSTEM LOGIC Table 1. Voltage Threshold Programming V1 5.0 3.3 3.3 3.3 3.3 2.5 2.5 2.5 2.5 V2 3.3 2.5 1.8 1.5 1.2 1.8 1.5 1.2 1.0 S1 V1 Open V1 Open Open GND GND GND V1 S2 V1 GND Open V1 Open GND Open V1 GND V1 0.1µF S1 S2 TOL LTC2905 V2 0.1µF TMR 22nF GND RST 29045 TA01 U sn29045 29045fs U U 1 LTC2904/LTC2905 ABSOLUTE AXI U RATI GS Terminal Voltages V1, V2 ..................................................... –0.3V to 7V S1, S2, TOL .............................. –0.3V to (VCC +0.3V) RST ......................................................... –0.3V to 7V RST (LTC2904) ....................................... –0.3V to 7V TMR (LTC2905) ...................................... –0.3V to 7V PACKAGE/ORDER I FOR ATIO TOP VIEW GND 1 RST 2 RST/TMR* 3 V2 4 9 8 7 6 5 TOL S1 S2 V1 ORDER PART NUMBER LTC2904CDDB LTC2904IDDB LTC2905CDDB LTC2905IDDB DDB8 PART MARKING LBCZ LBDB LTAJF LBCY TOP VIEW V2 1 RST/TMR* 2 RST 3 GND 4 8 V1 7 S2 6 S1 5 TOL DDB8 PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN EXPOSED PAD IS GND (PIN 9), MUST BE SOLDERED TO PCB * RST FOR LTC2904 TMR FOR LTC2905 TJMAX = 125°C, θJA = 250°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V1 = 2.5V, V2 = 1V, S1 = TOL = V1, S2 = 0V, unless otherwise noted. (Notes 2, 3, 4) SYMBOL VRT50 PARAMETER 5V, 5% Reset Threshold 5V, 7.5% Reset Threshold 5V, 10% Reset Threshold 3.3V, 5% Reset Threshold 3.3V, 7.5% Reset Threshold 3.3V, 10% Reset Threshold 2.5V, 5% Reset Threshold 2.5V, 7.5% Reset Threshold 2.5V, 10% Reset Threshold 1.8V, 5% Reset Threshold 1.8V, 7.5% Reset Threshold 1.8V, 10% Reset Threshold 1.5V, 5% Reset Threshold 1.5V, 7.5% Reset Threshold 1.5V, 10% Reset Threshold 1.2V, 5% Reset Threshold 1.2V, 7.5% Reset Threshold 1.2V, 10% Reset Threshold 1V, 5% Reset Threshold 1V, 7.5% Reset Threshold 1V, 10% Reset Threshold CONDITIONS V1 Input Threshold ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ELECTRICAL CHARACTERISTICS VRT33 V1, V2 Input Threshold VRT25 V1, V2 Input Threshold VRT18 V2 Input Threshold VRT15 V2 Input Threshold VRT12 V2 Input Threshold VRT10 V2 Input Threshold 2 U U W WW U W (Note 1, 2) Operating Temperature Range LTC2904C/LTC2905C ................................ 0°C to 70°C LTC2904I/LTC2905I ..............................–40°C to 85°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER LTC2904CTS8 LTC2904ITS8 LTC2905CTS8 LTC2905ITS8 TS8 PART MARKING LTBCJ LTBCK LTAJD LTAJE TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 * RST FOR LTC2904 TMR FOR LTC2905 TJMAX = 125°C, θJA = 250°C/W MIN 4.600 4.475 4.350 3.036 2.954 2.871 2.300 2.238 2.175 1.656 1.611 1.566 1.380 1.343 1.305 1.104 1.074 1.044 0.920 0.895 0.870 TYP 4.675 4.550 4.425 3.086 3.003 2.921 2.338 2.275 2.213 1.683 1.638 1.593 1.403 1.365 1.328 1.122 1.092 1.062 0.935 0.910 0.885 MAX 4.750 4.625 4.500 3.135 3.053 2.970 2.375 2.313 2.250 1.710 1.665 1.620 1.425 1.388 1.350 1.140 1.110 1.080 0.950 0.925 0.900 UNITS V V V V V V V V V V V V V V V V V V V V V sn29045 29045fs LTC2904/LTC2905 The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V1 = 2.5V, V2 = 1V, S1 = TOL = V1, S2 = 0V, unless otherwise noted. (Notes 2, 3) SYMBOL VCCMIN IV1 IV2 ITMR(UP) ITMR(DOWN) tRST tRST tUV VOL VOH PARAMETER V1 Input Current V2 Input Current TMR Pull-Up Current TMR Pull-Down Current Reset Time-Out Period Reset Time-Out Period Vx Undervoltage Detect to RST or RST Output Voltage Low RST, RST Output Voltage High RST, RST (Notes 2, 5) Low Level Input Voltage High Level Input Voltage Pin Voltage when Left in Open State I = –10µA I = 0µA I = 10µA (LTC2905) (LTC2905) (LTC2904) (LTC2905) CTMR = 22nF Vx Less than Reset Threshold VRTX by More than 1% I = 2.5mA I = 100µA; V1 = 1V (RST Only) I = –1µA ● ● ● ELECTRICAL CHARACTERISTICS CONDITIONS ● ● ● ● ● ● ● MIN TYP 65 0.4 MAX 1 130 1.0 –2.7 2.7 260 260 UNITS V µA µA µA µA ms ms µs Minimum Internal Operating Voltage (Note 2) RST in Correct Logic State Includes Input Current to Three-State Pins VTMR = 0V VTMR = 1.4V –1.5 1.5 140 140 –2.1 2.1 200 200 150 0.15 0.05 0.4 0.3 V V V VCC –1 Three-State Inputs S1, S2, TOL VIL VIH VZ ● ● ● ● ● 0.4 1.4 0.7 0.9 1.1 ±25 V V V V V µA IVPG Programming Input Current (Note 6) Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The greater of V1, V2 is the internal supply voltage (VCC). Note 3: All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. Note 4: For reset thresholds test conditions refer to the voltage threshold programming table in the Applications Information section. Note 5: The output pins RST and RST have an internal pull-up to VCC of typically –6µA. However, an external pull-up resistor may be used when faster rise time is required or for VOH voltages greater than VCC. Note 6: The input current to the three-state input pins are the pull-up and the pull-down current when the pins are either set to V1 or GND respectively. In the open state, the maximum leakage current to V1 or GND permissible is 10µA. sn29045 29045fs 3 LTC2904/LTC2905 TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. 5V Threshold Voltage vs Temperature 4.75 THRESHOLD VOLTAGE, VRT50 (V) THRESHOLD VOLTAGE, VRT33 (V) 4.70 4.65 4.60 4.55 4.50 4.45 4.40 4.35 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G01 3.070 THRESHOLD VOLTAGE, VRT25 (V) 5% 7.5% 10% 1.8V Threshold Voltage vs Temperature 1.705 THRESHOLD VOLTAGE, VRT18 (V) THRESHOLD VOLTAGE, VRT15 (V) 1.685 1.665 1.645 1.625 1.605 1.585 1.565 –50 10% 7.5% 5% 1.405 1.385 1.425 THRESHOLD VOLTAGE, VRT12 (V) –25 25 50 0 TEMPERATURE (°C) 1V Threshold Voltage vs Temperature 0.950 THRESHOLD VOLTAGE, VRT10 (V) 0.940 0.930 0.920 IV1 (µA) 0.910 0.900 0.890 0.880 0.870 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G07 5% 21.0 7.5% IV2 (µA) 10% 4 UW 75 29045 G04 3.3V Threshold Voltage vs Temperature 3.120 5% 2.375 2.5V Threshold Voltage vs Temperature 5% 2.325 7.5% 2.275 3.020 7.5% 2.970 10% 2.920 2.225 10% 2.870 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G02 2.175 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G03 1.5V Threshold Voltage vs Temperature 1.135 5% 1.125 1.115 1.105 1.095 1.085 1.075 1.065 1.055 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G05 1.2V Threshold Voltage vs Temperature 5% 7.5% 1.365 1.345 10% 1.325 1.305 –50 7.5% 10% 100 1.045 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G06 IV1 vs Temperature 21.5 V1 = 5V V2 = 3.3V S1 = S2 = TOL = 1.4V 1.8 1.7 1.6 20.5 1.5 1.4 19.5 1.3 IV2 vs Temperature V1 = 5V V2 = 3.3V S1 = S2 = TOL = 1.4V 20.0 19.0 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G08 1.2 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G09 sn29045 29045fs LTC2904/LTC2905 TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. Typical Transient Duration vs Comparator Overdrive (V1, V2) 700 10000 IV2 vs Temperature 20.0 19.5 19.0 TYPICAL TRANSIENT DURATION (µs) RESET TIME OUT PERIOD, tRST (ms) V1 = 2.5V V2 = 3.3V S1 = S2 = TOL = 1.4V IV2 (µA) 18.5 18.0 17.5 17.0 –50 –25 25 50 0 TEMPERATURE (°C) Reset Time-Out Period (tRST) vs Temperature 235 5 RESET TIME-OUT PERIOD, tRST (ms) CRT = 22nF 230 (FILM) 225 220 215 210 205 200 195 –50 –25 0 25 50 75 100 29045 G13 RST OUTPUT VOLTAGE (V) RST OUTPUT VOLTAGE (V) TEMPERATURE (°C) RST Output Voltage vs V1 5 RST PULL-DOWN CURRENT, IRST (mA) 4 4 RST AT 150mV 3 2 1 0 RST PULL-DOWN CURRENT, IRST (mA) V2 = S1 = S2 = TOL = V1 10pF CAPACITOR AT RST RST OUTPUT VOLTAGE (V) 3 2 1 0 –1 0 1 2 V1 (V) 3 UW 75 100 29045 G10 Reset Time Out Period (tRST) vs Capacitance (CTMR) 600 500 400 300 200 100 0 1 10 100 0.1 COMPARATOR OVERDRIVE VOLTAGE (% OF VRTX) 29045 G11 1000 RESET OCCURS ABOVE CURVE 100 10 1 0.1 10p 100p 1n 10n CTMR (FARAD) 100n 1µ 29045 G12 RST Output Voltage vs V1 5 V2 = S1 = S2 = TOL = V1 10k PULL-UP RESISTOR 4 3 2 1 0 –1 4 3 2 1 0 –1 RST Output Voltage vs V1 V2 = S1 = S2 = TOL = V1 10k PULL-UP RESISTOR 0 1 2 V1 (V) 3 4 5 29045 G14 0 1 2 V1 (V) 3 4 5 29045 G15 RST Pull-Down Current (IRST) vs Supply Voltage (VCC) 5 V2 = S1 = S2 = TOL = V1 NO PULL-UP R 5 4 RST Pull-Down Current (IRST) vs Supply Voltage (VCC) S1 = V2 = V1 TOL = S2 = GND NO PULL-UP R RST AT 150mV 3 2 1 0 RST AT 50mV RST AT 50mV 4 5 29045 G16 0 1 2 3 4 SUPPLY VOLTAGE, VCC (V) 5 29045 G17 0 1 2 3 4 SUPPLY VOLTAGE, VCC (V) 5 29045 G18 sn29045 29045fs 5 LTC2904/LTC2905 TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. RST Output Voltage Low (VOL) vs RST Pull-Down Current (IRST) 1.8 RST OUTPUT VOLTAGE LOW, VOL (V) RST OUTPUT VOLTAGE LOW, VOL (V) 85°C RST PULL-UP CURRENT, IRST (µA) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 V1 = 5V V2 = 3V S1 = S2 = TOL = V1 NO PULL-UP R 25°C –40°C 10 30 40 50 60 20 RST PULL-DOWN CURRENT, IRST (mA) 29045 G19 RST Pull-Up Current (IRST) vs Supply Voltage (VCC) –16 TOL = V1 3.0 RST OUTPUT VOLTAGE HIGH, VOH (V) RST PULL-UP CURRENT, IRST (µA) –14 –12 –10 –8 –6 –4 –2 0 2.0 VRT25 2.5 VRT33 VRT50 5.0 3.5 3.0 4.5 4.0 SUPPLY VOLTAGE, VCC (V) RST OUTPUT VOLTAGE HIGH, VOH (V) IS1, IS2, ITOL vs Temperature 20 S1 = S2 = TOL = 3.3V 19 18 –20 –19 –18 IS1, IS2, ITOL (µA) 16 15 14 13 12 11 10 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G25 IS1, IS2, ITOL (µA) 17 6 UW 29045 G22 RST Output Voltage Low (VOL) vs RST Pull-Down Current (IRST) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 10 30 40 50 60 20 RST PULL-DOWN CURRENT, IRST (mA) 29045 G20 RST Pull-Up Current (IRST) vs Supply Voltage (VCC) –18 TOL = GND –16 –14 –12 –10 –8 –6 –4 –2 VRT25 0 2.0 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE, VCC (V) 5.0 VRT33 VRT50 V1 = 5V V2 = 3.3V S1 = S2 = TOL = V1 NO PULL-UP R 85°C 25°C –40°C 29045 G21 RST Output Voltage High (VOH) vs RST Output Source Current (IRST) V1 = 3.3V V2 = 1.8V S1 = TOL =V1 S2 = OPEN NO PULL-UP R 3.5 3.0 2.5 2.0 RST Output Voltage High (VOH) vs RST Output Source Current (IRST) V1 = 3.3V V2 = 1.5V S1 = TOL = V1 S2 = OPEN NO PULL-UP R 2.5 2.0 1.5 85°C –40°C 25°C –40°C 1.5 1.0 0.5 85°C 25°C –8 –7 –6 –5 –4 –3 –2 –1 OUTPUT SOURCE CURRENT, IRST (µA) 0 1.0 0.5 –12 –8 –6 –4 –2 –10 OUTPUT SOURCE CURRENT, IRST (µA) 0 29045 G23 29045 G24 IS1, IS2, ITOL vs Temperature S1 = S2 = TOL = GND –17 –16 –15 –14 –13 –12 –11 –10 –50 –25 25 50 0 TEMPERATURE (°C) 75 100 29045 G26 sn29045 29045fs LTC2904/LTC2905 PI FU CTIO S V2 (Pin 1/Pin 4): Voltage Input 2. Input for V2 monitor. Select from 3.3V, 2.5V, 1.8V, 1.5V, 1.2V or 1.0V. Refer to Table 1 for details. The greater of V1, V2 is also the internal supply voltage, VCC. Bypass this pin to ground with a 0.1µF (or greater) capacitor. RST (Pin 2/Pin 3): (LTC2904 Only) Reset Logic Output. When all voltage inputs are above the reset threshold for at least the programmed delay time, this pin pulls low. This pin has a weak pull-up to VCC and may be pulled above VCC using an external pull-up. TMR (Pin 2/Pin 3): (LTC2905 Only) Reset Delay Time Programming Pin. Attach an external capacitor (CTMR) to GND to set a reset delay time of 9ms/nF. Leaving the pin open generates a minimum delay of approximately 200µs. A 22nF capacitor will generate a 200ms reset delay time. RST (Pin 3/Pin 2): Inverted Reset Logic Output. Pulls low when any voltage input is below the reset threshold and is held low for programmed delay time after all voltage BLOCK DIAGRA LTC2904 6µA V1 VCC POWER DETECT RESISTOR NETWORK V2 RST BAND GAP REFERENCE + + – – W U U U (TS8 Package/DDB8 Package) inputs are above threshold. This pin has a weak pull-up to VCC and may be pulled above VCC using an external pull-up. GND (Pin 4/Pin 1, Pin 9): Ground. TOL (Pin 5/Pin 8): Three-state Input for Supply Tolerance Selection (5%, 7.5% or 10%). See the Applications Information section for tolerance selection chart (Table 2). S1 (Pin 6/Pin 7): Voltage Threshold Select Three-State Input. Connect to V1, GND or leave unconnected in open state (See Table 1). S2 (Pin 7/Pin 6): The Second Voltage Threshold Select Three-State Input. Connect to V1, GND or leave unconnected in open state (See Table 1). V1 (Pin 8/Pin 5): Voltage Input 1. Input for V1 monitor. Select from 5V, 3.3V, or 2.5V. See Table 1 for details. The greater of V1, V2 is also the internal supply voltage, VCC. Bypass this pin to ground with a 0.1µF (or greater) capacitor. VCC RST 200ms RESET PULSE GENERATOR 6µA VCC THREE-STATE DECODER GND 2904 BD S1 S2 TOL sn29045 29045fs 7 LTC2904/LTC2905 BLOCK DIAGRA W TMR VCC VCC POWER DETECT RESISTOR NETWORK LTC2905 V1 V2 BAND GAP REFERENCE TI I G DIAGRA VX VRTX tUV RST RST 8 + RESET PULSE GENERATOR + – 6µA RST – THREE-STATE DECODER 2905 BD GND S1 S2 TOL W VX Monitor Timing tRST 1V 1V 29045 TD UW sn29045 29045fs LTC2904/LTC2905 APPLICATIO S I FOR ATIO Supply Monitoring The LTC2904/LTC2905 are low power, high accuracy dual supply monitors with a common reset output and selectable thresholds. Reset delay is set to a nominal of 200ms for the LTC2904 and is adjustable using an external capacitor for the LTC2905. The two three-state input pins (S1 and S2) select one of nine possible threshold voltage combinations. Another three-state input pin sets the supply tolerance (5%, 7.5% or 10%). Both input voltages (V1 and V2) must be above predetermined thresholds for the reset not to be invoked. The LTC2904/LTC2905 assert the reset outputs during power-up, power-down and brownout conditions on either of the voltage inputs. Power-Up The greater of V1, V2 is the internal supply voltage (VCC). VCC powers the drive circuits for the RST pin. Therefore as soon as V1 or V2 reaches 1V during power-up, the RST output asserts low. VCC also powers the drive circuits for the RST pin in the LTC2904. Therefore, RST weakly pulls high when V1 or V2 reaches at least 1V. Threshold programming is complete when V1 reaches at least 2.17V. After programming, if either V1 or V2 falls below its programmed threshold, RST asserts low (RST weakly pulls high) as long as VCC is at least 1V. Once V1 and V2 rise above their thresholds, an internal timer is started. After the programmed delay time, RST weakly pulls high (RST asserts low). Power-Down On power-down, once either V1 or V2 inputs drops below its threshold, RST asserts logic low and RST weakly pulls high. VCC of at least 1V guarantees a logic low of 0.4V at RST. Programming Pins The three 3-state input pins: S1, S2 and TOL should be connected to GND, V1 or left unconnected during normal operation. Note that when left unconnected, the maximum U leakage current allowable from the pin to either GND or V1 is 10µA. In margining applications, all the 3-state input pins can be driven using a tri-state buffer. Note however the low and high output of the tri-state buffer has to satisfy the VIL and VIH of the 3-state pin listed in the Electrical Characteristics Table. Moreover, when the tri-state buffer is in the high impedance state, the maximum leakage current allowed from the pin to either GND or V1 is 10µA. Monitor Programming Connecting S1 and S2 to GND, V1 or leaving them open selects the LTC2904/LTC2905 input voltage combinations. Table 1 shows the nine possible combinations of nominal input voltages and their corresponding S1, S2 connections. Table 1. Voltage Threshold Programming V1 5.0 3.3 3.3 3.3 3.3 2.5 2.5 2.5 2.5 V2 3.3 2.5 1.8 1.5 1.2 1.8 1.5 1.2 1.0 S1 V1 Open V1 Open Open GND GND GND V1 S2 V1 GND Open V1 Open GND Open V1 GND Note: Open = open circuit or driven by a three state buffer in high impedance state with leakage current less than 10µA. W U U Tolerance Programming The three-state input pin, TOL programs the common supply tolerance for both V1 and V2 input voltages (5%, 7.5% or 10%). The larger the tolerance the lower the trip threshold. Table 2 shows the tolerances selection corresponding to a particular connection at the TOL pin. Table 2. Tolerance Programming Tolerance 5% 7.5% 10% TOL V1 Open GND sn29045 29045fs 9 LTC2904/LTC2905 APPLICATIO S I FOR ATIO Threshold Accuracy Reset threshold accuracy is of the utmost importance in a supply sensitive system. Ideally such a system should not reset while supply voltages are within a specified margin below the rated nominal level. Both of the LTC2904/ LTC2905 inputs have the same relative threshold accuracy. The specification for LTC2904/LTC2905 is ±1.5% of the programmed nominal input voltage (over the full operating temperature range). For example, when the LTC2904/LTC2905 are programmed to handle a 5V input with 10% tolerance (S1 = S2 = V1 and TOL = GND, refer to Table 1 and Table 2), it does not issue a reset command when V1 is above 4.5V. The typical 10% trip threshold is at 11.5% below the nominal input voltage level. Therefore, the typical trip threshold for the 5V input is 4.425V. With ±1.5% accuracy, the trip threshold range is 4.425V ±75mV over temperature (i.e. 10% to 13% below 5V). This implies that the monitored system must operate reliably down to 4.35V over temperature. The same system using a supervisor with only ±2.5% accuracy needs to work reliably down to 4.25V (4.375V ±125mV) or 15% below 5V, requiring the monitored system to work over a much wider operating voltage range. In any supervisory application, supply noise riding on the monitored DC voltage can cause spurious resets, particularly when the monitored voltage is near the reset threshold. A less desirable but common solution to this problem is to introduce hysteresis around the nominal threshold. Notice however, this hysteresis introduces an error term in the threshold accuracy. Therefore, a ±2.5% accurate monitor with ±1.0% hysteresis is equivalent to a ±3.5% monitor with no hysteresis. The LTC2904/LTC2905 takes a different approach to solve this problem of supply noise causing spurious reset. The first line of defense against this spurious reset is a first order low pass filter at the output of the comparator. Thus, the comparator output goes through a form of integration before triggering the output logic. Therefore, any kind of 10 U transient at the input of the comparator needs to be of sufficient magnitude and duration before it can trigger a change in the output logic. The second line of defense is the programmed delay time tRST (200ms for LTC2904 and using an external capacitor for LTC2905). This delay will eliminate the effect of any supply noise whose frequency is above 1/tRST on the RST and RST output. When either V1 or V2 drops below its programmed threshold, the RST pin asserts low (RST weakly pulls high). Then when the supply recovers above the programmed threshold, the reset-pulse-generator timer starts counting. If the supply remains above the programmed threshold when the timer finishes counting, the RST pin weakly pulls high (RST asserts low). However, if the supply falls below the programmed threshold any time during the period when the timer is still counting, the timer resets and it starts fresh when the supply next rises above the programmed threshold. Note that this second line of defense is only effective for a rising supply and does not affect the sensitivity of the system to a falling supply. Therefore, the first line of defense that works for both cases of rising and falling is necessary. These two approaches prevent spurious reset caused by supply noise without sacrificing the threshold accuracy. Selecting the Reset Timing Capacitor The reset time-out period for LTC2905 is adjustable in order to accommodate a variety of microprocessor applications. Connecting a capacitor, CTMR, between the TMR pin and ground sets the reset time-out period, tRST. The following formula determines the value of capacitor needed for a particular reset time-out period: CTMR = tRST • 110 • 10–9 [F/s] For example, using a standard capacitor value of 22nF would give a 22000/110 = 200ms delay. sn29045 29045fs W UU LTC2904/LTC2905 APPLICATIO S I FOR ATIO Figure 1 shows the desired delay time as a function of the value of the timer capacitor that should be used: 10000 RESET TIME OUT PERIOD, tRST (ms) 1000 100 10 1 0.1 10p 100p 1n 10n CTMR (FARAD) 100n 1µ 29045 F01 Figure 1. Reset Time-Out Period vs Capacitance Leaving the TMR pin open with no external capacitor generates a reset time-out of approximately 200µs. For long reset time-out, the only limitation is the availability of large value capacitor with low leakage. The TMR capacitor will never charge if the leakage current exceeds the minimum TMR charging current of 2.1µA (typical). RST and RST Output Characteristics The DC characteristics of the RST and RST pull-up and pull-down strength are shown in the Typical Performance Characteristics section. Both RST and RST have a weak internal pull-up to VCC = Max (V1, V2) and a strong pulldown to ground. The weak pull-up and strong pull-down arrangement allow these two pins to have open-drain behavior while possessing several other beneficial characteristics. The weak pull-ups eliminate the need for external pull-up resistors when the rise time on these pins is not critical. On the other hand, the open-drain RST configuration allows for wired-OR connections and can be useful when more than one signal needs to pull down on the RST line. U As noted in the Power-Up and Power-Down sections the circuits that drive RST and RST are powered by VCC. During fault condition, VCC of at least 1V guarantees a maximum VOL = 0.4V at RST. However, at VCC = 1V the weak pull-up current on RST is barely turned on. Therefore, an external pull-up resistor of no more than 100k is recommended on the RST pin if the state and pull-up strength of the RST pin is crucial at very low VCC. Note however, by adding an external pull-up resistor, the pull-up strength on the RST pin is increased. Therefore, if it is connected in a wired-OR connection, the pull-down strength of any single device needs to accommodate this additional pull-up strength. Output Rise and Fall Time Estimation The RST and RST outputs have strong pull-down capability. The following formula estimates the output fall time (90% to 10%) for a particular external load capacitance (CLOAD): tFALL ≈ 2.2 • RPD • CLOAD where RPD is the on-resistance of the internal pull-down transistor estimated to be typically 40Ω at room temperature (25°C) and CLOAD is the external load capacitance on the pin. Assuming a 150pF load capacitance, the fall time is about 13ns. The rise time, on the RST and RST pins is limited by weak internal pull-up current sources to VCC. The following formula estimates the output rise time (10% to 90%) at the RST and RST pins: tRISE ≈ 2.2 RPU • CLOAD where RPU is the on-resistance of the pull-up transistor. Notice that this pull-up transistor is modeled as a 6µA current source in the Block Diagram as a typical representation. The on-resistance as a function of the VCC = Max (V1, V2) voltage (for VCC > 1V) at room temperature is estimated as sn29045 29045fs W UU 11 LTC2904/LTC2905 APPLICATIO S I FOR ATIO follow: R PU = 6 • 105 Ω , MAX(V1 V2) – 1V At VCC = 3.3V, RPU is about 260k. Using 150pF for load TYPICAL APPLICATIO S 2.5V, 1.2V Supply Monitor, 10% Tolerance 1.2V 0.1µF SYSTEM RESET RST GND S1 TOL 3.3V, 1.2V Dual Supply Monitor with LED Power Good Indicator, 7.5% Tolerance and Adjustable Timer 3.3V 510Ω 1.2V V2 LTC2904 S2 0.1µF S1 GND RST TOL 2905 TA03 12 U capacitance, the rise time is 86µs. An external pull-up resistor may be used if the output needs to pull up faster and/or to a higher voltage, for example: the rise time reduces to 3.3µs for a 150pF load capacitance, when using a 10k pull-up resistor. V2 LTC2904 RST S2 0.1µF V1 2.5V 2904 TA02 W U UU V1 LED RST 0.1µF SYSTEM RESET sn29045 29045fs LTC2904/LTC2905 TYPICAL APPLICATIO S 5V, 3.3V Dual Supply Monitor with Voltage Margining for Automated On-Board Testing DC/DC CONVERTER 5V 3.3V SYSTEM LOGIC SUPPLY CONTROLLER THREE-STATE 3.3V, 1.2V Dual Supply Monitor with Asymmetric Hysteresis, 5% Tolerance (Supplies Rising), 10% Tolerance (After RST Goes Low) 1.2V V2 LTC2904 S2 0.1µF S1 GND TOL RST SYSTEM RESET 2904 TA04 U V1 VIN 0.1µF S1 S2 TOL LTC2905 V2 TMR 22nF GND RST 29045 TA06 0.1µF V1 10k RST 3.3V 0.1µF sn29045 29045fs 13 LTC2904/LTC2905 PACKAGE DESCRIPTIO U DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702) 0.61 ± 0.05 (2 SIDES) 0.675 ± 0.05 2.50 ± 0.05 1.15 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.20 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 BAR TOP MARK (SEE NOTE 6) 2.00 ± 0.10 (2 SIDES) R = 0.115 TYP 5 0.56 ± 0.05 (2 SIDES) 0.38 ± 0.10 8 3.00 ± 0.10 (2 SIDES) 0.200 REF 0.75 ± 0.05 4 0.25 ± 0.05 2.15 ± 0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD 1 PIN 1 CHAMFER OF EXPOSED PAD (DDB8) DFN 1103 0.50 BSC 0 – 0.05 sn29045 29045fs 14 LTC2904/LTC2905 PACKAGE DESCRIPTIO U TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 0.65 REF 2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID 0.65 BSC 0.22 – 0.36 8 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 1.00 MAX DATUM ‘A’ 0.01 – 0.10 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0802 0.52 MAX 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 sn29045 29045fs Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC2904/LTC2905 TYPICAL APPLICATIO 1.2V 0.1µF 22nF RELATED PARTS PART NUMBER LTC690 LTC694-3.3 LTC699 LTC1232 LTC1326/LTC1326-2.5 LTC1536 LTC1726-2.5/LTC1726-5 LTC1727-2.5/LTC1727-5 LTC1728-1.8/LTC1728-3.3 LTC1728-2.5/LTC1728-5 LTC1985-1.8 LTC2900 LTC2901 LTC2902 LTC2903-1 DESCRIPTION 5V Supply Monitor, Watchdog Timer and Battery Backup 3.3V Supply Monitor, Watchdog Timer and Battery Backup 5V Supply Monitor and Watchdog Timer 5V Supply Monitor, Watchdog Timer and Push-Button Reset Micropower Precision Triple Supply Monitor for 5V/2.5V, 3.3V and ADJ Precision Triple Supply Monitor for PCI Applications Micropower Triple Supply Monitor for 2.5V/5V, 3.3V and ADJ Micropower Triple Supply Monitor with Open-Drain Reset Micropower Triple Supply Monitor with Open-Drain Reset Micropower Triple Supply Monitor with Open-Drain Reset Micropower Triple Supply Monitor with Push-Pull Reset Output Programmable Quad Supply Monitor Programmable Quad Supply Monitor Programmable Quad Supply Monitor Precision Quad Supply Monitor COMMENTS 4.65V Threshold 2.9V Threshold 4.65V Threshold 4.37V/4.62V Threshold 4.725V, 3.118V, 1V Threshold (±0.75%) Meets PCI tFAIL Timing Specifications Adjustable RESET and Watchdog Time-Outs Individual Monitor Outputs in MSOP 5-Lead SOT-23 Package 5-Lead SOT-23 Package 5-Lead SOT-23 Package Adjustable RESET, 10-Lead MSOP, DFN Packages Adjustable RESET and Watchdog Timer, 16-Lead SSOP Package Selectable Tolerance, RESET Disable for Margining Functions, 16-Lead SSOP Package Ultra Low Voltage RESET, 6-Lead SOT-23 Package 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com U Quad Supply Monitor with LED Undervoltage Indicator, 5% Tolerance, 3.3V, 2.5V, 1.8V, 1.2V 3.3V 1.8V V2 LTC2905 TMR S2 S1 GND RST TOL 0.1µF 510Ω LED RST S1 22nF GND S2 V1 0.1µF TMR V2 LTC2905 TOL 0.1µF V1 2.5V 2905 TA05 sn29045 29045fs LT/TP 01/04 1K • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2003