LTC2921

LTC2921/LTC2922 Series Power Supply Tracker with Input Monitors FEATURES s s s s s s s s s s DESCRIPTIO Tracks Multiple Supplies with MOSFET Switches Monitors 5 Input Voltages Including VCC Guaranteed Threshold Accuracy: ±1% at 0.5V Automatic Remote Sense Switching Adjustable Supply Ramp Rate Overvoltage Monitor Adjustable Electronic Circuit Breaker Adjustable Power-Good Delay Available for VCC Supply Voltages of 5V, 3.3V and 2.5V Available in 16-Pin Narrow SSOP (LTC2921 Series) and 20-Pin TSSOP (LTC2922 Series) The LTC®2921 and LTC2922 monitor up to five supplies and force them to track on power-up in multiple supply systems. Using external N-channel pass transistors, the supplies can be ramped up at an adjustable rate. Automatic remote sense switching allows the DC/DC converters to compensate for series voltage drops in the wiring. An incorrect level on one or more of the supplies triggers disconnect of all supplies. Tight 1% accuracy and glitch immunity on the low 0.5V monitoring level ensure no false error disconnects. The LTC2921 and LTC2922 each feature an adjustable electronic circuit breaker to protect the VCC supply against short circuits. Capacitance at the TIMER pin programs the delays in the monitoring sequence. The LTC2921 includes three remote sense switches in a 16-pin narrow SSOP package, while the LTC2922 includes five remote sense switches in a 20-pin TSSOP package. Both parts are available for VCC supply voltages of 5V, 3.3V, and 2.5V. , LTC and LT are registered trademarks of Linear Technology Corporation. APPLICATIO S s s s s s Desktop Computers Plug-In Cards Telecom Infrastructure Supply Sequencing Instruments TYPICAL APPLICATIO VOUT VFB DC/DC CONVERTER VOUT VFB DC/DC CONVERTER VOUT VFB DC/DC CONVERTER 243k 169k 2.5V SUPPLY 100Ω 3.3V SUPPLY 100Ω 5V SUPPLY 100Ω Three-Supply Tracker and Monitor (5V, 3.3V, 2.5V) WSL1206 0.05Ω Si2316DS 10Ω 3.3V LOAD 5V LOAD Si2316DS 10Ω 2.5V SUPPLY 2V/DIV 5V LOAD 3.3V LOAD OUTPUTS 2V/DIV 2.5V LOAD Si2316DS 10Ω 2.5V LOAD VCC V1 V2 V3 V4 S1 S2 S3 GND CIRCUIT BREAKER RESET CONTROL SENSE GATE 0.47µF PG D1 D2 D3 TIMER 0.22µF 4.7k PG 2V/DIV 49.9k Si1012R CBRST 100k 49.9k LTC2921 RESET tGATE ~ 500ms tTIMER ~ 130ms 2921/22 TA01 U Load Voltage Ramp-Up and Power-Good Activation 100ms/DIV 5V SUPPLY AT 5V 3.3V SUPPLY AT 3.3V 2921/22 TA01b U U 29212fa 1 LTC2921/LTC2922 Series ABSOLUTE AXI U RATI GS (Note 1) Switch Currents (DC, RMS) S0, D0, S4, D4 (LTC2922 Series) ..................... 30mA S1, D1, S2, D2, S3, D3 ..................................... 30mA Operating Ambient Temperature Range LTC2921C/LTC2922C .............................. 0°C to 70°C LTC2921I/LTC2922I ............................–40°C to 85°C Junction Temperature (Note 2) ............................. 125°C Storage Temperature Range ..................–65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C VCC Supply Voltage ...................................... –0.3V to 7V V1, V2, V3, V4 Voltages ............................... –0.3V to 7V SENSE Voltage ............................................ –0.3V to 7V TIMER Voltage ............................. –0.3V to (VCC + 0.3V) Charge Pumped Output Voltages GATE, PG ............................................ –0.3V to 12.2V Switch Voltages S0, D0, S4, D4 (LTC2922 Series) ............ –0.3V to 7V S1, D1, S2, D2, S3, D3 ............................ –0.3V to 7V PACKAGE/ORDER I FOR ATIO TOP VIEW V1 1 V2 2 V3 3 V4 4 S3 5 D3 6 S2 7 D2 8 16 TIMER 15 VCC 14 SENSE 13 GATE 12 PG 11 GND 10 D1 9 S1 ORDER PART NUMBER LTC2921CGN LTC2921CGN-3.3 LTC2921CGN-2.5 LTC2921IGN LTC2921IGN-3.3 LTC2921IGN-2.5 GN PART MARKING 2921 292133 292125 2921I 921I33 921I25 GN PACKAGE 16-LEAD NARROW PLASTIC SSOP TJMAX = 125°C, θJA = 110°C/W Consult LTC Marketing for parts specified with wider operating temperature ranges. The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V for LTC2921/LTC2922, VCC = 3.3V for LTC2921-3.3/LTC2922-3.3, and VCC = 2.5V for LTC2921-2.5/LTC2922-2.5, unless otherwise noted. SYMBOL Supply Pin VCC Supply Voltage Typical Operating Range LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 q q q q q q ELECTRICAL CHARACTERISTICS PARAMETER CONDITIONS ICC VCC(MON) Supply Current Supply Monitor Threshold Voltage 4.285 2.828 2.265 5.82 3.84 3.08 VCC(OV) Supply Overvoltage Threshold 2 U U W WW U W TOP VIEW SO 1 TIMER 2 V1 3 V2 4 V3 5 V4 6 S4 7 D4 8 S3 9 D3 10 20 D0 19 VCC 18 SENSE 17 GATE 16 PG 15 GND 14 D1 13 S1 12 D2 11 S2 ORDER PART NUMBER LTC2922CF LTC2922CF-3.3 LTC2922CF-2.5 LTC2922IF LTC2922IF-3.3 LTC2922IF-2.5 F PACKAGE 20-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 90°C/W MIN TYP MAX UNITS 4.50 2.97 2.37 5.00 3.30 2.50 2 4.350 2.871 2.300 6.13 4.04 3.24 5.50 3.63 2.63 4.415 2.914 2.335 6.43 4.24 3.40 V V V mA V V V V V V 29212fa LTC2921/LTC2922 Series ELECTRICAL CHARACTERISTICS SYMBOL VCC(UVLO) VCC(UVH) ∆VSENSE ISENSE tV1(DLY) PARAMETER Supply Undervoltage Lockout Supply Undervoltage Hysteresis Circuit Breaker Trip Voltage SENSE Pin Input Current Circuit Breaker Trip Delay Time The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V for LTC2921/LTC2922, VCC = 3.3V for LTC2921-3.3/LTC2922-3.3, and VCC = 2.5V for LTC2921-2.5/LTC2922-2.5, unless otherwise noted. CONDITIONS VCC Rising VCC Falling ∆VSENSE = VCC - VSENSE VCC - VSENSE = 150mV LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 Guaranteed Not to Reset Guaranteed to Reset q q q q q MIN 2.08 TYP 2.20 120 MAX 2.30 UNITS V mV Electronic Circuit Breaker 45 50 150 0.5 0.5 0.5 150 0.490 0.495 0.492 0.665 0.500 0.500 0.500 0.700 0.510 0.505 0.508 0.735 ±0.1 q 55 500 3.0 3.0 6.0 50 mV nA µs µs µs µs µs V V V V µA V µA µA mV V V V µA mA 1.5 1.5 1.5 tV1(RST) VV1(RST) Monitor Inputs VMON VOV IMON TIMER Pin VTIMER(TH) ITIMER(PU) ITIMER(PD) VTIMER(CLR) GATE Pin VGATE Circuit Breaker Reset Pulse Width Circuit Breaker Reset Threshold Voltage V1-V4 Monitor Threshold Voltages q V1-V4 Overvoltage Thresholds V1-V4 Input Currents TIMER Ramp Threshold Voltage TIMER Pull-Up Current TIMER Pull-Down Current TIMER Cleared Threshold Voltage GATE Drive Output Voltage VTIMER = 1V VCC = 2.35V, VTIMER = 0.4V VTIMER Falling LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 VGATE = VCC VCC = 2.35V, VGATE = 2.35V VD = VCC VPG = VCC VCC = 2.35V, VPG = 2.35V VCC = 2.35V, IPG = 5mA LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 LTC2921-2.5/LTC2922-2.5 q 1.15 –1.3 100 1.20 –2.0 150 1.25 –2.5 250 12.2 9.8 7.5 –12.5 q q q q q 10.0 8.4 6.1 –6.5 10 11.1 9.1 6.8 –10.0 IGATE(PU) IGATE(PD) RDS(FB) PG Pin IPG(PU) IPG(PD) VPG(OL) VPG GATE Pull-Up Current GATE Pull-Down Current Feedback Switch Resistances (Note 3) PG Pull-Up Current PG Pull-Down Current PG Output Low Voltage PG Output Voltage (Note 4) Remote Sense Switches q 2 –2.6 10 –4.0 10 –5.0 0.4 Ω µA mA V V V V q q q q q 10.0 8.4 6.1 11.1 9.1 6.8 12.2 9.8 7.5 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ is calculated from the ambient temperature TA and power dissipation PD as follows: LTC2921 Series: TJ = TA + (PD • 110°C/W) LTC2922 Series: TJ = TA + (PD • 90°C/W) Note 3: This specification applies to all switches, and is measured with VS < VD. Note 4: The PG pin will rise to approximately the same voltage as the GATE pin when not pulled up or pulled down by external resistance. 29212fa 3 LTC2921/LTC2922 Series TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. Monitor Trip Delay vs Monitor Input Overdrive 100 Supply Current vs Supply Voltage 3.00 2.75 2.4 2.50 ICC (mA) ICC (mA) PG SIGNAL ASSERTED LTC2921 LTC2922 LTC2921-3.3 LTC2922-3.3 MONITOR TRIP DELAY (µs) 2.25 2.00 1.75 1.50 LTC2921-3.3 LTC2922-3.3 LTC2921-2.5 LTC2922-2.5 LTC2921 LTC2922 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 2921/2 G01 Monitor Input Threshold vs Temperature 0.505 MONITOR INPUT THRESHOLD (V) BREAKER TRIP (mV) 0.500 50 ISENSE (nA) 0.495 –50 –30 30 –10 10 50 TEMPERATURE (°C) TIMER Trip Voltage vs Temperature 1.21 2.5 2.4 TIMER TRIP VOLTAGE (V) 2.2 CURRENT (µA) PULL-DOWN CURRENT (µA) 1.20 1.19 –50 –30 30 –10 10 50 TEMPERATURE (°C) 4 UW 70 2921/2 G04 Supply Current vs Temperature 2.6 PG SIGNAL ASSERTED 80 60 LTC2921-2.5 LTC2922-2.5 40 LTC2921/LTC2922 LTC2921-3.3/LTC2922-3.3 20 2.2 2.0 LTC2921-2.5 LTC2922-2.5 1.8 –50 –30 0 30 50 –10 10 TEMPERATURE (°C) 70 90 0 80 40 100 120 60 20 MONITOR INPUT OVERDRIVE (mV) 140 2921/2 G02 2921/2 G03 Circuit Breaker Trip Voltage vs Temperature 55 250 SENSE Input Current vs Temperature VSENSE = VCC 200 150 100 50 90 45 –50 –30 30 10 –10 50 TEMPERATURE (°C) 70 90 0 –50 –30 30 –10 10 50 TEMPERATURE (°C) 70 90 2921/2 G05 2921/2 G06 TIMER Pull-Up Current vs Temperature VTIMER = 1V 170 165 160 155 150 145 140 TIMER Pull-Down Current vs Supply Voltage VTIMER = 0.4V 2.3 2.1 2.0 1.9 1.8 1.7 1.6 70 90 1.5 –50 –30 –10 10 30 50 70 90 TEMPERATURE (°C) 2921/2 G07 2921/2 G08 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 2921/2 G09 29212fa LTC2921/LTC2922 Series TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C unless otherwise noted. Gate Voltage vs Supply Voltage 12 GATE LOAD = 1000pF || 10MΩ PG LOAD = 2kΩ TO VCC 11 VCC BYPASS CAP = 1µF LTC2921 LTC2922 10 9 8 7 6 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 2921/2 G10 GATE VOLTAGE (V) GATE VOLTAGE (V) 10 LTC2921-3.3 LTC2922-3.3 9 8 7 6 –50 –30 GATE LOAD = 1000pF || 10MΩ PG LOAD = 2kΩ TO VCC VCC BYPASS CAP = 1µF LTC2921-2.5 LTC2922-2.5 GATE VOLTAGE (V) LTC2921-3.3 LTC2922-3.3 LTC2921-2.5 LTC2922-2.5 GATE Pull-Up Current vs Temperature 11.5 11.0 CURRENT (µA) VGATE = VCC PG (V) 10.0 9.5 9.0 8.5 –50 –30 9 8 7 6 LTC2921-3.3 LTC2922-3.3 CURRENT (µA) 10.5 30 50 –10 10 TEMPERATURE (°C) UW 70 Gate Voltage vs Temperature 12 11 LTC2921 LTC2922 12 10 8 6 4 2 0 Gate Voltage vs Load Current LTC2921 LTC2922 LTC2921-3.3 LTC2922-3.3 LTC2921-2.5 LTC2922-2.5 GATE LOAD = 1000pF || 10MΩ PG LOAD = 2kΩ TO VCC VCC BYPASS CAP = 1µF 0 1 2 3456 78 LOAD CURRENT (µA) 9 10 30 50 –10 10 TEMPERATURE (°C) 70 90 2921/2 G11 2921/2 G12 PG Voltage vs Supply Voltage 12 GATE LOAD = 1000pF || 10MΩ PG LOAD = 1000pF || 10MΩ 11 VCC BYPASS CAP = 1µF LTC2921 LTC2922 10 5.5 5.0 4.5 4.0 3.5 3.0 PG Pull-Up Current vs Temperature VPG = VCC LTC2921-2.5 LTC2922-2.5 90 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 2921/2 G14 2.5 –50 –30 30 50 –10 10 TEMPERATURE (°C) 70 90 2921/2 G13 2921/2 G15 29212fa 5 LTC2921/LTC2922 Series PI FU CTIO S S0, D0 (Pins 1, 20 [LTC2922]): Remote Switch 0. These pins are the terminals of an internal N-channel FET switch that is enabled after the GATE pin is fully ramped up. This switch can be used to connect a remote sense line to compensate for IR drop across the external FETs. The gate of the internal switch ramps up at a nominal rate of 8V/ms. The pins are interchangeable, either switch pin can be tied to the load side. Tie both pins to ground if unused. S4, D4 (Pins 7, 8 [LTC2922]): Remote Sense Switch 4. Tie to GND if unused. S3, D3 (Pins 5, 6/Pins 9, 10): Remote Sense Switch 3. Tie to GND if unused. S2, D2 (Pins 7, 8/Pins 11, 12): Remote Sense Switch 2. Tie to GND if unused. S1, D1 (Pins 9, 10/Pins 13, 14): Remote Sense Switch 1. Tie to GND if unused. TIMER (Pin 16/Pin 2): Timing Delay Input. Connect a capacitor between this pin and ground to set a 600ms/µF delay at two points in the monitoring sequence. This sets the delay after all monitors are good, before the start of GATE ramping, and the delay after the remote sense switches are on, before PG is activated. TIMER must fall below 150mV before a timing delay can start. The TIMER pin is pulled to ground at other points in the sequence. V1-V4 (Pins 1-4/Pins 3-6): Supply Monitor Inputs. All four inputs must lie above the monitor threshold level (0.5V) and below the monitor overvoltage level (0.7V) for a turnon sequence to commence or continue. When any monitor input falls outside those levels, the GATE and PG pins are pulled low, disconnecting all the loads. Glitch filtering on the 0.5V monitor threshold prevents low-energy voltage spikes from affecting the comparators’ results. V1 also serves as an active-low reset pin for the circuit breaker. Tie unused monitor inputs to used monitor inputs. 6 U U U (LTC2921/LTC2922 or [LTC2922 Only]) GND (Pin 11/Pin 15): Circuit Ground. PG (Pin 12/Pin 16): Power Good Output. A 4µA current source from the internal charge pump rail (VPUMP) pulls PG up after the turn-on sequence is complete. The output is pulled to ground before turn-on is complete, when any monitor is out of compliance, when the circuit breaker trips, and when VCC is undervoltage. An external resistor can be added to pull up to a lower voltage and to improve pull up speed. This pin can also be configured as a gate drive for external N-channel FETs in sequencing applications. In applications not requiring the PG output, leave the pin unconnected. GATE (Pin 13/Pin 17): Gate Drive for External N-Channel FETs. A 10µA current source from the internal charge pump rail (VPUMP) ramps the gates of the external Nchannel MOSFETs forcing all supplies to track on. The resistor and capacitor network from this pin to ground sets the supplies’ ramp rate and enhances control loop stability. SENSE (Pin 14/Pin 18): Circuit Breaker Sense Input. An external resistor between VCC and SENSE sets the electronic circuit breaker trip current. The breaker trips when the voltage across the resistor exceeds 50mV for 1µs. To disable the circuit breaker tie SENSE to VCC. To reset the circuit breaker after the current falls below the trip point, pull the V1 pin below 0.5V for >150µs or go into undervoltage lockout for >10µs. VCC (Pin 15/Pin 19): Supply Voltage. The voltage at VCC is monitored through an internal resistive divider in a manner similar to the V1-V4 inputs. An undervoltage lockout circuit disables the part until the voltage at VCC is greater than 2.2V. The VCC pin must be connected to the highest supply voltage. Bypass the VCC pin to ground with a 10µF capacitor. 29212fa LTC2921/LTC2922 Series FUNCTIONAL DIAGRA SENSE 50mV VCC OVERCURRENT LATCH UNDERVOLTAGE V PG ENABLE VPUMP REMOTE SENSE SWITCH GATE 4µA – PG OVERVOLTAGE CIRCUIT BREAKER RESET PULSE TIMER ENABLE VCC 0.7V 0.5V 1.2V VPUMP ≈ 11.1V AT VCC =5V APPROXIMATELY 1V VSWON 1.2V 0.7V 0.5V REFERENCE GENERATOR AND CHARGE PUMP (LTC2922 ONLY) D0 D1 D2 D3 + – SWITCHES ON (LTC2922 ONLY) D4 GND S0 (LTC2922 ONLY) S1 S2 S3 S4 (LTC2922 ONLY) Figure 1. LTC2921 and LTC2922 Functional Diagram + + + V4 MONITOR + + – + V3 + – + V2 MONITOR VCC 2µA OVERVOLTAGE VSWON MONITOR TIMER ENABLE PULSE TIMER DONE + + – + V1 + +– W VPUMP OVERVOLTAGE MONITOR OVERVOLTAGE REMOTE SENSE SWITCH ENABLE VPUMP MONITOR CONTROL LOGIC GATE ENABLE 10µA GATE OVERVOLTAGE GATE ON TIMER TIMER DONE VSWON 2921/22 F01 + + – – + – – – – – U U 29212fa 7 LTC2921/LTC2922 Series OPERATIO General Operation The LTC2921 and LTC2922 track multiple supplies, monitor multiple inputs, and provide integrated switches for remote sensing. Once all input voltages lie between monitoring and overvoltage threshold levels, in-line FETs are turned on to simultaneously ramp power to the loads. The automatic remote sense switches are then activated, and the power good signal is asserted. After initial power-on the LTC2921 and LTC2922 continue monitoring the inputs. Several types of events will trigger interruption, any of which will disconnect all supplies, deactivate the power good signal, and open the remote sense switches. Monitoring Sequence A normal power-on sequence comprises the following steps: Step 0) Wait for VCC to exceed the undervoltage lockout threshold. Continue checking VCC. Step 1) Confirm that the circuit breaker has not tripped and wait for all monitored supplies, including VCC, to be between their programmed monitor and overvoltage thresholds. Continue checking these conditions. Step 2) Check that the TIMER pin voltage starts below 150mV. Create a delay by ramping up the TIMER pin until it trips an internal comparator. Step 3) Ramp the GATE pin to turn on the external N-channel FETs, simultaneously ramping the supplies into their loads. Await confirmation of full GATE enhancement, i.e., GATE voltage within ~1V of VPUMP. Continue checking this condition. Step 4) Activate the remote sense switches. Await confirmation of full Feedback Switch Gate enhancement. Step 5) Wait again for another TIMER cycle delay. Step 6) Release the pull-down on the PG output. Continue checking VCC, the circuit breaker, the input voltages, and the GATE voltage. Interrupting Events Three events can interrupt the sequence and trigger immediate disconnect of all supplies, pull-down of the PG 8 U signal, and deactivation of the remote sense switches. The three interrupting events are a lockout, a fault, and an error. A lockout occurs when VCC falls below the undervoltage threshold (including hysteresis). Escape from lockout requires sufficient VCC voltage. Leaving lockout, the sequence begins at Step 1. A lockout condition supersedes faults and errors. A fault occurs when the circuit breaker trips. Escape from a fault requires pulsing the V1 pin below the reset threshold of 0.5V(nom) for more than 150µs after the current falls below the trip point. When V1 returns high, the sequence begins from Step 1. An undervoltage lockout of >10µs also clears the circuit breaker fault latch. A fault condition supersedes errors. An error occurs when one or more of the monitor inputs (V1-V4 pins) or VCC falls below its monitor threshold, or rises above its overvoltage threshold. A loss of voltage on the GATE pin, once it has fully ramped up, also causes an error. An error sends the sequence to Step 1. Feedback Switches for Remote Sensing The integrated N-channel switches of the LTC2921/ LTC2922 automatically compensate for the voltage drops caused by the RDS(ON) of the external load-control MOSFET switches. This is accomplished by modifying the normal feedback path of each power supply that is controlled by the LTC2921/LTC2922. When the load-control switches are off, the remote sense switches are also off, and the power supply uses its normal feedback path to sense its output voltage. After the load-control switches are turned on, the remote sense switches are turned on to create dominating feedback paths. The feedback loops include the load-control switches, thus compensating for their voltage drops. In order to eliminate glitching on the output of the power supply, the remote sense switches are turned on at a controlled rate of about 8V/ms. The gates of these integrated N-channel devices are pulled up above VCC to VPUMP so as to provide a low-resistance path for a wide range of voltages. 29212fa LTC2921/LTC2922 Series OPERATIO Electronic Circuit Breaker Placing a resistor between the VCC and SENSE pins allows the part to detect shorts and excessive currents on the VCC supply. The electronic circuit breaker trips when the voltage across the resistor is >50mV for more than 1µs. A trip causes a fault condition which interrupts the monitor sequence, and which requires reset of the circuit breaker latch (see Interrupting Events section). Breaker reset is achieved by pulling V1 below the reset threshold for >150µs after the current falls below the trip point, or by returning from undervoltage lockout on VCC. TI I G DIAGRA S The timing of a typical start-up sequence for the LTC2921/ LTC2922 is shown in Figure 2. VCC exceeds the undervoltage lockout level at time 0. All monitor inputs settle between the 0.5V monitor threshold and the 0.7V overvoltage threshold by time 1, then a TIMER cycle starts. The TIMER pin reaches 1.2V at time 2, and GATE ramping begins. When the GATE ramp completes at time 3, the automatic remote sense switches close. Another TIMER delay begins at time 4 and finishes at time 5, at which time PG is activated. 0 VCC 1 2 3 4 5 UNDERVOLTAGE LOCKOUT LEVEL VCC SENSE 0.7V 0.5V V1 V2 0.7V 0.5V V3 0.7V 0.5V V4 0.7V 0.5V TIMER 1.2V 1.2V GATE V3 V4 TIMER VCC REMOTE SENSE SWITCH GATE PG GATE REMOTE SENSE SWITCH GATE PG Figure 2. Typical Start-Up Sequence W U The timing of a monitor failure and subsequent regular turn-on is shown in Figure 3. Prior to time 1, a successful turn-on sequence had completed. At time 1, monitor V2 falls below the 0.5V reference, triggering an error. The GATE pin, PG pin, and the remote sense switches fall at rates determined by the pull-down currents and loading conditions of each (times 2, 3, 4). At time 5, monitor V2 recovers, and a normal turn-on sequence begins. VCC 1 23 4 UNDERVOLTAGE LOCKOUT LEVEL 5 SENSE VCC-50mV V1 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V 1.2V 1.2V VCC VCC-50mV V2 VCC UW Figure 3. Monitor Failure and Start-Up Sequence Timing 29212fa 9 LTC2921/LTC2922 Series TI I G DIAGRA S The timing of a circuit breaker trip and reset, and a subsequent regular turn-on are shown in Figure 4. Prior to time 1, a successful turn-on sequence had completed. At time 1, excessive current pulls SENSE more than 50mV below VCC. The GATE pin, PG pin, and the remote sense switches fall at rates determined by the pull-down currents VCC 1 234 UNDERVOLTAGE LOCKOUT LEVEL VCC 5 APPLICATIO S I FOR ATIO Multiple supply systems have become common to accommodate circuits on the same board with different voltage requirements. Desktop PC motherboards, instrumentation circuits and plug-in boards of all kinds often require tracking and control of several supply voltages. The LTC2921 and LTC2922 ramp and monitor up to five supply voltages in such systems. External resistive voltage dividers independently program four monitor levels, while an internal divider sets the VCC pin supply monitor level. Time delays in the monitoring sequence are set by an external capacitor at the TIMER pin. The GATE pin provides a high side drive voltage appropriate to logic-level and sublogic-level N-channel power 10 U W W UU UW and loading conditions of each (times 2, 3, 4). Note that the excessive current condition ceases at time 4. A circuit breaker reset pulse is initiated at time 5. The latch resets at time 6 since the V1 pulse is wide enough. A normal turnon begins when V1 rises above the monitor threshold (time 7 onward). 67 SENSE VCC-50mV INTERNAL CIRCUIT BREAKER LATCH V1 VCC VCC-50mV 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V 0.7V 0.5V V2 V3 V4 TIMER 1.2V 1.2V GATE REMOTE SENSE SWITCH GATE PG VCC Figure 4. Circuit Breaker Trip, Reset and Start-Up Sequence Timing MOSFETs. The external RC network on GATE programs the supply ramp rate and eliminates possible high frequency oscillations in the power path. Featured in the LTC2921/LTC2922 series are sub-10Ω internal remote sense switches to compensate for voltage drops between the supplies and the loads. At the end of a successful power-on sequence, the LTC2921/ LTC2922 asserts the PG output. A typical application uses an external pull-up resistor between PG and the load side of a supply. In applications where supply power-on sequencing is required, the PG pin can function as a second, separate high side driver. 29212fa LTC2921/LTC2922 Series APPLICATIO S I FOR ATIO Setting the Supply Monitor Levels The LTC2921 and LTC2922 series both feature low 0.5V monitoring thresholds with tight 1% accuracy. To set a supply monitoring level tightly, design a precision ratio resistive divider to relate the lowest valid supply voltage to the maximum specified monitor threshold voltage. Use resistors with 1% tolerance or better to limit the error due to mismatch. The basic resistive divider connection for supply monitoring is shown in Figure 5. VOUT RY1 VFB RZ1 GND DC/DC CONVERTER VV1 IA1 VSRC1 RB1 IMON ± 0.1µA RA1 V1 LTC2922 GND CGATE + VQ1 – Q1 RG1 10Ω GATE Figure 5. Basic Monitor Connection First, divide the nominal monitor threshold voltage by an acceptable bias current (IA1), and choose a nearby standard value for resistor RA1 (see Equation 1). Next, calculate the bounds on the value of RB1 that guarantee that the divided minimum supply voltage exceeds the maximum specified monitor threshold voltage, and that the minimum specified overvoltage threshold exceeds the divided maximum supply voltage. Use Equations 2 and 3 to calculate RB1(MAX) and RB1(MIN) from RA1, the resistor tolerance (RTOL), the supply voltage, the monitor threshold and overvoltage specifications, and the monitor pin leakage current specification. When the integrated remote sensing switch is closed, the DC/DC converter will compensate for the IR drop from drain to source of the external N-channel FET (VQ1(ON)) by increasing the supply voltage by the same amount. Calculate with VQ1(ON)(MAX) = 0V if the remote sense switch is not used. R A1 = 0.500V IA1 U RB1(MAX) =  1 – RTOL   VSRC1(MIN) – 0.505V  R A1 •  •  1 + RTOL  0.505V + 0.1µA • RA1     1 + RTOL RB1(MIN) = RA1 •  •  1 – RTOL   VSRC1(MAX) + VQ1(ON)(MAX) – 0.665V    0.665V – 0.1µA • RA1   W U U (2) (3) VL1 Choose a standard resistor value for RB1 that satisfies the inequality of Equation 4. RB1(MIN) ≤ RB1 ≤ RB1(MAX) (4) When several standard values meet the requirement, choose the value closest to RB1(MAX) to set the tightest monitor threshold. This also allows more headroom for larger VQ1(ON)(MAX). Alternatively, choose the standard value closest to RB1(MIN) to set the tightest overvoltage threshold. All four monitor input voltages must be between the monitor threshold and the overvoltage threshold for the turn-on sequence to begin. Connect unneeded monitor input pins to any of the utilized monitor input pins. Selecting the External N-Channel MOSFETs The GATE pin drives the gate of external N-channel MOSFETs above VCC to connect the supplies to the loads. The GATE drive voltage provided by the LTC2921/LTC2922 series is best suited to logic-level and sublogic-level power MOSFETs. To achieve the lowest switch resistance, the VCC pin must be connected to the highest supply voltage. Consider the application requirements for current, turnoff speed, on-resistance, gate-source voltage specification, etc. Refer to the Electrical Specifications and Typical Performance Curves to determine the GATE voltages for given VCC voltages over the required range of conditions. Calculate the minimum gate drive voltage for each monitored supply for use in selecting the FETs. Check the maximum GATE voltage against the FETs’ gate-source 29212fa LOAD 2921/22 F05 (1) 11 LTC2921/LTC2922 Series APPLICATIO S I FOR ATIO voltage specifications. On-resistance is a critical parameter when choosing power MOSFETs. The integrated remote sense switches compensate for IR drops, but minimizing VQ(MAX) leaves more margin for designing the resistive voltage divider for the monitors. Setting the GATE Ramp Rate Application of power to the loads is controlled by setting the voltage ramping rate with an external capacitor on the GATE pin. During Step 3 of the monitoring sequence, a 10µA pull-up ramps the GATE pin capacitance up to VPUMP, the internal charge pump voltage. Use Equation 5 to calculate the nominal GATE pin capacitance necessary to achieve a given ramp rate, ∆V/∆t: C GATE = 10µA ∆V / ∆t (5) VSRC0 CD0 0.1µF (OPT) GATE LTC2922 GND 2921/22 F06 Alternatively, to calculate the GATE capacitor to achieve a desired nominal ramp time, use Equation 6. The GATE drive voltage (VGATE) varies with VCC voltage. Consult the Electrical Characteristics table and Typical Performance curves to choose an appropriate value to insert for VGATE. C GATE = 10µA • tRAMP VGATE When the GATE pin drives several FETs in parallel, the load voltages ramp together at the same rate until the lowest supply reaches its full value. The other supplies continue to track until the next lowest supply reaches its full value, and so on. The GATE pin must not be forced above the level it reaches when fully ramped. An internal clamp limits the GATE voltage to ≤12.2V relative to ground. Damp possible ramp-on oscillations by including a 10Ω resistor in series with each external N-channel gate, and as necessary, a 0.1µF capacitor on each external N-channel drain, as shown in Figure 6. Setting the Sequence Delay Timer The turn-on sequence includes two programmable delays set by the capacitance on the TIMER pin. More precisely, a single delay value is used at two points in the sequence. 12 U VSRC2 CD2 0.1µF (OPT) Q2 RG2 10Ω VL1 VL2 VSRC1 CD1 0.1µF (OPT) Q1 RG1 10Ω VL0 Q0 RG0 10Ω CGATE W UU Figure 6. Ramping and Damping Components on GATE Pin In both cases, the delay provides a measure of confidence that conditions are stable enough for the sequence to advance. The first TIMER delay begins once all monitor voltages comply with their thresholds, the electronic circuit breaker has not tripped, and VCC is not undervoltage. The TIMER pin sources 2µA into an external capacitor, which ramps its voltage. A comparator trips when the TIMER pin voltage reaches the internal 1.2V reference, then the GATE ramp begins, and TIMER is pulled to ground. The second TIMER delay begins after the gate of the remote sense switches is fully ramped up. After the TIMER ramp completes, the PG pin is activated. An internal circuit pulls-down the TIMER pin with >100µA of current at all times, except during the ramping periods, and when VCC is undervoltage. Calculate the nominal value for the timing capacitor by inserting the desired delay into Equation 7: C TIMER = 2µA • tDLY 1.2V (7) (6) For delay times below 60µs, be sure to limit stray capacitances on the TIMER pin by using good PCB design practices. To program essentially no delay (10mA of current. When all supplies have satisfied their monitor and overvoltage thresholds, the circuit breaker has not tripped, the GATE pin has reached its peak, and the remote sense switches have turned on, a 4µA current source from VPUMP pulls up PG. Configure PG as a logic signal by adding an external pullup resistor to a voltage source. For example, create a negative-logic system reset signal by adding an external pull-up resistor to the load side of a supply voltage, as in Figure 8. Calculate the minimum pull-up resistor value that meets the output low voltage specification for VPG(OL): (8) W UU RPG(MIN) = VLO(MAX) − 0.4V 5mA (10) (9a) Do not pull PG above the GATE pin’s fully ramped voltage. An internal clamp limits the PG voltage to ≤12.2V relative to ground. In applications that do not require the PG output, leave the pin unconnected. The PG output can also be used as the gate drive for external N-channel MOSFETs, as in Figure 9. The delay between the GATE ramp and the PG activation makes a supply sequencer, useful when two supplies (or two groups of supplies) need to be ramped one after another. Choose the FETs and design the ramp rate in the same way as for the GATE pin. Refer to Equations 5 and 6, substituting 4µA for 10µA, to choose capacitor CPG. Integrated Switches for Remote Sensing A significant feature of the LTC2921/LTC2922 series is a set of remote sense switches that allow for compensation of voltage drops in the load path. Switch activation occurs in the turn-on sequence after the GATE 29212fa (9b) VLO 2921/22 F07 13 LTC2921/LTC2922 Series APPLICATIO S I FOR ATIO VSRC0 RSENSE Q0 RG0 10Ω GATE VPUMP 4µA PG PG ENABLE VL0 VCC SENSE CGATE RPG µC RESET LTC2922 GND 2921/22 F08 Figure 8. PG Pin as Logic Output VSRC5 Q5 VL5 RG5 10Ω VL0 VSRC0 RSENSE Q0 VCC SENSE GATE VPUMP 4µA PG RG0 10Ω CGATE PG ENABLE CPG RZ1 GND LTC2922 GND 2921/22 F09 Figure 9. PG Pin as Sequenced N-Channel Gate Driver pin has fully ramped up. The switches are N-channel MOSFETs whose gates are ramped from ground to VPUMP at a nominal rate of 8V/ms. The PG pin is activated upon completion of the TIMER delay cycle that follows GATE ramp-up and remote sense switch activation. When conditions indicate a supply disconnect, the switches shut off in less than 10µs. Figure 10 shows an example of how to connect a switch to remote sense the load voltage. Although only one remote sense switch is referred to in this section, the calculations and comments apply to all. Before the activation of Q1 and the internal switch, resistor RX1 provides a direct path between the DC/DC converter’s output voltage and its feedback network (RY1 and RZ1). Once Q1 activates, the supply energizes the load. When the internal switch turns on, it provides a remote sense path between the load voltage and the converter’s feedback network. 14 U VOUT VSRC1 Q1 VL1 RX1 RY1 VFB RZ1 GND DC/DC CONVERTER RA1 VS1 V1 GATE LTC2922 CGATE RB1 RG1 10Ω S1 GND D1 LOAD 2921/22 F10 W UU Figure 10. Automatic Remote Sense Switching Connection To choose a value for resistor RX1, consider the remote sense switch connection equivalent network in Figure 11. Resistor RQ1(ON) represents the on-resistance of Q1, and resistor RFB1(ON) represents the on-resistance of the internal switch. VOUT VSRC1 RX1 RY1 VFB VS1 IQ1 RQ1(ON) VL1 IDS1 S1 LTC2922 RFB1(ON) D1 LOAD IL1 DC/DC CONVERTER 2921/22 F11 Figure 11. Remote Sense Switch Connection Equivalent Network To allow the load voltage to dominate the feedback to the converter when the internal switch is closed, make RX1 >> RFB1(ON). To set the converter feedback ratio accurately with RY1 and RZ1, make both RX1 and RFB1(ON) much less than (RY1 + RZ1). To ensure that most of the load current flows through the external N-channel FET, choose (RX1 + RFB1(ON)) >> RQ1(ON). Summarized, these requirements amount to: RQ1(ON), RFB(ON) VCC(MON)(MAX) and VSRC0(MAX) 4.5V of gatesource voltage, even at maximum supply voltage (5.375V) and minimum GATE pin voltage (10V). Considering the voltages, temperatures, and currents involved, the maximum on-resistance (RQ(ON)(MAX)) of the Vishay Siliconix Si2316DS is about 150mΩ. Switches Q1 and Q2 will see even higher gate-source voltages, implying even smaller RQ(ON)(MAX) values. Table 2 summarizes the calculated VQ(ON)(MAX) voltages. Include the additional 50mV drop across RSENSE when budgeting for the VCC supply path. Table 2. External MOSFET Drain-Source Voltage Drops Supply Voltage 5V 3.3V 2.5V External MOSFET Q0 Q1 Q2 RQ(ON) Max ~150mΩ