LTC3127EDDPBF

FeaTures n n LTC3127 1A Buck-Boost DC/DC Converter with Programmable Input Current Limit DescripTion The LTC®3127 is a wide VIN range, highly efficient, 1.35MHz fixed frequency buck-boost DC/DC converter that operates from input voltages above, below or equal to the output voltage. The LTC3127 features programmable average input current limit, making it ideal for power-limited input sources. The input current limit is programmed with a single resistor and is accurate from 0.2A to 1A of average input current. The topology incorporated provides a continuous transfer function through all operating modes. Other features include 1.8V 1A Continuous Output Current: VIN > 3V Single Inductor Synchronous Rectification: Up to 96% Efficiency Burst Mode® Operation: IQ = 35μA (Pin Selectable) Output Disconnect in Shutdown 1.225V, VMODE = 0V (Note 4) RPROG = 32.4k (Note 3) 0°C to 85°C (Note 3) –40°C to 85°C (Note 3) Peak Current Limit Reverse-Current Limit P-Channel MOSFET Leakage N-Channel MOSFET On-Resistance P-Channel MOSFET On-Resistance Maximum Duty Cycle Minimum Duty Cycle Frequency Accuracy SHDN Input High Voltage SHDN Input Low Voltage SHDN Input Current MODE Input High Voltage MODE Input Low Voltage MODE Input Current VMODE = 5.5V VSHDN = 5.5V l l l l l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 3.6V, VOUT = 3.3V, unless otherwise noted. CONDITIONS l l l MIN 1.8 1.8 1.165 TYP MAX 5.5 5.25 UNITS V V V nA µA µA µA mA mA mA A A µA mΩ mΩ mΩ mΩ % % 1.195 1 35 0.1 400 1.225 50 4 520 540 540 0.45 4 480 465 430 2 0.15 500 500 500 2.5 0.3 0.1 140 170 160 190 Switches A and D Switch B Switch C Switch A Switch D Boost( % Switch C On) Buck (% Switch A On) l l l l l l 80 100 1 1.2 90 0 1.35 1.7 0.3 0.01 1 0.3 0.01 1 % MHz V V µA V V µA 1.2 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3127 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. Note that the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: Specification is guaranteed when the inductor current is in continuous conduction. Note 4: Current measurements are made when the output is not switching. Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. Note 6: Failure to solder the exposed backside of the package to the PC board ground plane will result in a thermal resistance much higher than 40°C/W. 3127f  LTC3127 Typical perForMance characTerisTics Efficiency vs Load Current 100 90 VOUT = 1.8V PWM 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 1 VIN = 2.9V VIN = 3.6V VIN = 4.3V 10 100 LOAD CURRENT (mA) 1000 3127 G02 (TJ = 25°C, unless otherwise noted ) Efficiency vs Load Current VOUT = 3.3V BURST EFFICIENCY (%) 100 90 Efficiency vs Load Current VOUT = 5V 80 BURST EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.1 1 VIN = 1.8V VIN = 3.6V VIN = 5V 10 100 LOAD CURRENT (mA) 1000 3127 G01 80 BURST 70 60 50 40 30 20 10 0 0.1 1 VIN = 4.5V VIN = 5V VIN = 5.5V 10 100 1000 LOAD CURRENT (mA) 10000 3127 G03 PWM PWM Average Input Current Limit vs VIN (Normalized) 2 1 INPUT CURRENT LIMIT (%) 0 –1 –2 –3 –4 –5 1.8 2.2 2.6 3.4 3.8 4.2 4.6 VIN (V) 5.4 3127 G04 Average Input Current Limit vs Temperature (Normalized) 2 1 INPUT CURRENT LIMIT (%) 0 –1 –2 –3 –4 –5 –45 –30 –15 0 15 30 45 60 TEMPERATURE (°C) 90 VOUT = 3.3V RPROG = 32.4k INPUT CURRENT (µA) 430 410 390 370 350 330 310 290 75 Quiescent Current vs VIN (Fixed Frequency Mode–Not Switching) VOUT = 3.3V RPROG = 32.4k 3 5 270 1.8 2.2 2.6 3 3127 G05 3.4 3.8 4.2 4.6 VIN (V) 5 5.4 3127 G06 38 37 INPUT CURRENT (µA) 36 35 34 33 Burst Mode Quiescent Current vs VIN No Load Input Current vs VIN in Burst Mode Operation 52.5 52.0 INPUT CURRENT (µA) 51.5 51.0 50.5 50.0 49.5 49.0 VOUT = 3.3V 32 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 VIN (V) 5 5.4 3127 G07 48.5 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 VIN (V) 5 5.4 3127 G08 3127f  LTC3127 Typical perForMance characTerisTics Feedback Voltage vs Temperature (Normalized) 0.20 L = 4.7µH VOUT = 3.3V VIN = 3.6V VOUT REGULATION (%) 0.40 0.30 0.20 0.10 0 –0.10 –0.20 –0.30 –0.40 –0.50 –0.80 –50 –30 50 –10 10 30 TEMPERATURE (°C) 70 90 –0.60 0 200 600 800 400 LOAD CURRENT (mA) 1000 3127 G10 (TJ = 25°C, unless otherwise noted ) VOUT Regulation vs Load Current (Normalized) VOUT = 3.3V 300 NMOS RDS(ON) vs VIN 0.00 CHANGE (%) 250 RDS(ON) (m ) –0.20 200 SWC 150 SWB –0.40 –0.60 100 1.8 2.4 3 3127 G09 3.6 VIN (V) 4.2 4.8 5.4 3127 G11 PMOS RDS(ON) vs VIN 325 Maximum Load Current vs VIN 2250 2000 LOAD CURRENT (mA) RPROG = 90k ILOAD 1A/DIV VOUT = 3.3V IIN 1A/DIV VOUT 50mV/DIV Load Transient Response in Fixed Frequency Mode, No Load to 1A, Not in Input Current Limit 275 RDS(ON) (m ) 1750 1500 1250 1000 750 500 SWA 250 4.2 4.8 5.4 VOUT = 2.4V 225 SWD 175 VOUT = 5V IL 1A/DIV 200µs/DIV 3127 G14 125 1.8 2.4 3 3.6 VIN (V) 0 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 VIN (V) 5 5.4 3127 G13 VIN = 3.6V VOUT = 3.3V RPROG = 90k COUT = 4.4mF R3 = 499k C1 = 100pF 3127 G12 Load Transient Response in Fixed Frequency Mode, No Load to 1A, in Input Current Limit MODE = 0V ILOAD 1A/DIV IIN 500mA/DIV VOUT 100mV/DIV Burst Mode Operation IL 500mA/DIV VOUT 20mV/DIV 200µs/DIV VOUT = 3.3V VIN = 3.6V RPROG = 32.4k COUT = 4.4mF R3 = 499k C1 = 100pF 3127 G15 5µs/DIV VOUT = 3.3V VIN = 3.6V RPROG = 32.4k COUT = 4.4mF R3 = 499k C1 = 100pF 3127 G16 3127f  LTC3127 Typical perForMance characTerisTics Load Transient Response in Burst Mode Operation, No Load to 1A, Not in Input Current Limit ILOAD 1A/DIV IIN 1A/DIV VOUT 50mV/DIV MODE 5V/DIV 200µs/DIV VIN = 3.6V RPROG = 90k R3 = 499k VOUT = 3.3V COUT = 4.4mF C1 = 100pF 3127 G17 (TJ = 25°C, unless otherwise noted ) Transition from Burst Mode Operation to Fixed Frequency Mode IIN 200mA/DIV VOUT 20mV/DIV MODE 5V/DIV 100µs/DIV VOUT = 3.3V VIN = 3.6V RPROG = 32.4k COUT = 4.4mF R3 = 499k C1 = 100pF 3127 G18 Load Transient Response in Burst Mode Operation, No Load to 1A, in Input Current Limit ILOAD 1A/DIV IIN 500mA/DIV VOUT 100mV/DIV MODE 5V/DIV 200µs/DIV VOUT = 3.3V VIN = 3.6V RPROG = 32.4k COUT = 4.4mF R3 = 499k C1 = 100pF 3127 G19 Start-Up Waveform VOUT 1V/DIV IIN 500mA/DIV SHDN 5V/DIV 5ms/DIV VOUT = 3.3V VIN = 3.6V RPROG = 32.4k COUT = 4.4mF R3 = 499k C1 = 100pF 3127 G20 3127f  LTC3127 pin FuncTions (DD Package) SW1 (Pin 1): Switch Pin Where Internal Switches A and B Are Connected. Connect inductor from SW1 to SW2. Minimize trace length to reduce EMI. VIN (Pin 2): Input Supply Pin. Internal VCC for the IC. A 10μF or greater ceramic capacitor should be placed as close to VIN and PGND as possible. SHDN (Pin 3): Logic-Controlled Shutdown Input. SHDN = High: Normal Operation SHDN = Low: Shutdown MODE (Pin 4): Pulse Width Modulation/Burst Mode Selection Input. MODE = High: Burst Mode Operation MODE = Low: PWM Operation Only. Forced continuous conduction mode. PROG (Pin 5): Sets the Average Input Current Limit Threshold. Connect a resistor from PROG to ground. See below for component value selection. RPROG = 54.92 • ILIMIT (A) + 4.94 (kΩ) SGND (Pin 6): Signal Ground for the IC. Terminate the PROG resistor, compensation components and the output voltage divider to SGND. FB (Pin 7): Feedback Pin. Connect resistor divider tap here. The output voltage can be adjusted from 1.8V to 5.25V. The feedback reference voltage is 1.195V.  R2  VOUT = 1.195 •  1+  V  R1 VC (Pin 8): Error Amplifier Output. Place compensation components from this pin to SGND. VOUT (Pin 9): Output of the Synchronous Rectifier. Connect the output filter capacitor from this pin to GND. A minimum value of 22µF is recommended. Output capacitors must be low ESR. SW2 (Pin 10): Switch Pin Where Internal Switches C and D Are Connected. Minimize trace length to reduce EMI. PGND (Exposed Pad Pin 11): Power Ground. The exposed pad must be soldered to the PCB ground plane. 3127f  LTC3127 block DiagraM L SW1 VIN SW2 VOUT CIN – + IPEAK AMP PWM COMPARATOR AND LOGIC IZERO AMP VC R2 FB 1.195V R1 COUT C1 R3 + – – MODE SAMPLE/HOLD AND RESET PROG RPROG VCLAMP +  – + SHDN SGND 3127 BD 3127f LTC3127 operaTion The LTC3127 is an average input current controlled buckboost DC/DC converter offered in both a thermally enhanced 3mm × 3mm DFN package and a thermally enhanced 12lead MSOP package. The buck-boost converter utilizes a proprietary switching algorithm which allows its output voltage to be regulated above, below or equal to the input voltage. The low RDS(ON), low gate charge synchronous switches efficiently provide high frequency PWM control. High efficiency is achieved at light loads when Burst Mode operation is commanded. PWM Mode Operation The LTC3127 uses fixed frequency, average input current PWM control. The MODE pin can be used to select automatic Burst Mode operation (MODE connected to VIN) or to disable Burst Mode operation and select forced continuous conduction operation for low noise applications (MODE grounded). A proprietary switching algorithm allows the converter to switch between buck, buck-boost and boost modes without discontinuity in inductor current or loop characteristics. The switch topology for the buck-boost converter is shown in Figure 1. When the input voltage is significantly greater than the output voltage, the buck-boost converter operates in buck mode. Switch D turns on continuously and switch C remains off. Switches A and B are pulse width modulated to produce the required duty cycle to support the output regulation voltage. As the input voltage decreases, switch A remains on for a larger portion of the switching cycle. When the duty cycle reaches approximately 85%, the switch pair AC begins turning on for a small fraction of the switching period. As the input voltage decreases further, L VIN A SW1 SW2 D VOUT the AC switch pair remains on for longer durations and the duration of the BD phase decreases proportionally. As the input voltage drops below the output voltage, the AC phase will eventually increase to the point that there is no longer any BD switching. At this point, switch A remains on continuously while switch pair CD is pulse width modulated to obtain the desired output voltage. At this point, the converter is operating solely in boost mode. This switching algorithm provides a seamless transition between operating modes and eliminates discontinuities in average inductor current, inductor current ripple, and loop transfer function throughout all three operational modes. These advantages result in increased efficiency and stability in comparison to the traditional 4-switch buck-boost converter. In forced PWM mode operation, the inductor is forced to have continuous conduction. This allows for a constant switching frequency and better noise performance. Error Amplifier and Compensation The buck-boost converter utilizes two control loops. The outer voltage loop determines the amount of current required to regulate the output voltage. The voltage loop is externally compensated and can be configured with either integral compensation or proportional control. The inner current loop is internally compensated and forces the input current to equal the commanded current. When VC is compensated via proportional control, the dominant pole of the output capacitor is used to ensure stability with a minimum of 1000µF of capacitance on the output when a 499k resistor is used. There is no maximum capacitance limitation with proportional compensation. B C LTC3127 PGND PGND 3127 F01 Figure 1. Buck-Boost Switch Topology 3127f  LTC3127 operaTion Integral compensation is required if an output capacitor less than 1000µF but greater than 44µF is used, otherwise using proportional compensation is recommended. When compensating the converter with integral compensation it is important to consider that the total bandwidth of the network must be below 15kHz. The inner current loop of the LTC3127 eliminates one of the double poles caused by the inductor. The output capacitor causes a dominant pole and also a zero, and the resistor divider sets the gain. GDC = 1 + fPOLE1 = f ZERO1 = R2 R1 1 2 • π • RLOAD • COUT 1 2 • π • RESR • COUT This causes poles and zeros to occur at the following locations: fPOLE2 @ DC fPOLE3 = f ZERO2 = 1 2 • π • R A • C2 1 2 • π • R A • C1 The poles and zeros of the compensation should be determined by looking at where fPOLE1 lands at the minimum load where the LTC3127 will be continuously conducting, which places the dominant pole at its lowest frequency. After setting the poles and zeros for the compensation, the phase margin of the system should be greater than 45° and the gain margin should be greater than 3dB. Following these two criteria will help to ensure stability. Current Limit Operation The buck-boost converter has two current limit circuits. The primary current limit is an average input current limit circuit that clamps the output of the outer voltage loop. This limits the amount of input current that can be commanded, and the inner current loop regulates to that clamped value. VOUT Using the compensation network show in Figure 2, the voltage loop compensation can be approximated with the following transfer function: gm • (C1 • R A • s + 1) H COMP (s) = s • (C1 • C2 • R A • s + C1 + C2) where gm = 150 • 10–6 LTC3127 PWM VOUT Figure 2. Buck-Boost External Compensation 0 – + MEASURED INPUT CURRENT + – 1.195V FB VC RA C2 R2 COUT R1 SGND C1 3127 F02 3127f LTC3127 operaTion The input current limit is set by the RPROG resistor placed on the PROG pin to SGND. The resistor value can be calculated using the following formula: RPROG = 54.92 • ILIMIT (A) + 4.94 (kΩ) Where ILIMIT is the average input current limit in amps. A secondary 2.5A (typical) current limit forces switches B and D on and A and C off if tripped. This current limit is not affected by the value of RPROG. Reverse Current Limit The reverse current comparator on switch D monitors the inductor current supplied from the output. When this current exceeds 300mA (typical) switch D will be turned off for the remainder of the switching cycle. Burst Mode Operation When the MODE pin is held high the LTC3127 will function in Burst Mode operation as long as the load current is typically less than 35mA. In Burst Mode operation, the LTC3127 still switches at a fixed frequency of 1.35MHz, using the same error amplifiers and loop compensation for average input current mode control. This control method eliminates any output transient when switching between modes. In Burst Mode operation, energy is delivered to the output until the output voltage reaches the nominal regulation value. At this point, the LTC3127 transitions to sleep mode where the output switches are shut off and the LTC3127 consumes only 35μA of quiescent current from VIN . When the output voltage droops slightly, switching resumes. This maximizes efficiency at very light loads by minimizing switching and quiescent losses. Zero Current Comparator The zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier when this current reduces to approximately 30mA. This prevents the inductor current from reversing in polarity, improving efficiency at light loads. This comparator is only active in Burst Mode operation. Anti-Ringing Control The anti-ringing control connects a resistor from SW1 and SW2 to PGND to prevent high frequency ringing during discontinuous current mode operation in Burst Mode. Although the ringing of the resonant circuit formed by L and CSW (capacitance on SW pin) is low energy, it can cause EMI radiation. Shutdown Shutdown of the converter is accomplished by pulling SHDN below 0.3V and enabled by pulling SHDN above 1.2V. Note that SHDN can be driven above VIN or VOUT, as long as it is limited to less than the absolute maximum rating. Thermal Shutdown If the die temperature exceeds 150°C (typical) the LTC3127 will be disabled. All power devices will be turned off and both switch nodes will be high impedance. The LTC3127 will restart (if enabled) when the die temperature drops to approximately 140°C. Thermal Regulator To help prevent the part from going into thermal shutdown when charging very large capacitive loads, the LTC3127 is equipped with a thermal regulator. If the die temperature exceeds 130°C (typical) the average current limit is lowered to help reduce the amount of power being dissipated in the package. The current limit will be approximately 0A just before thermal shutdown. The current limit will return to its full value when the die temperature drops back below 130°C. Undervoltage Lockout If the input supply voltage drops below 1.7V (typical), the LTC3127 will be disabled and all power devices will be turned off. 3127f  LTC3127 applicaTions inForMaTion A typical LTC3127 application circuit is shown on the front page of this data sheet. The external component selection is determined by the desired output voltage, input current and ripple voltage requirements for each particular application. However, basic guidelines and considerations for the design process are provided in this section. Buck-Boost Output Voltage Programming The buck-boost output voltage is set by a resistive divider according to the following formula:  R2  VOUT = 1.195V •  1 +  V R1  The external divider is connected to the output as shown in Figure 3. The buck-boost converter utilizes input current mode control, and the output divider resistance does not play a role in the stability. 1.8V VOUT R2 FB LTC3127 GND 3127 F03 The LTC3127 can utilize small surface mount inductors due to its fast 1.35MHz switching frequency. Inductor values between 2.2μH and 4.7μH are suitable for most applications. Larger values of inductance will allow slightly greater output current capability by reducing the inductor ripple current. Increasing the inductance above 10μH will increase size while providing little improvement in output current capability. The inductor current ripple is typically set for 20% to 40% of the maximum inductor current. High frequency ferrite core inductor materials reduce frequency dependent power losses compared to cheaper powdered iron types, improving efficiency. The inductor should have low ESR (series resistance of the windings) to reduce the I2R power losses, and must be able to support the peak inductor current without saturating. Molded chokes and some chip inductors usually do not have enough core area to support the peak inductor currents of 2.5A seen on the LTC3127. To minimize radiated noise, use a shielded inductor. See Table 1 and the reference schematics for suggested components and suppliers. Table 1. Recommended Inductors VENDOR Coilcraft 847-639-6400 www.coilcraft.com 5.25V R1 PART/STYLE LPO2506 LPS4012, LPS4018 MSS6122 MSS4020 MOS6020 DS1605, DO1608 XPL4020 SD52, SD53 SD3114, SD3118 LQH55D Figure 3. Setting the Buck-Boost Output Voltage Buck-Boost Inductor Selection To achieve high efficiency, a low ESR inductor should be utilized for the buck-boost converter. The inductor must have a saturation rating greater than the worst case average inductor current plus half the ripple current. The peak-to-peak inductor current ripple will be larger in buck and boost mode than in the buck-boost region. The peak-to-peak inductor current ripple for each mode can be calculated from the following formulas, where L is the inductance in μH: V ( V − VOUT ) ∆ I L,P −P,BUCK = OUT IN ( A) VIN • L • (1.35MHz) ∆ I L,P −P,BOOST VIN ( VOUT − VIN ) = ( A) VOUT • L • (1.35MHz) Coiltronics www.cooperet.com Murata 714-852-2001 www.murata.com Sumida 847-956-0666 www.sumida.com Taiyo-Yuden www.t-yuden.com TDK 847-803-6100 www.component.tdk.com Würth Elektronik 201-785-8800 www.we-online.com CDH40D11 NP04SB NR3015 NR4018 VLP, LTF VLF, VLCF WE-TPC Type S, M, MH 3127f  LTC3127 applicaTions inForMaTion Output and Input Capacitor Selection When selecting output capacitors for large pulsed loads, the magnitude and duration of the pulse current, together with the droop voltage specification, determine the choice of the output capacitor. Both the ESR of the capacitor and the charge stored in the capacitor each cycle contribute to the output voltage droop. The droop due to the charge is approximately: V DROOP _ LOAD =   VIN • IIN(MAX ) • h  − ISTANDBY   • D • T I PULSE −  VOUT      ( V) COUT The total output voltage droop is given by: VDROOP = VDROOP_LOAD + VDROOP_ESR (V) High capacitance values and low ESR can lead to instability in typical internally compensated buck-boost converters. Using proportional compensation, the LTC3127 is stable with low ESR output capacitor values greater than 1000µF . Multilayer ceramic capacitors are an excellent choice for input decoupling of the step-up converter as they have extremely low ESR and are available in small footprints. Input capacitors should be located as close as possible to the device. While a 10µF input capacitor is sufficient for most applications, larger values may be used to improve input decoupling without limitation. Consult the manufacturers directly for detailed information on their selection of ceramic capacitors. Although ceramic capacitors are recommended, low ESR tantalum capacitors may be used as well. When using a large capacitance to help with pulsed load applications, the maximum load for a given duty cycle, and the minimum capacitance can be calculated by: I LOAD(MAX ) = C OUT(MIN) =    VIN • IIN(MAX ) • h − ISTANDBY   IPULSE −  VOUT      • D•T (F) VDROOP VIN • IIN(MAX ) • h D • VOUT ( A) where IPULSE = pulsed load current ISTANDBY = static load current in standby mode IIN(MAX) = programmed input current limit in amps T = period of the load pulse D = load pulse’s duty cycle VDROOP = amount the output falls out of regulation in volts h = the efficiency of the converter at the input current limit point The preceding equation is a worst-case approximation assuming all the pulsing energy comes from the output capacitor. The droop due to the capacitor equivalent series resistance (ESR) is: V DROOP _ ESR   VIN • IIN(MAX ) • h  = I PULSE −  − ISTANDBY   • ESR ( V) VOUT      Table 2. Capacitor Vendor Information SUPPLIER Vishay AVX Cooper Bussmann CAP-XX Panasonic PHONE 402-563-6866 803-448-9411 516-998-4100 843-267-0720 800-394-2112 WEB SITE www.vishay.com www.avxcorp.com www.cooperbussmann.com www.cap-xx.com www.panasonic.com 3127f Low ESR and high capacitance are critical to maintaining low output droop. Table 2 and the Typical Applications schematics show a list of several reservoir capacitor manufacturers.  LTC3127 applicaTions inForMaTion Capacitor Selection Example In this example, a pulsed load application requires that VOUT droops less than 300mV. The application is a Li-Ion battery input to a 3.6V output. The pulsed load is a no-load to a 1.5A step with a frequency of 217Hz and a duty cycle of 12.5%. The input current limit is set to 500mA. In order to meet the 300mV droop requirement, the amount of capacitance must be calculated at the highest VIN to VOUT step-up ratio. All of the following calculations assume a minimum VIN of 3V and an efficiency of 90%. Given the application, the following is known: VIN = 3V VOUT = 3.6V IIN(MAX) = 500mA IPULSE = 1.5A ISTANDBY = 0A h = 0.9 D = 0.125 T = 1/217Hz = 4.6ms VDROOP = 300mV Step 1: Check to make sure the application can provide enough current to recover from the pulsed load using the ILOAD(MAX) equation: ILOAD(MAX ) = 3V • 500mA • 0 . 9 = 3A 0 . 125 • 3 . 6 V Step 2: Calculate the minimum output capacitance required.  3V • 500mA • 0 . 9  COUT(MIN) ≥  1 . 5A −  3 . 6V   • 0 . 125 • 4 . 6ms = 2 . 15mF 300mV Step 3: For this application a 2.2mF Vishay Tantamount tantalum, low ESR capacitor is selected. This capacitor has a maximum ESR of 0.04Ω. With the selected capacitor, the amount of droop must be calculated: VDROOP _ LOAD =   3V • 500mA • 0 . 9  − 0 A   • 0 . 125 • 4 . 6ms 1 . 5 A −  3 . 6V    2 . 2mF = 0 . 294V VDROOP _ ESR =   3V • 500mA • 0 . 9  − 0 A   • 0 . 04Ω 1 . 5 A −  3 . 6V    = 0 . 045V VDROOP = VDROOP _ LOAD + VDROOP _ ESR = 0 . 339 V Due to the ESR of the capacitor, the total droop is greater than 300mV. In this case, if the higher droop cannot be accepted, a larger valued, lower ESR capacitor can be selected. The maximum load that can be pulsed at this VIN to VOUT combination is 3A. 3127f  LTC3127 applicaTions inForMaTion PCB Layout Considerations The LTC3127 switches large currents at high frequencies. Special care should be given to the PCB layout to ensure stable, noise-free operation. Figure 4 depicts the recommended PCB layout to be utilized for the LTC3127. A few key guidelines follow: 1. All circulating high current paths should be kept as short as possible. This can be accomplished by keeping the routes to all bold components in Figure 4 as short and as wide as possible. Capacitor ground connections should via down to the ground plane in the shortest route possible. The bypass capacitor on VIN should be placed as close to the IC as possible and should have the shortest possible path to ground. 2. The small-signal ground pad (SGND) should have a single point connection to the power ground. A convenient way to achieve this is to short the pin directly to the Exposed Pad as shown in Figure 4. 3. The components shown in bold and their connections should all be placed over a complete ground plane. 4. To prevent large circulating currents from disrupting the output voltage sensing, the ground for the resistor divider and RPROG should be returned directly to the small signal ground pin (SGND). 5. Use of vias in the die attach pad will enhance the thermal environment of the converter especially if the vias extend to a ground plane region on the exposed bottom surface of the PCB. 6. Keep the connections to the FB and PROG pins as short as possible and away from the switch pin connections. VIA TO GROUND SW1 SW2 VIA TO GROUND 1 VIN SHDN MODE PROG 10 9 PGND VOUT VC FB 2 3 4 5 8 7 6 SGND 3127 F04 Figure 4. Recommended PCB Layout 3127f  LTC3127 Typical applicaTions USB (500mA Max), 3.8V GSM Pulsed Load L1 4.7µH VIN USB PWM BURST OFF ON 10µF SW1 VIN MODE LTC3127 SHDN PROG SGND SW2 VOUT 2.15M FB VC PGND 100pF 499k 3127 TA02 VOUT 3.8V C1 2.2mF 1M C2 2.2mF C1, C2: VISHAY TANTAMOUNT TANTALUM, LOW ESR CAPACITORS L1: COILCRAFT XPL4020-472ML 32.4k PCMCIA/Compact Flash (3.3V or 5V/500mA Max), 3.8V GPRS, Class 10 Pulsed Load L1 4.7µH VIN 3.3V OR 5V PWM BURST OFF ON 10µF SW1 VIN MODE LTC3127 SHDN PROG SGND SW2 VOUT 2.15M FB VC PGND 100pF 499k 1M C2 2.2mF C1 2.2mF VOUT 3.8V C3 2.2mF C1, C2, C3: VISHAY TANTAMOUNT TANTALUM, LOW ESR CAPACITORS L1: COILCRAFT XPL4020-472ML 32.4k 3127 TA03 3127f  LTC3127 Typical applicaTions Stacked Supercapacitor Charger (1000mA Max Input Current) L1 4.7µH VIN 1.8V to 5.5V PWM BURST SW1 VIN MODE LTC3127 SHDN 10µF PROG SGND 60.4k SW2 VOUT 3.16M FB VC PGND 100pF 499k 3127 TA04 VOUT 5V C1 100F 100k OFF ON 1M C2 100F 100k L1: COILCRAFT XPL4020-472ML General Purpose Forced Continuous Conduction Application with 500µs Start-Up L1 4.7µH VIN 3V TO 4.3V PWM BURST OFF ON 10µF 0.01µF L1: COILCRAFT XPL4020-472ML SW1 VIN MODE SHDN PROG SGND 60.4k LTC3127 SW2 VOUT 316k 33pF FB VOUT 3.3V PGND VC 47k 3300pF 3127 TA05 182k 22µF 2 3127f  LTC3127 package DescripTion (Reference LTC DWG # 05-08-1699 Rev B) DD Package 10-Lead Plastic DFN (3mm × 3mm) 0.70 0.05 3.55 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) R = 0.125 TYP 6 0.40 10 0.10 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 1.65 0.10 (2 SIDES) 5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES) 1 (DD) DFN REV B 0309 0.25 0.05 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3127f  LTC3127 package DescripTion MSE Package 12-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1666 Rev B) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 (.112 0.102 .004) 0.889 (.035 0.127 .005) 2.845 (.112 1 0.102 .004) 6 0.35 REF 5.23 (.206) MIN 1.651 (.065 0.102 3.20 – 3.45 .004) (.126 – .136) 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 7 NO MEASUREMENT PURPOSE 0.406 0.076 (.016 .003) REF 12 0.65 0.42 0.038 (.0256) (.0165 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT DETAIL “A” 0 – 6 TYP 4.039 0.102 (.159 .004) (NOTE 3) 12 11 10 9 8 7 0.254 (.010) GAUGE PLANE 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4) 0.53 0.152 (.021 .006) DETAIL “A” 0.18 (.007) 1.10 (.043) MAX 123456 0.86 (.034) REF SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.22 – 0.38 (.009 – .015) TYP 0.650 (.0256) BSC 0.1016 (.004 0.0508 .002) MSOP (MSE12) 0608 REV B 3127f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.  LTC3127 Typical applicaTion Single Supercapacitor Charger (1000mA Max Input Current) L1 4.7µH VIN 1.8V TO 5V PWM BURST OFF ON 10µF SW1 VIN MODE LTC3127 SHDN PROG SGND SW2 VOUT 1.05M FB 1M VOUT 2.5V C1 100F PGND VC C1: COOPER BUSSMANN POWERSTOR B-SERIES, B1860-2R5107-R L1: COILCRAFT XPL4020-472ML 60.4k 100pF 499k 3127 TA06 relaTeD parTs PART NUMBER LTC3101 LTC3125 LTC3606B LTC3440 LTC3441/LTC3441-2/ LTC3441-3 LTC3520 LTC3530 LTC3532 LTC3533 LTC3538 LTC3534 DESCRIPTION Wide VIN, 1MHz Multioutput DC/DC Converter and PowerPath™ Controller 1.2A IOUT, 1.6MHz, Synchronous Boost DC/DC Converter With Adjustable Input Current Limit 800mA IOUT, Synchronous Step-Down DC/DC Converter with Average Input Current Limit 600mA IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 1.2A IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 1A 2MHz, Synchronous Buck-Boost and 600mA Buck Converter 600mA IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 500mA IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 2A IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 800mA IOUT, 1MHz, Synchronous Buck-Boost DC/DC Converter 500mA IOUT, 1MHz, Synchronous Buck-Boost DC/DC Converter COMMENTS 95% Efficiency, VIN: 1.8V to 5.5V, VOUT(MAX): 1.8V to 5.25V, IQ = 35µA, ISD < 1µA, 4mm × 4mm QFN-24 Package 94% Efficiency, VIN: 1.8V to 5.5V, VOUT(MAX) = 5.25V, IQ = 15µA, ISD < 1µA, 2mm × 3mm DFN-8 Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MAX) = 0.6V, IQ = 420µA, ISD < 1µA, 3mm × 3mm DFN-8 Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT: 2.5V to 5.5V, IQ = 25µA, ISD < 1µA, 3mm × 3mm DFN-10 and MSOP-10 Packages 95% Efficiency, VIN: 2.4V to 5.5V, VOUT: 2.4V to 5.25V, IQ = 50µA, ISD < 1µA, 3mm × 4mm DFN-12 Package 95% Efficiency, VIN: 2.2V to 5.5V, VOUT(MAX) = 5.25V, IQ = 55µA, ISD < 1µA, 4mm × 4mm QFN-24 Package 95% Efficiency, VIN: 1.8V to 5.5V, VOUT: 1.8V to 5.25V, IQ = 40µA, ISD < 1µA, 3mm × 3mm DFN-10 and MSOP-10 Packages 95% Efficiency, VIN: 2.4V to 5.5V, VOUT: 2.4V to 5.25V, IQ = 35µA, ISD < 1µA, 3mm × 3mm DFN-10 and MSOP-10 Packages 95% Efficiency, VIN: 1.8V to 5.5V, VOUT: 1.8V to 5.25V, IQ = 40µA, ISD < 1µA, 3mm × 4mm DFN-14 Package 95% Efficiency, VIN: 2.4V to 5.5V, VOUT: 1.8V to 5.25V, IQ = 35µA, ISD < 1µA, 2mm × 3mm DFN-8 Package 95% Efficiency, VIN: 2.4V to 7V, VOUT: 1.8V to 2V, IQ = 25µA, ISD < 1µA, 3mm × 3mm DFN-16 and SSOP-16 Packages 3127f 0 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0210 • PRINTED IN USA www.linear.com  LINEAR TECHNOLOGY CORPORATION 2010