LTC3225EDDB-TRPBF

LTC3225 150mA Supercapacitor Charger FEATURES n n n n n n n n n DESCRIPTION The LTC®3225 is a programmable supercapacitor charger designed to charge two supercapacitors in series to a fixed output voltage (4.8V/5.3V selectable) from a 2.8V/3V to 5.5V input supply. Automatic cell balancing prevents overvoltage damage to either supercapacitor. No balancing resistors are required. Low input noise, low quiescent current and low external parts count (one flying capacitor, one bypass capacitor at VIN and one programming resistor) make the LTC3225 ideally suited for small battery-powered applications. Charging current level is programmed with an external resistor. When the input supply is removed, the LTC3225 automatically enters a low current state, drawing less than 1μA from the supercapacitors. The LTC3225 is available in a 10-lead 3mm × 2mm DFN package. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Low Noise Constant Frequency Charging of Two Series Supercapacitors Automatic Cell Balancing Prevents Capacitor Overvoltage During Charging Programmable Charging Current (Up to 150mA) Selectable 2.4V or 2.65V Regulation per Cell Automatic Recharge IVIN = 20μA in Standby Mode ICOUT < 1μA When Input Supply is Removed No Inductors Tiny Application Circuit (3mm × 2mm DFN Package, All Components CBOT) SHDN 5V/DIV IVIN 300mA/DIV VCOUT 2V/DIV VTOP-VBOT 200mV/DIV 5s/DIV VSEL = VIN RPROG = 12k CTOP = 1.43F CBOT = 1.1F CTOP INITIAL VOLTAGE = 0V CBOT INITIAL VOLTAGE = 0V 3225 G11 Charging Profile with 30% Mismatch in Output Capacitance (CTOP < CBOT) VTOP-VBOT 500mV/DIV 5s/DIV VSEL = VIN RPROG = 12k CTOP = 1.1F CBOT = 1.43F CTOP INITIAL VOLTAGE = 0V CBOT INITIAL VOLTAGE = 0V 3225 G12 3225f 4 LTC3225 PIN FUNCTIONS C+ (Pin 1): Flying Capacitor Positive Terminal. A 1μF X5R or X7R ceramic capacitor should be connected from C+ to C–. C– (Pin 2): Flying Capacitor Negative Terminal. CX (Pin 3): Midpoint of Two Series Supercapacitors. This pin voltage is monitored and forced to track COUT (CX = COUT/2) during charging to achieve voltage balancing of the top and bottom supercapacitors. SHDN (Pin 4): Active Low Shutdown Input. A low on SHDN puts the LTC3225 in low current shutdown mode. Do not float the SHDN pin. PGOOD (Pin 5): Open-Drain Output Status Indicator. Upon start-up, this open-drain pin remains low until the output voltage, VOUT, is within 6% (typical) of its final value. Once VOUT is valid, PGOOD becomes Hi-Z. If VOUT falls 7.2% (typical) below its correct regulation level, PGOOD is pulled low. PGOOD may be pulled up through an external resistor to an appropriate reference level. This pin is Hi-Z in shutdown mode. VSEL (Pin 6): Output Voltage Selection Input. A logic low at VSEL sets the regulated COUT to 4.8V; a logic high sets the regulated COUT to 5.3V. Do not float the VSEL pin. PROG (Pin 7): Charging Current Programming Pin. A resistor connected between this pin and GND sets the charging current. (See Applications Information section). GND (Pin 8): Charge Pump Ground. This pin should be connected directly to a low impedance ground plane. VIN (Pin 9): Power Supply for the LTC3225. VIN should be bypassed to GND with a low ESR ceramic capacitor of more than 2.2μF . COUT (Pin 10): Charge Pump Output Pin. Connect COUT to the top plate of the top supercapacitor. COUT provides charge current to the supercapacitors and regulates the final voltage to 4.8V/5.3V. Exposed Pad (Pin 11): This pad must be soldered to a low impedance ground plane for optimum thermal performance. 3225f 5 LTC3225 SIMPLIFIED BLOCK DIAGRAM CFLY 9 VIN 1 C+ 2 C– 4 SHDN SOFT-START AND SHUTDOWN CONTROL VIN UVLO THERMAL PROTECTION 3000i 1.2V RUN i 7 RPROG PROG RUN/STOP OSCILLATOR CLK R1 CHARGE PUMP POR COUT CX GND 8 10 CTOP 3 CBOT C1 1.2V 1.088V 6 VSEL VREF 6 – R2 + VREF – 2% POR PGOOD + VREF – 6% VREF – 7.2% C2 5 – 3225 F01 Figure 1 3225f LTC3225 OPERATION The LTC3225 is a dual cell supercapacitor charger. Its unique topology maintains a constant output voltage with programmable charging current. Its ability to maintain equal voltages on both cells while charging protects the supercapacitors from damage that is possible with other charging methods, without the use of external balancing resistors. The LTC3225 includes an internal switched capacitor charge pump to boost VIN to a regulated output voltage. A unique architecture maintains relatively constant input current for the lowest possible input noise. The basic charger circuit requires only three external components. Normal Charge Cycle Operation begins when the SHDN pin is pulled above 1.3V. The COUT pin voltage is sensed and compared with a preset voltage threshold using an internal resistor divider and a comparator. The preset voltage threshold is 4.8V/5.3V selectable with the VSEL pin. If the voltage at the COUT pin is lower than the preset voltage threshold, the oscillator is enabled. The oscillator operates at a typical frequency of 0.9MHz. When the oscillator is enabled, the charge pump operates charging up COUT. The input current drawn by the internal charge pump ramps up at approximately 20mA/μs each time the charge pump starts up from shutdown. Once the output voltage is charged to the preset voltage threshold, the part shuts down the internal charge pump and enters into a low current state. In this state, the LTC3225 consumes only about 20μA from the input supply. The current drawn from COUT is approximately 2μA. Automatic Cell Balancing The LTC3225 constantly monitors the voltage across both supercapacitors while charging. When the voltage across the supercapacitors is equal, both capacitors are charged with equal currents. If the voltage across one supercapacitor is lower than the other, the lower supercapacitor’s charge current is increased and the higher supercapacitor’s charge current is decreased. The greater the difference between the supercapacitor voltages, the greater the difference in charge current per capacitor. The charge currents can increase or decrease as much as 50% to balance the voltage across the supercapacitors. When the cell voltages are balanced, the supercapacitors are charged at a rate of approximately: Current Limit/Thermal Protection The LTC3225 has built-in current limit as well as overtemperature protection. If the PROG pin is shorted to ground, a protection circuit automatically shuts off the internal charge pump. At higher temperatures, or if the input voltage is high enough to cause excessive self-heating of the part, the thermal shutdown circuitry shuts down the charge pump once the junction temperature exceeds approximately 150°C. It will enable the charge pump once the junction temperature drops back to approximately 135°C. The LTC3225 is able to cycle in and out of thermal shutdown indefinitely without latch-up or damage until the overcurrent condition is removed. 3225f ICOUT = 1 •I 2 VIN If the leakage currents or capacitances of the two supercapacitors are mismatched enough that varying the charging current is not sufficient to balance their voltages, the LTC3225 stops charging the capacitor with the higher voltage until they are again balanced. This feature protects either capacitor from experiencing an overvoltage condition. Shutdown Mode Asserting SHDN low causes the LTC3225 to enter shutdown mode. When the charge pump is first disabled, the LTC3225 draws approximately 1μA of supply current from VIN and COUT. After VOUT is discharged to 0V, the current from VIN drops to less than 1μA. With SHDN connected to VIN, the output sinks less than 1μA when the input supply is removed. Since the SHDN pin is a high impedance CMOS input, it should never be allowed to float. Output Status Indicator (PGOOD) During shutdown, the PGOOD pin is high impedance. When the charge cycle starts, an internal N-channel MOSFET pulls the PGOOD pin to ground. When the output voltage, VOUT, is within 6% (typical) of its final value, the PGOOD pin becomes high impedance, but charge current continues to flow until VOUT crosses the charge termination voltage. When VOUT drops 7% below the charge termination voltage, the PGOOD pin again pulls low. 7 LTC3225 APPLICATIONS INFORMATION Programming Charge Current The charging current is programmed with a single resistor connecting the PROG pin to ground. The program resistor and the input/output charge currents are calculated using the following equations: IVIN = IOUT = 3600 V RPROG IVIN (with matched output capacitors) p 2 the internal switch resistances (RS) and the ESR of the external capacitors. Output Voltage Programming The LTC3225 has a VSEL input pin that allows the user to set the output threshold voltage to either 4.8V or 5.3V by forcing a low or high at the VSEL pin respectively. Charging Time Estimation The estimated charging time when the initial voltage across the two output supercapacitors is equal is given by the equation: t CHRG = COUT • VCOUT – VINI IOUT An RPROG resistor value of 2k or less (i.e., short circuit) causes the LTC3225 to enter overcurrent shutdown mode. This mode prevents damage to the part by shutting down the internal charge pump. Power Efficiency The power efficiency (η) of the LTC3225 is similar to that of a linear regulator with an effective input voltage of twice the actual input voltage. In an ideal regulating voltage doubler the power efficiency is given by: η2xIDEAL = POUT VOUT • IOUT VOUT = = PIN VIN • 2IOUT 2VIN ( ) where COUT is the series output capacitance, VCOUT is the voltage threshold set by the VSEL pin, VINI is the initial voltage at the COUT pin and IOUT is the output charging current given by: IOUT = 1800 V RPROG At moderate to high output power the switching losses and quiescent current of the LTC3225 are negligible and the above expression is valid. For example, with VIN = 3.6V, IOUT = 100mA and VOUT regulated to 5.3V, the measured efficiency is 71.2% which is in close agreement with the theoretical 73.6% calculation. Effective Open-Loop Output Resistance (ROL) The effective open-loop output resistance (ROL) of a charge pump is an important parameter that describes the strength of the charge pump. The value of this parameter depends on many factors including the oscillator frequency (fOSC), value of the flying capacitor (CFLY), the non-overlap time, When the charging process starts with unequal initial voltages across the output supercapacitors, only the capacitor with the lower voltage level is charged; the other capacitor is not charged until the voltages equalize. This extends the charging time slightly. Under the worst-case condition, whereby one capacitor is fully depleted while the other remains fully charged due to significant leakage current mismatch, the charging time is about 1.5 times longer than normal. Thermal Management For higher input voltages and maximum output current, there can be substantial power dissipation in the LTC3225. If the junction temperature increases above approximately 3225f 8 LTC3225 APPLICATIONS INFORMATION 150°C, the thermal shutdown circuitry automatically deactivates the output. To reduce the maximum junction temperature, a good thermal connection to the PC board is recommended. Connecting the GND pin (Pin 8) and the Exposed Pad (Pin 11) of the DFN package to a ground plane under the device on two layers of the PC board can reduce the thermal resistance of the package and PC board considerably. VIN Capacitor Selection The type and value of CIN controls the amount of ripple present at the input pin (VIN). To reduce noise and ripple, it is recommended that low equivalent series resistance (ESR) multilayer ceramic chip capacitors (MLCCs) be used for CIN. Tantalum and aluminum capacitors are not recommended because of their high ESR. The input current to the LTC3225 is relatively constant during both the input charging phase and the output charging phase but drops to zero during the clock non-overlap times. Since the non-overlap time is small (~40ns) these missing “notches” result in only a small perturbation on the input power supply line. Note that a higher ESR capacitor, such as a tantalum, results in higher input noise. Therefore, ceramic capacitors are recommended for their exceptional ESR performance. Further input noise reduction can be achieved by powering the LTC3225 through a very small series inductor as shown in Figure 2. A 10nH inductor will reject the fast current notches, thereby presenting a nearly constant current load to the input power supply. For economy, the 10nH inductor can be fabricated on the PC board with about 1cm (0.4") of PC board trace. Flying Capacitor Selection Warning: Polarized capacitors such as tantalum or aluminum should never be used for the flying capacitor since its voltage can reverse upon start-up of the LTC3225. Low ESR ceramic capacitors should always be used for the flying capacitor. The flying capacitor controls the strength of the charge pump. In order to achieve the rated output current, it is necessary to use at least 0.6μF of capacitance for the flying capacitor. The effective capacitance of a ceramic capacitor varies with temperature and voltage in a manner primarily determined by its formulation. For example, a capacitor made of X5R or X7R material retains most of its capacitance from –40°C to 85°C whereas a Z5U or Y5V type capacitor loses considerable capacitance over that range. X5R, Z5U and Y5V capacitors may also have a poor voltage coefficient causing them to lose 60% or more of their capacitance when the rated voltage is applied. Therefore, when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than comparing the specified capacitance value. For example, over rated voltage and temperature conditions, a 4.7μF 10V Y5V ceramic capacitor in a 0805 case may not provide any more capacitance than a 1μF 10V X5R or X7R capacitor available in the same 0805 case. In fact, over bias and temperature range, the 1μF 10V X5R or X7R provides more capacitance than the 4.7μF 10V Y5V capacitor. The capacitor manufacturer’s data sheet should be consulted to determine what value of capacitor is needed to ensure minimum capacitance values are met over operating temperature and bias voltage. 10nH VIN 0.1μF 2.2μF 9 VIN LTC3225 GND 3225 F02 8, 11 Figure 2. 10nH Inductor Used for Input Noise Reduction 3225f 9 LTC3225 APPLICATIONS INFORMATION Table 1 contains a list of ceramic capacitor manufacturers and how to contact them. Table 1. Capacitor Manufacturers AVX Kemet Murata Taiyo Yuden Vishay TDK www.avxcorp.com www.kemet.com www.murata.com www.t-yuden.com www.vishay.com www.component.tdk.com Layout Considerations Due to the high switching frequency and high transient currents produced by the LTC3225, careful board layout is necessary for optimum performance. An unbroken ground plane and short connections to all the external capacitors improves performance and ensures proper regulation under all conditions. The voltages on the flying capacitor pins C+ and C– have very fast rise and fall times. The high dv/dt values on these pins can cause energy to capacitively couple to adjacent printed circuit board traces. Magnetic fields can also be generated if the flying capacitors are far from the part (i.e. the loop area is large). To prevent capacitive energy transfer, a Faraday shield may be used. This is a grounded PC trace between the sensitive node and the LTC3225 pins. For a high quality AC ground it should be returned to a solid ground plane that extends all the way to the LTC3225. Table 2. Supercapacitor Manufacturers CAP-XX NESS CAP Maxwell Bussmann AVX www.cap-xx.com www.nesscap.com www.maxwell.com www.cooperbussmann.com www.avx.com TYPICAL APPLICATION 5V Supercapacitor Backup Supply D2 7 D3 VIN 5V 9 C2 2.2μF 10V C1 1μF 10V R3 100k 5% PGOOD 8 GND VIN VIN ENA VO VO SEN 1 2 3 4 C7 1μF 10V + VIN COUT CX 10 3 COUT 0.80F 5.5V HS208F C5 0.22μF 6.3V C3 150μF 10V C4 47μF 10V 8 10 VO 1.8V C8 1μF 10V 1 2 4 5 C+ C– LTC3225 9 R1 15k 1% TYCO VO AUSTIN SUPERLYNX TRIM GND GND 5 6 VO SHDN PROG 7 6 R1 23.7k 1% 3225 TA02 PGOOD VSEL GND 11 3225f 10 LTC3225 PACKAGE DESCRIPTION DDB Package 10-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1722 Rev Ø) 0.64 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.39 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 3.00 0.10 (2 SIDES) R = 0.05 TYP 0.40 10 0.10 PIN 1 BAR TOP MARK (SEE NOTE 6) 2.00 0.10 (2 SIDES) 0.64 0.05 (2 SIDES) 0.25 0.200 REF 0.75 0.05 5 0.05 2.39 0.05 (2 SIDES) 1 PIN 1 R = 0.20 OR 0.25 45 CHAMFER (DDB10) DFN 0905 REV Ø 0.50 BSC 0 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3225f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC3225 TYPICAL APPLICATION 12V Supercapacitor Backup Supply D1 CSHD6-40C DPAK LT3740 HIGH EFFICIENCY DOWN CONVERTER VIN+ VOUT LT3740 GND GND GND VIN 12V + GND 10A C1 47μF 25V DCAP VOUT 1.8V 10A C2 1μF 10V CHARGER 3 VIN COUT LTC3225 + C CX C– GND R6 1k D2 CMSH3-20 VBIAS 3.3V GND C5 10μF M4 Si4410DY M2 IRF7424 D3 CMSH3-20 CHARGER 2 COUT VIN LTC3225 C+ CX C– GND R5 1k D4 CMSH3-20 1 8 C3 1μF 10V VM VCC LTC2915 7 SEL1 SEL2 3 6 TOL/MR RT 4 5 GND RST 2 C6 0.1μF R7 10k R1 2k R2 100k 1 8 PGND OUT 2 LTC4441-1 7 SGND DRVCC 3 6 VIN IN 4 5 EN/SHDN FB M3 Si4410DY R3 332k R4 84.5k C7 10μF C4 1μF 10V M1 IRF7424 CHARGER 1 COUT VIN LTC3225 + C CX C– GND 3225 TA03 RELATED PARTS PART NUMBER LTC1751-3.3/LTC1751-5 LTC1754-3.3/LTC1754-5 LTC3200 LTC3203/LTC3203B/ LTC3203B-1/LTC3203-1 LTC3204/LTC3204B-3.3/ LTC3204-5 LTC3221/LTC3221-3.3/ LTC3221-5 LTC3240-3.3/LTC3240-2.5 LT®3420/LT3420-1 LT3468/LT3468-1/ LT3468-2 LTC3484-0/LTC3484-1/ LTC3484-2 LT3485-0/LT3485-1/ LT3485-2/LT3485-3 DESCRIPTION Micropower 5V/3.3V Doubler Charge Pumps Micropower 5V/3.3V Doubler Charge Pumps Constant Frequency Doubler Charge Pump 500mA Low Noise High Efficiency Dual Mode Step-Up Charge Pumps Low Noise Regulating Charge Pumps Micropower Regulated Charge Pump Step-Up/Step-Down Regulated Charge Pumps 1.4A/1A Photoflash Capacitor Charger with Automatic Top-Off 1.4A/1A/0.7A, Photoflash Capacitor Charger 1.4A/0.7A/1A, Photoflash Capacitor Charger COMMENTS IQ = 20μA, Up to 100mA Output, SOT-23 Package IQ = 13μA, Up to 50mA Output, SOT-23 Package Low Noise, 5V Output or Adjustable VIN: 2.7V to 5.5V, 3mm × 3mm 10-Lead DFN Package Up to 150mA (LTC3204-5), Up to 50mA (LTC3204-3.3) Up to 60mA Output Up to 150mA Output Charges 220μF to 320V in 3.7 Seconds from 5V, VIN: 2.2V to 16V, ISD < 1μA, 10-Lead MS Package VIN: 2.5V to 16V, Charge Time = 4.6 Seconds for the LT3468 (0V to 320V, 100μF VIN = 3.6V), ISD < 1μA, ThinSOTTM Package , VIN: 1.8V to 16V, Charge Time = 4.6 Seconds for the LT3484-0 (0V to 320V, 100μF VIN = 3.6V), ISD < 1μA, 2mm × 3mm 6-Lead DFN Package , VIN: 1.8V to 10V, Charge Time = 3.7 Seconds for the LT3485-0 (0V to 320V, 100μF VIN = 3.6V), ISD < 1μA, 3mm × 3mm 10-Lead DFN Driver , Charges Any Size Capacitor, 10-Lead MS Package 3225f 1.4A/0.7A/1A/2A Photoflash Capacitor Charger with Output Voltage Monitor and Integrated IGBT LT3750 Capacitor Charger Controller ThinSOT is a trademark of Linear Technology Corporation. 12 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0508 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008