LTC3405A

LTC3405A 1.5MHz, 300mA Synchronous Step-Down Regulator in ThinSOT FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO High Efficiency: Up to 96% Very Low Quiescent Current: Only 20µA During Operation 300mA Output Current at VIN = 3V 2.5V to 5.5V Input Voltage Range 1.5MHz Constant Frequency Operation No Schottky Diode Required Low Dropout Operation: 100% Duty Cycle Stable with Ceramic Capacitors 0.8V Reference Allows Low Output Voltages Shutdown Mode Draws < 1µA Supply Current ± 2% Output Voltage Accuracy Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Low Profile (1mm) ThinSOTTM Package The LTC ®3405A is a high efficiency monolithic synchronous buck regulator using a constant frequency, current mode architecture. Supply current during operation is only 20µA and drops to 1.5V). In this mode, the efficiency is lower at light loads, but becomes comparable to Burst Mode operation when the output load exceeds 25mA. The advantage of pulse skipping mode is lower output ripple and less interference to audio circuitry. 3405afa 6 + – W 0.65V 4 VIN – + U U U – + 0.4V – + EN SLEEP – BURST Q Q SWITCHING LOGIC AND BLANKING CIRCUIT ICOMP + 5Ω S R RS LATCH ANTISHOOTTHRU 3 SW OV 2 GND 3405A BD LTC3405A OPERATIO When the converter is in Burst Mode operation, the peak current of the inductor is set to approximately 100mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 20µA. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier’s output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator is reduced to about 210kHz, 1/7 the nominal frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing runaway. The oscillator’s frequency will progressively increase to 1.5MHz when VFB rises above 0V. Dropout Operation As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then 600 MAXIMUM OUTPUT CURRENT (mA) U (Refer to Functional Diagram) be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. Another important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3405A is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applications Information section). Low Supply Operation The LTC3405A will operate with input supply voltages as low as 2.5V, but the maximum allowable output current is reduced at this low voltage. Figure 2 shows the reduction in the maximum output current as a function of input voltage for various output voltages. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, this results in a reduction of maximum inductor peak current for duty cycles > 40%. However, the LTC3405A uses a patent-pending scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles. VOUT = 1.8V 500 400 VOUT = 2.5V 300 200 100 0 VOUT = 1.3V 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5 3405A F02 Figure 2. Maximum Output Current vs Input Voltage 3405afa 7 LTC3405A APPLICATIO S I FOR ATIO The basic LTC3405A application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Selection For most applications, the value of the inductor will fall in the range of 2.2µH to 10µH. Its value is chosen based on the desired ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in equation 1. A reasonable starting point for setting ripple current is ∆IL = 120mA (40% of 300mA). ∆IL = ⎛V⎞ 1 VOUT ⎜ 1 − OUT ⎟ ( f)(L) ⎝ VIN ⎠ (1) The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 360mA rated inductor should be enough for most applications (300mA + 60mA). For better efficiency, choose a low DC-resistance inductor. The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 100mA. Lower inductor values (higher ∆IL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar 8 U Table 1. Representative Surface Mount Inductors MANUFACTURER PART NUMBER Taiyo Yuden LB2016T2R2M LB2012T2R2M LB2016T3R3M ELT5KT4R7M LQH3C4R7M34 LB2016T4R7M ELT5KT6R8M ELT5KT100M MAX DC VALUE CURRENT DCR HEIGHT 2.2µH 2.2µH 3.3µH 4.7µH 4.7µH 4.7µH 6.8µH 10µH 315mA 240mA 280mA 950mA 450mA 210mA 760mA 680mA 620mA 0.13Ω 1.6mm 0.23Ω 1.25mm 0.2Ω 1.6mm 0.2Ω 1.2mm 0.2Ω 2mm 0.25Ω 1.6mm 0.3Ω 1.2mm 0.36Ω 1.2mm 0.23Ω 1.2mm Panasonic Murata Taiyo Yuden Panasonic Panasonic Sumida CMD4D116R8MC 6.8µH W UU electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3405A requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3405A applications. CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: [VOUT (VIN − VOUT )]1/ 2 CIN required IRMS ≅ IOMAX VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. 3405afa LTC3405A APPLICATIO S I FOR ATIO The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple ∆VOUT is determined by: ⎛ 1⎞ ∆VOUT ≅ ∆IL ⎜ ESR + ⎟ ⎝ 8fC OUT ⎠ where f = operating frequency, COUT = output capacitance and ∆IL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ∆IL increases with input voltage. If tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3405A’s control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can U couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Output Voltage Programming The output voltage is set by a resistive divider according to the following formula: ⎛ R2⎞ VOUT = 0.8V ⎜ 1 + ⎟ ⎝ R1⎠ (2) W UU The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 3. 0.8V ≤ VOUT ≤ 5.5V R2 VFB LTC3405A GND 3405A F03 R1 Figure 3. Setting the LTC3405A Output Voltage Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. 3405afa 9 LTC3405A APPLICATIO S I FOR ATIO Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3405A circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in Figure 4. 1 VIN = 3.6V 0.1 POWER LOST (W) VOUT = 1.8V 0.01 0.001 VOUT = 2.5V VOUT = 3.3V 0.0001 0.1 VOUT = 1.3V 1 100 10 LOAD CURRENT (mA) 1000 3405A F04 Figure 4. Power Lost vs Load Current 1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 10 U 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Charateristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations In most applications the LTC3405A does not dissipate much heat due to its high efficiency. But, in applications where the LTC3405A is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3405A from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(θJA) where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. 3405afa W UU LTC3405A APPLICATIO S I FOR ATIO The junction temperature, TJ, is given by: T J = TA + TR where TA is the ambient temperature. As an example, consider the LTC3405A in dropout at an input voltage of 2.7V, a load current of 300mA and an ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 0.94Ω. Therefore, power dissipated by the part is: PD = ILOAD2 • RDS(ON) = 84.6mW For the SOT-23 package, the θJA is 250°C/ W. Thus, the junction temperature of the regulator is: TJ = 70°C + (0.0846)(250) = 91.15°C which is well below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount – VOUT COUT + BOLD LINES INDICATE HIGH CURRENT PATHS Figure 5. LTC3405A Layout Diagram U equal to (∆ILOAD • ESR), where ESR is the effective series resistance of COUT. ∆ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1µF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10µF capacitor charging to 3.3V would require a 250µs rise time, limiting the charging current to about 130mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3405A. These items are also illustrated graphically in Figures 5 and 6. Check the following in your layout: 1 RUN MODE 6 LTC3405A 2 GND VFB VIN CIN VIN 5 R2 3 L1 SW 4 CFWD R1 3405A F05 W UU 3405afa 11 LTC3405A APPLICATIO S I FOR ATIO VOUT PIN 1 L1 LTC3405A SW Figure 6. LTC3405A Suggested Layout 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the (–) plates of CIN and COUT as close as possible. 5. Keep the switching node, SW, away from the sensitive VFB node. Design Example As a design example, assume the LTC3405A is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.25A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using equation (1), 12 U VIA TO GND R1 VIA TO VIN R2 CFWD VIN VIA TO VOUT COUT GND 3405A F06 W UU CIN L= ⎛V⎞ 1 VOUT ⎜ 1 − OUT ⎟ ( f)(∆IL ) ⎝ VIN ⎠ (3) Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL = 100mA and f = 1.5MHz in equation (3) gives: L= 2.5V ⎛ 2.5V ⎞ ⎜1 − ⎟ ≅ 6.8µH 1.5MHz(100mA) ⎝ 4.2V ⎠ For best efficiency choose a 300mA or greater inductor with less than 0.3Ω series resistance. CIN will require an RMS current rating of at least 0.125A ≅ ILOAD(MAX)/2 at temperature and COUT will require an ESR of less than 0.5Ω. In most cases, a ceramic capacitor will satisfy this requirement. For the feedback resistors, choose R1 = 412k. R2 can then be calculated from equation (2) to be: ⎛V ⎞ R2 = ⎜ OUT − 1⎟ R1 = 875.5k; use 887k ⎝ 0.8 ⎠ Figure 7 shows the complete circuit along with its efficiency curve. 3405afa LTC3405A APPLICATIO S I FOR ATIO VIN 2.7V TO 4.2V 4 CIN 2.2µF CER † 1 6 100 VIN = 2.7V 90 VIN = 3.6V 80 EFFICIENCY (%) 70 60 50 40 30 0.1 VIN = 4.2V VOUT 100mV/DIV AC COUPLED IL 200mA/DIV ILOAD 200mA/DIV VIN = 3.6V 20µs/DIV VOUT = 2.5V ILOAD = 100mA TO 300mA U VIN RUN MODE GND 2 VFB 5 887k 412k 3405A F07a W UU SW 3 6.8µH* 22pF VOUT 2.5V COUT** 4.7µF CER *SUMIDA CMD4D11-6R8MC ** TAIYO YUDEN JMK212BJ475MG † TAIYO YUDEN LMK212BJ225MG LTC3405A Figure 7a 1 100 10 OUTPUT CURRENT (mA) 1000 3405A F07b Figure 7b 3405A F07c Figure 7c 3405afa 13 LTC3405A TYPICAL APPLICATIO S Single Li-Ion to 1.2V/300mA Regulator Using Ceramic and Tantalum Output Capacitors VIN 2.7V TO 4.2V 4 CIN** 2.2µF CER VIN RUN MODE GND 2 VFB 5 887k 1.774M 3405A TA01a 100 90 80 EFFICIENCY (%) VIN = 2.7V VIN = 3.6V 70 60 50 40 30 0.1 VIN = 4.2V 1 100 10 OUTPUT CURRENT (mA) Single Li-Ion to 1V/200mA Regulator Using All Ceramic Capacitors Optimized for Small Footprint VIN 2.7V TO 4.2V 4 CIN** 4.7µF CER VIN RUN MODE GND 2 VFB 5 249k 1M *TAIYO YUDEN LM2016T3R3M **TAIYO YUDEN CERAMIC JMK212BJ475MG SW 3 3.3µH* 22pF COUT** 4.7µF CER 3405A TA02a 90 VIN = 2.7V 80 70 60 50 40 30 0.1 VIN = 4.2V VIN = 3.6V EFFICIENCY (%) 1 100 10 OUTPUT CURRENT (mA) 14 U SW 3 4.7µH* 22pF COUT1*** + 1µF CER LTC3405A 1 6 VOUT 1.2V COUT2† 22µF TANT *MURATA LQH3C4R7M34 **TAIYO YUDEN CERAMIC LMK212BJ225MG ***TAIYO YUDEN CERAMIC JMK107BJ105MA † AVX TAJA226M006R VOUT 100mV/DIV AC COUPLED IL 200mA/DIV ILOAD 200mA/DIV 1000 3405A TA01b VIN = 3.6V 20µs/DIV VOUT = 1.2V ILOAD = 100mA TO 300mA 3405A TA01c VOUT 1V LTC3405A 1 6 VOUT 100mV/DIV AC COUPLED IL 100mA/DIV ILOAD 100mA/DIV 1000 3405A TA02b VIN = 3.6V 20µs/DIV VOUT = 1V ILOAD = 100mA TO 200mA 3405A TA02c 3405afa LTC3405A PACKAGE DESCRIPTIO 0.62 MAX 0.95 REF 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.20 BSC 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID 0.95 BSC 0.30 – 0.45 6 PLCS (NOTE 3) 0.80 – 0.90 0.01 – 0.10 0.09 – 0.20 (NOTE 3) 1.90 BSC S6 TSOT-23 0302 3405afa 15 LTC3405A TYPICAL APPLICATIO Single Li-Ion to 1.5V/150mA Regulator Using All Ceramic Capacitors Optimized for Smallest Footprint VIN 2.7V TO 4.2V 4 CIN** 2.2µF CER 3 2.2µH* 22pF COUT** 2.2µF CER VOUT 1.5V 90 80 70 60 50 40 VOUT = 1.5V VIN = 2.7V VIN = 3.6V VIN = 4.2V EFFICIENCY (%) 30 0.1 1 100 10 OUTPUT CURRENT (mA) RELATED PARTS PART NUMBER LTC1174/LTC1174-3.3 LTC1174-5 LTC1265 LTC1474/LTC1475 LTC1504A LT1616 LTC1627 LTC1701 LTC1707 LTC1767 LTC1779 LTC1877 LTC1878 LTC3404 LTC3405A-1.5/ LTC3405A-1.8 DESCRIPTION High Efficiency Step-Down and Inverting DC/DC Converters 1.2A, High Efficiency Step-Down DC/DC Converter Low Quiescent Current Step-Down DC/DC Converters Monolithic Synchronous Step-Down Switching Regulator 600mA, 1.4MHz Step-Down DC/DC Converter Monolithic Synchronous Step-Down Switching Regulator Monolithic Current Mode Step-Down Switching Regulator Monolithic Synchronous Step-Down Switching Regulator 1.5A, 1.25MHz Step-Down Switching Regulator Monolithic Current Mode Step-Down Switching Regulator High Efficiency Monolithic Step-Down Regulator High Efficiency Monolithic Step-Down Regulator 1.4MHz High Efficiency Monolithic Step-Down Regulator 1.5MHz High Efficiency Monolithic Step-Down Regulators COMMENTS Monolithic Switching Regulators, I OUT to 450mA, Burst Mode Operation Constant Off-Time, Monolithic, Burst Mode Operation Monolithic, IOUT to 250mA, IQ = 10µA, 8-Pin MSOP Low Cost, Voltage Mode IOUT to 500mA, VIN from 4V to 10V 6-Pin ThinSOT, VIN from 3.6V to 25V Constant Frequency, IOUT to 500mA, Secondary Winding Regulation, VIN from 2.65V to 8.5V Constant Off-Time, IOUT to 500mA, 1MHz Operation, VIN from 2.5V to 5.5V 1.19V VREF Pin, Constant Frequency, IOUT to 600mA, VIN from 2.65V to 8.5V 3V to 25V Input, 8-Lead MSOP Package 550kHz, 6-Lead ThinSOT, V IN from 2.5V to 9.8V 550kHz, MS8, VIN Up to 10V, IQ = 10µA, IOUT to 600mA at VIN = 5V 550kHz, MS8, VIN Up to 6V, IQ = 10µA, IOUT to 600mA at VIN = 3.3V 1.4MHz, MS8, VIN Up to 6V, IQ = 10µA, IOUT to 600mA at VIN = 3.3V Fixed Output Versions of the LTC3405A 3405afa 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U VIN RUN MODE GND 2 VFB 5 887k 1M 3405A TA03a SW LTC3405A 1 6 *TAIYO YUDEN LB2012T2R2M **TAIYO YUDEN CERAMIC LMK212BJ225MG VOUT 100mV/DIV AC COUPLED IL 200mA/DIV ILOAD 100mA/DIV 1000 3405A TA03b VIN = 3.6V 20µs/DIV VOUT = 1.5V ILOAD = 50mA TO 150mA 3405A TA03c LT/TP 0604 1K REV A • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2002