LTC3410B 2.25MHz, 300mA Synchronous Step-Down Regulator in SC70
FEATURES
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
DESCRIPTIO
High Efficiency: Up to 96% 300mA Output Current at VIN = 3V 380mA Minimum Peak Switch Current 2.5V to 5.5V Input Voltage Range 2.25MHz Constant Frequency Operation No Schottky Diode Required Low Dropout Operation: 100% Duty Cycle Stable with Ceramic Capacitors 0.8V Reference Allows Low Output Voltages Shutdown Mode Draws < 1µA Supply Current ± 2% Output Voltage Accuracy Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Available in Low Profile SC70 Package
The LTC ®3410B is a high efficiency monolithic synchronous buck regulator using a constant frequency, current mode architecture. The device is available in adjustable and fixed output voltage versions. Supply current during operation is only 200µA, dropping to 1µF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10µF capacitor charging to 3.3V would require a 250µs rise time, limiting the charging current to about 130mA.
3410bfa
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LTC3410B
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3410B. These items are also illustrated graphically in Figures 4 and 5. Check the following in your layout: 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide.
1
RUN LTC3410B 6 R2 R1 CFWD VIN
2
–
VOUT COUT
GND
VFB VIN 5 CIN
+
3 L1
SW
4
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 4a. LTC3410B Layout Diagram
VIA TO GND
R1 VOUT VIA TO VIN R2 CFWD VIN VIA TO VOUT
PIN 1 L1 LTC3410B SW
COUT GND
CIN
3410B F05a
Figure 5a. LTC3410B Suggested Layout
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2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the (–) plates of CIN and COUT as close as possible. 5. Keep the switching node, SW, away from the sensitive VFB node.
1
RUN LTC3410B-1.875
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2
–
VOUT
GND
VOUT VIN 5 CIN
6
COUT
+
3
L1
SW
4
VIN
3410B F04a
BOLD LINES INDICATE HIGH CURRENT PATHS
3410B F04b
Figure 4b. LTC3410B-1.875 Layout Diagram
VOUT
VIA TO VIN
VIN
PIN 1
L1
LTC3410B1.875
SW
COUT
CIN
3410B F05b
Figure 5b. LTC3410B Fixed Output Voltage Suggested Layout
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LTC3410B
APPLICATIO S I FOR ATIO
Design Example
As a design example, assume the LTC3410B is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.3A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using Equation (1),
L=
⎛V⎞ 1 VOUT ⎜ 1− OUT ⎟ VIN ⎠ ( f )( ∆IL ) ⎝
Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL = 100mA and f = 2.25MHz in Equation (3) gives: L= 2.5V ⎛ 2.5V ⎞ ⎜ 1− ⎟ = 4.5µH 2.25MHz(100mA) ⎝ 4.2V ⎠
VIN 2.7V TO 4.2V 4 CIN 2.2µF CER
†
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 10 100 OUTPUT CURRENT (mA) VIN = 2.7V VIN = 3.6V VIN = 4.2V 1000
3410 F07b
Figure 6b
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For best efficiency choose a 300mA or greater inductor with less than 0.3Ω series resistance. CIN will require an RMS current rating of at least 0.125A ≅ ILOAD(MAX)/2 at temperature and COUT will require an ESR of less than 0.5Ω. In most cases, a ceramic capacitor will satisfy this requirement. For the feedback resistors, choose R1 = 412k. R2 can then be calculated from equation (2) to be: ⎛V ⎞ R2 = ⎜ OUT − 1⎟ R1 = 875.5k; use 887k ⎝ 0.8 ⎠ Figure 6 shows the complete circuit along with its efficiency curve. (3)
VIN RUN VFB GND 2, 5 6 887k 412k
3410 F07a
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SW
3
4.7µH* 10pF
VOUT 2.5V COUT† 2.2µF CER
†
LTC3410B 1
TAIYO YUDEN JMK212BJ225 *MURATA LQH32CN4R7M23
Figure 6a
VOUT 100mV/DIV AC COUPLED
IL 200mA/DIV ILOAD 200mA/DIV 4µs/DIV VIN = 3.6V VOUT = 2.5V ILOAD = 100mA TO 300mA
3410 F07c
Figure 6c
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LTC3410B
TYPICAL APPLICATIO
VIN 2.7V TO 4.2V
EFFICIENCY (%)
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4 CIN 2.2µF
†
VIN RUN
SW
3
4.7µH* 10pF
VOUT 1.5V COUT† 2.2µF
LTC3410B 1 6
VFB GND 2, 5
3410 TA02
402k 464k
†
TAIYO YUDEN JMK212BJ225 *MURATA LQH32CN4R7M23
100 90 80 70 60 50 40 30 20 10 0 1 10 100 OUTPUT CURRENT (mA) VIN = 2.7V VIN = 3.6V VIN = 4.2V 1000
3410 TA03
VOUT 100mV/DIV AC COUPLED IL 200mA/DIV
ILOAD 200mA/DIV 4µs/DIV VIN = 3.6V VOUT = 1.5V ILOAD = 100mA TO 250mA
3410 TA04
3410bfa
LTC3410B
PACKAGE DESCRIPTIO
0.47 MAX
0.65 REF
2.8 BSC 1.8 REF
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.10 – 0.40
GAUGE PLANE 0.15 BSC 0.26 – 0.46
NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE INDEX AREA 7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70 8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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SC6 Package 6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638)
1.80 – 2.20 (NOTE 4) 1.00 REF 1.80 – 2.40 1.15 – 1.35 (NOTE 4) INDEX AREA (NOTE 6) PIN 1 0.65 BSC 0.15 – 0.30 6 PLCS (NOTE 3) 0.80 – 1.00 0.00 – 0.10 REF 1.00 MAX 0.10 – 0.18 (NOTE 3)
SC6 SC70 1205 REV B
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LTC3410B
TYPICAL APPLICATIO
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