LTC3533

FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ LTC3533 2A Wide Input Voltage Synchronous Buck-Boost DC/DC Converter DESCRIPTION The LTC®3533 is a wide VIN range, highly efficient, fixed frequency, buck-boost DC/DC converter that operates from input voltages above, below or equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single cell lithium-ion/polymer or multi-cell alkaline/NiMH applications where the output voltage is within the input voltage range. The LTC3533 features programmable Burst Mode operation, extended VIN and VOUT ranges down to 1.8V, and increased output current. Switching frequencies up to 2MHz are programmed with an external resistor. The Burst Mode threshold is programmed with a single resistor from the BURST pin to GND. Other features include 1µA shutdown current, short circuit protection, programmable soft-start, current limit and thermal shutdown. The LTC3533 is housed in the thermally enhanced 14-lead (3mm × 4mm × 0.75mm) DFN package. , LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Regulated Output with Input Voltages Above, Below or Equal to the Output 1.8V to 5.5V (Input) and 5.25V (Output) Voltage Range 0.8A Continuous Output Current: VIN > 1.8V 2A Continuous Output Current: VIN > 3V Single Inductor Synchronous Rectification: Up to 96% Efficiency Programmable Burst Mode® Operation: IQ = 40µA Output Disconnect in Shutdown Programmable Frequency from 300kHz to 2MHz 1.6V to ensure the error amp is not clamped from soft-start. An RC from the shutdown command signal to this pin will provide a soft-start function by limiting the rise time of VC FB (Pin 13): Feedback Pin. Connect resistor divider tap here. The output voltage can be adjusted from 1.8V to 5.25V. The feedback reference voltage is typically 1.22V. VOUT = 1.22 • R1+ R2 R2 VC (Pin 14): Error Amp Output. An R-C network is connected from this pin to FB for loop compensation. Refer to “Closing the Feedback Loop” section for component selection guidelines. During Burst Mode operation, VC is internally connected to a hold circuit. Exposed Pad (Pin 15): IC Substrate Ground. This pin must be soldered to the PCB ground to provide both electrical contact and a good thermal contact to the PCB. 3533f 6 LTC3533 BLOCK DIAGRAM SW1 SW2 VIN 1.8V TO 5.5V SW A GATE DRIVERS AND ANTI-CROSS CONDUCTION SW D VOUT –0.5A ISENSE AMP + + 4.5A SUPPLY CURRENT LIMIT + – – UVLO PWM LOGIC AND OUTPUT PHASING PWM COMPARATORS + 1.6V + – – RT RT OSC R2 SLEEP BURST MODE OPERATION CONTROL RUN/SS RUN RSS BURST 0 = BURST MODE 1 = FIXED FREQUENCY GND CSS OPERATION The LTC3533 provides high efficiency, low noise power for a wide variety of handheld electronic devices. The LTC proprietary topology allows input voltages above, below or equal to the output voltage by properly phasing the output switches. The error amplifier output voltage on VC determines the output duty cycle of the switches. Since VC is a filtered signal, it provides rejection of frequencies well below the switching frequency. The low RDS(ON), low gate charge synchronous switches provide high frequency pulse width modulation control at high efficiency. High efficiency is achieved at light loads when Burst Mode operation is entered and the LTC3533’s quiescent current drops to a low 40µA. LOW NOISE FIXED FREQUENCY OPERATION Oscillator The frequency of operation is programmed by an external resistor from RT to ground, according to the following equation: f(kHz) = 33,170/RT(k) 3533f + REVERSE CURRENT LIMIT R1 – SW B SW C + ERROR AMP 1.22V FB – CLAMP VC VIN 3533 BD 7 LTC3533 OPERATION Error Amplifier The error amplifier is a voltage mode amplifier. The loop compensation components are configured around the amplifier (from FB to VC) to obtain stability of the converter. For improved bandwidth, an additional RC feed-forward network can be placed across the upper feedback divider resistor. The voltage on the RUN/SS pin clamps the error amplifier output, VC, to provide a soft-start function. Supply Current Limits There are two different supply current limit circuits in the LTC3533, working consecutively, each having internally fixed thresholds which vary inversely with VIN. The first circuit is a current limit amplifier, sourcing current into FB to drop the output voltage, should the peak input current exceed 4.5A typical. This method provides a closed loop means of clamping the input current. During conditions where VOUT is near ground, such as during a short circuit or startup, this threshold is cut to 750mA, providing a fold-back feature. For this current limit feature to be most effective, the Thevenin resistance from FB to ground should be greater than 100k. Should the peak input current exceed 7A typical, the second circuit, a high speed peak current limit comparator, shuts off PMOS switch A. The delay to output of this comparator is typically 50ns. Reverse Current Limit During fixed frequency operation, the LTC3533 operates in forced continuous conduction mode. The reverse current limit comparator monitors the inductor current from the output through switch D. Should this negative inductor current exceed 500mA typical, the LTC3533 shuts off switch D. Four-Switch Control Figure 1 shows a simplified diagram of how the four internal switches are connected to the inductor, VIN, VOUT and GND.Figure 2 shows the regions of operation for the LTC3533 as a function of the control voltage, VC. Dependent on VC’s magnitude, the LTC3533 will operate in either buck, buck/boost or boost mode. The four power switches are properly phased so the transfer between operating modes is continuous, smooth and transparent to the user. When VIN approaches VOUT the buck/boost region is entered, where the conduction time of the four switch region is typically 150ns. Referring to Figures 1 and 2, the various regions of operation will now be described. Buck Region (VIN > VOUT) Switch D is always on and switch C is always off during this mode. When the control voltage, VC, is above voltage V1, switch A begins to switch. During the off time of switch A, synchronous switch B turns on for the remainder of the period. Switches A and B will alternate similar to a typical synchronous buck regulator. As the control voltage increases, the duty cycle of switch A increases until the maximum duty cycle of the converter in buck mode reaches DMAX_BUCK, given by: DMAX_BUCK = 100 – D4SW % where D4SW = duty cycle % of the four switch range. 85% DMAX BOOST PVIN 11 PMOS A SW1 3 NMOS B L1 SW2 7 NMOS C 0% DUTY CYCLE PVOUT 9 PMOS D DMIN BOOST DMAX BUCK FOUR SWITCH PWM BUCK/BOOST REGION V2 (≈ 1V) D ON, C OFF PWM AB SWITCHES BUCK REGION V1 (≈ 0.7V) CONTROL VOLTAGE, VC A ON, B OFF BOOST REGION PWM CD SWITCHES V3 (≈ 1.15V) V4 (≈ 1.5V) 3533 F02 3533 F01 Figure 1. Simplified Diagram of Output Switches Figure 2. Switch Control vs Control Voltage, VC 3533f 8 LTC3533 OPERATION D4SW = (150ns • f) • 100 % where f = operating frequency, Hz. Beyond this point the “four switch,” or buck/boost region is reached. Buck/Boost or Four Switch (VIN ~ VOUT) When the control voltage, VC, is above voltage V2, switch pair AD remain on for duty cycle DMAX_BUCK, and switch pair AC begins to phase in. As switch pair AC phases in, switch pair BD phases out accordingly. When VC reaches the edge of the buck/boost range, at voltage V3, the AC switch pair completely phase out the BD pair, and the boost phase begins at duty cycle D4SW. The input voltage, VIN, where the four switch region begins is given by: VIN = VOUT(1 – D) = VOUT(1 – 150ns • f) V The point at which the four switch region ends is given by: VIN = VOUT V 1− (150ns • f) operation ripple can be reduced slightly by using more output capacitance. Another method of reducing Burst Mode operation ripple is to place a small feed-forward capacitor across the upper resistor in the VOUT feedback divider network (as in Type III compensation). During the period where the device is delivering energy to the output, the peak switch current will rise to 450mA typical and the inductor current will terminate at zero current for each cycle. In this mode, the typical maximum average output currents are given by: IMAX(BURST)BUCK ≈ 225mA; VOUT < VIN IMAX(BURST)BOOST ≈ 225mA • (VIN/VOUT); VOUT > VIN IMAX(BURST)BUCK-BOOST ≈ 350mA; VOUT ≈ VIN, since the input and output are connected together for most of the cycle. The efficiency below 1mA becomes dominated primarily by the quiescent current. The Burst Mode operation efficiency is given by: Efficiency ≅ η • ILOAD 40µA + ILOAD where f = operating frequency, Hz. Boost Region (VIN < VOUT) Switch A is always on and switch B is always off during this mode. When the control voltage, VC, is above voltage V3, switch pair CD will alternately switch to provide a boosted output voltage. This operation is typical to a synchronous boost regulator. The maximum duty cycle of the converter is limited to 90% typical and is reached when VC is above V4. BURST MODE OPERATION Burst Mode operation reduces the LTC3533’s quiescent current consumption at light loads and improves overall conversion efficiency, increasing battery life. During Burst Mode operation the LTC3533 delivers energy to the output until it is regulated and then goes into a sleep mode where the outputs are off and the quiescent current drops to 40µA. In this mode the output ripple has a variable frequency component that depends upon load current, and will typically be about 2% peak-to-peak. Burst Mode where η is typically 90% during Burst Mode operation Programmable Automatic Burst Mode Operation Burst Mode operation can be automatic or digitally controlled with a single pin. In automatic mode, the LTC3533 enters Burst Mode operation at the programmed threshold and returns to fixed frequency operation when the load demand increases. The load current at which the mode transition occurs is programmed using a single external resistor from BURST to ground, according to the following equations: Enter Burst Mode Operation : IBURST = Exit Burst Mode Operation : IBURST = 17 RBURST 19 RBURST Where RBURST is in kΩ and IBURST is the load transition current in Amps. Do not use values of RBURST greater than 1MΩ. 3533f 9 LTC3533 OPERATION For automatic operation a filter capacitor must also be connected from BURST to ground. The equation for the minimum capacitor value is: CBURST(MIN) ≥ COUT • VOUT 60, 000 Burst Mode Operation to Fixed Frequency Transient Response In Burst Mode operation, the compensation network is not used and VC is disconnected from the error amplifier. During long periods of Burst Mode operation, leakage currents in the external components or on the PC board could cause the compensation capacitor to charge (or discharge), which could result in a large output transient when returning to fixed frequency mode of operation, even at the same load current. To prevent this, the LTC3533 incorporates an active clamp circuit that holds the voltage on VC at an optimal voltage during Burst Mode operation. This minimizes any output transient when returning to fixed frequency mode operation. For optimum transient response, Type 3 compensation is also recommended to broad band the control loop and roll off past the two pole response of the output LC filter. (See Closing the Feedback Loop). Soft-Start The soft-start function is combined with shutdown. When the RUN/SS pin is brought above 1V typical, the LTC3533 is enabled but the error amplifier duty cycle is clamped from VC. A detailed diagram of this function is shown in Figure 3. The components RSS and CSS provide a slow ramping voltage on RUN/SS to provide a soft-start function. To ensure that VC is not being clamped, RUN/SS must be raised above 1.6V. VIN RUN/SS VC where CBURST(MIN) and COUT are in µF. In the event that a load transient causes FB to drop by more than 4% from the regulation value while in Burst Mode operation, the LTC3533 will immediately switch to fixed frequency mode and an internal pull-up will be momentarily applied to BURST, rapidly charging CBURST. This prevents the IC from immediately re-entering Burst mode operation once the output achieves regulation. Manual Burst Mode Operation For manual control of Burst Mode operation, the RC network connected to BURST can be eliminated. To force fixed frequency mode, BURST should be connected to VIN. To force Burst Mode operation, BURST should be grounded. When commanding Burst Mode operation manually, the circuit connected to BURST should be able to sink up to 2mA. For optimum transient response with large dynamic loads, the operating mode should be controlled digitally by the host. By commanding fixed frequency operation prior to a sudden increase in load, output voltage droop can be minimized. Note that if the load current applied during forced Burst Mode operation (BURST pin is grounded) exceeds the current that can be supplied, the output voltage will start to droop and the LTC3533 will automatically come out of Burst Mode operation and enter fixed frequency mode, raising VOUT. Once regulation is achieved, the LTC3533 will then enter Burst Mode operation once again (since the user is still commanding this by grounding BURST), and the cycle will repeat, resulting in about 4% output ripple. 3533 F03 Figure 3. 3533f 10 LTC3533 APPLICATIONS INFORMATION COMPONENT SELECTION 1 RT BURST VC FB 14 where f = switching frequency, Hz ∆IL = maximum allowable inductor ripple current VIN(MIN) = minimum input voltage 13 2 VIN(MAX) = maximum input voltage VOUT = output voltage For high efficiency, choose a ferrite inductor with a high frequency core material to reduce core losses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. Molded chokes or chip inductors usually do not have enough core to support the peak inductor currents in the 4A to 6A region. To minimize radiated noise, use a shielded inductor. See Table 1 for a suggested list of inductor suppliers. Output Capacitor Selection The bulk value of the output filter capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The steady state ripple due to charge is given by: %Ripple _ Boost = %Ripple _ Buck = IOUT(MAX ) •( VOUT − VIN(MIN) ) • 100 COUT • VOUT2 • f 8L COUT • VIN(MAX ) • f 2 % % 3 SGND RUN/SS 12 4 SW1 PVIN VIN PVOUT VOUT 11 VIN 5 PGND 10 6 PGND 9 VOUT 7 SW2 8 GND MULTIPLE VIAS 3533 F04 Figure 4. Recommended Component Placement. Traces Carrying High Current Should be Short and Wide. Trace Area at FB and VC Pins are Kept Low. Lead Length to Battery Should be Kept Short. PVOUT and PVIN Ceramic Capacitors Close to the IC Pins. Inductor Selection The high frequency operation of the LTC3533 allows the use of small surface mount inductors. The inductor ripple current is typically set to 20% to 40% of the maximum inductor current. For a given ripple the inductance terms are given as follows: LBOOST > LBUCK > VIN(MIN)2 • ( VOUT − VIN(MIN) ) f • ∆IL • VOUT2 f • ∆IL • VIN(MAX ) PHONE (847) 639-6400 (800) 227-7040 (814) 237-1431 (800) 831-9172 USA: (847) 956-0666 Japan: 81(3) 3607-5111 (847) 803-6100 (847) 297-0070 ( VIN(MAX ) − VOUT ) • 100 H where COUT = output filter capacitor IOUT(MAX) = maximum output load current The output capacitance is usually many times larger than the minimum value in order to handle the transient response FAX (847) 639-1469 (650) 361-2508 (814) 238-0409 USA: (847) 956-0702 Japan: 81(3) 3607-5144 (847) 803-6296 (847) 699-7864 WEB SITE www.coilcraft.com www.circuitprotection.com/magnetics.asp www.murata.com www.sumida.com www.component.tdk.com www.tokoam.com 3533f VOUT • ( VIN(MAX ) − VOUT ) H Table 1. Inductor Vendor Information SUPPLIER Coilcraft CoEv Magnetics Murata Sumida TDK TOKO 11 LTC3533 APPLICATIONS INFORMATION requirements of the converter. As a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired transient response. The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR capacitors should be used to minimize output voltage ripple. For surface mount applications, Taiyo Yuden or TDK ceramic capacitors, AVX TPS series tantalum capacitors or Sanyo POSCAP are recommended. See Table 2 for contact information. Input Capacitor Selection Since PVIN is the supply voltage for the IC it is recommended to place at least a 4.7µF, low ESR ceramic bypass capacitor close to PVIN and GND. It is also important to minimize any stray resistance from the converter to the battery or other power source. Optional Schottky Diodes Schottky diodes across the synchronous switches B and D are not required, but do provide a lower drop during the break-before-make time (typically 15ns), thus improving efficiency. Use a surface mount Schottky diode such as an MBRM120T3 or equivalent. Do not use ordinary rectifier diodes since their slow recovery times will compromise efficiency. Output Voltage < 1.8V The LTC3533 can operate as a buck converter with output voltages as low as 400mV. The part is specified at 1.8V minimum to allow operation without the requirement of a Schottky diode; Since synchronous switch D is powered from PVOUT, and the RDS(ON) will increase at low output voltages, a Schottky diode is required from SW2 to VOUT Table 2. Capacitor Vendor Information SUPPLIER AVX Sanyo Taiyo Yuden TDK PHONE (803) 448-9411 (619) 661-6322 (408) 573-4150 (847) 803-6100 FAX (803) 448-1943 (619) 661-1055 (408) 573-4159 (847) 803-6296 WEB SITE www.avxcorp.com www.sanyovideo.com www.t-yuden.com www.component.tdk.com 3533f to provide the conduction path to the output. Note that Burst Mode operation is inhibited at output voltages below 1V typical. Output Voltage > 4.3V A Schottky diode from SW2 to VOUT is required for output voltages over 4.3V. The diode must be located as close to the pins as possible in order to reduce the peak voltage on SW2 due to parasitic lead and trace inductances. Input Voltage > 4.5V For applications with input voltages above 4.5V which could exhibit an overload or short-circuit condition, a 2Ω/1nF series snubber is required between SW1 and GND. A Schottky diode from SW1 to PVIN should also be added as close to the pins as possible. For the higher input voltages, VIN bypassing becomes more critical. Therefore, a ceramic bypass capacitor as close to the PVIN and GND pins as possible is also required. Operating Frequency Selection Higher operating frequencies allow the use of a smaller inductor and smaller input and output filter capacitors, thus reducing board area and component height. However, higher operating frequencies also increase the IC’s total quiescent current due to the gate charge of the four switches, as given by: Buck: Boost: IQ = (600e – 12 • VIN • f ) mA IQ = [800e – 12 • (VIN + VOUT) • f ] mA Buck/Boost: IQ = [(1400e – 12 • VIN + 400e – 12 • VOUT) • f ] mA where f = switching frequency in Hz. Therefore frequency selection is a compromise between the optimal efficiency and the smallest solution size. 12 LTC3533 APPLICATIONS INFORMATION Closing the Feedback Loop The LTC3533 incorporates voltage mode PWM control. The control to output gain varies with operation region (buck, boost, buck/boost), but is usually no greater than 15. The output filter exhibits a double pole response, as given by: f FILTER _ POLE = (in buck mod e) f FILTER _ POLE = VIN 2 • VOUT • π • L • COUT Hz 1 Hz 2 • π • L • COUT A simple Type I compensation network can be incorporated to stabilize the loop, but at a cost of reduced bandwidth and slower transient response. To ensure proper phase margin using Type I compensation, the loop must be crossed over a decade before the LC double pole. Referring to Figure 5, the unity-gain frequency of the error amplifier with the Type I compensation is given by: f UG = 1 Hz 2 • π • R1• CP1 (in boost mod e) where L is in Henries and COUT is in Farads. The output filter zero is given by: f FILTER _ ZERO = 1 2 • π • RESR • COUT Most applications demand an improved transient response to allow a smaller output filter capacitor. To achieve a higher bandwidth, Type III compensation is required, providing two zeros to compensate for the double-pole response of the output filter. Referring to Figure 6, the location of the poles and zeros are given by: Hz 2 • π • 10e3 • R1• CP1 (which is a very low frequency) 1 Hz 2 • π • RZ • CP1 1 f ZERO2 = Hz 2 • π • R1• CZ1 1 f POLE2 = Hz 2 • π • RZ • CP2 f ZERO1 = where resistance is in Ohms and capacitance is in Farads. VOUT f POLE1 = 1 Hz where RESR is the equivalent series resistance of the output capacitor. A troublesome feature in boost mode is the right-half plane zero (RHP), given by: f RHPZ = VIN2 Hz 2 • π • IOUT • L • VOUT The loop gain is typically rolled off before the RHP zero frequency. + VOUT 1.22V FB 12 VC RZ CP2 3533 F06 + ERROR AMP 1.22V FB 12 VC 11 CP1 R2 3533 F05 ERROR AMP R1 CZ1 R1 – – CP1 R2 11 Figure 5. Error Amplifier with Type I Compensation Figure 6. Error Amplifier with Type III Compensation 3533f 13 LTC3533 TYPICAL APPLICATIONS High Efficiency, High Current LED Driver 3.3µH 4 SW1 VIN 3V TO 4.2V 11 10 PVIN VIN 7 SW2 PVOUT VOUT LTC3533 OFF ON 12 RUN/SS FB 13 1nF 10µF 1 RT VC BURST 44.2k SGND PGND 3 5 6 14 2 100k 100k 9 8 4.7µF ILED = 1A 95.3k 47pF 301k 3533 TA02 1MHz Li-Ion to 3.6V at 2A, Pulsed, with Manual Mode Control 6.8µH 4 SW1 VIN 3V TO 4.2V 11 10 PVIN VIN 7 SW2 PVOUT VOUT LTC3533 OFF ON 12 RUN/SS FB 13 15k 470pF 200µF 9 8 388k 2.2k 220pF VOUT 3.6V AT 2A 10µF 1 RT VC 14 64.9k 2 BURST FIXED BURST FREQUENCY SGND PGND 3 5 6 200k 3533 TA03 3533f 14 LTC3533 PACKAGE DESCRIPTION DE Package 14-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1708 Rev A) 0.70 ± 0.05 3.60 ± 0.05 1.70 ± 0.05 2.20 ± 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 3.30 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 4.00 ± 0.10 (2 SIDES) R = 0.05 TYP R = 0.115 TYP 8 14 0.40 ± 0.10 3.00 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 1.70 ± 0.05 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER (DE14) DFN 0905 REV A 7 0.200 REF 0.75 ± 0.05 3.30 ± 0.05 (2 SIDES) 1 0.25 ± 0.05 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3533f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3533 RELATED PARTS PART NUMBER LTC3400/LT3400B LTC3401/LT3402 DESCRIPTION 600mA (ISW), 1.2MHz Synchronous Step-Up DC/DC Converter 1A/2A (ISW), 3MHz Synchronous Step-Up DC/DC Converter COMMENTS VIN: 0.85V to 5V, VOUT(MAX) = 5V, IQ = 19µA/300µA, ISD < 1µA, ThinSOT Package VIN: 0.5V to 5V, VOUT(MAX) = 6V, IQ = 38mA, ISD < 1µA, MS Package VIN: 2.7V to 6V, VOUT(MIN) = 0.8V, IQ = 20µA, ISD ≤ 1µA, MS10 Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20µA, ISD ≤ 1µA, ThinSOT Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA, ISD ≤ 1µA, MS Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA, ISD ≤ 1µA, MS Package VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA, ISD ≤ 1µA, TSSOP16E Package VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12µA, ISD < 1µA, QFN Package VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12µA, ISD < 1µA, QFN Package VIN: 0.5V to 4.4V, VOUT(MAX: 5V, IQ = 20µA, ISD < 1µA, ThinSOT Package VIN: 2.5V to 5.5V, VOUT(MAX): 2.5V to 5.5V, IQ = 25µA, ISD < 1µA, MS, DFN Package VIN: 2.5V to 5.5V, VOUT(MAX): 2.4V to 5.5V, IQ = 25µA, ISD < 1µA, DFN Package VIN: 2.4V to 5.5V, VOUT(MAX): 2.4V to 5.25V, IQ = 28µA, ISD < 1µA, DFN Package VIN: 2.7V to 5.5V, VOUT = 0.5V to 5V, DFN Package, Internal Compensation VIN: 1.8V to 5.5V, VOUT: 1.8V to 5.25V, IQ = 40µA, ISD < 1µA, 10-Pin MSOP Package, 3mm × 3mm DFN VIN: 2.4V to 5.5V, VOUT: 2.4V to 5.5V, IQ = 35µA, ISD < 1µA, 10-Pin MSOP Package, 3mm × 3mm DFN LTC3405/LTC3405A 300mA (IOUT), 1.5MHz Synchronous Step-Up DC/DC Converter LTC3406/LTC3406B 600mA (IOUT), 1.5MHz Synchronous Step-Up DC/DC Converter LTC3407 LTC3411 LTC3412 LTC3421 LTC3425 LTC3429 LTC3440 LTC3441 LTC3442/LTC3443 LTC3444 LTC3530 LTC3532 600mA (IOUT), 1.5MHz Dual Synchronous Step-Up DC/DC Converter 1.25A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter 2.5A (IOUT), 4MHz Synchronous Step-Up DC/DC Converter 3A (ISW), 3MHz Synchronous Step-Up DC/DC Converter 5A (ISW), 8MHz Multiphase Synchronous Step-Up DC/DC Converter 600mA (ISW), 500kHz Synchronous Step-Up DC/DC Converter 600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter 1.2A (IOUT), 1MHz Synchronous Buck-Boost DC/DC Converter 1.2A (IOUT), Synchronous Buck-Boost DC/DC Converters, LTC3442 (1MHz), LTC3443 (600kHz) 500mA (IOUT), Synchronous Buck-Boost DC/DC Converter 600mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter 500mA (IOUT), 2MHz Synchronous Buck-Boost DC/DC Converter Thin SOT is a trademark of Linear Technology Corporation. 3533f 16 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0207 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007