LTC3552

FEATURES ■ ■ LTC3552 Standalone Linear Li-Ion Battery Charger and Dual Synchronous Buck Converter DESCRIPTIO The LTC®3552 is a complete constant-current/constantvoltage linear charger with a dual DC/DC converter for single cell lithium-ion batteries. Its DFN package and low external component count make the LTC3552 ideally suited for portable applications. Furthermore, the LTC3552 is designed to work within USB power specifications. No external sense resistor or external blocking diode is required due to the internal MOSFET architecture. The charge voltage is fixed at 4.2V and the charge current is programmed with a resistor. The charge cycle terminates when the charge current drops below the programmed termination threshold after the final float voltage is reached. When the input supply (wall adapter or USB supply) is removed, the LTC3552 enters a low current state dropping the battery drain current to less than 2µA. Thermal regulation maximizes charge rate without risk of overheating. The synchronous step-down switching regulators generate adjustable output voltages from 5V down to 0.6V. The switching frequency is set at 2.25MHz, allowing the use of small surface mount inductors and capacitors. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. *Protected by U.S. patents, including 6522118, 6700364, 5481178, 6580258, 6304066, 6127815, 6498466, 6611131. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Programmable Charge Current Up to 950mA Complete Linear Charger and Dual DC/DC Regulator Buck Converter Output Voltage from 0.6V to 5V No MOSFET, Sense Resistor or Blocking Diode Required Thermal Regulation Maximizes Charge Rate Without Risk of Overheating* Charges Directly from a USB Port Programmable Charge Current Termination Preset 4.2V Charge Voltage with ±1% Accuracy Charge Current Monitor Output for Gas Gauging* Automatic Recharge Charge Status Output “Power Present” Output 2.9V Trickle Charge Threshold Soft-Start Limits Inrush Current Low Quiescent Current Buck Converter (40µA) Current Mode Operation, Constant Frequency (2.25MHz) Low Profile (5mm × 3mm × 0.75mm) DFN Package APPLICATIO S ■ ■ Cellular Telephones, PDAs, MP3 Players Bluetooth Applications TYPICAL APPLICATIO Single Cell Li-Ion Battery Charger with C/5 Termination and Dual DC/DC Converter LTC3552 RUN2 BAT VCC POR MODE/SYNC SW1 R2 604k R1 301k 3552 TA01 100 95 ITERM 619Ω 1.24k PROG CHRG PWR EN SW2 800mA 10µF EFFICIENCY (%) VIN 4.5V TO 6.5V VIN 1µF RUN1 4.2V 1-CELL Li-Ion BATTERY 90 85 80 + 75 70 65 60 1 10 100 LOAD CURRENT (mA) 0.1 1000 3552 TA01b VOUT2 2.5V/ 400mA COUT2 4.7µF CER 4.7µH 2.2µH CFF2 68pF R4 887k R3 280k VFB2 GND VFB1 CFF1 33pF VOUT1 1.8V/ 800mA COUT1 10µF CER VCC = 3.3V, VOUT = 1.8V Burst Mode OPERATION REGULATOR 1, NO LOAD ON REGULATOR 2 U U U Efficiency Curve/ Power Loss of Regulators 1000 EFFICIENCY 100 POWER LOSS (mW) 10 POWER LOSS 1 3552f 1 LTC3552 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW ITERM BAT CHRG MODE/SYNC SW2 POR RUN2 VFB2 1 2 3 4 5 6 7 8 17 16 EN 15 PWR 14 VIN 13 PROG 12 SW1 11 VCC 10 RUN1 9 VFB1 Charger Input Supply (VIN) ........................ –0.3V to 10V PROG, ITERM .................................. –0.3V to VIN + 0.3V BAT .............................................................. –0.3V to 7V ⎯C⎯H⎯R⎯G, ⎯P⎯W⎯R, ⎯E⎯N......................................... –0.3V to 10V BAT Short-Circuit Duration............................Continuous BAT Pin Current ..........................................................1A PROG Pin Current ....................................................1mA Converter Input Supply (VCC)....................... –0.3V to 6V VFB1, VFB2, RUN1, RUN2 ...................–0.3V to VCC +0.3V MODE/SYNC ....................................–0.3V to VCC + 0.3V SW1, SW2 .......................................–0.3V to VCC + 0.3V ⎯P⎯O⎯R ............................................................. –0.3V to 6V Ambient Operating Temperature Range (Note 2) .................................... –40°C to 85°C Maximum Junction Temperature (Note 8) ............ 125°C Storage Temperature Range................... –65°C to 125°C DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 40°C/W (Note 3) EXPOSED PAD IS GROUND (PIN 17) MUST BE SOLDERED TO PCB ORDER PART NUMBER LTC3552EDHC DHC PART MARKING 3552 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL Battery Charger VIN IIN Input Supply Voltage Input Supply Current Charge Mode (Note 4) Standby Mode Shutdown Mode Regulated Output (Float) Voltage BAT Pin Current PARAMETER The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VCC = 3.6V unless otherwise noted. CONDITIONS ● MIN 4.25 TYP MAX 8 UNITS V mA µA µA V mA mA µA µA µA mA V mV V mV RPROG = 10k Charge Terminated ⎯E⎯N = 5V, VIN < VBAT or VIN < VUV 0°C ≤ TA ≤ 85°C, 4.3V < VIN < 8V RPROG = 10k, Current Mode RPROG = 2k, Current Mode Standby Mode, VBAT = 4.2V Shutdown Mode (⎯E⎯N = 5V, VIN < VBAT or VIN < VUV) Sleep Mode, VIN = 0V VBAT < VTRIKL, RPROG = 2k RPROG = 10k, VBAT Rising RPROG = 10k From VIN Low to High ● ● ● 0.4 200 25 4.158 4.2 100 500 –2.5 ±1 ±1 92 465 1 500 50 4.242 105 535 –6 ±2 ±2 60 3 3.92 300 VFLOAT IBAT ● ● ● ITRIKL VTRIKL VTRHYS VUV VUVHYS Trickle Charge Current Trickle Charge Threshold Voltage Trickle Charge Hysterisis Voltage VIN Undervoltage Lockout Voltage VIN Undervoltage Lockout Hysteresis ● 30 2.8 45 2.9 80 3.8 200 ● ● 3.7 150 2 U 3552f W U U WW W LTC3552 ELECTRICAL CHARACTERISTICS SYMBOL V⎯E⎯N(IL) V⎯E⎯N(IH) R⎯E⎯N VASD ITERM VPROG V⎯C⎯H⎯R⎯G V⎯P⎯W⎯R ΔVRECHRG TLIM RON-CHRG tSS-CHRG tRECHRG tTERM Switching Regulator VCC IFB VFB ΔVLINE_REG ΔVLOAD_REG IS Operating Voltage Range for Regulator Feedback Pin Input Current Feedback Voltage (Note 5) Reference Voltage Line Regulation Output Voltage Load Regulation Input DC Supply Current Active Mode Sleep Mode Shutdown Oscillator Frequency Synchronization Frequency Peak Switch Current Limit Regulator 1 Peak Switch Current Limit Regulator 2 Top Switch On-Resistance Bottom Switch On-Resistance Switch Leakage Current Power-On Reset Threshold Power-On Reset On-Resistance Power-On Reset Delay VRUN IRUN RUN Threshold Voltage RUN Leakage Current ● ● ● ● The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VCC = 3.6V unless otherwise noted. PARAMETER ⎯E⎯N Pin Input Low Voltage ⎯E⎯N Pin Input High Voltage ⎯EN Pin Pull-Down Resistor VIN – VBAT Lockout Threshold Voltage Charge Termination Current Threshold PROG Pin Voltage ⎯C⎯H⎯R⎯G Pin Output Low Voltage ⎯P⎯W⎯R Pin Output Low Voltage Recharge Battery Threshold Voltage Junction Temperature in ConstantTemperature Mode Charger’s Power FET On-Resistance (Between VIN and BAT) Charger Soft-Start Time Recharge Comparator Filter Time Termination Comparator Filter Time IBAT = 0 to IBAT = 1000V/RPROG VBAT High to Low IBAT Drops Below Charge Termination Threshold 0.75 0.4 VIN from Low to High VIN from High to Low RTERM = 1k RTERM = 5k RPROG = 10k, Current Mode I⎯C⎯H⎯R⎯G = 5mA I⎯P⎯W⎯R = 5mA VFLOAT – VRECHRG, 0°C < TA < 85°C 60 ● ● CONDITIONS ● ● ● MIN 0.4 1.2 70 5 90 17.5 0.93 TYP 0.7 0.7 2 100 30 100 20 1 0.35 0.35 100 120 600 100 2 1 MAX 1 5 140 50 110 22.5 1.07 0.6 0.6 140 UNITS V V MΩ mV mV mA mA V V V mV °C mΩ µs 4.5 2.5 ms ms 2.5 0.588 0.585 0.6 0.6 0.3 0.5 700 40 0.1 5.5 30 0.612 0.612 0.5 V nA V V %/V % 0°C ≤ TA ≤ 85°C –40°C ≤ TA ≤ 85°C VCC = 2.5V to 5.5V (Note 5) (Note 5) VFB1 = VFB2 = 0.5V VFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6V RUN = 0V, VCC = 5.5V, MODE/SYNC = 0V VFB = 0.6V VCC = 3V, VFB = 0.5V, Duty Cycle < 35% VCC = 3V, VFB = 0.5V, Duty Cycle < 35% (Note 6) (Note 6) VCC = 5V, VRUN = 0V, VFB = 0V VFB Ramping Down, MODE/SYNC = 0V ● 950 60 1 2.7 1.6 0.9 0.45 0.45 1 200 1.5 1 µA µA µA MHz MHz A A Ω Ω µA % Ω Cycles V µA fOSC fSYNC ILIM RDS(ON) ISW(LKG) POR ● 1.8 0.95 0.6 2.25 2.25 1.2 0.7 0.35 0.30 0.01 –8.5 100 262,144 0.3 1 0.01 3552f 3 LTC3552 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Pins of regulators should not exceed 6V. Note 2: The LTC3552E is guaranteed to meet performance specifications from 0°C to 85°C Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Failure to solder the exposed backside of the package to the PC board will result in a thermal resistance much higher than 40°C/W. See Thermal Considerations. Note 4: Supply current includes PROG pin current and ITERM pin current (approximately 100µA each) but does not include any current delivered to the battery through the BAT pin (approximately 100mA). Note 5: The regulator is tested in a proprietary test mode that connects VFB to the output of the error amplifier. Note 6: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 7: The regulator power switch on-resistances are guaranteed by correlation to wafer level measurements. Note 8: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • θJA) TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified. Battery Charger PROG Pin Voltage vs VIN (Constant-Current Mode) 1.015 1.010 1.005 VPROG (V) VPROG (V) 1.000 0.995 0.990 0.985 VBAT = 4V RPROG = 10k 1.0100 1.0075 1.0050 IBAT (mA) 1.0025 1.0000 0.9975 0.9950 0.9925 4 4.5 5 5.5 6.5 6 VIN (V) 7 7.5 8 0.9900 –50 –25 50 25 TEMPERATURE (°C) 0 75 100 3552 G02 Regulated Output (Float) Voltage vs Charge Current 4.26 4.215 4.210 4.205 VFLOAT (V) 4.200 4.195 4.190 VIN = 5V 4.24 RPROG = 1.25k 4.22 VFLOAT (V) 4.18 4.16 4.14 4.12 4.10 0 100 200 300 400 IBAT (mA) 500 600 700 3552 G04 VFLOAT (V) 4.20 4 UW PROG Pin Voltage vs Temperature 600 VIN = 5V VBAT = 4V RPROG = 10k 500 400 300 200 100 0 Charge Current vs PROG Pin Voltage VIN = 5V RPROG = 2k RITERM = 2k 0 0.2 0.4 0.6 0.8 VPROG (V) 1 1.2 3552 G03 3552 G01 Regulated Output (Float) Voltage vs Temperature VIN = 5V RPROG = 10k 4.215 Regulated Output (Float) Voltage vs VIN RPROG = 10k 4.210 4.205 4.200 4.195 4.190 4.185 4.185 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 3552 G05 4 4.5 5 5.5 6.5 6 VIN (V) 7 7.5 8 3552 G06 3552f LTC3552 TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified. Battery Charger ⎯C⎯H⎯R⎯G Pin I-V Curve (Pull-Down State) 30 TA = –40°C 25 20 ICHRG (mA) 15 10 5 0 0 1 2 4 3 VCHRG (V) 5 6 7 3552 G07 TA = 25°C IPWR (mA) TA = 90°C IBAT (mA) Trickle Charge Current vs Temperature 60 50 RPROG = 2k 40 ITRKL (mA) ITRKL (mA) 30 20 10 0 –50 RPROG = 10k 40 30 20 10 0 –25 0 25 50 TEMPERATURE (°C) 75 100 VIN = 5V VBAT = 2.5V 60 50 VTRKL (V) Charge Current vs VIN 600 500 400 IBAT (mA) 300 200 100 0 RPROG = 10k VBAT = 4V θJA = 40°C/W IBAT (mA) RPROG = 2k 500 600 4 4.5 UW VIN = 5V VBAT = 4V 3552 G09a ⎯P⎯W⎯R Pin I-V Curve (Pull-Down State) 30 TA = –40°C 25 20 15 10 5 0 0 1 2 4 3 VPWR (V) 5 6 7 3552 G08 Charge Current vs Battery Voltage 600 TA = 25°C 500 400 300 200 100 0 2.4 VIN = 5V θJA = 40°C/W RPROG = 2k 2.7 3 3.3 3.6 VBAT (V) 3.9 4.2 4.5 3552 G09 TA = 90°C VIN = 5V VBAT = 4V Trickle Charge Current vs VIN VBAT = 2.5V RPROG = 2k 3.000 2.975 2.950 2.925 2.900 2.875 RPROG = 10k 2.850 2.825 4 4.5 5 5.5 VIN (V) 6 6.5 7 Trickle Charge Threshold Voltage vs Temperature VIN = 5V RPROG = 10k 2.800 –50 –25 0 50 25 TEMPERATURE (°C) 75 100 3552 G09c 3552 G09b Charge Current vs Ambient Temperature ONSET OF THERMAL REGULATION RPROG = 2k 400 300 200 100 0 –50 RPROG = 10k VIN = 5V VBAT = 4V θJA = 40°C/W 5 5.5 6 6.5 VIN (V) 7 7.5 8 –25 3552 G10 50 25 75 0 TEMPERATURE (°C) 100 125 3552 G11 3552f 5 LTC3552 TYPICAL PERFOR A CE CHARACTERISTICS Battery Charger Power FET On-Resistance vs Temperature 700 VIN = 4.2V = 100mA I 650 BAT RPROG = 2k 600 RDS(ON) (mΩ) 550 500 450 400 350 –50 4.06 4.04 –50 VRECHRG (V) 4.16 4.14 4.12 4.10 4.08 –25 Switching Regulator Burst Mode Operation SW 5V/DIV IL 200mA/ DIV VOUT RIPPLE 20mV/DIV VCC = 3.6V 2µs/DIV VOUT1 = 1.8V ILOAD = 60mA, MODE/SYNC = 3.6V REGULATOR 1; CIRCUIT OF FIGURE 2 3552 G14 Efficiency vs VCC 100 95 90 EFFICIENCY (%) 10mA 85 80 75 70 65 60 2 VOUT = 1.8V, REGULATOR 1 Burst Mode OPERATION CIRCUIT OF FIGURE 2 3 4 VCC (V) 5 6 3552 G17 FREQUENCY DEVIATION (%) 100mA FREQUENCY (MHz) 1mA 800mA 6 UW TA = 25°C Unless Otherwise Specified. Recharge Threshold Voltage vs Temperature VIN = 5V RPROG = 10k 0 25 50 75 TEMPERATURE (°C) 100 125 3552 G12 –25 0 25 50 TEMPERATURE (°C) 75 100 3552 G13 Load Step SW 5V/DIV VOUT 10mV/ DIV IL 200mA /DIV 20µs/DIV VCC = 3.6V VOUT1 = 1.8V ILOAD = 80mA TO 800mA REGULATOR 1; CIRCUIT OF FIGURE 2 3552 G15 Pulse-Skipping Mode VOUT 200mV/DIV IL 500mA/DIV ILOAD: 80mA800mA 500mA/DIV VCC = 3.6V 1µs/DIV VOUT1 = 1.8V ILOAD = 30mA, MODE/SYNC = 0V REGULATOR 1; CIRCUIT OF FIGURE 2 3552 G16 Oscillator Frequency vs Temperature 2.5 VCC = 3.6V 10 8 6 4 2 0 –2 –4 –6 –8 2.0 –50 –25 –10 50 25 75 0 TEMPERATURE (°C) 100 125 3552 G18 Oscillator Frequency Error vs VCC 2.4 2.3 2.2 2.1 2 3 4 VCC (V) 5 6 3552 G19 3552f LTC3552 TYPICAL PERFOR A CE CHARACTERISTICS Switching Regulator Reference Voltage vs Temperature 0.615 VCC = 3.6V 0.610 REFERENCE VOLTAGE (V) 0.605 0.600 0.595 0.590 0.585 –50 –25 500 450 400 350 300 250 200 50 25 75 0 TEMPERATURE (°C) 100 125 3552 G20 RDS(ON) (mΩ) RDS(ON) (mΩ) Efficiency vs Load Current 100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 1 PULSE-SKIPPING MODE VCC = 3.6V, VOUT = 1.8V NO LOAD ON OTHER REGULATOR; REGULATOR 1; CIRCUIT OF FIGURE 2 10 100 LOAD CURRENT (mA) 1000 3552 G23 Burst Mode OPERATION VOUT ERROR (%) 0.5 0 PULSE-SKIPPING MODE –0.5 –1.0 –1.5 –2.0 1 VCC = 3.6V, VOUT = 1.8V NO LOAD ON OTHER REGULATOR REGULATOR 1; CIRCUIT OF FIGURE 2 10 100 LOAD CURRENT (mA) 1000 3552 G24 VOUT ERROR (%) Efficiency vs Load Current 100 90 EFFICIENCY (%) EFFICIENCY (%) 80 70 60 VOUT = 2.5V, REGULATOR 1 50 Burst Mode OPERATION, MODE/SYNC = 3.6V NO LOAD ON OTHER REGULATOR CIRCUIT OF FIGURE 2 40 1 10 100 1000 LOAD CURRENT (mA) 3552 G26 VCC = 4.2V VCC = 3.6V VCC = 2.7V 100 95 90 85 80 75 70 EFFICIENCY (%) UW TA = 25°C Unless Otherwise Specified. RDS(ON) vs VCC 550 500 450 MAIN SWITCH 400 350 300 250 200 150 1 2 3 4 VCC (V) 5 6 7 3552 G21 RDS(ON) vs Junction Temperature VCC = 2.7V VCC = 4.2V VCC = 3.6V SYNCHRONOUS SWITCH 100 –50 –25 MAIN SWITCH SYNCHRONOUS SWITCH 25 50 75 100 125 150 0 JUNCTION TEMPERATURE (°C) 3552 G22 Load Regulation 2.0 1.5 1.0 Burst Mode OPERATION 0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 Line Regulation VOUT = 1.8V IOUT = 200mA 2 3 4 VCC (V) 5 6 3552 G25 Efficiency vs Load Current 100 95 VCC = 3.6V VCC = 2.7V 90 85 80 75 70 65 60 Efficiency vs Load Current VCC = 3.6V VCC = 2.7V VCC = 4.2V VCC = 4.2V VOUT = 1.2V, REGULATOR 1 Burst Mode OPERATION, MODE/SYNC = 3.6V NO LOAD ON OTHER REGULATOR CIRCUIT OF FIGURE 2 1 10 100 LOAD CURRENT (mA) 1000 3552 G28 VOUT = 1.5V, REGULATOR 1 Burst Mode OPERATION, MODE/SYNC = 3.6V 65 NO LOAD ON OTHER REGULATOR CIRCUIT OF FIGURE 2 60 1 10 100 1000 LOAD CURRENT (mA) 3552 G27 3552f 7 LTC3552 PI FU CTIO S ITERM (Pin 1): Charge Termination Program. The charge termination current threshold is programmed by connecting a 1% resistor, RTERM, to ground. The current threshold ITERM, is set by the following formula: 100 V 100 V ITERM = , R TERM = R TERM ITERM BAT (Pin 2): Charge Current Output. Provides charge current to the battery from the internal P-channel MOSFET, and regulates the final float voltage to 4.2V. An internal precision resistor divider from this pin sets the float voltage. This divider is disconnected in shutdown mode to minimize current drain from the battery. ⎯CH⎯R⎯G (Pin 3): Charge Status Open-Drain Output. When ⎯ the battery is charging, the ⎯C⎯H⎯R⎯G pin is pulled low by an internal N-channel MOSFET. When the charge cycle is completed, ⎯C⎯H⎯R⎯G becomes high impedance. MODE/SYNC (Pin 4): Combination Mode Selection and Oscillator Synchronization. This pin controls the operation of the buck regulators. When tied to VCC or GND, Burst Mode operation or pulse-skipping mode is selected, respectively. Do not float this pin. The oscillation frequency can be synchronized to an external oscillator applied to this pin and pulse-skipping mode is automatically selected. SW2 (Pin 5): Regulator 2 Switch Node Connection to the Inductor. This pin swings from VCC to GND. ⎯⎯⎯ POR (Pin 6): Power-On Reset. This open-drain logic output is pulled to GND when either output voltage drops 8.5% from the regulated voltage and goes high after 262,144 clock cycles when both regulators are within regulation. RUN2 (Pin 7): Regulator 2 Enable. Forcing this pin to VCC enables regulator 2, while forcing it to GND causes regulator 2 to shut down. This pin must be driven; do not float. VFB2 (Pin 8): Output Feedback for Regulator 2. Receives the feedback voltage from the external resistive divider across the output. Normal voltage for this pin is 600mV. VFB1 (Pin 9): Output Feedback for Regulator 1. Receives the feedback voltage from the external resistive divider across the output. Normal voltage for this pin is 600mV. RUN1 (Pin 10): Regulator 1 Enable. Forcing this pin to VCC enables regulator 1, while forcing it to GND causes regulator 1 to shut down. This pin must be driven; do not float. VCC (Pin 11): Buck Regulators Input Supply. Provides power to the switchers. Must be closely decoupled to GND. SW1 (Pin 12): Regulator 1 Switch Node Connection to the Inductor. This pin swings from VCC to GND. PROG (Pin 13): Charge Current Program and Charge Current Monitor. Charge current is programmed by connecting a 1% resistor, RPROG, to ground. When charging in constant-current mode, this pin servos to 1V. In all modes, the voltage on this pin can be used to measure the charge current using the following formula: V IBAT = PROG • 1000 IPROG This pin is clamped to approximately 2.4V. Driving this pin to voltages beyond the clamp voltage should be avoided. VIN (Pin 14): Charger Input Supply. Provides power to the charger. VIN can range from 4.25V to 8V. This pin should be bypassed with at least a 1µF capacitor. When VIN is within 100mV of the BAT pin voltage, the charger enters shutdown mode dropping the battery drain current to less than 2µA. ⎯PW⎯R (Pin 15): Charger Power Supply Status Open-Drain ⎯ Output. When VIN is greater than the undervoltage lockout threshold and at least 100mV above VBAT, the ⎯P⎯W⎯R pin is pulled to ground; otherwise, the pin is high impedance. ⎯EN (Pin 16): Enable Input. A logic high on the ⎯E⎯N pin will ⎯ put the charger into shutdown mode where the battery drain current is reduced to less than 2µA and the supply current is reduced to less than 50µA. A logic low or floating the ⎯E⎯N pin (allowing an internal 2MΩ pull-down resistor to pull this pin low) enables charging. Exposed Pad (GND) (Pin 17): Ground. The exposed backside of the package (Pin 17) is ground and must be soldered to the PCB for maximum heat transfer. 3552f 8 U U U LTC3552 BLOCK DIAGRA W VIN 14 120°C TA TDIE 1× 1× 1000× MA CA PWR 15 VA CHRG 3 – + R3 1V CHARGE PWR TERM R4 – C1 0.1V R5 LOGIC SHDN EN EN 16 RENABLE C2 + – 2.9V + TO BAT REGULATOR 1 MODE/SYNC 4 SLOPE COMP BURST CLAMP VCC 0.6V + EA – ITH 0.35V EN BURST SLEEP – ICOMP + VFB1 9 – + S Q RS LATCH R Q SWITCHING LOGIC AND BLANKING CIRCUIT 0.55V – UVDET UV + ANTI SHOOTTHRU 12 SW1 + OVDET 0.65V OV IRCMP PGOOD1 RUN1 10 0.6V REF RUN2 7 OSC PGOOD2 VFB2 8 REGULATOR 2 (IDENTICAL TO REGULATOR 1) 5 SW2 3552 BD OSC POR COUNTER – SHUTDOWN + – + 5µA R1 – 2 BAT + R2 – REF 1.21V 1 13 17 ITERM PROG GND RPROG RTERM 5Ω VCC 11 VCC 6 POR 3552f 9 LTC3552 OPERATIO The LTC3552 is made up of two parts: a standalone constant-current/constant-voltage linear charger for a single-cell lithium-ion battery and a high efficiency dual DC/DC switching regulator. The charger can deliver up to 950mA of charge current (using a good thermal PCB layout) with a final float voltage accuracy of ±1%. An internal P-channel power MOSFET and thermal regulation circuitry are included. No blocking diode or external current sense resistor is required; furthermore, the charger is capable of operating from a USB power source. The switching regulators use a constant frequency, current mode step-down architecture. Both main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. LITHIUM-ION BATTERY CHARGER Normal Charge Cycle A charge cycle begins when the voltage at the VIN pin rises above the UVLO threshold level and a 1% program resistor is connected from the PROG pin to ground. If the BAT pin is less than 2.9V, the charger enters trickle charge mode. In this mode, the charger supplies approximately one-tenth the programmed charge current to bring the battery voltage up to a safe level for full current charging. When the BAT pin voltage rises above 2.9V, the charger enters constant-current mode where the programmed charge current is supplied to the battery. When the BAT pin approaches the final float voltage (4.2V), the charger enters constant-voltage mode and the charge current begins to decrease. When the charge current drops to the programmed termination threshold (set by the external resistor RTERM), the charge cycle ends. Figure 1 shows the state diagram of a typical charge cycle. Charge Status Indicator (⎯C⎯H⎯R⎯G) The open drain charge status output has two states: pulldown and high impedance. The pull-down state indicates that the charger is in a charge cycle. Once the charge cycle has terminated or the charger is disabled, the pin becomes high impedance. 10 U Automatic Recharge Once the charge cycle terminates, the charger continuously monitors the voltage on the BAT pin using a comparator with a 2ms filter time (tRECHARGE). A charge cycle restarts when the battery voltage falls below 4.10V (which corresponds to approximately 80% to 90% battery capacity). This ensures that the battery is kept at, or near, a fully charged condition and eliminates the need for periodic charge cycle initiations. The ⎯C⎯H⎯R⎯G output enters a pulldown state during recharge cycles. If the battery is removed from the charger, a sawtooth waveform of approximately 100mV appears at the charger output. This is caused by the repeated cycling between termination and recharge events. This cycling results in pulsing at the ⎯C⎯H⎯R⎯G output; an LED connected to this pin will exhibit a pulsing pattern, indicating to the user that a battery is not present. The frequency of the sawtooth is dependent on the amount of output capacitance. Power Supply Status Indicator (⎯P⎯W⎯R) The power supply status output has two states: pull-down and high impedance. The pull-down state indicates that VIN is above the UVLO threshold (3.8V) and is also 100mV above the battery voltage. If these conditions are not met, the ⎯P⎯W⎯R pin is high impedance indicating that the charger is unable to charge the battery. POWER ON BAT < 2.9V TRICKLE CHARGE MODE 1/10TH FULL CURRENT CHRG: STRONG PULL-DOWN BAT > 2.9V SHUTDOWN MODE IIN DROPS TO 2.9V 2.9V < BAT < 4.1V Figure 1. State Diagram of a Typical Charge Cycle 3552f LTC3552 OPERATIO Charge Current Soft-Start The charger includes a soft-start circuit to minimize the inrush current at the start of a charge cycle. When a charge cycle is initiated, the charge current ramps from zero to full-scale current over a period of approximately 100µs. This has the effect of minimizing the transient current load on the power supply during start-up. Thermal Limiting An internal thermal feedback loop reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 120°C. This feature protects the charger from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the charger. The charge current can be set according to typical (not worst case) ambient temperature with the assurance that the charger will automatically reduce the current in worst-case conditions. DFN package power considerations are discussed further in the Applications Information section. Undervoltage Lockout (UVLO) An internal undervoltage lockout circuit monitors the input voltage and keeps the charger in shutdown mode until VIN rises above the undervoltage lockout threshold. The UVLO circuit has a hysteresis of 200mV. Also, to protect against reverse current in the power MOSFET, the UVLO circuit keeps the charger in shutdown mode if VIN falls to within 30mV of the BAT voltage. If the UVLO comparator is tripped, the charger will not come out of shutdown mode until VIN rises 100mV above the BAT voltage. Manual Shutdown At any point in the charge cycle, the charger can be put into shutdown mode by driving the ⎯E⎯N pin high. This reduces the battery drain current to less than 2µA and the VIN supply current to less than 50µA. When in shutdown mode, the ⎯C⎯H⎯R⎯G pin is in the high impedance state. A new charge cycle can be initiated by driving the ⎯E⎯N pin low. An internal resistor pull-down on this pin forces the charger to be enabled if the pin is allowed to float. U DUAL SWITCHING REGULATOR The regulators use a current mode architecture with a constant operating frequency of 2.25MHz. Both regulators share the same clock and run in-phase. To suit a variety of applications, the MODE/SYNC pin allows the user to choose between low noise or high efficiency. The output voltages are set by external resistive dividers returned to the VFB pins. An error amplifier compares the divided output voltage (VFB) with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. An undervoltage comparator will pull the ⎯P⎯O⎯R output low if VFB is less than 91.5% of the reference voltage. The ⎯P⎯O⎯R output will go high after 262,144 clock cycles (about 117ms in pulse-skipping mode) of achieving regulation. Main Regulator Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the feedback voltage is below the reference voltage. The current into the inductor and the load increases until the current limit is reached. The switch turns off and energy stored in the inductor flows through the bottom switch (N-channel MOSFET) into the load until the next clock cycle. The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier compares VFB to the 0.6V reference (see Block Diagram). When the load current increases, the VFB voltage decreases slightly below the reference. This decrease causes the error amplifier to increase the ITH voltage until the average inductor current matches the new load current. The main control loop can be shut down by pulling the RUN pin to ground. Low Load Current Operation The MODE/SYNC pin provides two modes of operation at low currents. Both modes automatically switch from continuous operation to the selected mode when the load current is low. For highest efficiency at low current, connecting the MODE/SYNC pin to VCC makes the regulator operate in Burst Mode, where the PMOS switch operates intermittently based on load demand with a 3552f 11 LTC3552 OPERATIO fixed peak inductor current. By running cycles periodically, the switching losses which are dominated by the gate charge losses of the power MOSFETs are minimized. The main control loop is interrupted when the output voltage reaches the desired regulated value. A voltage comparator trips when ITH is below 0.35V, shutting off the switch and reducing the power. The output capacitor and the inductor supply the power to the load until ITH exceeds 0.65V, turning on the switch and the main control loop which starts another cycle. For lower ripple noise at low currents, the pulse-skipping mode can be selected by grounding the MODE/SYNC pin. In this mode, the regulator continues to switch at a constant frequency down to very low currents, where it will begin skipping pulses. The efficiency in pulse-skipping mode can be improved slightly by connecting the SW node to the MODE/SYNC input which reduces the clock frequency by approximately 30%. Do not float the MODE/SYNC pin. 12 U Dropout Operation When the VCC input supply voltage decreases toward the output voltage, the duty cycle increases to 100% which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. An important design consideration is that the RDS(ON) of the P-channel switch increases with decreasing input supply voltage (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the regulator is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information section). Low Supply Voltage Operation To prevent unstable operation, the regulators incorporate an undervoltage lockout circuit which shuts them down when the VCC voltage drops below approximately 1.65V. 3552f LTC3552 APPLICATIO S I FOR ATIO A typical LTC3552 application circuit is shown in Figure 2. External component selection is driven by the charging requirements and the switching regulators load requirements. Programming Charge Current The charge current is programmed using a single resistor from the PROG pin to ground. The charge current out of the BAT pin is 1000 times the current out of the PROG pin. The program resistor and the charge current are calculated using the following equations: RPROG = 1000 V 1000 V , ICHG = ICHG RPROG Charge current out of the BAT pin can be determined anytime by monitoring the PROG pin voltage and using the following equation: IBAT = VPROG • 1000 RPROG Programming Charge Termination The charge cycle terminates when the charge current falls below the programmed termination threshold. This threshold is set by connecting an external resistor, RTERM, from VIN 4.5V TO 6.5V 1µF 619Ω 1.24k VOUT2 2.5V/400mA COUT2 4.7µF CER 4.7µH CFF2 68pF Figure 2. LTC3552 Basic Application Circuit U the ITERM pin to ground. The charge termination current threshold (ITERM) is set by the following equation: ITERM = 100 V ICHG RPROG • , = R TERM 10 R TERM 100 V R TERM = ITERM The termination condition is detected by using an internal filtered comparator to monitor the ITERM pin. When the ITERM pin voltage drops below 100mV* for longer than tTERM (typically 1ms), charging is terminated. The charge current is latched off and the charger enters standby mode where the input supply current drops to 200µA. (Note: Termination is disabled in trickle charging and thermal limiting modes). ITERM can be set to one tenth of ICHG by shorting the ITERM pin to the PROG pin, thus eliminating the need for external resistor RTERM. When configured in this way, ITERM is always set to ICHG/10, and the programmed charge current is set by the equation: 500 V ** 500 V ICHG = ,RPROG = RPROG ICHG * Any external sources that hold the ITERM pin above 100mV will prevent the LTC3552 from terminating a charge cycle. W U U ** These equations apply only when the ITERM pin is shorted to the PROG pin. LTC3552 VIN ITERM PROG CHRG PWR EN SW2 R4 887k R3 280k RUN1 RUN2 BAT VCC POR MODE/SYNC SW1 R2 604k R1 301k 3552 F02 800mA 10µF + 4.2V 1-CELL Li-Ion BATTERY 2.2µH VOUT1 1.8V/800mA COUT1 10µF CER VFB2 GND VFB1 CFF1 33pF 3552f 13 LTC3552 APPLICATIO S I FOR ATIO When charging, transient loads on the BAT pin can cause the ITERM pin to fall below 100mV for short periods of time before the DC charge current has dropped to 10% of the programmed value. The 1ms filter time (tTERM) on the termination comparator ensures that transient loads of this nature do not result in premature charge cycle termination. Once the average charge current drops below the programmed termination threshold, the charger terminates the charge cycle and stops providing current out of the BAT pin. In this state, any load on the BAT pin must be supplied by the battery. The charger constantly monitors the BAT pin voltage in standby mode. If this voltage drops below the 4.1V recharge threshold (VRECHRG), another charge cycle begins and charge current is once again supplied to the battery. To manually restart a charge cycle when in standby mode, the input voltage must be removed and reapplied, or the ⎯⎯ charger must be shut down and restarted using the EN pin. Switching Regulator Inductor Selection The inductor value has a direct effect on inductor ripple current ΔIL, which decreases with higher inductance and increases with higher VCC or VOUT : ∆ IL = VOUT ⎛ VOUT ⎞ ⎜ 1− V ⎟ fO • L ⎝ CC ⎠ Accepting larger values of ΔIL allows the use of low inductances, but results in higher output ripple voltage, greater core losses, and lower output current capability. A reasonable starting point for setting ripple current is ΔIL = 0.3 • IOUT(MAX), where IOUT(MAX) is 800mA for regulator 1 and 400mA for regulator 2. The largest ripple current ΔIL occurs at the maximum input voltage. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: L= VOUT ⎛ VOUT ⎞ ⎜ 1− ⎟ fO • ∆ IL ⎝ VCC(MAX ) ⎠ 14 U The inductor value will also have an effect on Burst Mode operation. The transition from low current operation begins when the peak inductor current falls below a level set by the burst clamp. Lower inductor values result in higher ripple current which causes this to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3552 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3552 applications. Table 1. Representative Surface Mount Inductors PART NUMBER Sumida CDRH3D16 Sumida CDRH2D11 Sumida CMD4D11 Murata LQH32CN Toko D312F Murata ELT5KT VALUE (µH) 2.2 3.3 4.7 1.5 2.2 2.2 3.3 1.0 2.2 2.2 3.3 3.3 4.7 DCR (Ω MAX) 0.075 0.110 0.162 0.068 0.170 0.116 0.174 0.060 0.097 0.060 0.260 0.17 0.20 MAX DC CURRENT (A) 1.20 1.10 0.90 0.900 0.780 0.950 0.770 1.00 0.79 1.08 0.92 1.00 0.95 SIZE W × L × H (mm) 3.8 × 3.8 × 1.8 3.2 × 3.2 × 1.2 4.4 × 5.8 × 1.2 2.5 × 3.2 × 2.0 2.5 × 3.2 × 2.0 4.5 × 5.4 × 1.2 3552f W U U LTC3552 APPLICATIO S I FOR ATIO Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT/VCC. To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≈ IMAX VOUT ( VCC − VOUT ) VCC where the maximum average output current IMAX equals the peak current minus 1/2 the peak-to-peak ripple current, IMAX = ILIM – ΔIL/2. This formula has a maximum at VCC = 2 • VOUT, where IRMS= IOUT/2. This simple worstcase is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours life-time. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the design. An additional 0.1µF to 1µF ceramic capacitor is also recommended on VCC for high frequency decoupling, when not using an all ceramic capacitor solution. Output Capacitor (COUT) Selection The selection of COUT is driven by the required ESR to minimize ripple voltage and load step transients. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple (ΔVOUT) is determined by ⎛ 1⎞ ∆ VOUT ≈ ∆ IL ⎜ ESR + 8 fOCOUT ⎟ ⎠ ⎝ where fO = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. The output ripple U is highest at maximum input voltage since ΔIL increases with input voltage. With ΔIL = 0.3 • IOUT(MAX) the output ripple will be less than 100mV at maximum VCC and fO = 2.25MHz with ESRCOUT < 150mΩ. Once the ESR requirements for COUT have been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement, except for an all ceramic solution. In surface mount applications, multiple capacitors may have to be paralleled to meet the capacitance, ESR or RMS current handling requirement of the application. Aluminum electrolytic, special polymer, ceramic and solid tantalum capacitors are all available in surface mount packages. The OSCON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of any aluminum electrolytic at a somewhat higher price. Special polymer capacitors, such as Sanyo POSCAP, Panasonic Special Polymer (SP), and Kemet A700, offer very low ESR, but have a lower capacitance density than other types. Tantalum capacitors have the highest capacitance density, but they have a larger ESR and it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. Aluminum electrolytic capacitors have a significantly larger ESR, and are often used in extremely cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have the lowest ESR and cost, but also have the lowest capacitance density, a high voltage and temperature coefficient, and exhibit audible piezoelectric effects. In addition, the high Q of ceramic capacitors along with trace inductance can lead to significant ringing. In most cases, 0.1µF to 1µF of X5R dielectric ceramic capacitors should also be placed close to the LTC3552 in parallel with the main capacitors for high frequency decoupling. 3552f W U U 15 LTC3552 APPLICATIO S I FOR ATIO Ceramic Input and Output Capacitors Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. These are tempting for switching regulator use because of their very low ESR. Unfortunately, the ESR is so low that it can cause loop stability problems. Solid tantalum capacitor ESR generates a loop “zero” at 5kHz to 50kHz that is instrumental in giving acceptable loop phase margin. Ceramic capacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective. Also, ceramic caps are prone to temperature effects which requires the designer to check loop stability over the operating temperature range. To minimize their large temperature and voltage coefficients, only X5R or X7R ceramic capacitors should be used. A good selection of ceramic capacitors is available from Taiyo Yuden, AVX, Kemet, TDK, and Murata. Great care must be taken when using only ceramic input and output capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VCC pin. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, the ringing at the input can be large enough to damage the part. Since the ESR of a ceramic capacitor is very low, the input and output capacitor must instead fulfill a charge storage requirement. During a load step, the output capacitor must instantaneously supply the current to support the load until the feedback loop raises the switch current enough to support the load. The time required for the feedback loop to respond is dependent on the compensation and the output capacitor size. Typically, 3-4 cycles are required to respond to a load step, but only in the first cycle does the output drop linearly. The output droop, VDROOP, is usually about 2-3 times the linear drop of the first cycle. Thus, a good place to start is with the output capacitor size of approximately: ⎛ ∆ IOUT ⎞ COUT ≈ 2 . 5 ⎜ ⎠ ⎝ fO • VDROOP ⎟ 16 U More capacitance may be required depending on the duty cycle and load step requirements. In most applications, the input capacitor is merely required to supply high frequency bypassing, since the impedance to the supply is very low. A 10µF ceramic capacitor is usually enough for these conditions. Setting the Output Voltage The switching regulator develops a 0.6V reference voltage between the feedback pin, VFB, and the ground as shown in Figure 2. The output voltage is set by a resistive divider according to the following formula: ⎛ R2 ⎞ VOUT = 0 . 6 V ⎜ 1 + ⎟ ⎝ R1⎠ Keeping the current low (< 5µA) in these resistors maximizes efficiency, but making it too low may allow stray capacitance to cause noise problems and reduce the phase margin of the error amplifier loop. To improve the frequency response, a feed-forward capacitor, CFF, may also be used. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD • ESR, where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the 3552f W U U LTC3552 APPLICATIO S I FOR ATIO actual overall supply performance. A feedforward capacitor, CFF, is added to improve the high frequency response. Capacitor CFF provides phase lead by creating a high frequency zero with the top feedback resistor, which improves the phase margin. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching loads with large (>1µF) input capacitors. The discharged load input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem, if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot Swap™ controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-starting. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC3552 circuits: 1) VCC quiescent current, 2) switching losses, 3) I2R losses, 4) other losses. 1) The VCC current is the DC supply current given in the Electrical Characteristics which excludes MOSFET driver and control currents. VCC current results in a small (< 0.1%) loss that increases with VCC, even at no load. U 2) The switching current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VCC to ground. The resulting dQ/dt is a current out of VCC that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and bottom MOSFET switches. The gate charge losses are proportional to VCC and thus their effects will be more pronounced at higher supply voltages. 3) I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is “chopped” between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows: RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2(RSW + RL) 4) Other “hidden” losses such as copper trace and internal battery resistances can account for additional efficiency degradations in portable systems. It is very important to include these “system” level losses in the design of a system. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses include diode conduction losses during dead-time and inductor core losses generally account for less than 2% total additional loss. Hot Swap is a trademark of Linear Technology Corporation. 3552f W U U 17 LTC3552 APPLICATIO S I FOR ATIO Thermal Considerations The battery charger’s thermal regulation feature and the switching regulator’s high efficiency make it unlikely that the LTC3552 will dissipate enough power to exceed its maximum junction temperature. However, in applications where the LTC3552 is running at high ambient temperature with low supply voltage and high duty cycles, the power dissipated may result in excessive junction temperatures. To prevent the LTC3552 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated will raise the junction temperature above the maximum rating. The temperature rise is given by: TRISE = PD • θJA where PD is the power dissipated and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TRISE + TAMBIENT As an example, consider the case when the battery charger is idle, and both regulators are operating at an input voltage of 2.7V with a load current of 400mA and 800mA and an ambient temperature of 70°C. From the Typical Performance Characteristics graph of Switch Resistance, the RDS(ON) resistance of the main switch is 0.425Ω. Therefore, power dissipated by each regulator is: PD = I2 • RDS(ON) = 272mW and 68mW The DHC16 package junction-to-ambient thermal resistance, θJA, is 40°C/W. Therefore, the junction temperature of the regulator operating in a 70°C ambient temperature is approximately: TJ = (0.272 + 0.068) • 40 + 70 = 83.6°C which is below the absolute maximum junction temperature of 125°C. The majority of the LTC3552 power dissipation comes from the battery charger. Fortunately, the LTC3552 automatically reduces the charge current during high power conditions using a patented thermal regulation circuit. Thus, it is not necessary to design for worst-case power dissipation scenarios. The conditions that cause the LTC3552 to 18 U reduce charge current through thermal feedback can be approximated by considering the power dissipated in the IC. The approximate ambient temperature at which the thermal feedback begins to protect the IC is: TA = 120°C – PDθJA TA = 120°C – (PD(CHARGER) + PD(REGULATOR)) • θJA Most of the charger’s power dissipation is generated from the internal charger MOSFET. Thus, the power dissipation is calculated to be: PD(CHARGER) = (VIN – VBAT) • IBAT VIN is the charger supply voltage, VBAT is the battery voltage and IBAT is the charge current. Example: An LTC3552 operating from a 5V supply is programmed to supply 800mA full-scale current to a discharged Li-Ion battery with a voltage of 3.3V. For simplicity, assume the regulators are disabled and dissipate no power. The charger power dissipation is calculated to be: PD(CHARGER) = (5V – 3.3V) • 800mA = 1.36W Thus, the ambient temperature at which the LTC3552 charger begins to reduce the charge current is approximately: TA = 120°C – 1.36W • 40°C/W TA = 120°C – 54.4°C TA = 65.6°C The LTC3552 can be used above 65°C ambient but the charge current will be reduced from the programmed 800mA. The approximate current at a given ambient temperature can be approximated by: 120 °C – TA IBAT = ( VIN – VBAT ) • θ JA Using the previous example with an ambient temperature of 70°C (and no heat dissipation from the regulator), the charge current will be reduced to approximately: IBAT = 120 °C – 70 °C 50 °C = (5V – 3 . 3V) • 40 °C/W 68 °C/A 3552f W U U IBAT = 735mA LTC3552 APPLICATIO S I FOR ATIO 120 °C – TA − TRISE(REGULATOR) ( VIN – VBAT ) • θ JA The previous analysis can be repeated to take into account the power dissipation of the regulator by: IBAT = However, the regulator typically dissipates significantly less heat than the charger (even in worst-case situations), the calculations here should work well as an approximation. Moreover, when thermal feedback reduces the charge current, the voltage at the PROG pin is also reduced proportionally. It is important to remember that LTC3552 applications do not need to be designed for worst-case thermal conditions since the IC will automatically reduce charge current when the junction temperature reaches approximately 120°C. In order to deliver maximum charge current under all conditions, it is critical that the exposed metal pad on the backside of the LTC3552 package is soldered to relatively large areas of PC board copper with vias to inner copper layers. Failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 40°C/W. As an example, a correctly soldered LTC3552 can deliver over 800mA to a battery from a 5V supply at room temperature. Without a good backside thermal connection, this number will drop considerably. Battery Charger Stability Considerations The constant-voltage mode feedback loop is stable without an output capacitor, provided a battery is connected to the charger output. With no battery present, an output capacitor on the BAT pin is recommended to reduce ripple voltage. When using high value, low ESR ceramic capacitors, it is recommended to add a 1Ω resistor in series with the capacitor. No series resistor is needed if tantalum capacitors are used. In constant-current mode, the PROG pin is in the feedback loop, not the battery. The constantcurrent mode stability is affected by the impedance at the PROG pin. With no additional capacitance on the PROG pin, the charger is stable with program resistor values as U high as 20k; however, additional capacitance on this node reduces the maximum allowed program resistor. The pole frequency at the PROG pin should be kept above 100kHz. Therefore, if the PROG pin is loaded with a capacitance, CPROG, the following equation can be used to calculate the maximum resistance value for RPROG: 1 RPROG ≤ 5 •C 2π • 10 PROG Average, rather than instantaneous charge current may be of interest to the user. For example, if a switching power supply operating in low current mode is connected in parallel with the battery, the average current being pulled out of the BAT pin is typically of more interest than the instantaneous current pulses. In such a case, a simple RC filter can be used on the PROG pin to measure the average battery current, as shown in Figure 3. A 10k resistor has been added between the PROG pin and the filter capacitor to ensure stability. LTC3552 PROG GND RPROG CFILTER 3552 F03 W U U 10k CHARGE CURRENT MONITOR CIRCUITRY Figure 3. Isolating Capacitive Load on PROG Pin and Filtering VIN Bypass Capacitor Many types of capacitors can be used for input bypassing; however, caution must be exercised when using multilayer ceramic capacitors. Because of the self-resonant and high Q characteristics of some types of ceramic capacitors, high voltage transients can be generated under some start-up conditions such as connecting the charger input to a live power source. Adding a 1.5Ω resistor in series with an X5R ceramic capacitor will minimize start-up voltage transients. For more information, see Application Note 88. 3552f 19 LTC3552 APPLICATIO S I FOR ATIO Reverse Polarity Input Voltage Protection In some applications, protection from reverse polarity voltage on VIN is desired. If the supply voltage is high enough, a series blocking diode can be used. In other cases, where the voltage drop must be kept low, a P-regulator MOSFET can be used (as shown in Figure 4). DRAIN-BULK DIODE OF FET LTC3552 VIN VIN 3552 F04 Figure 4. Low Loss Input Reverse Polarity Protection Design Example As a design example, assume the LTC3552 is used in a single lithium-ion battery-powered cellular phone application. Starting with the charger, choosing RPROG to be 1.24k programs the charger for 806mA. A good rule of thumb for ITERMINATE is one tenth the full charge current, so RITERM is picked to be 1.24k (ITERMINATE = 80mA). For the switching regulator, VCC will be operating from a maximum of 4.2V down to about 2.7V. The load requires a maximum of 800mA in active mode and 2mA in standby mode. Regulator 1 output voltage is 1.8V. Since the load 20 U still needs power in standby, Burst Mode operation is selected for good low load efficiency (connect MODE/SYNC to VCC). First, calculate the inductor value for about 30% ripple current at maximum VCC: L= 1 . 8V ⎛ 1 . 8V ⎞ 1− = 1 . 9 µH ⎝ ⎠ 2 . 25MHz • 240mA ⎜ 4 . 2V ⎟ Choosing a vendor’s closest inductor value of 2.2µH, results in a maximum ripple current of: ∆ IL = 1 . 8V ⎛ 1 . 8V ⎞ 1− = 208mA ⎝ ⎠ 2 . 25MHz • 2 . 2 µ H ⎜ 4 . 2V ⎟ For cost reasons, a ceramic capacitor will be used. COUT selection is then based on load step droop instead of ESR requirements. For a 5% output droop: 800mA COUT = 2 . 5 = 7 . 1µ F 2 . 25MHz • ( 5 % • 2 . 5V ) A good standard value is 10µF. Since the impedance of a Li-Ion battery is very low, CIN is typically 10µF. The output voltage can now be programmed by choosing the values of R1 and R2. To maintain high efficiency, the current in these resistors should be kept small. Choosing 2µA with 0.6V feedback voltage makes R1 ~300k. A close standard 1% resistor is 301k, and R2 is then 604k. The ⎯P⎯O⎯R pin is an open-drain output and requires a pull-up resistor. A 100k resistor is used for adequate speed. Figure 2 shows the complete schematic for this design example. 3552f W U U LTC3552 APPLICATIO S I FOR ATIO Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3552. These items are also illustrated graphically in the layout diagram of Figure 5. Check the following in your layout: 1. Does the capacitor CS connect to the power VCC and GND (exposed pad) as closely as possible? This capacitor provides the AC current to the internal power MOSFETs and their drivers. 2. The feedback signals VFB should be routed away from noisy components and traces, such as the SW line, and its trace should be minimized. 3. Are the COUT and L1 closely connected? The (–) plate of COUT returns current to GND and the (–) plate of CS. 4. Keep sensitive components away from the SW pins. The input capacitor CS should be routed away from the SW traces and the inductors. L1 VIN CS 13 PROG 10 RUN1 CIN 15 PWR 12 SW1 11 VCC 14 VIN 16 EN VFB1 9 GND GND 17 1 2 3 4 5 6 7 8 ITERM CHRG MODE/SYNC SW2 RUN2 VFB2 COUT2 BAT POR L2 Figure 6. Suggested Layout U 5. A ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the GND pin at one point and should not share the high current path of CS or COUT. 6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VCC or GND. VIN CIN VIN MODE/SYNC L2 VOUT2 C5 LTC3552 SW2 SW1 C4 L1 VOUT1 VCC POR CS R4 COUT2 R3 VFB2 GND VFB1 R1 R2 COUT1 3552 F05 W U U BOLD LINES INDICATE HIGH CURRENT PATHS Figure 5. Layout Diagram VOUT1 COUT1 C4 R2 R1 VIA TO VFB1 GND VIA TO VFB2 R3 C5 R4 VOUT2 3552 F06 3552f 21 LTC3552 TYPICAL APPLICATION Full-Featured Single-Cell Li-Ion Charger Plus Dual Step-Down Converter LTC3552 VIN 5V 1µF 1k 1k CHRG PWR EN VIN RUN1 RUN2 BAT VCC MODE/SYNC 100k VOUT2 2.5V/400mA COUT2 4.7µF CER 4.7µH SW2 CFF2 68pF R4 887k R3 280k POR SW1 R4 604k R3 301k CFF1 33pF 2.2µH VOUT1 1.8V/800mA COUT1 10µF CER 10µF 500mA + 4.2V 1-CELL Li-Ion BATTERY VFB2 GND ITERM 1k VFB1 PROG 2k 3552 TA02 3552f 22 LTC3552 PACKAGE DESCRIPTIO U DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) 0.65 ± 0.05 3.50 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 4.40 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 ± 0.10 (2 SIDES) R = 0.20 TYP R = 0.115 TYP 9 16 0.40 ± 0.10 3.00 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 8 0.200 REF 0.75 ± 0.05 4.40 ± 0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 1 0.25 ± 0.05 0.50 BSC 1.65 ± 0.10 (2 SIDES) PIN 1 NOTCH (DHC16) DFN 1103 1.65 ± 0.05 2.20 ± 0.05 (2 SIDES) 0.00 – 0.05 3552f 23 LTC3552 TYPICAL APPLICATION Li-Ion Charger and Step-Down Converters with PowerPath™ RUN1 RUN2 VCC LTC3552 1k 1k CHRG PWR EN VOUT2 2.5V/400mA COUT2 4.7µF CER 4.7µH SW2 CFF2 68pF 887k VFB2 GND 280k 1k 2k 3552 TA03 1k VIN 5V 1µF VIN 10µF BAT POR 800mA + MODE/SYNC 2.2µH SW1 604k VFB2 ITERM PROG 301k CFF1 33pF 4.2V 1-CELL Li-Ion BATTERY VOUT1 1.8V/800mA COUT1 10µF CER RELATED PARTS PART NUMBER LTC3455 LTC3548 LTC3550 DESCRIPTION Dual DC/DC Converter with USB Power Management and Li-Ion Battery Charger Dual Synchronous, 400mA/800mA, 2.25HMz Step-Down DC/DC Regulator Dual Input USB/AC Adapter Li-Ion Battery Charger with adjustable output 600mA Buck Converter Dual Input USB/AC Adapter Li-Ion Battery Charger with 600mA Buck Converter Standalone Linear Li-Ion Battery Charger with Dual Synchronous Buck Converter USB Compatible Li-Ion Battery Charger with Thermal Regulation Standalone Linear Li-Ion Battery Charger with Integrated Pass Transistor in ThinSOTTM USB Power Controller and Battery Charger Standalone 950mA Lithium-Ion Charger in DFN Standalone Linear Li-Ion Battery Charger with Thermistor Input Standalone Linear Li-Ion Battery Charger with Thermistor Input Standalone Linear Li-Ion Battery Charger with Programmable Termination Low-Loss PowerPathTM Controller in ThinSOT COMMENTS Efficiency >96%, Accurate USB Current Limiting (500mA/100mA), 4mm × 4mm QFN-24 Package High Efficiency: Up to 95%, IQ: 40μA, 2.25MHz Frequency, MSOP-10 and 3mm × 3mm DFN-10 Packages Synchronous Buck Converter, Efficiency: 93%, Adjustable Output at 600mA; Charge Current: 950mA Programmable, USB Compatible, Automatic Input Power Detection and Selection, 5mm × 3mm DFN-16 Package Synchronous Buck Converter, Efficiency: 93%, Output: 1.875V at 600mA; Charge Current: 950mA Programmable, USB Compatible, Automatic Input Power Detection and Selection, 5mm × 3mm DFN-16 Package Synchronous Buck Converter, Efficiency: >90%, Output: 1.8V at 800mA, 1.575V at 400mA; Charge Current Programmable Up to 950mA, USB Compatible, 5mm × 3mm DFN-16 Package Charges Single-Cell Li-Ion Batteries, From USB, MS Package Thermal Regulation Prevents Overheating, C/10 Termination, C/10 Indicator, Up to 800mA Charge Current Charges Single-Cell Li-Ion Batteries Directly From USB Port, Thermal Regulation, 4mm × 4mm QFN-16 Package C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy Charge Current Programmable Up to 1A Charges Single-Cell Li-Ion From USB Port, DFN Package Charge Current Up to 950mA, Thermal Regulation, 3mm × 3mm DFN-8 Package VIN: 3V to 28V, Automatic Switching Between DC Sources 3552f LTC3550-1 LTC3552-1 LTC4053-4.2 LTC4054/LTC4054X LTC4055 LTC4058/LTC4058X LTC4061 LTC4066 LTC4068/LTC4068X LTC4412 PowerPath and ThinSOT are registered trademarks of Linear Technology Corporation. 24 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0406 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006