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LTC3675EUFFPBF

LTC3675EUFFPBF

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTC3675EUFFPBF - 7-Channel Confi gurable High Power PMIC - Linear Technology

  • 数据手册
  • 价格&库存
LTC3675EUFFPBF 数据手册
LTC3675 7-Channel Configurable High Power PMIC FEATURES n n n n n n n n n n n n DESCRIPTION The LTC®3675 is a digitally programmable high efficiency multioutput power supply plus dual string LED driver IC optimized for high power single cell Li-Ion/Polymer applications. The DC/DCs consist of four synchronous buck converters (1A/1A/500mA/500mA), one synchronous boost DC/DC (1A), and one buck-boost DC/DC (1A) all powered from a 2.7V to 5.5V input. The 40V LED driver can regulate up to 25mA of current through two LED strings with up to 10 LEDs each. The LED driver may also be configured as a general purpose high voltage boost converter. DC/DC enables, output voltages, switch slew rates and operating modes may all be independently programmed over I2C or used in standalone mode via simple I/O and power-up defaults. The buck DC/DCs may be used independently or paralleled to achieve higher output currents with a shared inductor. LED enable, 60dB brightness control and up/down gradation are programmed using I2C. Alarm levels for low VIN and high die temperature may also be programmed via I2C with a maskable interrupt output to monitor DC/DC and system faults. Pushbutton ON/OFF/RESET control and a power-on reset output provide flexible and reliable power-up sequencing. The LTC3675 is available in a low profile (0.75mm), thermally enhanced 44-lead 4mm × 7mm QFN package. L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks of Linear Technology Corporation and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Four Monolithic Synchronous Buck DC/DCs (1A/1A/500mA/500mA) Buck DC/DCs Can Be Paralleled to Deliver Up to 2× Current with a Single Inductor Independent 1A Boost and 1A Buck-Boost DC/DCs Dual String I2C Controlled 40V LED Driver I2C Programmable Output Voltage, Operating Mode, and Switch Node Slew Rate for All DC/DCs I2C Read Back of DC/DC, LED Driver, Fault Status I2C Programmable VIN and Die Temperature Warnings Maskable Interrupts to Report DC/DC, VIN and Die Temperature Faults Pushbutton ON/OFF/RESET Always-On 25mA LDO Low Quiescent Current: 16μA (All DC/DCs Off) 4mm × 7mm × 0.75mm 44-Lead QFN Package APPLICATIONS n n n High Power (5W to 10W) Single Cell Li-Ion/Polymer Applications Portable Industrial Applications, Handy Terminals, Portable Instruments Multioutput Low Voltage Power Supplies TYPICAL APPLICATION 2.7V TO 5.5V 3 VIN I2C EN1 EN2 EN3 EN4 ENBB IRQB RSTB WAKE PBSTAT ONB PUSH BUTTON • • • CT 0.01μF EXPOSED PAD LED1 LED2 3675 TA01 DIGITAL CONTROL SW1 SW2 SW3 SW4 LTC3675 SW5 VOUT5 SWAB6 SWCD6 VOUT6 LDO_OUT SW7 0.425V TO VIN, 1A MAX 0.425V TO VIN, 1A MAX 0.425V TO VIN, 500mA MAX 0.425V TO VIN, 500mA MAX VIN VIN TO 5.35V, 1A MAX 2.65V TO 5.25V, 1A MAX 0.8V TO VIN, 25mA MAX VIN • • • UP TO 10 LEDS PER STRING 3675f 1 LTC3675 TABLE OF CONTENTS Features ............................................................................................................................ 1 Applications ....................................................................................................................... 1 Typical Application ............................................................................................................... 1 Description......................................................................................................................... 1 Absolute Maximum Ratings ..................................................................................................... 3 Order Information ................................................................................................................. 3 Pin Configuration ................................................................................................................. 3 Electrical Characteristics ........................................................................................................ 4 Typical Performance Characteristics .......................................................................................... 8 Pin Functions .....................................................................................................................14 Block Diagram....................................................................................................................16 Operation..........................................................................................................................17 Buck Switching Regulator .................................................................................................................................... 17 Buck Regulators with Combined Power Stages .................................................................................................... 17 Boost Switching Regulator ................................................................................................................................... 18 Buck-Boost Switching Regulator .......................................................................................................................... 18 LED Driver ............................................................................................................................................................ 18 Pushbutton Interface and Power-Up Power-Down Sequencing ............................................................................ 19 Power-Up and Power-Down via Pushbutton ......................................................................................................... 19 Power-Up and Power-Down via Enable Pin or I2C................................................................................................. 21 LED Current Programming ................................................................................................................................... 21 I2C Interface.......................................................................................................................................................... 21 Error Condition Reporting via RSTB and IRQB Pins ............................................................................................. 24 Undervoltage and Overtemperature Functionality ................................................................................................. 25 Applications Information .......................................................................................................26 Switching Regulator Output Voltage and Feedback Network................................................................................. 26 Buck Regulators ................................................................................................................................................... 26 Combined Buck Regulators .................................................................................................................................. 26 Boost Regulator .................................................................................................................................................... 27 Buck-Boost Regulator ........................................................................................................................................... 28 LED Driver ............................................................................................................................................................ 28 Operating the LED Driver As a High Voltage Boost Regulator ............................................................................... 29 Input and Output Decoupling Capacitor Selection................................................................................................. 29 Choosing the CT Capacitor ................................................................................................................................... 30 Programming the UVOT Register ......................................................................................................................... 30 Programming the RSTB and IRQB Mask Registers .............................................................................................. 30 Status Byte Read Back ......................................................................................................................................... 31 PCB Considerations .............................................................................................................................................. 31 Typical Applications .............................................................................................................32 Package Description ............................................................................................................35 Typical Application ..............................................................................................................36 Related Parts .....................................................................................................................36 3675f 2 LTC3675 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW 44 SWCD6 43 SDA 42 VOUT6 41 DVCC 40 VIN 39 SCL 38 SWAB6 EN1 1 FB1 2 FB2 3 EN2 4 SW1 5 VIN 6 VIN 7 SW2 8 SW3 9 VIN 10 SW4 11 EN3 12 EN4 13 FB4 14 FB3 15 45 GND 37 ENBB 36 FB6 35 FB5 34 VIN 33 VOUT5 32 SW5 31 VIN 30 LDO_OUT 29 LDOFB 28 ONB 27 LED_FS 26 WAKE 25 PBSTAT 24 IRQB 23 RSTB UFF PACKAGE 44-LEAD (7mm 4mm) PLASTIC QFN TJMAX = 125°C, θJA = 45°C/W EXPOSED PAD (PIN 45) IS GND, MUST BE SOLDERED TO PCB VIN, VOUT5, VOUT6 , FB1-6, LED_OV, EN1-4, ENBB, LED_FS, CT, WAKE, PBSTAT, IRQB, RSTB, ONB, DVCC, SW5...................................–0.3V to 6V (Static) LDO_OUT, LDOFB...–0.3V to Lesser of (VIN + 0.3V) or 6V SCL, SDA .......... –0.3V to Lesser of (DVCC + 0.3V) or 6V SW1, SW2, SW3, SW4, SWAB6 ............................. –0.3V to Lesser of (VIN + 0.3V) or 6V SWCD6 ............–0.3V to Lesser of (VOUT6 + 0.3V) or 6V SW7 ........................................................... –0.3V to 45V ISW1, ISW2 ................................................................ 1.4A ISW3, ISW4 ............................................................700mA ISW5, ISWAB6, ISWCD6................................................2.4A ISW7 ............................................................................2A Operating Junction Temperature Range (Notes 2, 3) ............................................................... –40°C to 125°C Junction Temperature (Notes 2, 3)........................ 125°C Storage Temperature Range .................. –65°C to 125°C ORDER INFORMATION LEAD FREE FINISH LTC3675EUFF#PBF TAPE AND REEL LTC3675EUFF#TRPBF PART MARKING 3675 PACKAGE DESCRIPTION 44-Lead (7mm × 4mm) Plastic QFN TEMPERATURE RANGE –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ LED_0V 16 LED1 17 SW7 18 SW7 19 SW7 20 LED2 21 CT 22 3675f 3 LTC3675 ELECTRICAL CHARACTERISTICS SYMBOL VIN VIN_FALLING VIN_RISING VIN_WARN PARAMETER Input Supply Range Falling Undervoltage Threshold Rising Undervoltage Threshold Falling Undervoltage Warning Threshold UV[2], UV[1], UV[0] = 000 UV[2], UV[1], UV[0] = 001 UV[2], UV[1], UV[0] = 010 UV[2], UV[1], UV[0] = 011 UV[2], UV[1], UV[0] = 100 UV[2], UV[1], UV[0] = 101 UV[2], UV[1], UV[0] = 110 UV[2], UV[1], UV[0] = 111 VIN_HYS VIN_WARN(LSB) OT OT_WARN VIN Undervoltage Warning Hysteresis Undervoltage Warning Threshold Step Size Overtemperature Shutdown Overtemperature Warning Threshold; Die OT[1], OT[0] = 00 Temperature Below OT that Causes IRQB = 0 OT[1], OT[0] = 01 OT[1], OT[0] = 10 OT[1], OT[0] = 11 Input Supply Current All Switching Regulators and LED Driver in Shutdown, ONB = HIGH; Sum of All VIN Currents All Voltage Regulators Full-Scale (1,1,1,1) Reference Voltage All Regulators Except LED Driver VFB1 = VFB2 = 0.85V (Notes 4, 5) VFB1 = VFB2 = 0.85V (Notes 4, 5) (Note 6) Pulse-Skipping Mode Full-Scale (1,1,1,1) Pulse-Skipping Mode Full-Scale (0,0,0,0) VFB1= VFB2 = 0.85V VFB1= VFB2 = 0V ISW1 = ISW2 = 100mA ISW1 = ISW2 = –100mA EN1 = EN2 = 0 EN1 = EN2 = 0 EN1 = EN2 = 0 (I2C Bit Set) –2 –2 10 500 VFB3 = VFB4 = 0.85V (Notes 4, 5) VFB3 = VFB4 = 0.85V (Notes 4, 5) (Note 6) 0.75 105 20 1.2 200 50 1.65 l l l l l The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. CONDITIONS l l l MIN 2.7 2.35 2.45 TYP 2.45 2.55 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 50 MAX 5.5 2.55 2.65 UNITS V V V V V V V V V V V mV 85 100 150 10 20 30 40 16 115 mV °C °C °C °C °C IVIN_ALLOFF 28 μA fOSC VPGOOD(RISE) VPGOOD(HYS) IVIN1,2 IFWD1,2 VFB1,2(HIGH) VFB1,2(LOW) VLSB1,2 IFB12 DMAX1,2 RPMOS1,2 RNMOS1,2 ILEAKP1,2 ILEAKN1,2 RSWPD1,2 tSS1,2 IVIN3,4 IFWD3,4 Voltage Regulator Switching Frequency Rising PGOOD Threshold Voltage PGOOD Hysteresis Pulse-Skipping Input Current Burst Mode® Operation Input Current PMOS Current Limit Feedback Regulation Voltage Feedback Regulation Voltage FB1, FB2 Regulation Voltage Step Size Feedback Leakage Current Maximum Duty Cycle PMOS On-Resistance NMOS On-Resistance PMOS Leakage Current NMOS Leakage Current Output Pull-Down Resistance in Shutdown Soft-Start Time Pulse-Skipping Input Current Burst Mode Operation Input Current PMOS Current Limit 1.8 2.25 93.5 1 105 20 2.7 MHz % % 1A Buck Regulator (Buck Regulators 1 and 2) 200 50 3.35 820 445 50 265 280 2 2 μA μA A mV mV mV nA % mΩ mΩ μA μA kΩ μs μA μA A 3675f 2.25 780 405 –50 100 2.8 800 425 25 500mA Buck Regulator (Buck Regulators 3 and 4) 4 LTC3675 ELECTRICAL CHARACTERISTICS SYMBOL VFB3,4(HIGH) VFB3,4(LOW) VLSB3,4 IFB3,4 DMAX3,4 RPMOS3,4 RNMOS3,4 ILEAKP3,4 ILEAKN3,4 RSWPD3,4 tSS3,4 IFWD1+2 IFWD2+3 IFWD3+4 IVIN5 VOUT5(MAX) IFWD5 VFB5(HIGH) VFB5(LOW) VLSB5 IFB5 DCMAX5 RPMOS5 RNMOS5 ILEAKP ILEAKN ROUTPD5 tSS5 IVIN6 VOUT6(LOW) VOUT6(HIGH) IFWD6 IPEAK6 IZERO6 VFB6(HIGH) VFB6(LOW) VLSB6 PARAMETER Feedback Regulation Voltage Feedback Regulation Voltage FB3, FB4 Regulation Voltage Step Size Feedback Leakage Current Maximum Duty Cycle PMOS On-Resistance NMOS On-Resistance PMOS Leakage Current NMOS Leakage Current Output Pull-Down Resistance in Shutdown Soft-Start Time PMOS Current Limit PMOS Current Limit PMOS Current Limit PWM Mode Burst Mode Operation Maximum Regulated Output Voltage Forward Current Limit Feedback Regulation Voltage Feedback Regulation Voltage FB5 Regulation Voltage Step Size Feedback Leakage Current Maximum Duty Cycle PMOS On-Resistance NMOS On-Resistance PMOS Switch Leakage Current NMOS Switch Leakage Current Output Pull-Down Resistance in Shutdown Soft-Start Time PWM Mode Burst Mode Operation Minimum Regulated Output Voltage Maximum Regulated Output Voltage Forward Current Limit Peak Current Limit Zero Current Limit Feedback Regulation Voltage Feedback Regulation Voltage FB6 Regulation Voltage Step Size PWM Mode (Note 6) Burst Mode Operation (Note 6) Burst Mode Operation PWM Mode Full-Scale (1,1,1,1) PWM Mode Full-Scale (0,0,0,0) l l The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. CONDITIONS Pulse-Skipping Mode Full-Scale (1,1,1,1) Pulse-Skipping Mode Full-Scale (0,0,0,0) VFB3 = VFB4 = 0.85V VFB3 = VFB4 = 0V ISW3 = ISW4 = 100mA ISW3 = ISW4 = –100mA EN3 = EN4 = 0 EN3 = EN4 = 0 EN3 = EN4 = 0 (I2C Bit Set) –1 –1 10 500 FB2 = VIN (Note 6) FB3 = VIN (Note 6) FB4 = VIN (Note 6) VFB5 = 0.85V (Notes 4, 5) VFB5 = 0.85V (Notes 4, 5) 5.35 (Note 6) PWM Mode Full-Scale (1,1,1,1) PWM Mode Full-Scale (0,0,0,0) VFB5 = 0.85V NMOS Switch l l l l l MIN 780 405 –50 100 TYP 800 425 25 MAX 820 445 50 UNITS mV mV mV nA % mΩ mΩ 500 510 1 1 μA μA kΩ μs A A A Buck Regulators Combined 5.6 4 2.4 150 35 5.55 3.15 800 425 25 –50 90 260 275 –2 –2 Boost Regulator Off 10 500 VFB6 = 0.85V (Note 4, 5) VFB6 = 0.85V(Note 4, 5) 5.25 2.1 200 –30 780 405 220 20 2.65 5.65 2.65 275 0 800 425 25 3.2 350 30 820 445 400 40 2.8 2 2 50 2.5 780 405 300 60 5.75 3.9 820 445 1A Boost Regulator μA μA V A mV mV mV nA % mΩ mΩ μA μA kΩ μs μA μA V V A mA mA mV mV mV 3675f 1A Buck-Boost Regulator 5 LTC3675 ELECTRICAL CHARACTERISTICS SYMBOL IFB6 DC6BUCK(MAX) RPMOS6 RNMOS6 ILEAKP ILEAKN tSS ROUTPD6 IVIN7 VLED_OV VLED_FS VLED1,2 VLED1,2_CLMP ILIM7 ILED_FS ILED_2FS ILED_MATCH PARAMETER Feedback Leakage Current Maximum Buck Duty Cycle PMOS On-Resistance NMOS On-Resistance PMOS Switch Leakage Current NMOS Switch Leakage Current Soft-Start Time Output Pull-Down Resistance in Shutdown Input Current (MODE0 = MODE1 = 0) LED Overvoltage Threshold Feedback Voltage LED Full-Scale Voltage LED Pin Regulation Voltage LED Regulation Voltage Clamp Maximum Current Limit LED Full-Scale Current LED Full Current High Current Mode LED1 and LED2 Current Matching at Full-Scale | I LED1 − I LED2 | ⎛ I LED1 + I LED2 ⎞ ⎜ ⎟ 2 ⎝ ⎠ • 100 (Note 6) l l l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. CONDITIONS VFB6 = 0.85V Duty Cycle of PMOS Switch A Duty Cycle of NMOS Switch C Switches A and D Switches B and C –2 –2 500 ENBB = 0 LED_OV = 0.85V (Notes 4, 5) Operating in LED Mode Operating in Boost Mode (Note 7) l l l l l MIN –50 100 TYP MAX 50 UNITS nA % % mΩ mΩ DC6BOOST(MAX) Maximum Boost Duty Cycle 75 260 275 2 2 10 700 805 770 775 6.0 1.6 23.25 46.5 1.85 25.0 50 825 800 800 300 8.3 2.15 26.75 53.5 1 1000 845 830 825 μA μA μs kΩ μA mV mV mV mV V A mA mA % LED Driver; RLED_FS = 20kΩ ILED_LSB RNMOS7 ILEAK_NMOS7 FLEDOSC DCMAX7 VLDOFB RDO I2C Port DVCC IDVCC DVCC_UVLO ADDRESS VIH VIL IIH IIL VOL_SDA fSCL LED Current LSB NMOS On-Resistance NMOS Switch Leakage Oscillator Frequency Maximum Duty Cycle Feedback Regulation Voltage Dropout Resistance Input Supply Voltage Input Supply Current DVCC UVLO LTC3675 I2C Address Input High Voltage Input Low Voltage Input High Current Input Low Current SDA Output Low Voltage Clock Operating Frequency SDA/SCL SDA/SCL SDA/SCL SDA/SCL ISDA = 3mA –1 –1 l l 98 300 VSW7 = 5.5V l μA mΩ 1 μA kHz % 820 mV Ω 5.5 V μA V %DVCC %DVCC 1 1 0.4 400 μA μA V kHz 3675f –1 450 562.5 97 l 675 NMOS Switch 780 25mA Always-On LDO 800 12 1.6 0.3 1 0001001[R/WB] 70 30 0 0 SCL/SDA= 0kHz 1 6 LTC3675 ELECTRICAL CHARACTERISTICS SYMBOL tBUF tHD_SDA tSU_STA tSU_STO tHD_DAT(O) tHD_DAT(I) tSU_DAT tLOW tHIGH tf tr tSP ILK(HIGH) VOL VONB(HIGH) VONB(LOW) VHI_ALLOFF VEN_HYS VHI IEN tONB_LO tONB_WAKE tONB_HR tHR tPBSTAT_PW tWAKE_ON PARAMETER Bus Free Time Between Stop and Start Condition Hold Time After Repeated Start Condition Repeated Start Condition Set-Up Time Stop Condition Set-Up Time Data Hold Time Output Data Hold Time Input Data Set-Up Time SCL Clock Low Period SCL Clock High Period Clock/Data Fall Time Clock/Data Rise Time Input Spike Suppression Pulse Width Output High Leakage Current Output Low Voltage ONB High Threshold ONB Low Threshold Enable Rising Threshold Enable Falling Hysteresis Enable Rising Threshold Enable Pin Leakage Current ONB Low Time to PBSTAT Low ONB Low Time to WAKE High ONB Low to Hard Reset Time for Which All Enabled Regulators are Disabled PBSTAT Minimum Pulse Width WAKE High Time At Least One Regulator/LED Driver Enabled EN = 3.6V WAKE High l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V. CONDITIONS MIN 1.3 0.6 0.6 0.6 0 0 100 1.3 0.6 CB = Capacitance of One Bus Line (pF) CB = Capacitance of One Bus Line (pF) 20+0.1CB 20+0.1CB 300 300 50 3.6V at Pin 3mA into Pin 400 All Regulators and LED Driver Disabled l TYP MAX UNITS μs μs μs μs 900 ns ns ns μs μs ns ns ns μA mV mV mV Interface Logic Pins (PBSTAT, WAKE, RSTB, IRQB, ONB) –1 100 800 700 650 60 380 –1 28 280 3.5 0.7 28 3.5 50 400 5 1 50 5 400 420 1 72 520 6.5 1.3 72 6.5 1200 1 400 1200 Interface Logic Pins (EN1, EN2, EN3, EN4, ENBB) 400 mV mV mV μA ms ms sec sec ms sec Pushbutton Parameters; CT = 0.01μF Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3675 is guaranteed to meet performance specifications from the 0°C to 125°C operating junction temperature range. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: The LTC3675 includes overtemperature protection which protects the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 4: Static current, switches not switching. Actual current may be higher due to gate charge losses at the switching frequency. Note 5: Currents measured at a specific VIN pin. Buck 1 (VIN, Pin 6); Buck 2 (VIN, Pin 7); Buck 3 and Buck 4 (VIN, Pin 10); Boost and Buck Boost (VIN, Pin 34); LED driver (VIN, Pin 31). Note 6: The current limit features of this part are intended to protect the IC from short term or intermittent fault conditions. Continuous operation above the maximum specified pin current rating may result in device degradation over time. Note 7: With dual string operation, the LED pin with the lower voltage sets the regulation point. 3675f 7 LTC3675 TYPICAL PERFORMANCE CHARACTERISTICS Undervoltage Threshold vs Temperature 2.70 2.65 2.60 UV THRESHOLD (V) 2.55 2.50 VIN_FALLING 2.45 2.40 2.35 2.30 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G01 TA = 25°C, unless otherwise noted. Oscillator Frequency vs Temperature 2.50 2.45 2.40 2.35 fOSC (MHz) 2.30 2.25 2.20 2.15 2.10 2.05 VIN = 2.7V VIN = 5.5V Input Supply Current vs Temperature 50 ALL REGULATORS AND LED 45 DRIVER IN SHUTDOWN 40 IVIN_ALLOFF (μA) VIN_RISING 35 30 25 20 15 10 5 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G02 VIN = 3.6V VIN = 5.5V VIN = 3.6V VIN = 2.7V 2.00 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G03 Enable Threshold vs Temperature 900 850 800 EN THRESHOLD (V) 750 700 650 600 550 500 450 400 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G04 Enable Pin Precision Threshold vs Temperature 420 415 EN THRESHOLD (mV) 410 405 EN RISING 400 395 390 385 380 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G05 1A Buck Regulators, Efficiency vs Load 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 VIN = 2.7V Burst Mode OPERATION VIN = 3.6V Burst Mode OPERATION VIN = 5.5V Burst Mode OPERATION VIN = 2.7V PULSE SKIPPING-MODE VIN = 3.6V PULSE SKIPPING-MODE VIN = 5.5V PULSE SKIPPING-MODE 10 100 LOAD CURRENT (mA) 1000 3675 G06 ALL REGULATORS AND LED DRIVER DISABLED, VIN = 3.6V THRESHOLD MEASURED WITH A REGULATOR ENABLED, VIN = 3.6V VOUT = 1.2V EN RISING EN FALLING EN FALLING 1A Buck Regulators, Efficiency vs Load 100 90 80 EFFICIENCY (%) 70 VOUT1 (V) 60 50 VOUT = 2.5V VIN = 2.7V Burst Mode OPERATION 30 VIN = 3.6V Burst Mode OPERATION VIN = 5.5V Burst Mode OPERATION 20 VIN = 2.7V PULSE SKIPPING-MODE VIN = 3.6V PULSE SKIPPING-MODE 10 VIN = 5.5V PULSE SKIPPING-MODE 0 1 10 100 1000 LOAD CURRENT (mA) 40 3675 G06 1A Buck Regulators, Load Regulation 1.220 1.216 1.212 1.208 1.204 1.200 1.196 1.192 1.188 1.184 1.180 1 10 100 LOAD CURRENT (mA) 1000 3675 G08 1A Buck Regulators, Line Regulation 1.220 1.216 1.212 VIN = 5.5V VIN = 2.7V VIN = 3.6V VOUT1 (V) 1.208 1.204 1.200 1.196 1.192 1.188 1.184 1.180 2.7 3.1 3.5 3.9 4.3 VIN (V) 4.7 5.1 5.5 LOAD = 100mA LOAD = 500mA PULSE-SKIPPING MODE PULSE-SKIPPING MODE 3675 G09 3675f 8 LTC3675 TYPICAL PERFORMANCE CHARACTERISTICS 1A Buck Regulators, Transient Response (Pulse-Skipping Mode) VOUT1 100mV/DIV AC-COUPLED VOUT1 100mV/DIV AC-COUPLED VOUT1 500mV/DIV INDUCTOR CURRENT 200mA/DIV 0mA 50μs/DIV LOAD STEP = 100mA TO 700mA VIN = 3.6V, VOUT1 = 1.2V 3675 G10 TA = 25°C, unless otherwise noted. 1A Buck Regulators, No Load Start-Up Transient (Pulse-Skipping Mode) VIN = 3.6V 1A Buck Regulators, Transient Response (Burst Mode Operation) INDUCTOR CURRENT 200mA/DIV 0mA 50μs/DIV LOAD STEP = 100mA TO 700mA VIN = 3.6V, VOUT1 = 1.2V 3675 G11 INDUCTOR CURRENT 500mA/DIV EN1 2V/DIV 25μs/DIV 3675 G12 1A Buck Regulators, VOUT1 vs Temperature 1.25 PULSE-SKIPPING MODE 1.24 LOAD = 500mA 1.23 1.22 IFWD1, 2 (A) VOUT1 (V) 1.21 1.20 1.19 1.18 1.17 1.16 1.15 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G13 1A Buck Regulators, PMOS Current Limit vs Temperature 3.6 3.4 3.2 3.0 VIN = 5.5V VIN = 3.6V VIN = 2.7V RDSON (Ω) 0.60 0.55 0.50 0.45 1A Buck Regulators, Switch RDSON vs Temperature PMOS RDSON, VIN = 2.7V VIN = 2.7V 2.8 2.6 2.4 2.2 2.0 1.8 1.6 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G14 0.40 NMOS R DSON, VIN = 2.7V 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G15 VIN = 5.5V VIN = 3.6V NMOS RDSON, VIN = 5.5V PMOS RDSON, VIN = 5.5V 500mA Buck Regulators, Efficiency vs Load 100 90 80 EFFICIENCY (%) 70 VOUT3 (V) 60 50 40 30 20 10 0 1 VOUT3 = 1.8V VIN = 2.7V Burst Mode OPERATION VIN = 3.6V Burst Mode OPERATION VIN = 5.5V Burst Mode OPERATION VIN = 2.7V PULSE SKIPPING-MODE VIN = 3.6V PULSE SKIPPING-MODE VIN = 5.5V PULSE SKIPPING-MODE 10 100 LOAD CURRENT (mA) 1000 3675 G16 500mA Buck Regulators, Load Regulation 1.830 1.825 1.820 1.815 1.810 1.805 1.800 1.795 1.790 1.785 1.780 1.775 1.770 1 10 100 LOAD CURRENT (mA) 1000 3675 G17 500mA Buck Regulators, Line Regulation 1.830 1.825 1.820 1.815 VOUT3 (V) PULSE-SKIPPING MODE PULSE-SKIPPING MODE VIN = 3.6V VIN = 5.5V VIN = 2.7V 1.810 1.805 1.800 1.795 1.790 1.785 1.780 1.775 1.770 2.7 3.1 LOAD = 250mA LOAD = 50mA 3.5 3.9 4.3 VIN (V) 4.7 5.1 5.5 3675 G18 3675f 9 LTC3675 TYPICAL PERFORMANCE CHARACTERISTICS 500mA Buck Regulators Transient Response (Pulse-Skipping Mode) VOUT3 100mV/DIV AC-COUPLED VOUT3 100mV/DIV AC-COUPLED VOUT3 500mV/DIV INDUCTOR CURRENT 500mA/DIV EN 2V/DIV 50μs/DIV LOAD STEP = 50mA to 300mA VIN = 3.6V, VOUT3 = 1.8V 3675 G20 TA = 25°C, unless otherwise noted. 500mA Buck Regulators No Load Start-Up Transient (Pulse-Skipping Mode) VIN = 3.6V 500mA Buck Regulators Transient Response (Burst Mode Operation) INDUCTOR CURRENT 100mA/DIV 50μs/DIV LOAD STEP = 50mA to 300mA VIN = 3.6V, VOUT3 = 1.8V 3675 G19 INDUCTOR CURRENT 100mA/DIV 25μs/DIV 3675 G21 500mA Buck Regulators, VOUT3 vs Temperature 1.90 1.88 1.86 1.84 IFWD3,4 (A) VOUT3 (V) 1.82 1.80 1.78 1.76 1.74 1.72 1.70 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G22 500mA Buck Regulators, PMOS Current Limit vs Temperature 1.50 1.45 1.40 1.35 1.25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G23 500mA Buck Regulators, Switch RDSON vs Temperature 1.0 0.9 0.8 0.7 PMOS RDSON, VIN = 2.7V NMOS RDSON, VIN = 2.7V PULSE-SKIPPING MODE, LOAD = 250mA VIN = 5.5V VIN = 3.6V VIN = 2.7V RDSON (Ω) VIN = 5.5V 1.30 0.6 0.5 0.4 0.3 0.2 0.1 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G24 VIN = 3.6V VIN = 2.7V NMOS RDSON, VIN = 5.5V PMOS RDSON, VIN = 5.5V Ganged Buck Regulators 1 and 2, Efficiency vs Load 100 95 90 85 EFFICIENCY (%) EFFICIENCY (%) 80 75 70 65 60 55 50 45 40 1 10 100 1000 LOAD CURRENT (mA) 10000 3675 G25 Boost Regulator, Efficiency vs Load 100 90 80 70 VOUT5 (V) 60 50 40 30 20 10 0 1 VOUT5 = 5V VIN = 2.7V Burst Mode OPERATION VIN = 3.6V Burst Mode OPERATION VIN = 1.2V Burst Mode OPERATION VIN = 2.7V PWM MODE VIN = 3.6V PWM MODE VIN = 4.2V PWM MODE 10 100 LOAD CURRENT (mA) 1000 3675 G26 Boost Regulator, Load Regulation 5.20 5.15 5.10 5.05 5.00 4.95 4.90 4.85 4.80 1 10 100 LOAD CURRENT (mA) 1000 3675 G27 VIN = 3.6V, VOUT1 = 1.2V PWM MODE VIN = 3.6V VIN = 4.2V Burst Mode OPERATION PULSE-SKIPPING MODE VIN = 2.7V 3675f 10 LTC3675 TYPICAL PERFORMANCE CHARACTERISTICS Boost Regulator, Line Regulation 5.020 5.016 5.012 5.008 VOUT5 (V) 5.004 5.000 4.996 4.992 4.988 4.984 4.980 2.7 3.1 3.5 3.9 4.3 VIN (V) 4.7 5.1 5.5 200μs/DIV LOAD STEP = 100mA to 600mA VIN = 3.6V, VOUT5 = 5V 3675 G29 Boost Regulator Transient Response (PWM Mode) VOUT5 100mV/DIV AC-COUPLED PWM MODE LOAD = 500mA LOAD = 100mA INDUCTOR CURRENT 200mA/DIV 3675 G28 Boost Regulator Transient Response (Burst Mode Operation) VOUT5 100mV/DIV AC-COUPLED VOUT5 2V/DIV INDUCTOR CURRENT 500mA/DIV 0mA 50μs/DIV LOAD STEP = 100mA to 600mA VIN = 3.6V, VOUT5 = 5V 3675 G30 Boost Regulator, No Load Start-Up Transient, PWM Mode VIN = 3.6V INDUCTOR CURRENT 500mA/DIV 50μs/DIV 3675 G31 Boost Regulator, VOUT5 vs Temperature 5.10 5.08 5.06 5.04 VOUT5 (V) 5.02 5.00 4.98 4.96 4.94 4.92 4.90 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G32 Boost Regulator, Forward Current Limit vs Temperature 3.50 3.45 3.40 3.35 3.30 VIN = 3.6V 3.25 3.20 VIN = 4.2V 3.15 3.10 VIN = 2.7V 3.05 3.00 2.95 2.90 2.85 2.80 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G33 PWM MODE, LOAD = 500mA VIN = 3.6V IFWD5 (A) VIN = 2.7V VIN = 4.2V 3675f 11 LTC3675 TYPICAL PERFORMANCE CHARACTERISTICS Buck-Boost Regulator, Efficiency vs Load 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 Burst Mode OPERATION PWM MODE 10 100 LOAD CURRENT (mA) 1000 3675 G34 Buck-Boost Regulator, Load Regulation 3.35 3.34 3.33 PWM MODE VIN = 2.7V VIN = 3.6V VIN = 5.5V VOUT6 (V) 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 1 10 100 LOAD CURRENT (mA) 1000 3675 G35 VIN = 4.2V VIN = 2.7V VIN = 3.6V Buck-Boost Regulator, Line Regulation 3.40 3.38 3.36 3.34 VOUT6 (V) 3.32 3.30 3.28 3.26 3.24 3.22 3.20 2.7 3.1 3.5 3.9 4.3 VIN (V) 4.7 5.1 5.5 LOAD = 500mA LOAD = 100mA INDUCTOR CURRENT 200mA/DIV PWM MODE VOUT6 200mV/DIV AC-COUPLED Buck-Boost Regulator Transient Response (PWM Mode) 200μs/DIV LOAD STEP = 100mA to 600mA VIN = 3.6V, VOUT6 = 3.3V 3675 G37 3675 G36 Buck-Boost Regulator No Load Start-Up (PWM Mode) VIN = 3.6V REDUCTION BELOW 1A (mA) 400 Buck-Boost Regulator, Reduction in Load Current Deliverability PWM MODE 350 VOUT6 = 3.3V 300 250 200 150 100 50 0 2.7 3 3.3 3.6 VIN (V) 3.9 4.2 3675 G39 VOUT6 1V/DIV INDUCTOR CURRENT 500mA/DIV EN6 2V/DIV 100μs/DIV 3675 G38 3675f 12 LTC3675 TYPICAL PERFORMANCE CHARACTERISTICS Buck-Boost Regulator, VOUT6 vs Temperature 3.40 3.38 3.36 3.34 VOUT6 (V) 3.32 3.30 3.28 3.26 3.24 3.22 3.20 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G40 Buck-Boost Regulator, Forward Current Limit vs Temperature 2.90 2.85 2.80 0.60 0.55 0.50 0.45 0.40 VIN = 3.6V RDSON (Ω) VIN = 2.7V 0.35 0.30 0.25 0.20 VIN = 4.2V 0.15 0.10 0.05 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G41 Buck-Boost Regulator, Switch RDSON vs Temperature PWM MODE, LOAD = 500mA NMOS RDSON, VIN = 2.7V PMOS RDSON, VIN = 2.7V VIN = 5.5V IFWD6 (A) 2.75 2.70 2.65 2.60 2.55 2.50 2.45 2.40 –55 –35 –15 VIN = 3.6V VIN = 2.7V PMOS RDSON, VIN = 4.2V NMOS RDSON, VIN = 4.2V 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G42 LED Driver, Dual String Efficiency, 10 LEDs per String 100 90 80 EFFICIENCY (%) 70 EFFICIENCY (%) 60 50 40 30 20 10 0 1 RLED_FS = 20kΩ 10 100 DAC CODE (DECIMAL) 1000 3675 G43 LED Driver, Dual String Efficiency, 4 LEDs per String 100 90 VIN = 4.2V VIN = 2.7V IFWD6 (A) 2.10 2.05 2.00 1.95 1.90 1.85 1.80 1.75 1.70 RLED_FS = 20kΩ 1 10 100 DAC CODE (DECIMAL) 1000 3675 G44 LED Driver, Forward Current Limit vs Temperature VIN = 4.2V 80 70 60 50 40 30 20 10 0 VIN = 3.6V VIN = 2.7V VIN = 2.7V VIN = 5.5V 1.65 1.60 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G45 LED Driver, LED Current vs Temperature 10.25 10.20 10.15 EFFICIENCY (%) 10.10 ILED (mA) 10.05 10.00 9.95 9.90 9.85 9.80 9.75 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 3675 G46 High Voltage Boost Regulator, Efficiency vs Load 100 1.220 1.215 VIN = 5.5V VIN = 2.7V VIN = 3.6V VOUT (V) 1.210 1.205 1.200 1.195 1.190 MODE1 = 1, MODE0 = 0 VOUT = 12V 1 10 100 LOAD CURRENT (mA) 1000 3675 G47 Always-On LDO, Load Regulation SINGLE LED STRING CURRENT MODE0 = MODE1 = 0 90 80 VIN = 3.6V VIN = 5.5V VIN = 2.7V 70 60 50 40 30 20 10 0 VIN = 2.7V VIN = 5.5V VIN = 3.6V 1.185 1.180 0.1 1 10 LOAD CURRENT (mA) 100 3675 G48 3675f 13 LTC3675 PIN FUNCTIONS EN1 (Pin 1): Buck Regulator 1 Enable Input. Active high. FB1 (Pin 2): Buck Regulator 1 Feedback Pin. Receives feedback by a resistor divider connected across the output. FB2 (Pin 3): Buck Regulator 2 Feedback Pin. Receives feedback by a resistor divider connected across the output. Connecting FB2 to VIN combines buck regulator 2 with buck regulator 1 for higher current. EN2 (Pin 4): Buck Regulator 2 Enable Input. Active high. SW1 (Pin 5): Buck Regulator 1 Switch Node. External inductor connects to this pin. VIN (Pin 6): Buck Regulator 1 Input Supply. A 10μF decoupling capacitor to GND is recommended. Must be connected to all other VIN supply pins (Pins 7, 10, 31, 34, 40). VIN (Pin 7): Buck Regulator 2 Input Supply. A 10μF decoupling capacitor to GND is recommended. Must be connected to all other VIN supply pins (Pins 6, 10, 31, 34, 40). SW2 (Pin 8): Buck Regulator 2 Switch Node. External inductor connects to this pin. SW3 (Pin 9): Buck Regulator 3 Switch Node. External inductor connects to this pin. VIN (Pin 10): Buck Regulators 3 and 4 Input Supply. A 10μF decoupling capacitor to GND is recommended. Must be connected to all other VIN supply pins (Pins 6, 7, 31, 34, 40). SW4 (Pin 11): Buck Regulator 4 Switch Node. External inductor connects to this pin. EN3 (Pin 12): Buck Regulator 3 Enable Input. Active high. EN4 (Pin 13): Buck Regulator 4 Enable Input. Active high. FB4 (Pin 14): Buck Regulator 4 Feedback Pin. Receives feedback by a resistor divider connected across the output. Connecting FB4 to VIN combines buck regulator 4 with buck regulator 3 for higher current. FB3 (Pin 15): Buck Regulator 3 Feedback Pin. Receives feedback by a resistor divider connected across the output. Connecting FB3 to VIN combines buck regulator 3 with buck regulator 2 for higher current. LED_OV (Pin 16): Overvoltage Protection Pin for LED Driver. LED1 (Pin 17): Connect a string of up to 10 LEDs to this pin. SW7 (Pins 18, 19, 20): LED Driver Switch Node. External inductor connects to these pins. LED2 (Pin 21): Connect a string of up to 10 LEDs to this pin. CT (Pin 22): Timing Capacitor Pin. A capacitor connected to GND sets a time constant which is scaled for use by the WAKE, RSTB and IRQB pins. RSTB (Pin 23): Reset Pin. Open drain output. When the regulated output voltage of any enabled switching regulator is more than 6.5% below its programmed level, this pin is driven LOW. Assertion delay is scaled by the CT capacitor. IRQB (Pin 24): Interrupt Pin. Open drain output. When undervoltage, overtemperature, or an unmasked error condition is detected, this pin is driven LOW. Assertion delay is scaled by the CT capacitor. 3675f 14 LTC3675 PIN FUNCTIONS PBSTAT (Pin 25): Pushbutton Status Pin. Open drain output. This pin provides a debounced and glitch free status of the ONB pin. WAKE (Pin 26): Open Drain Output. When the ONB pin is pressed and released, the signal is debounced and the WAKE signal is held HIGH for a minimum time period that is scaled by the CT capacitor. LED_FS (Pin 27): A resistor connected from this pin to GND programs full-scale LED current. ONB (Pin 28): Pushbutton Input. Active low. LDOFB (Pin 29): LDO Feedback Pin. A resistor divider from LDO_OUT to GND provides feedback. LDO_OUT (Pin 30): Output of Always-On LDO. Decouple with a 10μF capacitor to GND. VIN (Pin 31): Quiet Input Supply Used to Power NonSwitching Control Circuitry. A 2.2μF decoupling capacitor to GND is recommended. Must be connected to all other VIN supply pins (Pins 6, 7, 10, 34, 40). SW5 (Pin 32): Boost Regulator Switch Node. External inductor connects to this pin. VOUT5 (Pin 33): Boost Regulator Output. Connect two 22μF capacitors to GND. VIN (Pin 34): Quiet Input Supply Used to Power NonSwitching Control Circuitry. A 2.2μF decoupling capacitor to GND is recommended. Must be connected to all other VIN supply pins (Pins 6, 7, 10, 31, 40). FB5 (Pin 35): Boost Regulator Feedback Pin. Receives feedback by a resistor divider connected across the output. FB6 (Pin 36): Buck-Boost Regulator Feedback Pin. Receives feedback by a resistor divider connected across the output. ENBB (Pin 37): Buck-Boost Regulator Enable Input. Active high. SWAB6 (Pin 38): Buck-Boost Regulator Switch Pin. External inductor connects to this pin and SWCD6. SCL (Pin 39): Clock Line for I2C Port. VIN (Pin 40): Buck-Boost Regulator Input Supply. A 10μF decoupling capacitor to GND is recommended. Must be connected to all other VIN supply pins (Pins 6, 7, 10, 31, 34). DVCC (Pin 41): Supply Pin for I2C Port. VOUT6 (Pins 42): Buck-Boost Regulator Output. Connect a 22μF capacitor to GND. SDA (Pin 43): Serial Data Line for I2C Port. Open drain output during readback. SWCD6 (Pin 44): Buck-Boost Regulator Switch Pin. External inductor connects to this pin and SWAB6. GND (Exposed Pad Pin 45): Ground for Entire Chip. Must be soldered to PCB for electrical contact and rated thermal performance. 3675f 15 LTC3675 BLOCK DIAGRAM VIN BOOST REGULATOR VIN SW1 FB1 EN1 34 VIN 33 VOUT5 32 SW5 35 FB5 6 BUCK-BOOST REGULATOR 5 2 1 MODULATION CONTROL MASTER/SLAVE LINES BUCK REGULATOR 1 1A 40 VIN A D 38 SWAB6 B C VIN SW2 FB2 EN2 7 8 3 4 BUCK REGULATOR 2 1A 36 FB6 REF, CLK VIN 37 ENBB 17 LED1 MASTER/SLAVE LINES BANDGAP, OSCILLATOR, UV, OT MODULATION CONTROL 21 LED2 18,19, 20 SW7 27 LED_FS SW3 9 BUCK REGULATOR 3 500mA LED DRIVER 16 LED_OV 31 VIN VIN 44 SWCD6 42 VOUT6 FB3 15 EN3 12 VIN 10 MASTER/SLAVE LINES DAC BITS, SLEW CONTROL, GRADATION, STATUS BITS SW4 11 FB4 14 EN4 13 BUCK REGULATOR 4 500mA TOP LOGIC, CT OSCILLATOR, TIMING GND 45 16 + – LDO 30 LDO_OUT 29 LDOFB 41 DVCC I2C 39 SCL 43 SDA 23 RSTB 24 IRQB 25 PBSTAT 26 WAKE 22 CT 28 ONB 3675 BD 3675f LTC3675 OPERATION The LTC3675 has six monolithic synchronous switching regulators and a dual string boost LED driver and is designed to operate from a single Li-Ion battery. All of the switching regulators and the LED driver are internally compensated and need only external feedback resistors for regulation. The switching regulators also offer two operating modes: Burst Mode operation for higher efficiency at light loads and pulse-skipping/PWM mode. In Burst Mode operation at light loads, the output capacitor is charged to a voltage slightly higher than its regulation point. The regulator then goes into sleep, during which the output capacitor provides the load current. In sleep most of the regulator’s circuitry is powered down, helping conserve battery power. When the output capacitor droops below its programmed value, the circuitry is powered on and another burst cycle begins. The sleep time decreases as load current increases. All switching regulators and LED driver may be configured via I2C, providing the user with the flexibility to operate the LTC3675 in the most efficient manner. I2C commands can also be read back via the I2C port, to ensure a command was not corrupted during a transmission. All the regulators can be enabled via I2C commands. The buck regulators and the buck-boost regulator may also be enabled via enable pins. The enable pins have two different enable threshold voltages that depend on the operating state of the LTC3675. With all regulators disabled, the enable pin threshold is at 650mV. If any regulator is enabled either by its enable pin or an I2C command, then the enable pin thresholds are at 400mV. A precision comparator detects a voltage greater than 400mV on the enable pin and turns that regulator on. This precision threshold may be used to sequentially enable regulators. If all regulators are disabled, all the command registers are set in their default state. There are also 2 bytes of data that report any fault conditions on the LTC3675 via I2C read back. BUCK SWITCHING REGULATOR The LTC3675 contains four buck regulators. Two of the buck regulators are designed to deliver up to 1A load current each while the other two regulators can deliver up to 500mA each. The buck regulators can operate in either of two modes. In pulse-skipping mode, the regulator will skip pulses at light loads but will operate at a constant frequency of 2.25MHz at higher loads. In Burst Mode operation, the regulator will burst at light loads whereas at higher loads it will operate at constant frequency PWM mode of operation, much the same as pulse-skipping mode at high load. In shutdown, an I2C control bit provides the flexibility to either keep the SW node in a high impedance state or pull the SW node to GND through a 10k resistor. The buck regulators have forward and reverse current limiting, soft-start to limit inrush current during start-up, short-circuit protection and slew rate control for lower radiated EMI. Each buck regulator may be enabled via its enable pin or I2C. The mode of operation, the feedback regulation voltage and switch slew rate can all be controlled via I2C. For applications that require higher power, buck regulators may be combined together. BUCK REGULATORS WITH COMBINED POWER STAGES Two adjacent buck regulators may be combined in a master-slave configuration by connecting their SW pins together and connecting the higher numbered buck’s FB pin to the input supply. The lower numbered buck is always the master. In Figure 1, buck regulator 1 is the master. The feedback network connected to the FB1 pin programs the VIN L1 SW1 BUCK REGULATOR 1 (MASTER) EN1 FB1 800k VIN SW2 BUCK REGULATOR 2 (SLAVE) FB2 EN2 VIN COUT 400k 1.2V 2A VOUT 3675 F01 Figure 1. Buck Regulators Configured as Master-Slave 3675f 17 LTC3675 OPERATION output voltage to 1.2V. The FB2 pin is tied to VIN, which configures buck regulator 2 as the slave. The SW1 and SW2 pins must be tied together. The register contents of the master program the combined buck regulator’s behavior and the register contents of the slave are ignored. The slave buck control circuitry draws no current. The enable of the master buck (EN1) controls the operation of the combined bucks, the enable of the slave regulator (EN2) is ignored. Buck regulators 2 and 3 may be configured as combined buck regulators capable of delivering up to 1.5A load current with buck regulator 2 being the master. Buck regulators 3 and 4 may be configured as combined buck regulators capable of delivering up to 1A load current with buck regulator 3 being the master. BOOST SWITCHING REGULATOR The boost regulator is capable of delivering up to 1A load current for a programmed output voltage of up to 5V. The boost regulator may be enabled only via I2C. The mode of operation, feedback regulation voltage and switch slew rate can all be controlled via I2C. The boost regulator can operate in either PWM mode or in Burst Mode operation. In PWM operating mode, the regulator operates at a constant frequency of 2.25MHz and provides a low noise solution. For light loads, Burst Mode operation offers improved efficiency. The boost regulator has forward and reverse current limiting, softstart to limit inrush current during start-up, short-circuit protection and slew rate control for lower radiated EMI. The boost regulator also features true output disconnect when in shutdown. In shutdown, an internal 10k resistor pulls the output to GND. BUCK-BOOST SWITCHING REGULATOR The buck-boost regulator is a 2.25MHz voltage mode regulator. The buck-boost regulator is capable of delivering up to 1A load current for a programmed output voltage of 3.3V. The regulator can be enabled via its enable pin or via I2C. The mode of operation, feedback regulation voltage and switch slew rate can all be controlled via I2C. The buck-boost regulator can operate in either PWM mode or in Burst Mode operation. The PWM operating mode provides a low noise solution. For light loads, Burst Mode operation offers improved efficiency. The buck-boost regulator has forward current limiting, soft-start to limit inrush current during start-up, short-circuit protection and slew rate control for lower radiated EMI. When the output voltage is below 2.65V (typical) during start-up, Burst Mode operation is disabled and switch D is turned off. The forward current is carried by the switch D well diode and there is no reverse current flowing in this condition. In shutdown, an internal 10k resistor pulls the output to GND. LED DRIVER The LED driver uses a constant frequency, current mode boost converter to supply power to up to two strings of 10 series LEDs. The series string of LEDs is connected from the output of the boost converter to an LED pin. The LED pin is a programmable constant current sink. The boost converter will regulate its output to force the LED pin to 300mV. The percentage of full-scale current sunk by the LED pin is programmed via I2C. The LED boost converter is designed for very high duty cycle operation and can boost from below 3V to 40V out at up to 55mA. The LED boost also features an overvoltage protection feature to limit the output voltage in case of an open circuit in an LED string. The boost converter will operate in either continuous conduction mode, discontinuous conduction mode or pulse-skipping mode depending on the inductor current required for regulation. The boost converter may also be configured to operate as an independent high voltage boost regulator via I2C. The LED driver may also be configured as a single string LED driver. When driving a single string, LED1 and LED2 should be tied together. The LED driver features a fully automatic gradation circuit. This circuit allows the current to ramp up or down at a controlled rate between any two current levels. On power-up the LED DAC register is set to 0. To enable the LED driver a non-zero value must be programmed into this register. The gradation circuit will then ramp the current to the 3675f 18 LTC3675 OPERATION programmed value at a rate determined by the gradation rate bits. Once the LED driver reaches this value it will regulate that current until programmed otherwise. If a new value is programmed in the LED brightness register, the LED driver’s current will ramp up or down at the programmed rate until that current is reached. To disable the LED driver, a code of zero is programmed in the LED DAC register. The gradation circuit will then ramp the current down at the programmed rate. Once the current reaches zero the gradation circuit will disable the boost and the entire LED driver will enter shutdown mode. The LED driver is protected by the LED_OV pin. This pin acts as a secondary feedback path that limits the voltage on the output capacitor. A feedback divider is placed from the LED boost’s output to the LED_OV pin. Values for this divider are selected to limit the output voltage similarly to the feedback dividers discussed in “Switching Regulator Output Voltage and Feedback Network” in the Applications Information section. The LED driver begins to transition to LED_OV control at 800mV and is fully controlled by the LED_OV pin by 825mV. During this transition the LED pins will begin to drop out of regulation. For this reason during normal operation the voltage on this pin should be kept below 800mV. The LED driver is also designed to limit the maximum voltage on the LED1 and LED2 pins to no more than 8V. The boost regulates the minimum voltage on either LED pin. If one of the LED pins is shorted to ground the boost will only drive the other LED pin up to the voltage clamp, or the LED_OV voltage, whichever is lower. If one LED string is shorted, or partially shorted, this clamp will prevent the boost from damaging the LED pin. PUSHBUTTON INTERFACE AND POWER-UP POWERDOWN SEQUENCING The LTC3675 provides pushbutton functionality to either power up or power down the part. The ONB, WAKE and PBSTAT pins provide the user with flexibility to power up or power down the part in addition to having I2C control. All PB timing parameters are scaled using the CT pin. Times . described below apply to a nominal CT of 0.01μF The LTC3675 is in an off state when it is powered up with all regulators in shutdown. The WAKE pin is LOW in the off state. The WAKE pin will go HIGH either if ONB is pulled LOW for 400ms or a regulator is enabled via its enable pin or an I2C command. The WAKE pin stays in its HIGH state for 5 seconds and then gets pulled low. WAKE will not go HIGH again if a second regulator is subsequently enabled. The LTC3675 is in an on state if either the WAKE pin is HIGH or a regulator is enabled. The PBSTAT pin reflects the status of the ONB when the LTC3675 is in an on state. Once in the on state, the LTC3675 can be powered down by holding ONB LOW for at least 5 seconds. All enabled regulators will be turned off for 1 second and the contents of the program registers are reset to their default state. This manner of power-down is called a hard reset. A hard reset may also be generated by using an I2C command. POWER-UP AND POWER-DOWN VIA PUSHBUTTON The LTC3675 may be turned on and off using the WAKE pin as shown in Figures 2a and 2b. In Figures 2a and 2b, pressing ONB low at time t1, causes the WAKE pin to go high at time t2 and stay high for 5 seconds, after which WAKE is pulled low. WAKE going HIGH at t2 causes buck regulator 1 to power up, which sequentially powers up the other buck regulators. The RSTB pin gets pulled HIGH 200ms after the last enabled buck is in its PGOOD state. An application showing sequential regulator start-up is shown in the Typical Applications section (Figure 7). If an I2C command is written before the 5 second WAKE period t3 to keep the buck regulators enabled, the regulators stay enabled as shown in Figure 2b. Otherwise, when WAKE gets pulled low at t3, the buck regulators will also power down sequentially as shown in Figure 2a. In Figure 2b, ONB is held LOW at instant t4 for 5 seconds. This causes a hard reset to be generated and at t5, all regulators are powered down. 3675f 19 LTC3675 OPERATION ONB WAKE (TIED TO EN1) PBSTAT (Hi-Z) 5 sec SEQUENCE UP SEQUENCE DOWN BUCKS 1–4 RSTB t1 t2 3675 F02a t3 (BUCK REGULATOR’S ENABLE IS NOT REINFORCED BY I2C BEFORE t3) Figure 2a. Power-Up Using WAKE (Sequenced Power-Up, Figure 7) ONB 5 sec WAKE PBSTAT SEQUENCE UP BUCKS 1–4 RSTB t1 t2 t3 (BUCK REGULATOR 1 IS ENABLED VIA I2C, BEFORE t3) t4 t5 3675 F02b Figure 2b. Power-Up Using WAKE and Power-Down Due to Hard Reset (Sequenced Power-Up, Figure 7) ONB (Hi-Z) WAKE PBSTAT (Hi-Z) EN1 BUCK 1 3675 F02c RSTB t1 t2 t3 t4 Figure 2c. Power-Up Using an Enable Pin and Power-Down Due to I2C Generated Hard Reset 3675f 20 LTC3675 OPERATION POWER-UP AND POWER-DOWN VIA ENABLE PIN OR I2C With the LTC3675 in its off state, a regulator can be enabled either via its enable pin or I2C. In Figure 2c, buck regulator 1 is enabled via its enable pin at time t1. The WAKE pin goes HIGH for 5 seconds and at t2 is pulled LOW. The buck regulator stays enabled until time t3 when a hard reset command is issued via I2C. The buck regulator powers down and stays off for 1 second. At time t4, the LTC3675 exits from the power down state. Since the buck regulator 1 is still enabled via its enable pin, it powers back up. WAKE also gets pulled HIGH for 5 seconds. The RSTB pin gets pulled HIGH 200ms after the buck regulator 1 is in its PGOOD state. LED CURRENT PROGRAMMING The LED current is primarily controlled through the LED DAC register at I2C sub-address 8. This register controls an 8 bit current DAC. A 20k resistor placed between the LED_FS pin and ground provides a current reference for the DAC which results in 98μA of programmed LED current per LSB. For example, programming a LED DAC register code of 64h will result in a LED current of 9.8mA and a full-scale setting of FFh will result in a LED current of 25mA. The 2xFS bit which is bit 3 of the LED configuration register at sub-address 7 effectively doubles the programmed LED current. With a 20k resistor from LED_FS to ground each LSB will be 196μA. Programming a LED DAC register DATA BYTE A ADDRESS 0 START SDA 0 0 0 1 0 0 1 0 ACK ACK ACK 0 0 1 0 0 1 WR 0 A7 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 STOP code of 64h will result in a LED current of 19.6mA and a full-scale setting of FFh will result in an LED current of 50mA. The 2xFS mode is only intended for use when the output voltage is below 20V. I2C INTERFACE The LTC3675 may communicate with a bus master using the standard I2C 2-wire interface. The timing diagram (Figure 2) shows the relationship of the signals on the bus. The two bus lines, SDA and SCL, must be high when the bus is not in use. External pull-up resistors or current sources, such as the LTC1694 SMBus accelerator, are required on these lines. The LTC3675 is both a slave receiver and slave transmitter. The I2C control signals, SDA and SCL are scaled internally to the DVCC supply. DVCC should be connected to the same power supply as the bus pull-up resistors. The I2C port has an undervoltage lockout on the DVCC pin. When DVCC is below 1V, the I2C serial port is cleared and the LTC3675 registers are set to their default configurations. I2C Bus Speed The I2C port is designed to be operated at speeds of up to 400kHz. It has built-in timing delays to ensure correct operation when addressed from an I2C compliant master device. It also contains input filters designed to suppress glitches should the bus become corrupted. DATA BYTE B SCL 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 SDA tSU, DAT tLOW SCL tHD, STA START CONDITION tr tHIGH tf REPEATED START CONDITION tSP STOP CONDITION START CONDITION tHD, DAT tSU, STA tHD, STA tBUF tSU, STO 3675 F03 Figure 3. I2C Bus Operation 3675f 21 LTC3675 OPERATION I2C Start and Stop Conditions A bus master signals the beginning of communications by transmitting a START condition. A START condition is generated by transitioning SDA from HIGH to LOW while SCL is HIGH. The master may transmit either the slave write or the slave read address. Once data is written to the LTC3675, the master may transmit a STOP condition which commands the LTC3675 to act upon its new command set. A STOP condition is sent by the master by transitioning SDA from LOW to HIGH while SCL is HIGH. The bus is then free for communication with another I2C device. I2C Byte Format Each byte sent to or received from the LTC3675 must be 8 bits long followed by an extra clock cycle for the acknowledge bit. The data should be sent to the LTC3675 most significant bit (MSB) first. I2C Acknowledge The acknowledge signal is used for handshaking between the master and the slave. When the LTC3675 is written to (write address), it acknowledges its write address as well as the subsequent two data bytes. When it is read from (read address), the LTC3675 acknowledges its read address only. The bus master should acknowledge receipt of information from the LTC3675. An acknowledge (active LOW) generated by the LTC3675 lets the master know that the latest byte of information was received. The acknowledge related clock pulse is generated by the master. The master releases the SDA line (HIGH) during the acknowledge clock cycle. The LTC3675 pulls down the SDA line during the write acknowledge clock pulse so that it is a stable LOW during the HIGH period of this clock pulse. When the LTC3675 is read from, it releases the SDA line so that the master may acknowledge receipt of the data. Since the LTC3675 only transmits one byte of data during a read cycle, a master not acknowledging the data sent by the LTC3675 has no I2C specific consequence on the operation of the I2C port. I2C Slave Address The LTC3675 responds to a 7-bit address which has been factory programmed to b’0001001[R/WB]’. The LSB of the address byte, known as the read/write bit, should be 0 when writing data to the LTC3675 and 1 when reading data from it. Considering the address as an 8-bit word, the write address is 12h and the read address is 13h. The LTC3675 will acknowledge both its read and write address. I2C Sub-Addressed Writing The LTC3675 has twelve command registers for control input. They are accessed by the I2C port via a sub-addressed writing system. A single write cycle of the LTC3675 consists of exactly three bytes except when a clear interrupt command is written. The first byte is always the LTC3675’s write address. The second byte represents the LTC3675’s sub-address. The sub-address is a pointer which directs the subsequent data byte within the LTC3675. The third byte consists of the data to be written to the location pointed to by the sub-address. The LTC3675 contains 11 control registers which can be written to. I2C Bus Write Operation The master initiates communication with the LTC3675 with a START condition and the LTC3675’s write address. If the address matches that of the LTC3675, the LTC3675 returns an acknowledge. The master should then deliver the sub-address. Again the LTC3675 acknowledges and the cycle is repeated for the data byte. The data byte is transferred to an internal holding latch upon the return of its acknowledge by the LTC3675. This procedure must be repeated for each sub-address that requires new data. After one or more cycles of [ADDRESS][SUB-ADDRESS][DATA], the master may terminate the communication with a STOP condition. Multiple sub addresses may be written to with a single address command using a [ADDRESS][SUBADDRESS][DATA][SUB-ADDRESS][DATA] sequence. Alternatively, a REPEAT-START condition can be initiated by the master and another chip on the I2C bus can be addressed. This cycle can continue indefinitely and the LTC3675 will remember the last input of valid data that it 3675f 22 LTC3675 OPERATION Table 1. Summary of I2C Sub-Addresses and Byte Formats. Bits A7, A6, A5, A4 of Sub-Address Need to Be 0 to Access Registers SUB-ADDRESS OPERA7A6A5A4A3A2A1A0 ATION ACTION 0000 0000 (00h) Write No Register Selected 0000 0001 (01h) Read/ Buck1 Register Write 0000 0010 (02h) Read/ Buck2 Register Write 0000 0011 (03h) Read/ Buck3 Register Write 0000 0100 (04h) Read/ Buck4 Register Write 0000 0101 (05h) Read/ Boost Register Write 0000 0110 (06h) Read/ Buck-Boost Write Register 0000 0111 (07h) Read/ LED Write Configuration Register 0000 1000 (08h) Read/ LED DAC Write Register 0000 1001 (09h) Read/ UVOT Register Write 0000 1010 (0Ah) Read/ RSTB Mask Write Register 0000 1011 (0Bh) Read/ IRQB Mask Write Register 0000 1100 (0Ch) Read Status Register (Real Time) 0000 1101 (0Dh) Read Status Register (Latched) 0000 1111 (0Fh) Write Clear Interrupt BYTE FORMAT D7D6D5D4D3D2D1D0 DEFAULT D7D6D5D4D3D2D1D0 COMMENTS Used in the Clear Interrupt Operation. 01101111 01101111 01101111 01101111 00001111 00001111 00001111 Enable, OUT_Hi-Z, Mode, Slow, DAC[3], DAC[2], DAC[1], DAC[0] Enable, OUT_Hi-Z, Mode, Slow, DAC[3], DAC[2], DAC[1], DAC[0] Enable, OUT_Hi-Z, Mode, Slow, DAC[3], DAC[2], DAC[1], DAC[0] Enable, OUT_Hi-Z, Mode, Slow, DAC[3], DAC[2], DAC[1], DAC[0] Enable, Unused, Mode, Slow, DAC[3], DAC[2], DAC[1], DAC[0] Enable, Unused, Mode, Slow, DAC[3], DAC[2], DAC[1], DAC[0] Unused, Mode[1], Mode[0], Slow, 2XFS, GRAD[2], GRAD[1], GRAD[0] DAC[7], DAC[6], DAC[5], DAC[4], DAC[3], DAC[2], DAC[1], DAC[0] RESET_ALL, UV[2], UV[1], UV[0], UNUSED, UNUSED, OT[1], OT[0] UNUSED, PGOOD[7], PGOOD[6], PGOOD[5], PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1] UNUSED, PGOOD[7], PGOOD[6], PGOOD[5], PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1] UNUSED, UNUSED, PGOOD[6], PGOOD[5], PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1] UV, OT, PGOOD[6], PGOOD[5], PGOOD[4], PGOOD[3], PGOOD[2], PGOOD[1] 00000000 00000000 11111111 00000000 00000000 = LED Driver Disabled 11111111 = 25mA per String Fault will pull RSTB low if the corresponding bit is ‘1’ Fault will pull IRQB low if the corresponding bit is ‘1’ Read Back Read Back Clears the Interrupt Bit, Status Latches are Unlatched received. Once all chips on the bus have been addressed and sent valid data, a global STOP can be sent and the LTC3675 will update its command latches with the data that it had received. It is important to understand that until a STOP signal is transmitted, data written to the LTC3675 command registers is not acted on by the LTC3675. Only once a STOP signal is issued is the data transferred to the command latch and acted on. The one exception is when sub-address 0Fh is written to clear an interrupt. To clear an interrupt, sub address OFh must be written, followed by sub address 00h. A complete clear interrupt cycle would have the following write sequence: 12h, 0Fh, STOP 12h, 00h, STOP , . I2C Bus Read Operation The LTC3675 has eleven command registers and two status registers. The contents of any of these registers may be read back via I2C. To read the data of a register, that register’s sub-address must be provided to the LTC3675. The bus master reads the status of the LTC3675 with a START condition followed by the LTC3675 write address followed by the first data byte (the sub-address of the register whose data needs to be read) which is acknowledged by the LTC3675. After receiving the acknowledge signal from the LTC3675 the bus master initiates a new START condition followed by the LTC3675 read address. The LTC3675 acknowledges the read address and then returns a byte of read back 3675f 23 LTC3675 OPERATION RSTB MASK REGISTER VIN EXTERNAL PULL-UP RESISTOR RSTB VOUT OTHER UNMASKED PGOOD OUTPUTS AND1 UNMASKED PGOOD OUTPUTS REGULATOR VIN EXTERNAL PULL-UP RESISTOR IRQB SET CLRINT CLR LATCHED STATUS REGISTER 92.5% OF PROGRAMMED VOUT + – PGOOD COMPARATOR AND2 UNMASKED ERROR OTHER UNMASKED ERRORS IRQB MASK REGISTER REAL TIME STATUS REGISTER 3675 F04 Figure 4. Simplified Schematic Showing RSTB and IRQB Signal Path data from the selected register. A STOP command is not required for the bus read operation. Immediately after writing data to a register, the contents of that register may be read back if the bus master issues a START condition followed by the LTC3675 read address. ERROR CONDITION REPORTING VIA RSTB AND IRQB PINS Error conditions are reported back via the IRQB and RSTB pins. After an error condition is detected, status data can be read back to a microprocessor via I2C to determine the exact nature of the error condition. Figure 4 is a simplified schematic showing the signal path for reporting errors via the RSTB and IRQB pins. All the switching regulators and the LED driver have an internal power good (PGOOD) signal. When the regulated output voltage of an enabled switcher rises above 93.5% of its programmed value, the PGOOD signal will transition high. When the regulated output voltage falls below 92.5% of its programmed value, the PGOOD signal is pulled low. If that PGOOD is not masked and stays low for greater than 50μs, then it pulls the RSTB and IRQB pins low, indicating to a microprocessor that an error condition has occurred. The 50μs filter time prevents the pins from being pulled low due to a transient. The LED driver has a PGOOD signal (PGOOD[7]) that is used to indicate output voltage status only when it is configured as a high voltage boost regulator. In all other operating modes, PGOOD[7] is disabled. An error condition that pulls the RSTB pin low is not latched. When the error condition goes away, the RSTB pin is released and is pulled high if no other error condition exists. In addition to the PGOOD signals of the regulators, the IRQB pin also indicates the status of the overtemperature and undervoltage flags. The undervoltage and overtemperature faults cannot be masked. A fault that causes the IRQB pin to be pulled low is latched. When the fault condition is cleared, the IRQB pin is still maintained in its low state. The user needs to clear the interrupt by using a CLRINT command. 3675f 24 LTC3675 OPERATION On start-up, all PGOOD outputs are unmasked and a poweron reset will cause RSTB to be pulled low. Once all enabled regulators have their output PGOOD for 200ms typical (CT = 0.01μF) the RSTB output goes Hi-Z. By masking a PGOOD signal, the RSTB or IRQB pin will remain Hi-Z even though the output voltage of a regulator may be below its PGOOD threshold. However, when the status register is read back, the true condition of PGOOD is reported. UNDERVOLTAGE AND OVERTEMPERATURE FUNCTIONALITY The undervoltage (UV) circuit monitors the input supply voltage and shuts down all enabled regulators if the input voltage falls below 2.45V. The LTC3675 also provides a user with an undervoltage warning, which indicates to the user that the input supply voltage is approaching the UV threshold. The undervoltage warning threshold is user programmable as shown in Table 2. Table 2. UV Warning Thresholds UV[2], UV[1], UV[0] 000 (Default) 001 010 011 100 101 110 111 FALLING VIN WARNING THRESHOLD 2.7V 2.8V 2.9V 3.0V 3.1V 3.2V 3.3V 3.4V To prevent thermal damage to the LTC3675 and its surrounding components, the LTC3675 incorporates an overtemperature (OT) function. When the LTC3675 die temperature reaches 150°C all enabled regulators are shut down and remain in shutdown until the die temperature falls to 135°C. The LTC3675 also has an overtemperature warning function which warns a user that the die temperature is approaching the OT threshold which allows the user to take any corrective action. The OT warning threshold is user programmable as shown in Table 3. Table 3. OT Warning Thresholds OT[1], OT[0] 00 (Default) 01 10 11 OT WARNING THRESHOLD 10° Below OT 20° Below OT 30° Below OT 40° Below OT A UV or OT warning is reported to the user when the IRQB pin is in its high impedance state. The UV and OT warning flags are not maskable by the user. RESET_ALL Functionality: The RESET_ALL bit shuts down all enabled regulators (enabled either via its enable pin or I2C) for 1 second. All command registers are cleared and put in their default state. 3675f 25 LTC3675 APPLICATIONS INFORMATION Switching Regulator Output Voltage and Feedback Network The output voltage of the switching regulators is programmed by a resistor divider connected from the switching regulator’s output to its feedback pin and is given by VOUT = VFB (1 + R2/R1) as shown in Figure 5. Typical values for R1 range from 40kΩ to 1MΩ. The buck regulator transient response may improve with optional capacitor CFF that helps cancel the pole created by the feedback resistors and the input capacitance of the FB pin. Experimentation with capacitor values between 2pF and 22pF may improve transient response. VOUT SWITCHING REGULATOR (BUCK, BOOST, BUCK-BOOST) FB Buck Regulators All four buck regulators are designed to be used with 2.2μH inductors. Tables 4 and 5 show the recommended inductors for the 500mA and 1A buck regulators. The input supply needs to be decoupled with a 10μF capacitor while the output needs to be decoupled with a 22μF capacitor for a 1A buck regulator and 10μF for a 500mA buck regulator. Refer to Capacitor Selection in the Applications Information section for details on selecting a proper capacitor. Each buck regulator can be programmed via I2C. To program buck regulator 1 (1A) use sub-address 01h, buck regulator 2 (1A) sub-address 02h, buck regulator 3 (500mA) subaddress 03h and buck regulator4 (500mA) sub-address 04h. The bit format is explained in Table 6. Combined Buck Regulators A single 2A buck regulator is available by combining both 1A buck regulators together. Both the 500mA buck regulators may also be combined together to form a 1A buck regulator. Tables 4 and 7 show the recommended inductors. The input supply needs to be decoupled with a 22μF capacitor while the output needs to be decoupled with + R2 CFF COUT (OPTIONAL) R1 3675 F05 Figure 5. Feedback Components Table 4. Recommended Inductors for 1A Buck Regulators and Ganged Buck 3, Buck 4 Application PART NUMBER LPS4018-222 XFL4022-222 LTF5022-2R2 LPS3015-222 L(μH) 2.2 2.2 2.2 2.2 MAX IDC (A) 2.8 3.5 3.2 2.0 MAX DCR (mΩ) 70 21.35 36 110 SIZE IN mm (L × W × H) 4 × 4 × 1.8 4×4×2 5 × 5.2 × 2.2 3 × 3 × 1.5 MANUFACTURER Coilcraft www.coilcraft.com Coilcraft www.coilcraft.com TDK www.tdk.com Coilcraft www.coilcraft.com Table 5. Recommended Inductors for 500mA Buck Regulators PART NUMBER LPS3015-222 MLPS3015-2R2 MDT2520-CR2R2 LQM2HPN2R2 L(μH) 2.2 2.2 2.2 2.2 MAX IDC (A) 2.0 1.4 1.35 1.0 MAX DCR (mΩ) 110 110 90 120 SIZE IN mm (L × W × H) 3 × 3 × 1.5 3 × 3 × 1.5 2.5 × 2 × 1 2.5 × 2 × 1.1 MANUFACTURER Coilcraft www.coilcraft.com Maglayers www.maglayers.com Toko www.toko.com Murata www.murata.com 3675f 26 LTC3675 APPLICATIONS INFORMATION a 47μF capacitor for a 2A combined buck regulator and 22μF for a 1A combined buck regulator. Refer to “Capacitor Selection” in the Applications Information section for details on selecting a proper capacitor. Boost Regulator The boost regulator is designed to be used with a 2.2μH inductor. Table 8 provides a list of recommended inductors. Table 6. Buck Regulator Program Register Bit Format Bit7 Bit6 Bit5 Bit4 Bit3(DAC3) Bit2(DAC2) Bit1(DAC1) Bit0(DAC0) Enable OUT_Hi-Z Mode Slow Edge DAC Control Default is '0' which disables the part. A buck regulator can also be enabled via its enable pin. When enabled via pin, the contents of the I2C register program its functionality. Default is ‘1’ in which the SW node remains in a high impedance state when the regulator is in shutdown. A ‘0’ pulls the SW node to GND through a 10k resistor. Default is ‘1’ which is Burst Mode operation. A ‘0’ programs the regulator to operate in pulse-skipping mode. This bit controls the slew rate of the switch node. Default is '0' which enables the switch node to slew at a faster rate, than if the bit were programmed a '1'. These bits are used to program the feedback regulation voltage. Default is '1111' which programs a full-scale voltage of 800mV. Bits '0000' program the lowest feedback regulation of 425mV. A LSB (DAC0) has a bit weight of 25mV. The input supply needs to be decoupled with a 10μF capacitor while the output needs to be decoupled with two 22μF capacitors. Refer to Capacitor Selection in the Applications Information section for details on selecting a proper capacitor. The boost regulator can be programmed via I2C. To program the boost regulator, use sub-address 05h. The bit format is explained in Table 9. Table 7. Recommended Inductors for 2A Combined Buck Regulator PART NUMBER XFL4022-222 LPS6225-222 FDV0530-2R2 L(μH) 2.2 2.2 2.2 MAX IDC (A) 3.5 4 5.3 MAX DCR (mΩ) 21.35 45 17.3 SIZE IN mm (L × W × H) 4×4×2 6 × 6 × 2.5 6.2 × 5.8 × 3 MANUFACTURER Coilcraft www.coilcraft.com Coilcraft www.coilcraft.com Toko www.toko.com Table 8. Recommended Inductors for Boost Regulator and Buck-Boost Regulator PART NUMBER XFL4022-222 LTF5022-2R2 L(μH) 2.2 2.2 MAX IDC (A) 3.5 3.2 MAX DCR (mΩ) 21.35 36 SIZE IN mm (L × W × H) 4×4×2 5 × 5.2 × 2.2 MANUFACTURER Coilcraft www.coilcraft.com TDK www.tdk.com Table 9. Boost Regulator Program Register Bit Format Bit7 Bit6 Bit5 Bit4 Bit3(DAC3) Bit2(DAC2) Bit1(DAC1) Bit0(DAC0) Enable x Mode Slow Edge DAC Control Default is ‘0’ which disables the boost. Unused Mode = 0 is PWM mode, Mode = 1 is Burst Mode operation This bit controls the slew rate of the switch node. Default is ‘0’ which enables the switch node to slew at a faster rate than if the bit were programmed a ‘1.’ These bits are used to program the feedback regulation voltage. Default is ‘1111’ which programs a full-scale voltage of 800mV. Bits ‘0000’ program the lowest feedback regulation of 425mV. A LSB (DAC0) has a bit weight of 25mV. 3675f 27 LTC3675 APPLICATIONS INFORMATION Optional capacitor CFF is not needed and may compromise loop stability. Buck-Boost Regulator The buck-boost regulator is an internally compensated voltage mode regulator that is designed to be used with a 2.2μH inductor. Recommended inductors are listed in the Table 8. The input supply needs to be decoupled with a 10μF capacitor while the output needs to be decoupled with a 22μF capacitor. Refer to “Capacitor Selection” in the Applications Information section for details on selecting a proper capacitor. The buck-boost regulator can be programmed via I2C. To program the buck-boost regulator, use sub-address 06h. The bit format is explained in Table 10. Table 10. Buck-Boost Regulator Program Register Bit Format Bit7 Bit6 Bit5 Bit4 Bit3(DAC3) Bit2(DAC2) Bit1(DAC1) Bit0(DAC0) Enable x Mode Slow edge DAC control Default is ‘0’ which disables the buck-boost. The buck-boost regulator can alternately be enabled via its enable pin. When enabled via pin, the contents of the I2C register program its functionality. Unused Mode = 0 is PWM mode, Mode = 1 is Burst Mode operation. Default is ‘0.’ This bit controls the slew rate of the switch node. Default is ‘0’ which enables the switch node to slew at a faster rate than if the bit were programmed a ‘1.’ These bits are used to program the feedback regulation voltage. Default is ‘1111’ which programs a full-scale voltage of 800mV. Bits ‘0000’ program the lowest feedback regulation of 425mV. A LSB (DAC0) has a bit weight of 25mV. To ensure loop stability, feedback resistor R1 in Figure 5 should be no greater than 105kΩ. Optional capacitor CFF is not needed and may compromise loop stability. LED Driver For proper operation the LED driver boost circuit needs a 10μH inductor. Recommended inductors are listed in Table 11. The LED driver also needs a rectifier diode. Recommended schottky diodes are listed in Table 12. The LED driver has two registers that can be programmed via I2C. One of the registers is accessed at sub-address 07h and the bit format is as shown in Table 13. The rate at which the gradation circuit ramps the LED current is set by GRAD[2:0]. GRAD[2:0] sets the time the LED driver will take to transition through one LSB of LED current. Table 11. Recommended Inductors for LED Driver PART NUMBER LPS6225-103M IHLP2020BZER10RM01 L(μH) 10 10 MAX IDC (A) 2.1 4 MAX DCR (mΩ) 105 184 SIZE IN mm (L × W × H) 6 × 6 × 2.5 5.2 × 5.5 × 2 MANUFACTURER Coilcraft www.coilcraft.com Vishay www.vishay.com Table 12. Recommended Schottky Diodes for LED Driver PART NUMBER PD3S140 ZLLS1000 CTLSH1-40M322 IF (A) 1.0 1.16 1.0 MANUFACTURER Diodes Inc. www.diodes.com Diodes Inc./Zetex www.diodes.com Central Semiconductor www.centralsemi.com 3675f 28 LTC3675 APPLICATIONS INFORMATION Table 13. LED Driver Regulator Program Register 1 Bit Format Bit7 Bit6 Bit5 x Mode1 Mode0 Unused Mode1 = Mode0 = 0 is default; both LED pins are regulated. Mode1 = 0 Mode0 = 1; Only LED1 is regulated. (Single string application). Mode1 = 1 Mode0 = 0; LED driver is configured as a high voltage boost regulator. Mode1 = Mode0 = 1; Both LED pins are regulated, but boost is not powered up. In this mode an external voltage is needed to drive the LED’s. This bit controls the slew rate of the switch node. Default is ‘0’ which enables the switch node to slew at a faster rate than if the bit were programmed a ‘1.’ This bit doubles the full-scale programmed LED current. Default is ‘1.’ LED current gradation timing bits. Default is ‘111.’ See Table 14. Bit4 Bit3 Bit2(GRAD2) Bit1(GRAD1) Bit0(GRAD0) Slow Edge 2xFS DAC Control These times are shown in Table 14. The default state of 000 in GRAD[2:0] results in a very fast ramp time that cannot be visually perceived. Table 14. LED Gradation Bits GRAD2, GRAD1, GRAD0 000 001 010 011 100 101 110 111 (Default) GRADATION STEP TIME 0.056 ms 0.912 ms 1.824 ms 3.648 ms 7.296 ms 14.592 ms 29.184 ms 58.368 ms To maintain stability, the average inductor current must be maintained below 750mA. This limits the deliverable output current at low input supply voltages. Figure 8 gives an example of the LED driver configured as a high voltage boost regulator. Input and Output Decoupling Capacitor Selection The LTC3675 has multiple input supply pins and output pins. Each of these pins must be decoupled with low ESR capacitors to GND. These capacitors must be placed as close to the pins as possible. Ceramic dielectric capacitors are a good compromise between high dielectric constant and stability versus temperature and DC bias. Note that the capacitance of a capacitor deteriorates at higher DC bias. It is important to consult manufacturer data sheets and obtain the true capacitance of a capacitor at the DC bias voltage it will be operated at. For this reason, avoid the use of Y5V dielectric capacitors. The X5R/X7R dielectric capacitors offer good overall performance. The input supply voltage pins 6, 7, 10 and 40 all need to be decoupled with at least 10μF capacitors. The input supply pins 31 and 34 and the DVCC pin 41 need to be decoupled with 2.2μF capacitors. The outputs of the 1A buck regulators need 22μF capacitors, while the outputs of the 500mA buck regulators need 10μF capacitors. The buck-boost output regulator needs a 22μF decoupling capacitor. The boost regulator needs two 22μF output decoupling capacitors. The LED driver output pin should be decoupled with a 4.7μF capacitor. The LED DAC register is at sub-address 08h. All 8 bits in this register are used to control LED current. The default state of this register is 00h which disables the LED driver. See Table 1. Operating the LED Driver As a High Voltage Boost Regulator The LED driver may be configured as a high voltage boost regulator capable of producing an output voltage up to 40V. The boost mode may be programmed via I2C. In this mode, the LED_OV pin serves as the feedback pin. The feedback resistors are selected as discussed in the Switching Regulator Output voltage and Feedback Network section. The LED_FS pins must be tied to the input supply in this mode. When configured as a high voltage boost, the LED DAC register is ignored. 3675f 29 LTC3675 APPLICATIONS INFORMATION Choosing the CT Capacitor The CT capacitor may be used to program the timing parameters associated with the pushbutton. For a given CT capacitor the timing parameters may be calculated as . below. CT is in units of μF tONB_LO = 5000 × CT ms tPBSTAT_PW = 5000 × CT ms tONB_WAKE = 40000 × CT ms tWAKE_ON = 500 × CT seconds tONB_HR = 500 × CT seconds tHR = 100 × CT seconds Programming the UVOT Register The UV/OT warning byte (default 0000 0000) structure is as below: BIT7 RESET_ALL BIT6 UV[2] BIT5 UV[1] BIT4 UV[0] BIT3 Unused BIT2 Unused BIT1 OT[1] BIT0 OT[0] Programming the RSTB and IRQB Mask Registers The RSTB mask register can be programmed by the user at sub-address 0Ah and its format is as below. BIT7 Unused BIT6 PGOOD7 BIT5 PGOOD6 BIT4 PGOOD5 BIT3 PGOOD4 BIT2 PGOOD3 BIT1 PGOOD2 BIT0 PGOOD1 If a bit is set to ‘0,’ then the corresponding regulator’s PGOOD will pull RSTB low if a PGOOD fault were to occur. The default for this register is FFh. The IRQB mask register has the same bit format as the RSTB mask register. The IRQB mask register is located at sub-address 0Bh and its default contents are 00h. PGOOD7 is used only when the LED driver is configured as a high voltage boost regulator. 3675f 30 LTC3675 APPLICATIONS INFORMATION Status Byte Read Back When either the RSTB or IRQB pin is pulled low, it indicates to the user that a fault condition has occurred. To find out the exact nature of the fault, the user can read the status registers. There are two status registers. One register provides real time fault condition reporting while a second register latches data when an interrupt has occurred. Figure 4 shows the operation of the real time and latched status registers. The contents of the latched status register are cleared when a CLRINT signal is issued. A PGOOD bit is a ‘0’ if that regulator’s output voltage is more than 7.5% below its programmed value. The sub-address for the real time status register is 0Ch and its format is as follows: BIT7 Unused BIT6 Unused BIT5 PGOOD6 BIT4 PGOOD5 BIT3 PGOOD4 BIT2 PGOOD3 BIT1 PGOOD2 BIT0 PGOOD1 The sub-address for the latched status register is 0Dh and its format is as follows: BIT7 UV BIT6 OT BIT5 PGOOD6 BIT4 PGOOD5 BIT3 PGOOD4 BIT2 PGOOD3 BIT1 PGOOD2 BIT0 PGOOD1 A write operation cannot be performed to either of the status registers. PCB Considerations When laying out the printed circuit board, the following list should be followed to ensure proper operation of the LTC3675: 1. The exposed pad of the package (pin 45) should connect directly to a large ground plane to minimize thermal and electrical impedance. 2. All the input supply pins must be tied together and each supply pin should have a decoupling capacitor. 3. The switching regulator input supply pins and their respective decoupling capacitors should be kept as short as possible. The GND side of these capacitors should connect directly to the ground plane of the part. These capacitors provide the AC current to the internal power MOSFETs and their drivers. It’s important to minimize inductance from these capacitors to the VIN pins of the LTC3675. 4. The switching power traces connecting SW1, SW2, SW3, SW4, SW5, SWAB6, SWCD6 and SW7 to their respective inductors should be minimized to reduce radiated EMI and parasitic coupling. Due to the large voltage swing of the switching nodes, high input impedance sensitive nodes such as the feedback nodes and LED_OV node should be kept far away or shielded from the switching nodes or poor performance could result. 5. The GND side of the switching regulator output capacitors should connect directly to the thermal ground plane of the part. Minimize the trace length from the output capacitor to the inductor(s)/pin(s). 6. In a combined buck regulator application the trace length of switch nodes to the inductor must be kept equal to ensure proper operation. 3675f 31 LTC3675 TYPICAL APPLICATIONS Li-Ion CELL 2.7V TO 4.2V VIN 1μF 1.2V 25mA LDO_OUT 10μF 324k LDOFB 649k VIN 1μF 2.2μH 5V, 1A 22μF 22μF 22μF 1.05M FB5 200k 2.2μH SWAB6 SWCD6 VOUT6 10μF 322k FB6 105k 2.2μH SW4 DVCC I2C CONTROL 1μF SCL SDA 10μF IRQB RSTB WAKE PBSTAT EN1 EN2 EN3 EN4 EN6 CT 0.01μF ONB PUSH BUTTON EXPOSED PAD 10μH SW7 4.7μF 50V UP TO • 10 LEDS • • LED1 LED2 LED_OV LED_FS 20k 3675 F06 VIN 2.2μH SW1 324k FB1 649k VIN 2.2μH SW2 10μF 655k FB2 309k LTC3675 VIN 2.2μH SW3 590k FB3 475k 10μF 10μF 1.8V 500mA 22μF 2.5V 1A 22μF 10μF 1.2V 1A SW5 VOUT5 3.3V, 1A 511k FB4 511k 10μF 1.6V 500mA MICROPROCESSOR CONTROL • • • 1.96M 42.2k Figure 6. Detailed Front Page Application Circuit 3675f 32 LTC3675 TYPICAL APPLICATIONS Li-Ion CELL 2.7V TO 4.2V 1μF 1.2V 25mA LDO_OUT 10μF 324k LDOFB 649k VIN 10μF 2.2μH 2.2μH 5V, 1A 22μF 22μF 22μF 1.05M FB5 200k 2.2μH SWAB6 SWCD6 VOUT6 10μF 332k FB6 105k 2.2μH SW4 DVCC I2C CONTROL 1μF SCL SDA FB4 511k 511k 10μF 1.6V 500mA LTC3675 VIN 2.2μH SW3 590k FB3 475k 10μF 10μF 1.8V 500mA SW5 VOUT5 FB2 309k SW2 655k 22μF VIN 10μF 2.5V 1A FB1 649k VIN VIN 10μF 2.2μH SW1 324k 22μF 1.2V 1A 3.3V, 1A 10μF IRQB RSTB WAKE PBSTAT EN1 EN2 EN3 EN4 ENBB CT 0.01μF ONB PUSH BUTTON EXPOSED PAD 3675 F07 10μH SW7 4.7μF 50V UP TO • 10 LEDS • • LED1 LED2 LED_OV LED_FS 20k 42.2k 1.96M MICROPROCESSOR CONTROL Figure 7. Buck Regulators with Sequenced Start-Up and a Single String of LEDs. Buck Regulators Power-Up in the Sequence Buck1, Buck2 and Buck3 3675f 33 LTC3675 TYPICAL APPLICATIONS Li-Ion CELL 2.7V TO 4.2V VIN 1μF 1.2V 25mA LDO_OUT 10μF 324k LDOFB 649k VIN 1μF 2.2μH 5V, 1A 22μF SW5 VOUT5 22μF 22μF 1.05M FB5 200k 2.2μH SWAB6 SWCD6 VOUT6 10μF 332k FB6 105k FB3 649k DVCC I2C CONTROL 1μF SCL SDA LED_FS 10μF IRQB RSTB WAKE PBSTAT EN1 EN2 EN3 EN4 ENBB CT 0.01μF ONB PUSH BUTTON EXPOSED PAD 3675 F08 VIN 10μF 2.2μH SW1 SW2 FB1 309k VIN FB2 VIN 10μF 2.2μH SW3 22μF SW4 324k 1.2V 1A 10μF 655k 22μF 2.5V 2A 22μF LTC3675 3.3V, 1A FB4 10μH SW7 10μF 20V 12V 150mA MICROPROCESSOR CONTROL 1.87M LED_OV LED1 LED2 133k Figure 8. Combined Buck Regulators and a High Voltage Boost Regulator 3675f 34 LTC3675 PACKAGE DESCRIPTION UFFMA Package 44-Lead Plastic QFN (4mm × 7mm) (Reference LTC DWG # 05-08-1762 Rev A) 1.48 ±0.05 0.70 ±0.05 4.50 ±0.05 3.10 ±0.05 2.40 REF 2.56 ±0.05 1.70 ±0.05 2.02 ±0.05 2.76 ±0.05 0.98 ±0.05 2.64 ±0.05 PACKAGE OUTLINE 0.20 ±0.05 5.60 REF 6.10 ±0.05 7.50 ±0.05 0.40 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 0.05 0.00 – 0.05 4.00 0.10 2.40 REF 43 44 PIN 1 NOTCH R = 0.30 TYP OR 0.35 45 CHAMFER 0.40 0.10 1 2 PIN 1 TOP MARK (SEE NOTE 6) 2.64 ±0.10 2.56 ±0.10 7.00 0.10 5.60 REF 1.70 ±0.10 R = 0.10 TYP 0.74 ±0.10 R = 0.10 TYP 0.74 ±0.10 (UFF44MA) QFN REV A 0410 2.76 ±0.10 0.200 REF R = 0.10 TYP 0.98 ±0.10 0.20 0.05 0.40 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3675f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 35 LTC3675 TYPICAL APPLICATION Li-Ion CELL 2.7V TO 4.2V VIN 1μF 1.2V 25mA LDO_OUT 10μF 324k LDOFB 649k VIN 1μF 2.2μH 5V, 1A 22μF 22μF 22μF 1.05M FB5 200k 2.2μH SWAB6 SWCD6 VOUT6 10μF 332k FB6 105k 2.2μH SW4 DVCC I 2C CONTROL 1μF SCL SDA 10μF IRQB RSTB WAKE PBSTAT EN1 EN2 EN3 EN4 EN6 CT 0.01μF ONB PUSH BUTTON EXPOSED PAD 10μH SW7 4.7μF 50V UP TO • 10 LEDS • • LED1 LED2 LED_OV LED_FS 20k 3675 TA02 VIN 2.2μH SW1 324k FB1 649k VIN 2.2μH SW2 10μF 655k FB2 309k LTC3675 VIN 2.2μH SW3 590k FB3 475k 10μF 10μF 1.8V 500mA 22μF 2.5V 1A 22μF 10μF 1.2V 1A SW5 VOUT5 3.3V, 1A 511k FB4 511k 10μF 1.6V 500mA MICROPROCESSOR CONTROL • • • 1.96M 42.2k RELATED PARTS PART NUMBER DESCRIPTION LTC3569 Triple Buck Regulator with 1.2A and Two 600mA Outputs and Individual Programmable References LTC3577/ Highly Integrated Portable/Navigation PMIC LTC3577-1/ LTC3577-3/ LTC3577-4 LTC3586/ LTC3586-1 Switching USB Power Manager with Li-Ion/ Polymer Charger, 1A Buck-Boost + Dual Sync Buck Converter + Boost + LDO COMMENTS Triple, Synchronous, 100% Duty Cycle, PGOOD Pin, Programmable VFB Servo Voltage PMIC: Linear Power Manager and Three Buck Regulators, 10-LED Boost Regulator, Synchronous Bucks ADJ at 800mA/500mA/500mA, PB Control, I2C Interface, 2× 150mA LDOs, OVP Charge Current Programmable Up to 1.5A from Wall Adapter Input, Thermal Regulation, 4mm × 7mm QFN-44 Package; "-1" and "-4" Versions Have 4.1V VFLOAT, "-3" Version for SiRF Atlas IV Processors PMIC: Switching Power Manager, 1A Buck-Boost + 2 Bucks ADJ to 0.8V at 400mA/ 400mA + 800mA Boost + LDO, Charge Current Programmable Up to 1.5A from Wall Adapter Input, 4mm × 6mm QFN-38 Package; "-1" Version Has 4.1V VFLOAT 3675f LT 0810 • PRINTED IN USA 36 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010
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