LTC3722

LTC3900 Synchronous Rectifier Driver for Forward Converters FeaTures n n n n n n n n DescripTion The LTC®3900 is a secondary-side synchronous rectifier driver designed to be used in isolated forward converter power supplies. The chip drives N-channel rectifier MOSFETs and accepts pulse sychronization from the primary-side controller via a pulse transformer. The LTC3900 incorporates a full range of protection for the external MOSFETs. A programmable timeout function is included that disables both drivers when the synchronization signal is missing or incorrect. Additionally, the chip senses the output inductor current through the drain-source resistance of the catch MOSFET, shutting off the MOSFET if the inductor current reverses. The LTC3900 also shuts off the drivers if the supply voltage is too low. L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. N-Channel Synchronous Rectifier MOSFET Driver Programmable Timeout Protection Reverse Inductor Current Protection Pulse Transformer Synchronization Wide VCC Supply Range: 4.5V to 11V 15ns Rise/Fall Times at VCC = 5V, CL = 4700pF Undervoltage Lockout Small SO-8 Package applicaTions n n n n n 48V Input Isolated DC/DC Converters Isolated Telecom Power Supplies High Voltage Distributed Power Step-Down Converters Industrial Control System Power Supplies Automotive and Heavy Equipment Typical applicaTion VIN 36V TO 72V ISOLATION BARRIER D3 T1 GATE Q1 OUT OC ISENSE LT1952 SOUT GND COMP 470 10m CSG SG T2 RSYNC 270 VIN OCI GND OC OPTO LT4430 COMP FB R2 3900 F01 L0 COUT CZ RCS2 RCS1 Q4 RCS3 FG RZ RB DZ QREG + VOUT 3.3V 40A Efficiency 95 90 VOUT = 3.3V VIN = 36V Q3 CS+ CG CS– LTC3900 TIMER VCC EFFICIENCY (%) 85 80 75 70 65 VIN = 72V VIN = 48V RTMR CVCC CTMR SYNC GND 0 5 10 R1 15 20 25 30 LOAD CURRENT (A) 35 40 3900 F10b Figure 1. Simplified Isolated Synchronous Forward Converter 3900fb 1 LTC3900 absoluTe MaxiMuM raTings (Note 1) pin conFiguraTion TOP VIEW CS+ 1 CS– 2 8 7 6 5 SYNC TIMER GND FG Supply Voltage VCC........................................................................12V Input Voltage CS –, TIMER .............................. – 0.3V to (VCC +0.3V) SYNC ...................................................... –12V to 12V Input Current CS+ ....................................................................15mA Operating Junction Temperature Range (Note 2) LTC3900E........................................... –40°C to 125°C LTC3900I............................................ –40°C to 125°C LTC3900H .......................................... –40°C to 150°C LTC3900MP ....................................... –55°C to 150°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) .................. 300°C CG 3 VCC 4 S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 130°C/W orDer inForMaTion LEAD FREE FINISH LTC3900ES8#PBF LTC3900IS8#PBF LTC3900HS8#PBF LTC3900MPS8#PBF LEAD BASED FINISH LTC3900ES8 LTC3900IS8 LTC3900HS8 LTC3900MPS8 TAPE AND REEL LTC3900ES8#TRPBF LTC3900IS8#TRPBF LTC3900HS8#TRPBF LTC3900MPS8#TRPBF TAPE AND REEL LTC3900ES8#TR LTC3900IS8#TR LTC3900HS8#TR LTC3900MPS8#TR PART MARKING* 3900 3900 3900 3900 PART MARKING* 3900 3900 3900 3900 PACKAGE DESCRIPTION 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline PACKAGE DESCRIPTION 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C –40°C to 150°C –55°C to 150°C TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C –40°C to 150°C –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ elecTrical characTerisTics SYMBOL VCC VUVLO IVCC Timer V TMR ITMR Timer Threshold Voltage Timer Input Current PARAMETER Supply Voltage Range VCC Undervoltage Lockout Threshold VCC Undervoltage Lockout Hysteresis VCC Supply Current The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise specified. (Notes 2, 3) CONDITIONS l MIN 4.5 l l l TYP 5 4.1 0.5 0.5 7 MAX 11 4.5 1 15 10% –10 UNITS V V V mA mA V µA 3900fb Rising Edge Rising Edge to Falling Edge VSYNC = 0V fSYNC = 100kHz, CFG = CCG = 4700pF (Note 4) l –10% VCC/5 –6 V TMR = 0V l 2 LTC3900 elecTrical characTerisTics SYMBOL tTMRDIS V TMRMAX Current Sense ICS+ ICS – VCSMAX VCS SYNC Input ISYNC VSYNCP VSYNCN Driver Output RONH RONL IPK td tSYNC t r, t f Driver Pull-Up Resistance IOUT = –100mA LTC3900E/LTC3900I LTC3900H/LTC3900MP IOUT = 100mA LTC3900E/LTC3900I LTC3900H/LTC3900MP (Note 6) CFG = CCG = 4700pF, VSYNC = ±5V LTC3900E/LTC3900I LTC3900H/LTC3900MP VSYNC = ±5V CFG = CCG = 4700pF, VSYNC = ±5V 0.9 l l The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise specified. (Notes 2, 3) PARAMETER Timer Discharge Time Timer Pin Clamp Voltage CS+ Input Current CS – Input Current CS+ Pin Clamp Voltage Current Sense Threshold Voltage CONDITIONS CTMR = 1000pF, RTMR = 4.7k CTMR = 1000pF, RTMR = 4.7k VCS+ = 0V VCS – = 0V IIN = 5mA, VSYNC = – 5V VCS – = 0V LTC3900E/LTC3900I (Note 5) LTC3900H/LTC3900MP (Note 5) VSYNC = ±10V (Note 6) l l l l l l MIN TYP 40 2.5 MAX 120 UNITS ns V ±1 ±1 11 7.5 3 1 10.5 13.5 18 20 ±10 1.8 –1.0 µA µA V mV mV mV µA V V V V Ω Ω Ω Ω Ω Ω A SYNC Input Current SYNC Input Positive Threshold SYNC Positive Input Hysteresis SYNC Input Negative Threshold SYNC Negative Input Hysteresis l l ±1 1.0 –1.8 1.4 0.2 –1.4 0.2 (Note 6) 1.2 1.6 2.0 1.2 1.6 2.0 Driver Pull-Down Resistance 0.9 l l Driver Peak Output Current SYNC Input to Driver Output Delay 2 Switching Characteristics (Note 7) l l l 60 75 15 120 150 ns ns ns ns Minimum SYNC Pulse Width Driver Rise/Fall Time Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3900 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3900E is guaranteed to meet performance specifications from 0°C to 85°C operating junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3900I is guaranteed over the –40°C to 125°C operating junction temperature range. The LTC3900H is guaranteed over the full –40°C to 150°C operating junction temperature range. The LTC3900MP is guaranteed and tested over the full –55°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in watts) according to the formula: TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal impedance. Note 3: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 4: Supply current in normal operation is dominated by the current needed to charge and discharge the external MOSFET gates. This current will vary with supply voltage, switching frequency and the external MOSFETs used. Note 5: The current sense comparator threshold has a 0.33%/°C temperature coefficient (TC) to match the TC of the external MOSFET RDS(ON). Note 6: Guaranteed by design, not subject to test. Note 7: Rise and fall times are measured using 10% and 90% levels. Delay times are measured from ±1.4V at SYNC input to 20%/80% levels at the driver output. 3900fb 3 LTC3900 Typical perForMance characTerisTics 5.25 5.20 5.15 5.10 TIMEOUT (µs) TIMEOUT (µs) 5.05 5.00 4.95 4.90 4.85 4.80 4.75 4 5 6 8 7 VCC (V) 9 10 11 Timeout vs VCC TA = 25°C RTMR = 51k CTMR = 470pF Timeout vs Temperature 5.25 5.20 5.15 5.10 5.05 5.00 4.95 4.90 4.85 4.80 4.75 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3900 G02 TIMEOUT (µs) VCC = 5V RTMR = 51k CTMR = 470pF 10 Timeout vs RTMR TA = 25°C 9 VCC = 5V = 470pF C 8 TMR 7 6 5 4 3 2 1 0 0 10 20 30 40 50 60 70 80 90 100 RTMR (k ) 3900 G03 3900 G01 Current Sense Threshold vs Temperature 17 CURRENT SENSE THRESHOLD (mV) 15 13 11 9 7 5 3 –75 –50 –25 75 100 125 150 TEMPERATURE (°C) 3900 G04 VCS(MAX) Clamp Voltage vs CS+ Input Current 18 17 VCS(MAX) CLAMP VOLTAGE (V) 16 15 14 13 12 11 TA = 25°C SYNC POSITIVE THRESHOLD (V) 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 SYNC Positive Threshold vs Temperature VCC = 5V, 11V VCC = 11V VCC = 5V 0 25 50 10 0 5 CS + INPUT CURRENT (mA) 10 15 20 25 30 3900 G05 1.0 –75 –50 –25 0 25 50 75 100 125 150 3900 G06 TEMPERATURE (°C) SYNC Negative Threshold vs Temperature –1.0 SYNC NEGATIVE THRESHOLD (V) –1.1 –1.2 –1.3 –1.4 –1.5 –1.6 –1.7 –1.8 –75 –50 –25 75 100 125 150 TEMPERATURE (°C) 3900 G07 Propagation Delay vs VCC 120 110 PROPAGATION DELAY (ns) 100 90 80 70 60 50 SYNC TO CG 4 5 6 7 8 9 10 11 SYNC TO FG TA = 25°C CLOAD = 4.7nF PROPAGATION DELAY (µs) 120 110 100 90 80 70 60 50 Propagation Delay vs Temperature VCC = 5V CLOAD = 4.7nF VCC = 5V, 11V SYNC TO FG SYNC TO CG 0 25 50 40 40 –75 –50 –25 0 25 50 75 100 125 150 3900 G09 VCC (V) 3900 G08 TEMPERATURE (°C) 3900fb 4 LTC3900 Typical perForMance characTerisTics Propagation Delay vs CLOAD 120 110 PROPAGATION DELAY (ns) 100 90 80 70 60 50 40 1 2 3 4 6 7 CLOAD (nF) 5 8 9 10 SYNC TO FG SYNC TO CG TA = 25°C VCC = 5V RISE/FALL TIME (ns) 50 45 40 35 30 25 20 15 10 5 0 4 FALL TIME RISE TIME Rise/Fall Time vs VCC TA = 25°C CLOAD = 4.7nF RISE/FALL TIME (ns) Rise/Fall Time vs Temperature 50 45 40 35 30 25 20 15 10 5 RISE TIME FALL TIME VCC = 5V CLOAD = 4.7nF 5 6 7 8 9 10 11 0 –75 –50 –25 VCC (V) 3900 G10 3900 G11 0 25 50 75 100 125 150 TEMPERATURE (°C) 3900 G12 Rise/Fall Time vs Load Capacitance 50 45 40 RISE/FALL TIME (ns) 35 30 25 20 15 10 5 0 0 1 2 3 4 56 CLOAD (nF) 7 8 9 10 RISE TIME FALL TIME UNDERVOLTAGE LOCKOUT THRESHOLD VOLTAGE (V) TA = 25°C VCC = 5V 4.4 4.2 4.0 3.8 3.6 3.4 3.2 Undervoltage Lockout Threshold Voltage vs Temperature RISING EDGE FALLING EDGE 3.0 –75 –50 –25 0 25 50 75 100 125 150 3900 G14 3900 G13 TEMPERATURE (°C) VCC Supply Current vs Temperature 20 18 VCC SUPPLY CURRENT (mA) 16 14 12 10 8 6 4 –75 –50 –25 75 100 125 150 TEMPERATURE (°C) 0 50 3900 G15 VCC Supply Current vs Load Capacitance 30 25 SUPPLY CURRENT (mA) TA = 25°C fSYNC = 100kHz VCC = 11V CLOAD = 4.7nF VCC = 11V 20 15 10 VCC = 5V 5 0 VCC = 5V 25 0 1 2 3 4 56 CLOAD (nF) 7 8 9 10 3900 G16 3900fb 5 LTC3900 pin FuncTions CS+, CS– (Pin 1, 2): Current Sense Differential Input. Connect CS+ through a series resistor to the drain of the external catch MOSFET, Q4. Connect CS– to the source. The LTC3900 monitors the CS inputs 250ns after CG goes high. If the inductor current reverses and flows into the MOSFET causing CS+ to rise above CS– by more than 10.5mV, the LTC3900 pulls CG low. See the Current Sense section for more details on choosing the resistance value for RCS1 to RCS3. CG (Pin 3): Catch MOSFET Gate Driver. This pin drives the gate of the external N-channel catch MOSFET, Q4. VCC (Pin 4): Main Supply Input. This pin powers the drivers and the rest of the internal circuitry. Bypass this pin to GND using a 4.7µF ceramic capacitor in close proximity to the LTC3900. FG (Pin 5): Forward MOSFET Gate Driver. This pin drives the gate of the external N-channel forward MOSFET, Q3. GND (Pin 6): The VCC bypass capacitor should be connected directly to this GND pin. TIMER (Pin 7): Timer Input. Connect this pin to an external R-C network to program the timeout period. The LTC3900 resets the timer at every negative transition of the SYNC input. If the SYNC signal is missing or incorrect, the LTC3900 pulls both CG and FG low once the TIMER pin goes above the timeout threshold. See the Timer section for more details on programming the timeout period. SYNC (Pin 8): Driver Synchronization Input. This input is signal edge sensitive. A negative voltage slew at SYNC forces FG to pull high and CG to pull low. A positive voltage slew at SYNC forces FG to pull low and CG to pull high. The SYNC input can accept both pulse or square wave signals. block DiagraM +1.4V –1.4V SYNC 8 CS+ 1 CS– 2 S+ S– SYNC+ SYNC– SYNC AND DRIVER LOGIC TIMER RESET 4 VCC 5 FG –+ 10.5mV IS ZCS 11V TMR DISABLE DRIVER UVLO R1 180k R2 45k 3 CG TIMER 7 ZTMR 0.5 • VCC MTMR 3900 BD 6 GND 3900fb 6 LTC3900 applicaTions inForMaTion Overview In a typical forward converter topology, a power transformer is used to provide the functions of input/output isolation and voltage step-down to achieve the required low output voltage. Schottky diodes are often used on the secondary-side to provide rectification. Schottky diodes, though easy to use, result in a loss of efficiency due to relatively high voltage drops. To improve efficiency, synchronous output rectifiers utilizing N-channel MOSFETs can be used instead of Schottky diodes. The LTC3900 provides all of the necessary functions required to drive the synchronous rectifier MOSFETs. Figure 1 shows a simplified forward converter application. T1 is the power transformer; Q1 is the primary-side power transistor driven by the primary controller, LT1952 output (OUT). The pulse transformer T2 provides synchronization and is driven by LT1952 synchronization signal, SOUT or SG from the primary controller. Q3 and Q4 are secondary-side synchronous switches driven by the LTC3900’s FG and CG output. Inductor LO and capacitor COUT form the output filter to provide a steady DC output voltage for the load. Also shown in Figure 1 is the feedback path from VOUT through the optocoupler driver LT4430 and an optocoupler, back to the primary controller to regulate VOUT. Each full cycle of the forward converter operation consists of two periods. In the first period, Q1 turns on and the primary-side delivers power to the load through T1. SG goes high and T2 generates a negative pulse at the LTC3900 SYNC input. The LTC3900 forces FG to turn on and CG to turn off, Q3 conducts. Current flows to the GATE (OUT) SG (SOUT) load through Q3, T1 and LO. In the next period, Q1 turns off, SG goes low and T2 generates a positive pulse at the LTC3900 SYNC input. The LTC3900 forces FG to turn off and CG to turn on, Q4 conducts. Current continues to flow to the load through Q4 and LO. Figure 2 shows the LTC3900 synchronization waveforms. External MOSFET Protection A programmable timer and a differential input current sense comparator are included in the LTC3900 for protection of the external MOSFET during power down and Burst Mode® operation. The chip also shuts off the MOSFETs if VCC < 4.1V. When the primary controller is powering down, the primary controller shuts down first and the LTC3900 continues to operate for a while by drawing power from the VCC bypass cap, CVCC. The SG signal stops switching and there is no SYNC pulse to the LTC3900. The LTC3900 keeps one of the drivers turned on depending on the polarity of the last SYNC pulse. If the last SYNC pulse is positive, CG will remain high and the catch MOSFET, Q4 will stay on. The inductor current will start falling down to zero and continue going in the negative direction due to the voltage that is still present across the output capacitor (the current now flows from COUT back to LO). If Q4 is turned off while the inductor current is negative, the inductor current will produce high voltage across Q4, resulting in a MOSFET avalanche. Depending on the amount of energy stored in the inductor, this avalanche energy may damage Q4. SYNC FG CG 3900 F02 Figure 2. Synchronization Waveforms 3900fb 7 LTC3900 applicaTions inForMaTion The timer circuit and current sense comparator in LTC3900 are used to prevent reverse current buildup in the output inductor. Timer Figure 3 shows the LTC3900 timer internal and external circuits. The timer operates by using an external R-C charging network to program the time-out period. On every negative transition at the SYNC input, the chip generates a 200ns pulse to reset the timer cap. If the SYNC signal is missing or incorrect, allowing the timer cap voltage to go high, it shuts off both drivers once the voltage reaches the time-out threshold. Figure 4 shows the timer waveforms. A typical forward converter cycle always turns on Q3 and Q4 alternately and the SYNC input should alternate between positive and negative pulses. The LTC3900 timer also includes sequential logic to monitor the SYNC input sequence. If after one negative pulse, the SYNC comparator receives another negative pulse, the LTC3900 will not reset the timer cap. If no positive SYNC pulse appears, both drivers are shut off once the timer times out. Once positive pulses reappear the timer resets and the drivers start switching again. This is to protect the external components in situations where only negative SYNC pulse is present and FG output remains high. Figure 5 shows the timer waveforms with incorrect SYNC pulses. The LTC3900 has two separate SYNC comparators (S+ and S– in the Block Diagram) to detect the positive and negative pulses. The threshold voltages of both comparators are designed to be of the same magnitude (1.4V typical) but opposite in polarity. In some situations, for example during power up or power down, the SYNC pulse magnitude may be low, slightly higher or lower than the threshold of the comparators. This can cause only one of the SYNC comparators to trip. This also appears as incorrect SYNC pulse and the timer will not reset. The timeout period is determined by the external RTMR and CTMR values and is independent of the VCC voltage. This is achieved by making the timeout threshold a ratio of VCC. The ratio is 0.2x, set internally by R1 and R2 (see Figure 3). The timeout period should be programmed to be around one period of the primary switching frequency using the following formula: TIMEOUT = 0.2 • RTMR • CTMR + 0.27E-6 To reduce error in the timeout setting due to the discharge time, select CTMR between 100pF and 1000pF Start with a . CTMR around 470pF and then calculate the required RTMR. CTMR should be placed as close as possible to the LTC3900 with minimum PCB trace between CTMR, the TIMER pin and GND. This is to reduce any ringing caused by the PCB trace inductance when CTMR discharges. This ringing may introduce error to the timeout setting. The timer input also includes a current sinking clamp circuit (ZTMR in Figure 3) that clamps this pin to about 0.5 • VCC if there is missing SYNC/timer reset pulse. This clamp circuit prevents the timer cap from getting fully charged up to the rail, which results in a longer discharge SG R2 R1 VCC 4 RTMR 7 SYNC LAST PULSE FG CG TIMER RESET (INTERNAL) TMR TIMEOUT TIMER RESET ZTMR CTMR 3900 F03 TIMER TIMEOUT THRESHOLD 3900 F04 Figure 3. Timer Circuit Figure 4. Timer Waveforms 3900fb 8 LTC3900 applicaTions inForMaTion time. The current sinking capability of the circuit is around 1mA. The timeout function can be disabled by connecting the timer pin to GND. Current Sense The differential input current sense comparator is used for sensing the voltage across the drain-to-source terminals of Q4 through the CS+ and CS– pins. If the inductor current reverses into the Q4 causing CS+ to rise above CS– by more than 10.5mV, the LTC3900 pulls CG low. This comparator is used to prevent inductor reverse current buildup during power down or Burst Mode operation, which may cause damage to the MOSFET. The 10.5mV input threshold has a positive temperature coefficient, which closely matches the TC of the external MOSFET RDS(ON). The current sense comparator is only active 250ns after CG goes high; this is to avoid any ringing immediately after Q4 is switched on. Under light load conditions, if the inductor average current is less than half of its peak-to-peak ripple current, the inductor current will reverse into Q4 during a portion of the switching cycle, forcing CS+ to rise above CS–. The current sense comparator input threshold is set at TIMER DO NOT RESET AT SECOND NEGATIVE SYNC PULSE 10.5mV to prevent tripping under light load conditions. If the product of the inductor negative peak current and MOSFET RDS(ON) is higher than 10.5mV, the LTC3900 will operate in discontinuous current mode. Figure 6 shows the LTC3900 operating in discontinuous current mode; the CG output goes low before the next negative SYNC pulse, as soon as the inductor current becomes negative. Discontinuous current mode is sometimes undesirable. To disable discontinuous current mode operation, add a resistor divider, RCS1 and RCS2 at the CS+ pin to increase the 10.5mV threshold so that the LTC3900 operates in continuous mode at no load. The LTC3900 CS+ pin has an internal current sinking clamp circuit (ZCS in the Block Diagram) that clamps the pin to 11V. The clamp circuit is to be used together with the external series resistor, RCS1 to protect the CS+ pin from high Q4 drain voltage in the power transfer cycle. During the power transfer cycle, Q4 is off, the drain voltage of Q4 is determined by the primary input voltage and the transformer turns ratio. This voltage can be high and may damage the LTC3900 if CS+ is connected directly to the drain of Q4. The current sinking capability of the clamp circuit is 5mA minimum. MISSING/LOW POSITIVE SYNC PULSE SYNC TIMER RESET AFTER RECEIVING POSITIVE SYNC PULSE SG SYNC FG FG CG CG TIMER RESET (INTERNAL) TIMEOUT TIMEOUT THRESHOLD TIMER 3900 F05 INDUCTOR CURRENT 0A CURRENT SENSE COMPARATOR TRIP 3900 F06a Figure 6a. Discontinuous Current Mode Operation at No Load Figure 5. Timer Waveforms with Incorrect SYNC Pulses 3900fb 9 LTC3900 applicaTions inForMaTion The value of the resistors, RCS1, RCS2 and RCS3, should be calculated using the following formulas to meet both the threshold and clamp voltage requirements: k = 48 • IRIPPLE • RDS(ON) –1 RCS2 = {200 • VIN(MAX) • (NS/NP) –2200 • (1 + k)} /k RCS1 = k • RCS2 RCS3 = {RCS1 • RCS2} / {RCS1 + RCS2} If k = 0 or less than zero, RCS2 is not needed and RCS1 = RCS3 = {VIN(MAX) • (NS/NP) – 11V} / 5mA where: IRIPPLE = Inductor peak-to-peak ripple current RDS(ON) = On-resistance of Q4 at IRIPPLE/2 VIN(MAX) = Primary side main supply maximum input voltage NS/NP = Power transformer T1, turn ratio If the LTC3900 still operates in discontinuous mode with the calculated resistance value, increase the value of RCS1 to raise the threshold. The resistors RCS1 and RCS2 and the CS+ pins input capacitance plus the PCB trace capacitance form an R-C delay; this slows down the response time of the comparator. The resistors and CS+ input leakage currents also create an input offset error. To minimize this delay and error, do not use resistance value higher than required and make the PCB trace from the resistors to the LTC3900 CS+/CS– pins as short as possible. Add a series resistor, RCS3 with value equal to parallel sum of RCS1 and RCS2 to the CS– pin and connect the other end of RCS3 directly to the source of Q4. SYNC Input Figure 7 shows the external circuit for the LTC3900 SYNC input. With a selected type of pulse transformers, the values of the CSG and RSYNC should be adjusted to obtain an optimum SYNC pulse amplitude and width. A bigger capacitor, CSG, generates a higher and wider SYNC pulse. The peak of this pulse should be much higher than the typical LTC3900 SYNC threshold of ±1.4V. Amplitudes greater than ±5V will help to speed up the SYNC comparator and reduce the SYNC to drivers propagation delay. The pulse width should be wider than 75ns. Overshoot during the pulse transformer reset interval must be minimized and kept below the minimum SYNC threshold of ±1V. The amount of overshoot can be reduced by having a smaller RSYNC. PRIMARY CONTROLLER SG (SOUT) CSG 220pF T2 LTC3900 SYNC RSYNC 470 T2: COILCRAFT Q4470B OR PULSE P0926 SYNC 3900 F07 Figure 7. SYNC Input Circuit FG CG INDUCTOR CURRENT ADJUSTED CURRENT SENSE THRESHOLD 0A 3900 F06b Figure 6b. Continuous Current Mode Operation with Adjusted Current Sense Threshold 3900fb 10 LTC3900 applicaTions inForMaTion An alternative method of generating the SYNC pulse is shown in Figure 8. This circuit produces square SYNC pulses with amplitude dependent on the logic supply voltage. The SYNC pulse width can be adjusted with R1 and C1 without affecting the pulse amplitude. For nonisolated applications, the SYNC input can be driven directly by a bipolar square pulse. To reduce the propagation delay, make the positive and negative magnitude of the square wave much greater than the ±1.4V SYNC threshold. VCC Regulator The VCC supply for the LTC3900 can be generated by peak rectifying the transformer secondary winding as shown in Figure 9. The Zener diode DZ sets the output voltage to (VZ – 0.7V). A resistor, RB (on the order of a few hundred ohms), in series with the base of QREG may be required to surpress high frequency oscillations depending on QREG’s selection. The LTC3900 has an UVLO detector that pulls the drivers output low if VCC < 4.1V. The UVLO detector has 0.5V of hysteresis to prevent chattering. In a typical forward converter, the secondary-side circuits have no power until the primary-side controller starts operating. Since the power for biasing the LTC3900 is derived from the power transformer T1, the LTC3900 will initially remain off. During that period (VCC < 4.1V), the output rectifier MOSFETs Q3 and Q4 will remain off and the MOSFETs body diodes will conduct. The MOSFETs may experience very high power dissipation due to a high voltage drop in the body diodes. To prevent MOSFET damage, VCC voltage greater than 4.1V should be provided quickly. The VCC supply circuit shown in Figure 9 will provide power for the LTC3900 within the first few switching pulses of the primary controller, preventing overheating of the MOSFETs. MOSFET Selection The required MOSFET RDS(ON) should be determined based on allowable power dissipation and maximum required output current. The body diodes conduct during the power-up phase, when the LTC3900 VCC supply is ramping up. The CG and FG signals stay low and the inductor current flows through the body diodes. The body diodes must be able to handle the load current during start-up until VCC reaches 4.1V. The LTC3900 drivers dissipate power when switching MOSFETs. The power dissipation increases with switching frequency, VCC and size of the MOSFETs. To calculate PRIMARY CONTROLLER SG 74HC14 R1 470 C1 220pF 74HC14 74HC132 T2 LTC3900 SYNC RSYNC 470 T1 SECONDARY WINDING D3 MBR0540 RZ 2k 0.1µF RB 10 QREG BCX55 VCC CVCC 4.7µF 3900 F09 DZ 7.5V SG SYNC 3900 F08 Figure 9. VCC Regulator Figure 8. Symmetrical SYNC Drive 3900fb 11 LTC3900 applicaTions inForMaTion the driver dissipation, the total gate charge QG is used. This parameter is found on the MOSFET manufacturers data sheet. The power dissipated in each LTC3900 MOSFET driver is: PDRIVER = QG • VCC • fSW where fSW is the switching frequency of the converter. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3900 for your layout: 1. Connect the 4.7µF bypass capacitor as close as possible to the VCC and GND pins. 2. Connect the two MOSFET drain terminals directly to the transformer. The two MOSFET sources should be as close together as possible. 3. Keep the timer, SYNC and VCC regulator circuit away from the high current path of Q3, Q4 and T1. 4. Place the timer capacitor, CTMR, as close as possible to the LTC3900. 5. Keep the PCB trace from the resistors RCS1, RCS2 and RCS3 to the LTC3900 CS+/CS– pins as short as possible. Connect the other ends of the resistors directly to the drain and source of the MOSFET, Q4. Typical applicaTions 36V to 72V, 3.3V at 40A Synchronous Forward Converter 47k 82k 18V VB1 BAS516 0.1µF 12V Q2 PH3230 2x Q3 PH3230 2x LTC3900 5 6 SD_VSEC ROSC BLANK SS_MAXDC LT1952 VR = 2.5V COMP FB = 1.23V OUT VIN GND PGND DELAY OC ISENSE SOUT 14 15 8 13 12 11 10 16 470 220pF Q4470-B VB1 L1: PA0713, PULSE ENGINEERING ALL CAPACITORS X7R, CERAMIC, TDK 39k BAT760 1nF 0.010R 1nF 560R VB1 Si7846 1µF 8V BIAS 4 8 FG GND VCC 1 CS+ CS– 2 7 1nF CG 3 10k 10k COUT 100µF 3x PA0912.002 L1 +VIN 36V TO 72V •• BCX55 VOUT 3.3V, 40A 10k 2.2µF • 370k 13.2k 115k 27k 0.22µF 7 3 9 5 59k 10k 6 33k 1 2 2.2k 22k SYNC TIMER 15k 8V BIAS 0.1µF C13 1µF C14 33nF 12 •• R22 270 NEC PS2701 C16 10pF C15 R23 6.8nF 3.3k R24 27.4k 1% 8V BIAS 6 OPTO LT4430 5 2 GND COMP 1 VIN 3 OC FB 4 R25 6.04k 1% 3900 TA01 3900fb LTC3900 Typical applicaTions 36V to 72V Input to 12V and 24V (or ± 12V), 2A Output Converter in 1/8th Brick Footprint VIN 36V TO 72V 82k BCX56 1.5mH 2 BAS516 VIN 1 3 4 VFB 22k BC857BF 1.2k 115k 33k LT1952-1 1 2 3 4 0.1µF 5 6 7 13.3k 8 COMP FB = 1.23V ROSC SYNC MAXDC VR = 2.5V SD GND 0.47µF 340k VIN 22k 56k SOUT VIN OUT PGND DELAY OC ISENSE BLANK 16 15 14 13 12 11 10 9 82k VAUX VOUT1 1k BCX55 1µF PDZ7.5B Q2, Q3, Q4, Q5 = Si7850 PS2801-1 VU1 VFB BAS516 1µF 470R VAUX LT4430 VCC GND OC OPTO COMP FB 680 100pF 145k 10k 10k CG 1 2 3 4 LTC3900 CS+ CS– CG VCC 38.3k SYNC TIMER GND FG 8 7 6 5 FG 470pF 560R PE-68386 220pF SOUT VU1 1µF Si7462 VU1 • • • 7 9 FG Q2 0.1µF CG 10k BAS516 L1: DRQ127-220 L1A • Q3 0.1µF VOUT2 24V 2A 2.2µF PDZ10B • 8 10 10k BAS516 L1B + 150µF 16V • • Q4 FG 47k CG Q5 VOUT1 12V 2A T1 PA1577 0.030R 33µF 16V • • SOUT 1 2 3 6 5 3.92k 4 5.23k 33pF 15nF 100k VOUT1 3900 TA02 The LTC3900 can drive multiple synchronous output rectifiers. The 12V and 24V or ±12V output converter has good cross regulation due to low voltage drops in the output MOSFETs. Other combinations like 3.3V and –5V or 1.5V and 5V can be easily achieved by changing the transformer turns ratio. 3900fb 13 LTC3900 Typical applicaTions 18V to 40V Input to 14V at 14A Output Converter in 1/4 Brick Footprint VIN 18V TO 40V 22k PZTA42 VU1 1.5mH PA1494.362 VOUT1 14V 14A 1 BAS516 6 7 11 •• 2, 3 4, 5 HAT2266 CG 6.8µF ×4 PDZ10B + 33µF FG 150µF PXE VIN 40R2-4421.003 1 220pF BAS516 2 3 4 5 255R LTC4441 PGND BL RBL SGND OUT DRVCC VIN FB 10 9 8 7 6 VR VU1 255R 2.2µF 57.6k SOUT GATE 22k 33k LT1952-1 1 2 115k 3 4 0.1µF 0.47µF 5 6 7 13.3k 165k VIN VR 8 22k COMP FB = 1.23V ROSC SYNC MAXDC VR = 2.5V SD GND 158k SOUT VIN OUT PGND DELAY OC ISENSE BLANK 16 15 14 13 12 11 10 9 82k 2K 1µF VFB 1.2k 158k 220R 4.7µF VU1 BAS516 10k 332k 0.1µF • 0.1µF Si3459 HAT2266 ×2 680µH BAS521 82k 10k 10k 1 2 3 4 LTC3900 CS+ CS– CG VCC SYNC TIMER GND FG 8 7 6 5 VAUX 47k 220pF 0.004R IN PGND EN 0.22µF CG 470pF FG 560R • • GATE VFB 1k BCX55 VAUX 1µF PE-68386 BC857BF PDZ7.5B BAS516 PS2801-1 270R VAUX LT4430 VCC GND OC OPTO COMP FB 15nF 6 5 4 3.65k 33pF 3900 TA03a 1 2 3 1.96k 82.5k VOUT1 2.2nF 1µF By Using Active Reset and 60V MOSFETs Converter is Achieving 94% to 95% Efficiency with Only Four MOSFETs. 96 94 92 EFFICIENCY (%) 90 88 86 84 82 VIN = 24V VOUT = 14V 0 2 4 8 6 IOUT (A) 10 12 14 3900 TA03b 3900fb 14 LTC3900 Typical applicaTions 36V to 72V Input to 12V, 14A Output Converter in 1/8th Brick Footprint VU1 PZTA42 L2 1.5mH PDZ10B BAS516 T1 PA0423 1• •7 6 2 5 10 HAT2244 47k L1 3µH 33µF VOUT 12V 14A 10k VIN 36V TO 72V 82k 2.2µF • 560R 5 8 6 470pF 7 LTC3900 FB SYNC GND TIMER CG CS 3 10k 370k 13.3k 133k 82k 1µF 158k 0.1µF 20k 12.4k 47nF 97.6k 22k 6 1 2 LT1952-1 7 3 9 5 SD/VSEC ROSC BLANK SS OUT OC ISENSE VIN GND VR COMP FB PGND DELAY SOUT 14 11 10 15 8 13 12 16 Si7430 1nF 2k VU1 4.7µF 75k 220pF 0.010 PE-68386 +1 CS– VCC 2 4 38.3k BCX55 1µF PDZ7.5 1k VU1 L1: PULSE PA1393.302 L2: COILCRAFT DO1607B-155 ALL CERAMIC CAPS ARE X5R OR X7R The Efficiency of 12V Output Converter is Over 95% at 8A Output. 96 94 92 EFFICIENCY (%) 90 88 86 84 82 VIN = 48V VOUT = 12V 0 2 4 6 8 IOUT (A) 3900 TA04b •• 10 12 14 3900 TA04a 3900fb 15 LTC3900 Typical applicaTions 18V to 72V Input to 12V at 13A Active Reset Converter Fits in 1/8th Brick Size VIN 18V TO 72V 33k PZTA42 VU1 VR2 10V 1.5mH 40R2-4444.004 1• •7 BAS516 VIN VU1 BAS516 3 1, 6 2, 4 57 220pF VFB 22k BC857 33k 1 2 174k 3 4 0.1µF 1µF 39.2K 5 6 7 13.3k 189k VR2 332k VB 8 LT1952-1 COMP FB = 1.23V ROSC SYNC MAXDC VR = 2.5V SD GND SOUT VIN OUT PGND DELAY OC ISENSE BLANK 16 15 14 13 12 137k 11 10 9 22k 1k VFB BAS516 1.2k 2.2nF 1µF 18.2k 10pF 3900 TA05a PA2050.103 2.2µF ×3 + HAT2169 FG 0.22µF 680µH HAT2173 ×2 CG BAS521 33µF VOUT 12V 13A 330µF 6 2 5 10 • 5 LTC4440 0.006 33nF HAT2173 ×2 Si2325 1k 237 BAS516 VU1 4.7µF 0.1µF 10k BCX55 GATE 7.5V 10k 10k 1µF CG 22k 1 2 3 4 LTC3900 CS+ CS– CG VCC 47k 10nF 348k SYNC TIMER GND FG 8 7 6 5 FG 470pF 560R 220pF GATE • PE-68386 PS2801-1 470R 1 2 3 LT4430 VCC GND OC OPTO COMP FB 6 5 7.87k 4 VOUT The High Efficiency of Converter is Achieved by Precise MOSFET Timing Provided by LT1952 and LTC3900 Controllers. 96 94 92 EFFICIENCY (%) 90 88 86 84 82 80 0 2 4 8 6 IOUT (A) 10 24VIN 48VIN 12 14 3900 TA05b 16 • 3900fb LTC3900 Typical applicaTions Synchronous Forward Converter With Pulse Skip Mode VIN 36V TO 72V 82k 1.5mH 2.2µF PDZ10B VIN BAS516 1 6 2 5 1.5nF T1 PA0369 PZTA42 VU1 PA1671 •• 7 10 HA2165 CG 10nF 2.2R 10k 0.02µF + 100µF 470µF FG VOUT 3.3V 30A • Si7430 B0540W R_DCM 3.3M 1 2 3 4 CS+ CS– CG VCC * 8 7 6 5 VAUX 0.015R B0540W 10k 10k 38.3k 220pF SYNC TIMER GND FG VFB 22k BC857 33k LT1952-1 1 2 COMP FB = 1.23V ROSC SYNC MAXDC VR = 2.5V SD GND 158k SOUT VIN OUT PGND DELAY OC ISENSE BLANK 16 15 14 13 12 11 10 9 82k 1.2k 910 VFB 133k SOUT 1µF 0.22µF VU1 1k BCX55 CG 470pF FG 560R • PE-68386 SOUT 115k 0.47µF 0.1µF 3 4 5 6 7 1µF LTC3900 PDZ7.5B PS2801-1 270R 1 2 BAS516 1µF 3 LT4430 VCC GND OC OPTO COMP FB 6 5 1.96k 4 18.2k 47pF 15nF 82.5k 13.3k 8 22.1k 442k VIN *CONVERTERS THAT USE THE LTC3900 CAN BE FORCED TO OPERATE IN DISCONTINUOUS CURRENT MODE AT LIGHT LOADS BY OFFSETTING THE CURRENT SENSE INPUT WITH R_DCM RESISTOR. The Discontinuous Current Mode (DCM) Operation of Circuit is About 10% More Efficient with 1A-2A Loads. The No Load Input Current is 15mA in DCM Versus 90mA in CCM. 95 85 75 65 55 45 35 VIN = 48V VOUT = 3.3V CONTINUOUS CURRENT MODE DISCONTINUOUS CURRENT MODE 0 5 10 20 15 IOUT (A) 25 30 EFFICIENCY (%) 3900 TA06b • VOUT 3900 TA06a 3900fb 17 LTC3900 package DescripTion S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .050 BSC .045 ±.005 .189 – .197 (4.801 – 5.004) NOTE 3 8 7 6 5 .245 MIN .160 ±.005 .228 – .244 (5.791 – 6.197) .150 – .157 (3.810 – 3.988) NOTE 3 .030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT .010 – .020 × 45° (0.254 – 0.508) NOTE: 1. DIMENSIONS IN INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) .008 – .010 (0.203 – 0.254) 0°– 8° TYP 1 .053 – .069 (1.346 – 1.752) 2 3 4 .004 – .010 (0.101 – 0.254) .016 – .050 (0.406 – 1.270) .014 – .019 (0.355 – 0.483) TYP .050 (1.270) BSC SO8 0303 3900fb 18 LTC3900 revision hisTory REV B DATE 5/11 DESCRIPTION Added H- and MP-grade parts. Reflected throughout the data sheet. (Revision history begins at Rev B) PAGE NUMBER 1 to 20 3900fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3900 Typical applicaTion 36V to 72V Input to 12V at 20A “No Optocoupler” Synchronous “Bus Converter” VIN 36V TO 72V 47k 82k 18V VU1 BAS516 0.1µF 12V 2.2µF 100V , ×2 370k 13.2k 115k 27k 0.47µF 7 3 9 5 59k 10k 6 1 2 SD_VSEC ROSC BLANK SS_MAXDC LT1952 VR = 2.5V COMP FB = 1.23V OUT VIN GND PGND DELAY OC ISENSE SOUT 14 15 8 13 12 11 10 16 470 220pF Q4470-B BAT 760 39k 1µF 9m 1nF 560 8V BIAS VU1 PH21NQ15 ×2 1µF Si7370 ×2 PH4840 ×2 10k PA0815.002 •• L1 2.4µH BCX55 VOUT 12V, ±10%, 20A MAX COUT 33µF 16V , X5R, TDK ×3 • LTC3900 5 6 4 8 FG GND VCC CG CS 3 10k 10k +1 CS– 2 7 CT 1nF SYNC TIMER RT 15k 8V BIAS 0.1µF L1: PULSE PA1494.242 ALL CAPACITORS ARE TDK, X5R CERAMIC 3900 TA07a LTC3900-Based Synchronous “Bus Converter” Efficiency vs Load Current 96.0 95.5 EFFICIENCY (%) 95.0 94.5 94.0 POWER LOSS 93.5 93.0 VIN = 48V VOUT = 12V 4 6 8 10 12 14 16 LOAD CURRENT (A) 18 20 8 EFFICIENCY 12 POWER LOSS (W) 16 3900 TA07b relaTeD parTs PART NUMBER LT1952/LT1952-1 LTC3901 LT4430 LT1431 LTC3723-1/ LTC3723-2 LTC3721-1/ LTC3721-2 LTC3722/ LTC3722-2 DESCRIPTION Synchronous Forward Converter Controllers Secondary Side Synchronous Driver for Push-Pull and Full Bridge Converters Secondary Side Optocoupler Driver Programmable Reference Synchronous Push-Pull Controllers Nonsynchronous Push-Pull Controllers Synchronous Phase Modulated Full Bridge Controllers COMMENTS Ideal for Medium Power 24V or 48V Input Isolated Applications Similar to the LTC3900, Used in Full Bridge and Push-Pull Converters Optocoupler Driver with Precise Reference Voltage Adjustable Shunt Voltage Regulator with 100mA Sink Capability Ideal for Medium Power 24V or 48V Input Isolated Applications High Efficiency with On-Chip MOSFET Drivers Minimizes External Components, On-Chip MOSFET Drivers Ideal for High Power 24V or 48V Input Applications 3900fb LTC3726/LTC3725 Synchronous No Opto Forward Converter Controller Chip Set 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com •• 4 LT 0511 REV B • PRINTED IN USA  LINEAR TECHNOLOGY CORPORA TION 2003