LTC3780 High Efficiency, Synchronous, 4-Switch Buck-Boost Controller DESCRIPTIO
The LTC®3780 is a high performance buck-boost switching regulator controller that operates from input voltages above, below or equal to the output voltage. The constant frequency current mode architecture allows a phaselockable frequency of up to 400kHz. With a wide 4V to 30V (36V maximum) input and output range and seamless transfers between operating modes, the LTC3780 is ideal for automotive, telecom and battery-powered systems. The operating mode of the controller is determined through the FCB pin. For boost operation, the FCB mode pin can select among Burst Mode® operation, Discontinuous mode and Forced Continuous mode. During buck operation, the FCB mode pin can select among Skip-Cycle mode, Discontinuous mode and Forced Continuous mode. Burst Mode operation and Skip-Cycle mode provide high efficiency operation at light loads while Forced Continuous mode and Discontinuous mode operate at a constant frequency. Fault protection is provided by an output overvoltage comparator and internal foldback current limiting. A Power Good output pin indicates when the output is within 7.5% of its designed set point.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6304066, 5929620, 5408150, 6580258, patent pending on current mode architecture and protection
FEATURES
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
Single Inductor Architecture Allows VIN Above, Below or Equal to VOUT Wide VIN Range: 4V to 36V Operation Synchronous Rectification: Up to 98% Efficiency Current Mode Control ±1% Output Voltage Accuracy: 0.8V < VOUT < 30V Phase-Lockable Fixed Frequency: 200kHz to 400kHz Power Good Output Voltage Monitor Internal LDO for MOSFET Supply Quad N-Channel MOSFET Synchronous Drive VOUT Disconnected from VIN During Shutdown Adjustable Soft-Start Current Ramping Foldback Output Current Limiting Selectable Low Current Modes Output Overvoltage Protection Available in 24-Lead SSOP and Exposed Pad (5mm × 5mm) 32-Lead QFN Packages
APPLICATIO S
■ ■ ■ ■ ■
Automotive Systems Telecom Systems DC Power Distribution Systems High Power Battery-Operated Devices Industrial Control
TYPICAL APPLICATIO
VIN 4V TO 36V 22µF 50V CER
High Efficiency Buck-Boost Converter
+
4.7µF VIN PGOOD INTVCC TG2 0.1µF BOOST2 SW2 LTC3780 BG2 2200pF 20k 0.1µF ITH SS TG1 BOOST1 SW1 0.1µF 1µF CER 100µF 16V CER VOUT 12V 5A
EFFICIENCY (%)
BG1 PLLIN RUN VOSENSE ON/OFF 7.5k 105k 1%
SGND FCB SENSE+ SENSE– PGND
1000pF
0.010Ω
2µH
3780 TA01
U
U
U
Efficiency and Power Loss VOUT = 12V, ILOAD = 5A
100 95 90 85 80 75 70 0 5 10 20 15 VIN (V) 25 30 35 10 9 8 7 6 5 4 3 2 1 0
POWER LOSS (W)
3780 TA01b
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LTC3780
ABSOLUTE MAXIMUM RATINGS (Note 1)
Input Supply Voltage (VIN)........................ –0.3V to 36V Topside Driver Voltages (BOOST1, BOOST2) .................................. –0.3V to 42V Switch Voltage (SW1, SW2) ........................ –5V to 36V INTVCC, EXTVCC, RUN, SS, (BOOST – SW1), (BOOST2 – SW2), PGOOD .......................... –0.3V to 7V PLLIN Voltage .......................................... –0.3V to 5.5V PLLFLTR Voltage ...................................... –0.3V to 2.7V FCB, STBYMD Voltages ....................... –0.3V to INTVCC ITH, VOSENSE Voltages .............................. –0.3V to 2.4V Peak Output Current 2V VRUN = 0V, VSTBYMD = Open
MIN
TYP 0.002 0.32 0.6 2400 1500 55
MAX 0.02
UNITS %/V mS MHz µA µA µA V µA V V V µA V V % %
70 0.84 –0.1 5.5 4 0.88
VFCB IFCB VBINHIBIT UVLO VOVL ISENSE VSTBYMD(START) VSTBYMD(KA) DF MAX, BUCK VRUN(ON) ISS VSENSE(MAX)
0.76 –0.30
0.800 –0.18 5.3 3.8
0.84 0.4
0.86 –380 0.7 1.25 99 99
DF MAX, BOOST Maximum Duty Factor
1 0.5 –95
1.5 1.2 160 –130 –6 50 45 45 55 80 80 80 80 90 90
2 185 –150
V µA mV mV mV ns ns ns ns ns ns ns ns ns ns
VSENSE(MIN,BUCK) Minimum Current Sense Threshold TG1, TG2 tr TG1, TG2 tf BG1, BG2 tr BG1, BG2 tf TG1/BG1 t1D BG1/TG1 t2D TG2/BG2 t3D BG2/TG2 t4D Mode Transition 1 Mode Transition 2 TG Rise Time TG Fall Time BG Rise Time BG Fall Time TG1 Off to BG1 On Delay, Switch C On Delay BG1 Off to TG1 On Delay, Synchronous Switch D On Delay TG2 Off to BG2 On Delay, Synchronous Switch B On Delay BG2 Off to TG2 On Delay, Switch A On Delay BG1 Off to BG2 On Delay, Switch A On Delay BG2 Off to BG1 On Delay, Synchronous Switch D On Delay
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LTC3780
The ● indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL tON(MIN,BOOST) tON(MIN,BUCK) PARAMETER Minimum On-Time for Main Switch in Boost Operation Minimum On-Time for Synchronous Switch in Buck Operation Internal VCC Voltage Internal VCC Load Regulation EXTVCC Switchover Voltage EXTVCC Switchover Hysteresis EXTVCC Switch Drop Voltage Nominal Frequency Lowest Frequency Highest Frequency PLLIN Input Resistance Phase Detector Output Current fPLLIN < fOSC fPLLIN > fOSC VOSENSE Rising VOSENSE Falling VOSENSE Returning IPGOOD = 2mA VPGOOD = 5V 5.5 –5.5 ICC = 20mA, VEXTVCC = 6V VPLLFLTR = 1.2V VPLLFLTR = 0V VPLLFLTR = 2.4V 260 170 340 CONDITIONS Switch C (Note 6) Switch B (Note 6) MIN TYP 200 180 MAX 240 220 UNITS ns ns
ELECTRICAL CHARACTERISTICS
Internal VCC Regulator VINTVCC ∆VLDO(LOADREG) VEXTVCC ∆VEXTVCC(HYS) ∆VEXTVCC fNOM fLOW fHIGH RPLLIN IPLLLPF PGOOD Output ∆VFBH ∆VFBL ∆VFB(HYST) VPGL IPGOOD PGOOD Upper Threshold PGOOD Lower Threshold PGOOD Hysteresis PGOOD Low Voltage PGOOD Leakage Current 7.5 –7.5 2.5 0.1 0.3 ±1 10 –10 % % % V µA 7V < VIN < 30V, VEXTVCC = 5V ICC = 0mA to 20mA, VEXTVCC = 5V ICC = 20mA, VEXTVCC Rising
● ●
5.7 5.4
6 0.2 5.7 200 150 300 200 400 50 –15 15
6.3 2
V % V mV
300 330 220 440
mV kHz kHz kHz kΩ µA µA
Oscillator and Phase-Locked Loop
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: TJ for the QFN package is calculated from the temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • 34°C/W) Note 3: The IC is tested in a feedback loop that servos VITH to a specified voltage and measures the resultant VOSENSE. Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency.
Note 5: Rise and fall times are measured using 10% and 90% levels. Delay times are measured using 50% levels. Note 6: The minimum on-time condition is specified for an inductor peakto-peak ripple current ≥ 40% of IMAX (see minimum on-time considerations in the Applications Information section). Note 7: The LTC3780E is guaranteed to meet performance specifications from 0°C to 85°C. Performance over the –40°C to 85°C operating temperature range is assured by design, characterization and correlation with statistical process controls. The LTC3780I is guaranteed and tested over the – 40°C to 85°C operating temperature range.
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LTC3780 TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Output Current (Boost Operation)
100 BURST 90 DCM
EFFICIENCY (%) EFFICIENCY (%)
DCM 70 60 50
CCM
EFFICIENCY (%)
80 70 CCM 60 50 40 0.01 VIN = 6V VOUT = 12V 0.1 ILOAD (A)
3780 G01
1
Supply Current vs Input Voltage
2500 VFCB = 0V 2000
SUPPLY CURRENT (µA)
6.5 6.0
STANDBY
5.5 5.0 4.5 4.0
EXTVCC VOLTAGE DROP (mV)
INTVCC VOLTAGE (V)
1500
1000
500 SHUTDOWN 0 0 5 20 15 10 25 INPUT VOLTAGE (V) 30 35
INTVCC and EXTVCC Switch Voltage vs Temperature
6.05 5
INTVCC AND EXTVCC SWITCH VOLTAGE (V)
6.00 5.95 5.90 5.85 5.80 5.75 5.70 5.65 5.60 5.55 –50 –25
EXTVCC SWITCH RESISTANCE (Ω)
INTVCC VOLTAGE
3
NORMALIZED VOUT (%)
EXTVCC SWITCHOVER THRESHOLD
50 25 0 75 TEMPERATURE (°C)
UW
10
3780 G04
TA = 25°C unless otherwise noted. Efficiency vs Output Current (Buck Operation)
100
Efficiency vs Output Current
100 BURST 90 80 90
SC 80 70 60 50 VIN = 12V VOUT = 12V 0.1 ILOAD (A)
3780 G02
CCM DCM
40 0.01
1
10
40 0.01
VIN = 18V VOUT = 12V 0.1 ILOAD (A)
3780 G03
1
10
Internal 6V LDO Line Regulation
120 100 80 60 40 20 0
EXTVCC Voltage Drop
3.5 0 5 20 15 25 10 INPUT VOLTAGE (V) 30 35
1
10
20 30 CURRENT (mA)
40
50
3780 G06
3780 G05
EXTVCC Switch Resistance vs Temperature
0
Load Regulation
VIN = 18V
4
–0.1
–0.2
VIN = 12V
2
–0.3 VIN = 6V –0.4 FCB = 0V VOUT = 12V 0 1 3 2 LOAD CURRENT (A) 4 5
3780 G09
1
100
125
0 –50
–25
50 25 0 75 TEMPERATURE (°C)
100
125
–0.5
3780 G07
3780 G08
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LTC3780 TYPICAL PERFOR A CE CHARACTERISTICS
Discontinuous Current Mode (DCM, VIN = 6V, VOUT = 12V)
SW2 10V/DIV SW2 10V/DIV
SW1 10V/DIV VOUT 100mV/DIV
IL 2A/DIV VIN = 6V VOUT = 12V 5µs/DIV
3780 G10
Burst Mode Operation (VIN = 6V, VOUT = 12V)
SW2 10V/DIV SW1 10V/DIV SW2 10V/DIV SW1 10V/DIV
VOUT 500mV/DIV IL 2A/DIV
VIN = 6V VOUT = 12V
25µs/DIV
Discontinuous Current Mode (DCM, VIN = 6V, VOUT = 12V)
SW2 10V/DIV SW1 10V/DIV SW2 10V/DIV SW1 10V/DIV VOUT 100mV/DIV IL 2A/DIV VIN = 6V VOUT = 12V 5µs/DIV
3780 G16
VOUT 100mV/DIV
IL 1A/DIV
6
UW
TA = 25°C unless otherwise noted. Continuous Current Mode (CCM, VIN = 18V, VOUT = 12V)
SW2 10V/DIV
Continuous Current Mode (CCM, VIN = 12V, VOUT = 12V)
SW1 10V/DIV
SW1 10V/DIV VOUT 100mV/DIV
VOUT 100mV/DIV
IL 2A/DIV VIN = 12V VOUT = 12V 5µs/DIV
3780 G11
IL 2A/DIV VIN = 18V VOUT = 12V 5µs/DIV
3780 G12
Burst Mode Operation (VIN = 12V, VOUT = 12V)
SW2 10V/DIV SW1 10V/DIV
Skip Cycle Mode (VIN = 18V, VOUT = 12V)
VOUT 200mV/DIV IL 2A/DIV
VOUT 100mV/DIV
IL 1A/DIV VIN = 12V VOUT = 12V 10µs/DIV
3780 G14
3780 G13
VIN = 18V VOUT = 12V
2.5µs/DIV
3780 G15
Discontinuous Current Mode (DCM, VIN = 12V, VOUT = 12V)
SW2 10V/DIV SW1 10V/DIV
Discontinuous Current Mode (DCM, VIN = 18V, VOUT = 12V)
VOUT 100mV/DIV IL 1A/DIV VIN = 12V VOUT = 12V 5µs/DIV
3780 G17
VIN = 18V VOUT = 12V
2.5µs/DIV
3780 G18
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LTC3780 TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency vs Temperature
450 400 350
FREQUENCY (kHz)
4.0
VPLLFLTR = 2.4V VPLLFLTR = 1.2V
UNDERVOLTAGE RESET (V)
300 250 200 150 100 50 0 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 VPLLFLTR = 0V
3.6
3.4
ISENSE+ (mV)
50 25 0 75 TEMPERATURE (°C) 100 125
Maximum Current Sense Threshold vs Duty Factor (Boost)
180
140
MAXIMUM ISNESE+ THRESHOLD (mV)
160
ISENSE+ (mV)
ISNESE+ (mV)
140
120
100
0
20
60 40 DUTY FACTOR (%)
Peak Current Threshold vs VITH (Boost)
200 150 100 50 0 –50 –100 –100 100
ISENSE+ (mV)
ISENSE+ (mV)
0
0.4
UW
3780 G19
TA = 25°C unless otherwise noted. Minimum Current Sense Threshold vs Duty Factor (Buck)
–20
Undervoltage Reset vs Temperature
3.8
–40
–60
3.2
3.0 –50 –25
–80 100
80
60 40 DUTY FACTOR (%)
20
0
3780 G21
3780 G20
Maximum Current Sense Threshold vs Duty Factor (Buck)
200 150 100 50 0 –50
Minimum Current Sense Threshold vs Temperature
BOOST
130
120
–100
BUCK 50 25 75 0 TEMPERATURE (°C) 100 125
110
80
100
3780 G22
0
20
40 60 DUTY FACTOR (%)
80
100
3780 G23
–150 –50 –25
3780 G24
Valley Current Threshold vs VITH (Buck)
50
0
–50
0.8
1.2 1.6 VITH (V)
1.8
2.4
3780 G25
–150
0
0.4
0.8
1.2 1.6 VITH (V)
2.0
2.4
3780 G26
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LTC3780 TYPICAL PERFOR A CE CHARACTERISTICS
Load Step Load Step
VOUT 500mV/DIV
IL 5A/DIV
VIN = 18V 200µs/DIV VOUT = 12V LOAD STEP: 0A TO 5A CONTINUOUS MODE
Line Transient
VIN 10V/DIV
VOUT 500mV/DIV
IL 1A/DIV VOUT = 12V 500µs/DIV ILOAD = 1A VIN STEP: 7V TO 20V CONTINUOUS MODE
3780 G30
PI FU CTIO S
(SSOP/QFN)
PGOOD (Pin 1/Pin 30): Open-Drain Logic Output. PGOOD is pulled to ground when the output voltage is not within ±7.5% of the regulation point. SS (Pin 2/Pin 31): Soft-start reduces the input power sources’ surge currents by gradually increasing the controller’s current limit. A minimum value of 6.8nF is recommended on this pin. SENSE+ (Pin 3/Pin 1): The (+) Input to the Current Sense and Reverse Current Detect Comparators. The ITH pin
8
UW
TA = 25°C unless otherwise noted. Load Step
VOUT 500mV/DIV
VOUT 500mV/DIV
IL 5A/DIV
IL 5A/DIV
3780 G27
VIN = 12V 200µs/DIV VOUT = 12V LOAD STEP: 0A TO 5A CONTINUOUS MODE
3780 G28
VIN = 6V 200µs/DIV VOUT = 12V LOAD STEP: 0A TO 5A CONTINUOUS MODE
3780 G29
Line Transient
VIN 10V/DIV
VOUT 500mV/DIV
IL 1A/DIV VOUT = 12V 500µs/DIV ILOAD = 1A VIN STEP: 20V TO 7V CONTINUOUS MODE
3780 G31
U
U
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voltage and built-in offsets between SENSE– and SENSE+ pins, in conjunction with RSENSE, set the current trip threshold. SENSE– (Pin 4/Pin 2): The (–) Input to the Current Sense and Reverse Current Detect Comparators. ITH (Pin 5/Pin 3): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V.
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LTC3780
PI FU CTIO S
VOSENSE (Pin 6/Pin 4): Error Amplifier Feedback Input. This pin connects the error amplifier input to an external resistor divider from VOUT. SGND (Pin 7/Pin 5): Signal Ground. All small-signal components and compensation components should connect to this ground, which should be connected to PGND at a single point. RUN (Pin 8/Pin 6): Run Control Input. Forcing the RUN pin below 1.5V causes the IC to shut down the switching regulator circuitry. There is a 100k resistor between the RUN pin and SGND in the IC. Do not apply >6V to this pin. FCB (Pin 9/Pin 7): Forced Continuous Control Input. The voltage applied to this pin sets the operating mode of the controller. When the applied voltage is less than 0.8V, the forced continuous current mode is active. When this pin is allowed to float, the burst mode is active in boost operation and the skip cycle mode is active in buck operation. When the pin is tied to INTVCC, the constant frequency discontinuous current mode is active in buck or boost operation. PLLFLTR (Pin 10/Pin 8): The Phase-Locked Loop’s Lowpass Filter is Tied to This Pin. Alternatively, this pin can be driven with an AC or DC voltage source to vary the frequency of the internal oscillator. PLLIN (Pin 11/Pin 10): External Synchronization Input to Phase Detector. This pin is internally terminated to SGND with 50kΩ. The phase-locked loop will force the rising bottom gate signal of the controller to be synchronized with the rising edge of the PLLIN signal. STBYMD (Pin 12/Pin 11): LDO Control Pin. Determines whether the internal LDO remains active when the controller is shut down. See Operation section for details. If the STBYMD pin is pulled to ground, the SS pin is internally pulled to ground, preventing start-up and thereby providing a single control pin for turning off the controller. Decouple this pin with 0.1µF if not tied to a DC potential.
U
U
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(SSOP/QFN)
BOOST2, BOOST1 (Pins 13, 24/Pins 14, 27): Boosted Floating Driver Supply. The (+) terminal of the bootstrap capacitor CA and CB (Figure 11) connects here. The BOOST2 pin swings from a diode voltage below INTVCC up to VIN + INTVCC. The BOOST1 pin swings from a diode voltage below INTVCC up to VOUT + INTVCC. TG2, TG1 (Pins 14, 23/Pins 15, 26): Top Gate Drive. Drives the top N-channel MOSFET with a voltage swing equal to INTVCC superimposed on the switch node voltage SW. SW2, SW1 (Pins 15, 22/Pins 17, 24): Switch Node. The (–) terminal of the bootstrap capacitor CA and CB (Figure 11) connects here. The SW2 pin swings from a Schottky diode (external) voltage drop below ground up to VIN. The SW1 pin swings from a Schottky diode (external) voltage drop below ground up to VOUT. BG2, BG1 (Pins 16, 18/Pins 18, 20): Bottom Gate Drive. Drives the gate of the bottom N-channel MOSFET between ground and INTVCC. PGND (Pin 17/Pin 19): Power Ground. Connect this pin closely to the source of the bottom N-channel MOSFET, the (–) terminal of CVCC and the (–) terminal of CIN (Figure 11). INTVCC (Pin 19/Pin 21): Internal 6V Regulator Output. The driver and control circuits are powered from this voltage. Decouple this pin to ground with a minimum of 4.7µF low ESR tantalum or ceramic capacitor. EXTVCC (Pin 20/Pin 22): External VCC Input. When EXTVCC exceeds 5.7V, an internal switch connects this pin to INTVCC and shuts down the internal regulator so that the controller and gate drive power is drawn from EXTVCC. Do not exceed 7V at this pin and ensure that EXTVCC < VIN. VIN (Pin 21/Pin 23): Main Input Supply. Decouple this pin to SGND with an RC filter (1Ω, 0.1µF). Exposed Pad (Pin 33, QFN Only): This pin is SGND and must be soldered to PCB ground.
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LTC3780
BLOCK DIAGRA
STBYMD FCB
1.2V 4(VFB)
1.2µA SS
RUN SLOPE 100k EA
VIN
VIN
5.7V
0.86V
SGND
INTERNAL SUPPLY VOSENSE
0.74V
10
+
+
6V
INTVCC
+
–
EXTVCC
–
W
INTVCC VIN BOOST2 TG2 SW2 INTVCC BG2 RSENSE PGND
+ –
ILIM
FCB BUCK LOGIC
+ –
IREV
BG1 FCB BOOST LOGIC ICMP
INTVCC
SW1 TG1
+ –
BOOST1 OV
– +
0.86V INTVCC VOUT
– +
VOSENSE VFB 0.80V ITH
SHDN RST 4(VFB)
RUN/ SS SENSE+ SENSE–
VREF
PLLIN PHASE DET 50k FIN
+ –
CLK 6V LDO REG OSCILLATOR
PLLFLTR RLP CLP
PGOOD
3780 BD
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LTC3780
OPERATIO
MAIN CONTROL LOOP The LTC3780 is a current mode controller that provides an output voltage above, equal to or below the input voltage. The LTC proprietary topology and control architecture employs a current-sensing resistor in Buck or Boost modes. The sensed inductor current is controlled by the voltage on the ITH pin, which is the output of the amplifier EA. The VOSENSE pin receives the voltage feedback signal, which is compared to the internal reference voltage by the EA. The top MOSFET drivers are biased from floating booststrap capacitors CA and CB (Figure 11), which are normally recharged through an external diode when the top MOSFET is turned off. Schottky diodes across the synchronous switch D and synchronous switch B are not required, but provide a lower drop during the dead time. The addition of the Schottky diodes will typically improve peak efficiency by 1% to 2% at 400kHz. The main control loop is shut down by pulling the RUN pin low. When the RUN pin voltage is higher than 1.5V, an internal 1.2µA current source charges soft-start capacitor CSS at the SS pin. The ITH voltage is then clamped to the
VIN TG2 A SW2 BG2 B L
U
SS voltage while CSS is slowly charged during start-up. This “soft-start” clamping prevents abrupt current from being drawn from the input power supply. POWER SWITCH CONTROL Figure 1 shows a simplified diagram of how the four power switches are connected to the inductor, VIN, VOUT and GND. Figure 2 shows the regions of operation for the LTC3780 as a function of duty cycle D. The power switches are properly controlled so the transfer between modes is continuous. When VIN approaches VOUT, the Buck-Boost region is reached; the mode-to-mode transition time is typically 200ns. Buck Region (VIN > VOUT) Switch D is always on and Switch C is always off during this mode. At the start of every cycle, Synchronous Switch B is turned on first. Inductor current is sensed when Synchronous Switch B is turned on. After the sensed inductor current falls below the reference voltage, which is proportional to VITH, Synchronous Switch B is turned off
VOUT D SW1 C BG1 TG1 RSENSE
3780 F01
Figure 1. Simplified Diagram of the Output Switches
98% DMAX BOOST DMIN BOOST DMAX BUCK
A ON, B OFF PWM C, D SWITCHES FOUR SWITCH PWM D ON, C OFF PWM A, B SWITCHES
BOOST REGION
BUCK/BOOST REGION
BUCK REGION
3780 F02
3% DMIN BUCK
Figure 2. Operating Mode vs Duty Cycle
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LTC3780
OPERATIO
and Switch A is turned on for the remainder of the cycle. Switches A and B will alternate, behaving like a typical synchronous buck regulator. The duty cycle of switch A increases until the maximum duty cycle of the converter in Buck mode reaches DMAX_BUCK, given by: DMAX_BUCK = (1 – DBUCK-BOOST) • 100% where DBUCK-BOOST = duty cycle of the Buck-Boost switch range: DBUCK-BOOST = (200ns • f) • 100% and f is the operating frequency in Hz. Figure 3 shows typical Buck mode waveforms. If VIN approaches VOUT, the Buck-Boost region is reached.
CLOCK
SWITCH A
SWITCH D
SWITCH B SWITCH C SWITCH D I
3780 F03
Figure 3. Buck Mode (VIN > VOUT)
Buck-Boost (VIN ≅ VOUT) When VIN is close to VOUT, the controller is in Buck-Boost mode. Figure 4 shows typical waveforms in this mode. Every cycle, if the controller starts with Switches B and D turned on, Switches A and C are then turned on. Finally, Switches A and D are turned on for the remainder of the time. If the controller starts with Switches A and C turned on, Switches B and D are then turned on. Finally, Switches A and D are turned on for the remainder of the time.
12
U
CLOCK SWITCH A SWITCH B SWITCH C SWITCH D IL
3780 F04a
(4a) Buck-Boost Mode (VIN ≥ VOUT)
CLOCK SWITCH A SWITCH B SWITCH C
0V 2.4V
IL
3780 F04b
(4b) Buck-Boost Mode (VIN ≤ VOUT) Figure 4. Buck-Boost Mode
Boost Region (VIN < VOUT) Switch A is always on and Synchronous Switch B is always off in Boost mode. Every cycle, Switch C is turned on first. Inductor current is sensed when Synchronous Switch C is turned on. After the sensed inductor current exceeds the reference voltage which is proportional to VITH, Switch C is turned off and Synchronous Switch D is turned on for the remainder of the cycle. Switches C and D will alternate, behaving like a typical synchronous boost regulator.
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LTC3780
OPERATIO
The duty cycle of Switch C decreases until the minimum duty cycle of the converter in Buck mode reaches DMIN_BOOST, given by: DMIN_BOOST = (DBUCK-BOOST) • 100% where DBUCK-BOOST is the duty cycle of the Buck-Boost switch range: DBUCK-BOOST = (200ns • f) • 100% and f is the operating frequency in Hz. Figure 5 shows typical boost mode waveforms. If VIN approaches VOUT, the Buck-Boost region is reached.
CLOCK SWITCH A SWITCH B SWITCH C SWITCH D I
3780 F05
Figure 5. Boost Mode (VIN < VOUT)
LOW CURRENT OPERATION The FCB pin is a multifunction pin providing two functions: 1) to provide regulation for a secondary winding by temporarily forcing continuous PWM operation in Buck mode and 2) to select among three modes for both buck and boost operations by accepting a logic input. Figure 6 shows the different modes.
FCB PIN 0V to 0.75V 0.85V to 5V >5.3V BUCK MODE Force Continuous Mode Skip-Cycle Mode DCM with Constant Freq BOOST MODE Force Continuous Mode Burst Mode Operation DCM with Constant Freq
Figure 6. Different Operating Modes
U
2.4V 0V
When the FCB pin voltage is lower than 0.8V, the controller behaves as a continuous, PWM current mode synchronous switching regulator. In Boost mode, Switch A is always on. Switch C and Synchronous Switch D are alternately turned on to maintain the output voltage independent of direction of inductor current. Every ten cycles, Switch A is forced off for about 300ns to allow CA to recharge. In Buck mode, Synchronous Switch D is always on. Switch A and Synchronous Switch B are alternately turned on to maintain the output voltage independent of direction of inductor current. Every ten cycles, Synchronous Switch D is forced off for about 300ns to allow CB to recharge. This is the least efficient operating mode at light load, but may be desirable in certain applications. In this mode, the output can source or sink current. The sunk current will be forced back into the main power supply potentially boosting the input supply to dangerous voltage levels—BEWARE! When the FCB pin voltage is below VINTVCC – 1V, but greater than 0.8V, the controller enters Burst Mode operation in Boost operation or enters Skip-Cycle mode in Buck operation. During Boost operation, Burst Mode operation sets a minimum output current level before inhibiting the switch C and turns off Synchronous Switch D when the inductor current goes negative. This combination of requirements will, at low currents, force the ITH pin below a voltage threshold that will temporarily inhibit turn-on of power switches C and D until the output voltage drops. There is 100mV of hysteresis in the burst comparator tied to the ITH pin. This hysteresis produces output signals to the MOSFETs C and D that turn them on for several cycles, followed by a variable “sleep” interval depending upon the load current. The maximum output voltage ripple is limited to 3% of the nominal DC output voltage as determined by a resistive feedback divider. During buck operation, SkipCycle mode sets a minimum positive inductor current level. When inductor current is lower than this level, Synchronous Switch B is kept off. In every cycle, the body
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LTC3780
OPERATIO
diode of Synchronous Switch B or the Schottky diode, which is in parallel in with Synchronous Switch B, is used to discharge inductor current. As a result, some cycles will be skipped when the output load current drops below 1% of the maximum designed load in order to maintain the output voltage. When the FCB pin voltage is tied to the INTVCC pin, the controller enters constant frequency Discontinuous Current mode (DCM). For Boost operation, Synchronous Switch D is held off whenever the ITH pin is below a threshold voltage. In every cycle, Switch C is used to charge inductor current. After the output voltage is high enough, the controller will enter continuous current Buck mode for one cycle to discharge inductor current. In the following cycle, the controller will resume DCM Boost operation. For Buck operation, constant frequency Discontinuous Current mode sets a minimum negative inductor current level. Synchronous Switch B is turned off whenever inductor current is lower than this level. At very light loads, this constant frequency operation is not as efficient as Burst Mode operation or Skip-Cycle, but does provide lower noise, constant frequency operation. FREQUENCY SYNCHRONIZATION AND FREQUENCY SETUP The phase-locked loop allows the internal oscillator to be synchronized to an external source via the PLLIN pin. The phase detector output at the PLLFLTR pin is also the DC frequency control input of the oscillator. The frequency ranges from 200kHz to 400kHz, corresponding to a DC voltage input from 0V to 2.4V at PLLFLTR. When locked, the PLL aligns the turn on of the top MOSFET to the rising edge of the synchronizing signal. When PLLIN is left open, the PLLFLTR pin goes low, forcing the oscillator to its minimum frequency.
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INTVCC/EXTVCC POWER Power for all power MOSFET drivers and most internal circuitry is derived from the INTVCC pin. When the EXTVCC pin is left open, an internal 6V low dropout linear regulator supplies INTVCC power. If EXTVCC is taken above 5.7V, the 6V regulator is turned off and an internal switch is turned on, connecting EXTVCC to INTVCC. This allows the INTVCC power to be derived from a high efficiency external source. POWER GOOD (PGOOD) PIN The PGOOD pin is connected to an open drain of an internal MOSFET. The MOSFET turns on and pulls the pin low when the output is not within ±7.5% of the nominal output level as determined by the resistive feedback divider. When the output meets the ±7.5% requirement, the MOSFET is turned off and the pin is allowed to be pulled up by an external resistor to a source of up to 7V. FOLDBACK CURRENT Foldback current limiting is activated when the output voltage falls below 70% of its nominal level, reducing power waste. During start-up, foldback current limiting is disabled. INPUT UNDERVOLTAGE RESET The SS capacitor will be reset if the input voltage is allowed to fall below approximately 4V. The SS capacitor will attempt to charge through a normal soft-start ramp after the input voltage rises above 4V.
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OPERATIO
OUTPUT OVERVOLTAGE PROTECTION An overvoltage comparator guards against transient overshoots (>7.5%) as well as other more serious conditions that may overvoltage the output. In this case, Synchronous Switch B and Synchronous Switch D are turned on until the overvoltage condition is cleared or the maximum negative current limit is reached. When inductor current is lower than the maximum negative current limit, Synchronous Switch B and Synchronous Switch D are turned off, and Switch A and Switch C are turned on until the inductor current reaches another negative current limit. If the comparator still detects an overvoltage condition, Switch A and Switch C are turned off, and Synchronous Switch B and Synchronous Switch D are turned on again. SHORT-CIRCUIT PROTECTION AND CURRENT LIMIT Switch A on-time is limited by output voltage. When output voltage is reduced and is lower than its nominal level, Switch A on-time will be reduced.
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In every Boost mode cycle, current is limited by a voltage reference, which is proportional to the ITH pin voltage. The maximum sensed current is limited to 160mV. In every Buck mode cycle, the maximum sensed current is limited to 130mV. STANDBY MODE PIN The STBYMD pin is a three-state input that controls circuitry within the IC as follows: When the STBYMD pin is held at ground, the SS pin is pulled to ground. When the pin is left open, the internal SS current source charges the SS capacitor, allowing turn-on of the controller and activating necessary internal biasing. When the STBYMD pin is taken above 2V, the internal linear regulator is turned on independent of the state on the RUN and SS pins, providing an output power source for “wake-up” circuitry. Decouple the pin with a small capacitor (0.1µF) to ground if the pin is not connected to a DC potential.
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APPLICATIO S I FOR ATIO
Figure 11 is a basic LTC3780 application circuit. External component selection is driven by the load requirement, and begins with the selection of RSENSE and the inductor value. Next, the power MOSFETs are selected. Finally, CIN and COUT are selected. This circuit can be configured for operation up to an input voltage of 36V. RSENSE Selection and Maximum Output Current RSENSE is chosen based on the required output current. The current comparator threshold sets the peak of the inductor current in Boost mode and the maximum inductor valley current in Buck mode. In Boost mode, the maximum average load current is:
IOUT(MAX,BOOST) =
160mV • VIN ∆IL – 2 RSENSE • VOUT
where ∆IL is peak-to-peak inductor ripple current. In Buck mode, the maximum average load current is:
130mV ∆IL IOUT(MAX,BUCK) = + RSENSE 2
Figure 7 shows how the load current (IMAXLOAD • RSENSE) varies with input and output voltage
160 150
OPERATING FREQUENCY (kHz)
IMAX(LOAD) • RSENSE (mV)
140 130 120 110 100 0.1 1 VIN/VOUT (V)
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Figure 7. Load Current vs VIN/VOUT
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Allowing a margin for variations in LTC3780 and external component values yields:
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RSENSE =
2 • 160mV • VIN 2 • IOUT(MAX,BOOST) • VOUT + ∆IL(BOOST)
Selection of Operation Frequency The LTC3780 uses a constant frequency architecture and has an internal voltage controlled oscillator. The switching frequency is determined by the internal oscillator capacitor. This internal capacitor is charged by a fixed current plus an additional current that is proportional to the voltage applied to the PLLFLTR pin. The frequency of this oscillator can be varied over a 2-to-1 range. The PLLFLTR pin can be grounded to lower the frequency to 200kHz or tied to 2.4V to yield approximately 400kHz. When PLLIN is left open, the PLLFLTR pin goes low, forcing the oscillator to minimum frequency. A graph for the voltage applied to the PLLFLTR pin vs frequency is given in Figure 8. As the operating frequency is increased the gate charge losses will be higher, reducing efficiency. The maximum switching frequency is approximately 400kHz.
450 400 350 300 250 200 150 100 50 0 0 2 0.5 1.5 1 PLLFLTR PIN VOLTAGE (V) 2.5
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Figure 8. Frequency vs PLLFLTR Pin Voltage
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Inductor Selection
The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use of smaller inductor and capacitor values. The inductor value has a direct effect on ripple current. The inductor current ripple ∆IL is typically set to 20% to 40% of the maximum inductor current. For a given ripple the inductance terms are as follows:
LBOOST > LBUCK >
where:
VIN(MIN)2 • VOUT – VIN(MIN) • 100
(
)
ƒ • IOUT(MAX) • % Ripple • VOUT2 VOUT • VIN(MAX) – VOUT • 100
(
)
ƒ • IOUT(MAX) • % Ripple • VIN(MAX)
f is operating frequency, Hz % Ripple is allowable inductor current ripple, % VIN(MIN) is minimum input voltage, V VIN(MAX) is maximum input voltage, V VOUT is output voltage, V IOUT(MAX) is maximum output load current For high efficiency, choose an inductor with low core loss, such as ferrite and molypermalloy (from Magnetics, Inc.). Also, the inductor should have low DC resistance to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. CIN and COUT Selection In Boost mode, input current is continuous. In Buck mode, input current is discontinuous. In Buck mode, the selection of input capacitor CIN is driven by the need to filter the input square wave current. Use a low ESR capacitor sized to handle the maximum RMS current. For Buck operation, the input RMS current is given by:
IRMS ≈ IOUT(MAX) •
VOUT VIN • –1 VIN VOUT
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This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT(MAX)/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. In Boost mode, the discontinuous current shifts from the input to the output, so COUT must be capable of reducing the output voltage ripple. The effects of ESR (equivalent series resistance) and the bulk capacitance must be considered when choosing the right capacitor for a given output ripple voltage. The steady ripple due to charging and discharging the bulk capacitance is given by: Ripple (Boost,Cap) = IOUT(MAX) • VOUT – VIN(MIN) COUT • VOUT • f
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H,
H
(
)V
)V
Ripple (Buck,Cap) =
IOUT(MAX) • VIN(MAX ) – VOUT COUT • VIN(MAX) • f
(
where COUT is the output filter capacitor. The steady ripple due to the voltage drop across the ESR is given by: ∆VBOOST,ESR = IL(MAX,BOOST) • ESR ∆VBUCK,ESR = IL(MAX,BUCK) • ESR Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient. Capacitors are now available with low ESR and high ripple current ratings such as OS-CON and POSCAP. Power MOSFET Selection and Efficiency Considerations The LTC3780 requires four external N-channel power MOSFETs, two for the top switches (Switch A and D, shown in Figure 1) and two for the bottom switches
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(Switch B and C shown in Figure 1). Important parameters for the power MOSFETs are the breakdown voltage VBR,DSS, threshold voltage VGS,TH, on-resistance RDS(ON), reverse transfer capacitance CRSS and maximum current IDS(MAX). The drive voltage is set by the 6V INTVCC supply. Consequently, logic-level threshold MOSFETs must be used in LTC3780 applications. If the input voltage is expected to drop below 5V, then the sub-logic threshold MOSFETs should be considered. In order to select the power MOSFETs, the power dissipated by the device must be known. For Switch A, the maximum power dissipation happens in Boost mode, when it remains on all the time. Its maximum power dissipation at maximum output current is given by:
⎛V ⎞ PA,BOOST = ⎜ OUT • IOUT(MAX) ⎟ • ρT • RDS(ON) ⎝ VIN ⎠
2
where ρT is a normalization factor (unity at 25°C) accounting for the significant variation in on-resistance with temperature, typically about 0.4%/°C as shown in Figure 9. For a maximum junction temperature of 125°C, using a value ρT = 1.5 is reasonable. Switch B operates in Buck mode as the synchronous rectifier. Its power dissipation at maximum output current is given by:
PB,BUCK
V –V = IN OUT • IOUT(MAX)2 • ρT • RDS(ON) VIN
2.0
ρT NORMALIZED ON-RESISTANCE (Ω)
1.5
1.0
0.5
0 –50
Figure 9. Normalized RDS(ON) vs Temperature
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Switch C operates in Boost mode as the control switch. Its power dissipation at maximum current is given by:
PC,BOOST =
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( VOUT – VIN )VOUT • I
VIN2 + k • VOUT3 •
2 OUT(MAX)
• ρT • RDS(ON)
IOUT(MAX) • CRSS • f VIN
where CRSS is usually specified by the MOSFET manufacturers. The constant k, which accounts for the loss caused by reverse recovery current, is inversely proportional to the gate drive current and has an empirical value of 1.7. For Switch D, the maximum power dissipation happens in Boost mode, when its duty cycle is higher than 50%. Its maximum power dissipation at maximum output current is given by:
PD,BUCK V = IN VOUT ⎛V ⎞ • ⎜ OUT • IOUT(MAX) ⎟ • ρT • RDS(ON) ⎝ VIN ⎠
2
For the same output voltage and current, Switch A has the highest power dissipation and Switch B has the lowest power dissipation unless a short occurs at the output. From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: TJ = TA + P • RTH(JA)
50 100 0 JUNCTION TEMPERATURE (°C)
150
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APPLICATIO S I FOR ATIO
The RTH(JA) to be used in the equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(JC)). This value of TJ can then be compared to the original, assumed value used in the iterative calculation process. Schottky Diode (D1, D2) Selection and Light Load Operation The Schottky diodes D1 and D2 shown in Figure 1 conduct during the dead time between the conduction of the power MOSFET switches. They are intended to prevent the body diode of Synchronous Switches B and D from turning on and storing charge during the dead time. In particular, D2 significantly reduces reverse recovery current between Switch D turn-off and Switch C turn-on, which improves converter efficiency and reduces Switch C voltage stress. In order for the diode to be effective, the inductance between it and the synchronous switch must be as small as possible, mandating that these components be placed adjacently. In Buck mode, when the FCB pin voltage is 0.85 < VFCB < 5V, the converter operates in Skip-Cycle mode. In this mode, Synchronous Switch B remains off until the inductor peak current exceeds one-fifth of its maximum peak current. As a result, D1 should be rated for about one-half to one-third of the full load current. In Boost mode, when the FCB pin voltage is higher than 5.3V, the converter operates in Discontinuous Current mode. In this mode, Synchronous Switch D remains off until the inductor peak current exceeds one-fifth of its maximum peak current. As a result, D2 should be rated for about one-third to one-fourth of the full load current. In Buck mode, when the FCB pin voltage is higher than 5.3V, the converter operates in constant frequency Discontinuous Current mode. In this mode, Synchronous Switch B remains on until the inductor valley current is lower than the sense voltage representing the minimum negative inductor current level (VSENSE = –5mV). Both Switch A and B are off until next clock signal. In Boost mode, when the FCB pin voltage is 0.85 < VFCB < 5.3V, the converter operates in Burst Mode operation. In this mode, the controller clamps the peak inductor current
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to approximately 20% of the maximum inductor current. The output voltage ripple can increase during Burst Mode operation. INTVCC Regulator An internal P-channel low dropout regulator produces 6V at the INTVCC pin from the VIN supply pin. INTVCC powers the drivers and internal circuitry within the LTC3780. The INTVCC pin regulator can supply a peak current of 40mA and must be bypassed to ground with a minimum of 4.7 µF tantalum, 10µF special polymer or low ESR type electrolytic capacitor. A 1µF ceramic capacitor placed directly adjacent to the INTVCC and PGND IC pins is highly recommended. Good bypassing is necessary to supply the high transient current required by MOSFET gate drivers. Higher input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maximum junction temperature rating for the LTC3780 to be exceeded. The system supply current is normally dominated by the gate charge current. Additional external loading of the INTVCC also needs to be taken into account for the power dissipation calculations. The total INTV CC current can be supplied by either the 6V internal linear regulator or by the EXTVCC input pin. When the voltage applied to the EXTVCC pin is less than 5.7V, all of the INTVCC current is supplied by the internal 6V linear regulator. Power dissipation for the IC in this case is VIN • IINTVCC, and overall efficiency is lowered. The junction temperature can be estimated by using the equations given in Note 2 of the Electrical Characteristics. For example, LTC3780 VIN current is limited to less than 24mA from a 24V supply when not using the EXTVCC pin as: TJ = 70°C + 24mV • 24V • 95°C/W = 125°C Use of the EXTVCC input pin reduces the junction temperature to: TJ = 70°C + 24mV • 6V • 95°C/W = 84°C To prevent maximum junction temperature from being exceeded, the input supply current must be checked operating in continuous mode at maximum VIN.
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LTC3780
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EXTVCC Connection
The LTC3780 contains an internal P-channel MOSFET switch connected between the EXTVCC and INTVCC pins. When the voltage applied to EXTVCC rises above 5.7V, the internal regulator is turned off and a switch connects the EXTVCC pin to the INTVCC pin thereby supplying internal power. The switch remains closed as long as the voltage applied to EXTVCC remains above 5.5V. This allows the MOSFET driver and control power to be derived from the output when (5.7V < VOUT < 7V) and from the internal regulator when the output is out of regulation (start-up, short-circuit). If more current is required through the EXTVCC switch than is specified, an external Schottky diode can be interposed between the EXTVCC and INTVCC pins. Ensure that EXTVCC ≤ VIN. The following list summarizes the three possible connections for EXTVCC: 1. EXTVCC left open (or grounded). This will cause INTVCC to be powered from the internal 6V regulator at the cost of a small efficiency penalty. 2. EXTVCC connected directly to VOUT (5.7V < VOUT < 7V). This is the normal connection for a 6V regulator and provides the highest efficiency. 3. EXTVCC connected to an external supply. If an external supply is available in the 5.5V to 7V range, it may be used to power EXTVCC provided it is compatible with the MOSFET gate drive requirements. Output Voltage The LTC3780 output voltage is set by an external feedback resistive divider carefully placed across the output capacitor. The resultant feedback signal is compared with the internal precision 0.800V voltage reference by the error amplifier. The output voltage is given by the equation: ⎛ R2 ⎞ VOUT = 0.8 V • ⎜ 1 + ⎟ ⎝ R1⎠
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Topside MOSFET Driver Supply (CA, DA, CB, DB) Referring to Figure 11, the external bootstrap capacitors CA and CB connected to the BOOST1 and BOOST2 pins supply the gate drive voltage for the topside MOSFET Switches A and D. When the top MOSFET Switch A turns on, the switch node SW2 rises to VIN and the BOOST2 pin rises to approximately VIN + INTVcc. When the bottom MOSFET Switch B turns on, the switch node SW2 drops to low and the boost capacitor CB is charged through DB from INTVCC. When the top MOSFET Switch D turns on, the switch node SW1 rises to VOUT and the BOOST1 pin rises to approximately VOUT + INTVCC. When the bottom MOSFET Switch C turns on, the switch node SW1 drops to low and the boost capacitor CA is charged through DA from INTVCC. The boost capacitors CA and CB need to store about 100 times the gate charge required by the top MOSFET Switch A and D. In most applications a 0.1µF to 0.47µF, X5R or X7R dielectric capacitor is adequate. Run Function The RUN pin provides simple ON/OFF control for the LTC3780. Driving the RUN pin above 1.5V permits the controller to start operating. Pulling RUN below 1.5V puts the LTC3780 into low current shutdown. Do not apply more than 6V to the RUN pin. Soft-Start Function Soft-start reduces the input power sources’ surge currents by gradually increasing the controller’s current limit (proportional to an internally buffered and clamped equivalent of VITH). An internal 1.2µA current source charges up the CSS capacitor. As the voltage on SS increases from 0V to 2.4V, the internal current limit rises from 0V/RSENSE to 150mV/RSENSE. The output current limit ramps up slowly, taking 1.5s/µF to reach full current. The output current thus ramps up slowly, eliminating the starting surge current required from the input power supply.
TIRMP = 2.4V • CSS = (1.5s /µF ) • CSS 1.2µA
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Do not apply more than 6V to the SS pin.
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The Standby Mode (STBYMD) Pin Function
The Standby mode (STBYMD) pin provides several choices for start-up and standby operational modes. If the pin is pulled to ground, the SS pin is internally pulled to ground, preventing start-up and thereby providing a single control pin for turning off the controller. If the pin is left open or decoupled with a capacitor to ground, the SS pin is internally provided with a starting current, permitting external control for turning on the controller. If the pin is connected to a voltage greater than 1.25V, the internal regulator (INTVCC) will be on even when the controller is shut down (RUN pin voltage < 1.5V). In this mode, the onboard 6V linear regulator can provide power to keepalive functions such as a keyboard controller. FCB Pin Regulates Secondary Winding in Buck Mode In Buck mode, the FCB pin can be used to regulate a secondary winding or as a logic level input. Continuous operation is forced when the FCB pin drops below 0.8V. During continuous mode, current flows continuously in the transformer primary. The secondary winding(s) draw current only when Switch B and Switch D are on in Buck mode. When primary load currents are low and/or the VIN/VOUT ratio is low, the Synchronous Switch B may not be on for a sufficient amount of time to transfer power from the output capacitor to the secondary load. Forced continuous operation will support secondary windings if there is sufficient synchronous switch duty factor. Thus, the FCB input pin removes the requirement that power must be drawn from the auxiliary windings. With the loop in continuous mode, the auxiliary outputs may nominally be loaded without regard to the primary output load.
VSEC VIN R6 LTC3780 FCB R5 SGND BG2 TG2 A SW2 B
Figure 10. Secondary Output Loop
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The secondary output voltage VSEC is normally set as shown in Figure 10 by turns ratio N of the transformer: VSEC ≈ (N + 1) • VOUT However, if the controller goes into Burst Mode operation and halts switching due to a light primary load current, then VSEC will drop. An external resistive divider from VSEC to the FCB pin sets a minimum voltage VSEC(MIN): ⎛ R6 ⎞ VSEC(MIN) ≈ 0.8 • ⎜ 1 + ⎟ ⎝ R5 ⎠ If the VSEC drops below this level, the FCB voltage forces temporary continuous switching operation until VSEC is again above its minimum. In order to prevent erratic operation if no external connections are made to FCB pin, the FCB pin has a 0.18µA internal current source pulling the pin high. Include this current when choosing resistor values R5 and R6. Fault Conditions: Current Limit and Current Foldback The maximum inductor current is inherently limited in a current mode controller by the maximum sense voltage. In Boost mode, maximum sense voltage and the sense resistance determines the maximum allowed inductor peak current, which is:
IL(MAX,BOOST) = 160mV RSENSE
VOUT COUT
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•
T1 1:N
•
D SW1 C
TG1
BG1
RSENSE
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In Buck mode, maximum sense voltage and the sense resistance determines the maximum allowed inductor valley current, which is:
IL(MAX,BUCK) =
130mV RSENSE
To further limit current in the event of a short circuit to ground, the LTC3780 includes foldback current limiting. If the output falls by more than 30%, then the maximum sense voltage is progressively lowered to about one third of its full value. Fault Conditions: Overvoltage Protection A comparator monitors the output for overvoltage conditions. The comparator (OV) detects overvoltage faults greater than 7.5% above the nominal output voltage. When the condition is sensed, Switches A and C are turned off, and Switches B and D are turned on until the overvoltage condition is cleared. During an overvoltage condition, a negative current limit (VSENSE = – 60mV) is set to limit negative inductor current. When the sensed current inductor current is lower than –60mV, Switch A and C are turned on, and Switch B and D are turned off until the sensed current is higher than –20mV. If the output is still in overvoltage condition, Switch A and C are turned off, and Switch B and D are turned on again. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in circuit produce losses, four main sources account for most of the losses in LTC3780 circuits: 1. DC I2R losses. These arise from the resistances of the MOSFETs, sensing resistor, inductor and PC board traces and cause the efficiency to drop at high output currents.
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2. Transition loss. This loss arises from the brief amount of time Switch A or Switch C spends in the saturated region during switch node transitions. It depends upon the input voltage, load current, driver strength and MOSFET capacitance, among other factors. The loss is significant at input voltages above 20V and can be estimated from: Transition Loss ≈ 1.7A–1 • VIN2 • IOUT • CRSS • f where CRSS is the reverse transfer capacitance. 3. INTVCC current. This is the sum of the MOSFET driver and control currents. This loss can be reduced by supplying INTVCC current through the EXTVCC pin from a high efficiency source, such as an output derived boost network or alternate supply if available. 4. CIN and COUT loss. The input capacitor has the difficult job of filtering the large RMS input current to the regulator in Buck mode. The output capacitor has the more difficult job of filtering the large RMS output current in Boost mode. Both CIN and COUT are required to have low ESR to minimize the AC I2R loss and sufficient capacitance to prevent the RMS current from causing additional upstream losses in fuses or batteries. 5. Other losses. Schottky diode D1 and D2 are responsible for conduction losses during dead time and light load conduction periods. Inductor core loss occurs predominately at light loads. Switch C causes reverse recovery current loss in Boost mode. When making adjustments to improve efficiency, the input current is the best indicator of changes in efficiency. If you make a change and the input current decreases, then the efficiency has increased. If there is no change in input current, then there is no change in efficiency. Design Example As a design example, assume VIN = 5V to 18V (12V nominal), VOUT = 12V (5%), IOUT(MAX) = 5A and f = 400kHz.
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Tie the PLLFLTR pin to INTVCC for 400kHz operation. The inductance value is chosen first based on a 30% ripple current assumption. In Buck mode, the ripple current is:
∆IL,BUCK = VOUT f •L ⎛V⎞ • ⎜ 1 – OUT ⎟ ⎝ VIN ⎠
The highest value of ripple current occurs at the maximum input voltage. In Boost mode, the ripple current is:
∆IL,BOOST =
VIN ⎛ V⎞ • ⎜ 1 – IN ⎟ f • L ⎝ VOUT ⎠
The highest value of ripple current occurs at VIN = VOUT/2. A 6.8µH inductor will produce 13% ripple in Boost mode (VIN = 6V) and 29% ripple in Buck mode (VIN = 18V). The RSENSE resistor value can be calculated by using the maximum current sense voltage specification with some accommodation for tolerances. RSENSE =
(
2 • 160mV • VIN 2 • IOUT(MAX,BOOST) + ∆IL,BOOST • VOUT
)
Select an RSENSE of 10mΩ. Output voltage is 12V. Select R1 as 20k. R2 is: V • R1 R2 = OUT – R1 0.8 Select R2 as 280k. Both R1 and R2 should have a tolerance of no more than 1%. Next, choose the MOSFET switches. A suitable choice is the Siliconix Si4840 (RDS(ON) = 0.009Ω (at VGS = 6V), CRSS = 150pF, θJA = 40°C/W). The maximum power dissipation of Switch A occurs in Boost mode when Switch A stays on all the time. Assuming a junction temperature of TJ = 150°C with ρ150°C = 1.5, the power dissipation at VIN = 5V is: ⎛ 12 ⎞ PA,BOOST = ⎜ • 5⎟ • 1.5 • 0.009 = 1.94W ⎝5 ⎠
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Double-check the TJ in the MOSFET with 70°C ambient temperature: TJ = 70°C + 1.94W • 40°C/W = 147.6°C The maximum power dissipation of Switch B occurs in Buck mode. Assuming a junction temperature of TJ = 80°C with ρ80°C = 1.2, the power dissipation at VIN = 18V is: PB,BUCK = 18 – 12 2 • 5 • 1.2 • 0.009 = 135mW 12 Double-check the TJ in the MOSFET at 70°C ambient temperature: TJ = 70°C + 0.135W • 40°C/W = 75.4°C The maximum power dissipation of Switch C occurs in Boost mode. Assuming a junction temperature of TJ = 110°C with ρ110°C = 1.4, the power dissipation at VIN = 5V is:
PC,BOOST =
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(12 – 5) • 12 • 52 • 1.4 • 0.009
52 + 2 • 123 • 5 • 150p • 400k = 1.08W 5
Double-check the TJ in the MOSFET at 70°C ambient temperature: TJ = 70°C + 1.08W • 40°C/W = 113°C The maximum power dissipation of Switch D occurs in Boost mode when its duty cycle is higher than 50%. Assuming a junction temperature of TJ = 100°C with ρ100°C = 1.35, the power dissipation at VIN = 5V is: PD,BUCK = 5 ⎛ 12 ⎞ • ⎜ • 5⎟ • 1.35 • 0.009 = 0.73W 12 ⎝ 5 ⎠
2
Double-check the TJ in the MOSFET at 70°C ambient temperature: TJ = 70°C + 0.73W • 40°C/W = 99°C CIN is chosen to filter the square current in Buck mode. In this mode, the maximum input current peak is: IIN,PEAK(MAX,BUCK) = 5 • (1 + 29%) = 6.5A
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APPLICATIO S I FOR ATIO
A low ESR (10mΩ) capacitor is selected. Input voltage ripple is 65mV. COUT is chosen to filter the square current in Boost mode. In this mode, the maximum output current peak is: IOUT,PEAK(MAX,BUCK) = 12 • 5 • (1 + 13%) = 13.6 A 5
A low ESR (5mΩ) capacitor is suggested. This capacitor will limit output voltage ripple to 68mV. PC Board Layout Checklist The basic PC board layout requires a dedicated ground plane layer. Also, for high current, a multilayer board provides heat sinking for power components. • The ground plane layer should not have any traces and it should be as close as possible to the layer with power MOSFETs. • Place CIN, Switch A, Switch B and D2 in one compact area. Place COUT, Switch C, Switch D and D1 in one compact area. • Use immediate vias to connect the components (including the LTC3780’s SGND and PGND pins) to the ground plane. Use several large vias for each power component. • Use planes for VIN and VOUT to maintain good voltage filtering and to keep power losses low. • Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. Connect the copper areas to any DC net (VIN or GND). When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3780. These items are also illustrated in Figure 11. • Segregate the signal and power grounds. All small signal components should return to the SGND pin at one point which is then tied to the PGND pin close to the sources of Switch B and Switch C.
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• Place Switch B and Switch C as close to the controller as possible, keeping the PGND, BG and SW traces short. • Keep the high dV/dT SW1, SW2, BOOST1, BOOST2, TG1 and TG2 nodes away from sensitive small-signal nodes. • The path formed by Switch A, Switch B, D2 and the CIN capacitor should have short leads and PC trace lengths. The path formed by Switch C, Switch D, D1 and the COUT capacitor also should have short leads and PC trace lengths. • The output capacitor (–) terminals should be connected as close as possible the (–) terminals of the input capacitor. • Connect the INTVCC decoupling capacitor CVCC closely to the INTVCC and PGND pins. • Connect the top driver boost capacitor CA closely to the BOOST1 and SW1 pins. Connect the top driver boost capacitor CB closely to the BOOST2 and SW2 pins. • Connect the input capacitors CIN and output capacitors COUT close to the power MOSFETs. These capacitors carry the MOSFET AC current in Boost and Buck mode. • Connect VOSENSE pin resistive dividers to the (+) terminals of COUT and signal ground. A small VOSENSE decoupling capacitor should be as close as possible to the LTC3780 SGND pin. The R2 connection should not be along the high current or noise paths, such as the input capacitors. • Route SENSE– and SENSE+ leads together with minimum PC trace spacing. The filter capacitor between SENSE+ and SENSE– should be as close as possible to the IC. Ensure accurate current sensing with Kelvin connections at the SENSE resistor. • Connect the ITH pin compensation network close to the IC, between ITH and the signal ground pins. The capacitor helps to filter the effects of PCB noise and output voltage ripple voltage from the compensation loop.
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LTC3780
APPLICATIO S I FOR ATIO
• Connect the INTVCC decoupling capacitor close to the IC, between the INTVCC and the power ground pins. This capacitor carries the MOSFET drivers’ current
RPU VPULLUP CSS 1 2 PGOOD BOOST1 SS LTC3780 CC2 CC1 RC R2 3 4 5 6 7 8 9 10 SENSE+ SENSE– ITH SW1 VIN EXTVCC 22 21 20 19 18 17 16 15 DB fIN 11 12 PLLIN TG2 14 13 RIN
3780 F11
TG1
R1
VOSENSE INTVCC SGND RUN FCB PLLFLTR BG1 PGND BG2 SW2
STBYMD BOOST2
Figure 11. LTC3780 Layout Diagram
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peaks. An additional 1µF ceramic capacitor placed immediately next to the INTVcc and PGND pins can help improve noise performance substantially.
VOUT CA COUT 24 23 DA CF D D2 C L RSENSE B D1 CVCC A CB CIN VIN
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LTC3780
PACKAGE DESCRIPTIO
7.8 – 8.2
0.42 ± 0.03 RECOMMENDED SOLDER PAD LAYOUT
5.00 – 5.60** (.197 – .221)
0.09 – 0.25 (.0035 – .010)
0.55 – 0.95 (.022 – .037)
NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
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G Package 24-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
1.25 ± 0.12 7.90 – 8.50* (.311 – .335) 24 23 22 21 20 19 18 17 16 15 14 13 5.3 – 5.7 7.40 – 8.20 (.291 – .323) 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 2.0 (.079) MAX
0° – 8°
0.65 (.0256) BSC
0.22 – 0.38 (.009 – .015) TYP
0.05 (.002) MIN
G24 SSOP 0204
3780f
LTC3780
PACKAGE DESCRIPTIO
5.50 ± 0.05 4.10 ± 0.05 3.45 ± 0.05 (4 SIDES)
RECOMMENDED SOLDER PAD LAYOUT 5.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) 0.75 ± 0.05 0.00 – 0.05 R = 0.115 TYP 31 32
NOTE: 1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE M0-220 VARIATION WHHD-(X) (TO BE APPROVED) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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UH Package 32-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1693)
0.70 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 0.40 ± 0.10 1 2 3.45 ± 0.10 (4-SIDES)
(UH32) QFN 1004
0.200 REF
0.25 ± 0.05
0.50 BSC 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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LTC3780
TYPICAL APPLICATIO
CSS 6.8nF CC2 47pF 68pF CC1 3300pF R1 20k RC 5.6k R2 280k
1 2
3 4 5 6 7
ON/OFF
8 9
INTVCC
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11 12 CSTBYMD 0.01µF
RELATED PARTS
PART NUMBER LT1074HV/LT1076HV LT1339 LTC1702A LTC1735 LTC1778 LT1956 LT3010 LT3430/LT3431 LT3433 LTC®3443 LTC3703 DESCRIPTION Monolithic 5A/2A Step-Down DC/DC Converters High Power Synchronous DC/DC Controller Dual, 2-Phase Synchronous DC/DC Controller Synchronous Step-Down DC/DC Controller No RSENSE Synchronous DC/DC Controller Monolithic 1.5A, 500kHz Step-Down Regulator 50mA, 3V to 80V Linear Regulator Monolithic 3A, 200kHz/500kHz Step-Down Regulator Monolithic Step-Up/Step-Down DC/DC Converter Monolithic Buck-Boost Converter 100V Synchronous DC/DC Controller COMMENTS VIN up to 60V, TO-220 and DD Packages VIN up to 60V, Drivers 10,000pF Gate Capacitance, IOUT ≤ 20A 550kHz Operation, No RSENSE, 3V ≤ VIN ≤ 7V, IOUT ≤ 20A 3.5V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤6V, Current Mode, IOUT ≤ 20A 4V ≤ VIN ≤ 36V, Fast Transient Response, Current Mode, IOUT ≤ 20A 5.5V ≤ VIN ≤ 60V, 2.5mA Supply Current, 16-Pin SSOP 1.275V ≤ VOUT ≤ 60V, No Protection Diode Required, 8-Lead MSOP 5.5V ≤ VIN ≤ 60V, 0.1Ω Saturation Switch, 16-Pin SSOP 4V ≤ VIN ≤ 60V, 500mA Switch, Automatic Step-Up/Step-Down, Single Inductor 2.4V ≤ VIN ≤ 5.5V, 96% Efficiency, 600kHz Operation, 2A Switch VIN up to 100V, 9.3V to 15V Gate Drive Supply
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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RPU VPULLUP PGOOD BOOST1 SS LTC3780 SENSE
+
CA 0.22µF
24 23 DA 1N5819HW CF 0.1µF CVCC 4.7µF
D2 B320A D Si7884DP
COUT 200µF
VOUT 12V 5A
TG1
SW1 VIN EXTVCC
22 21 20 19 18 17 16 15
SENSE– ITH
C Si7884DP
VOSENSE INTVCC SGND RUN FCB PLLFLTR BG1 PGND BG2 SW2
L 6.8µF
10mΩ
D1 B320A B Si7884DP
PLLIN
TG2
14 13
DB 1N5819HW
A Si7884DP CB 0.22µF
STBYMD BOOST2
CIN 47µF VIN
10Ω 100Ω 100Ω
3780 TA02
Figure 12. LTC3780 12V/3A, Buck-Boost Regulator
3780f LT/TP 0305 500 • PRINTED IN THE USA
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005