LTC3805EDD

FEATURES ■ ■ ■ LTC3805 Adjustable Frequency Current Mode Flyback DC/DC Controller DESCRIPTION The LTC®3805 is a current mode controller for flyback DC/DC converters designed to drive an N-channel MOSFET in high input and output voltage converter applications. Operating frequency and slope compensation can be programmed by external resistors. Programmable overcurrent sensing protects the converter from short-circuits. Softstart can be programmed using an external capacitor and the soft-start capacitor also programs an automatic restart feature. The LTC3805 provides ±1.5% output voltage accuracy and consumes only 360μA of quiescent current during normal operation and only 40μA during micropower startup. Using a 9.5V internal shunt regulator, the LTC3805 can be powered from a high VIN through a resistor or it can be powered directly from a low impedance DC voltage of 9V or less. The LTC3805 is available in the 10-lead MSOP package and the 3mm × 3mm DFN package. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. ■ ■ ■ ■ ■ ■ ■ ■ VIN and VOUT Limited Only by External Components Adjustable Slope Compensation Adjustable Overcurrent Protection with Automatic Restart Adjustable Operating Frequency (70kHz to 700kHz) with One External Resistor Synchronizable to an External Clock ±1.5% Reference Accuracy Current Mode Operation for Excellent Line and Load Transient Response RUN Pin with Precision Threshold and Adjustable Hysteresis Programmable Soft-Start with One External Capacitor Low Quiescent Current: 360μA Small 10-Lead MSOP and 3mm × 3mm DFN APPLICATIONS ■ ■ ■ Telecom Power Supplies 42V and 12V Automotive Power Supplies Isolated Electronic Equipment TYPICAL APPLICATION 36V – 72V to 5V/2A Nonisolated Flyback Converter VIN 36V TO 72V VOUT 5V AT 2A 221k 100k 100μF ×2 EFFICIENCY (%) 100 90 80 70 60 50 40 30 1.33k OC ISENSE FB SYNC GND 3805 TA01a Efficiency and Power Loss vs Load Current; VO = 5V VIN = 48V 10 22μF ×2 EFFICIENCY POWER LOSS (W) 22μF 8.66k RUN LTC3805 ITH 20k 470pF 0.1μF 118k SSFLT FS VCC GATE LOSS 1 20 71.5k 10 0 0.01 68mΩ 13.7k 1 0.1 LOAD CURRENT (A) 0.1 10 3805 TA01b 3k 3805fb 1 LTC3805 ABSOLUTE MAXIMUM RATINGS (Note 1) VCC to GND Low Impedance Source ........................ –0.3V to 8.8V Current Fed ........................................25mA into VCC* SYNC ........................................................... –0.3V to 6V SSFLT ........................................................... –0.3V to 5V FB, ITH, FS ................................................. –0.3V to 3.5V RUN ........................................................... –0.3V to 18V OC, ISENSE .................................................... –0.3V to 1V Operating Ambient Temperature Range ...–40°C to 85°C Operating Junction Temperature ........................... 125°C Storage Temperature Range...................–65°C to 125°C Lead Temperature (Soldering, 10 sec) LTC3805EMSE Only .......................................... 300°C *LTC3805 internal clamp circuit regulates VCC voltage to 9.5V PIN CONFIGURATION TOP VIEW TOP VIEW SSFLT ITH FB RUN FS 1 2 3 4 5 11 10 GATE 9 VCC 8 OC 7 ISENSE 6 SYNC SSFLT ITH FB RUN FS 1 2 3 4 5 10 9 8 7 6 GATE VCC OC ISENSE SYNC 11 DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 45°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE CONNECTED TO GND MSE PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 45°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE CONNECTED TO GND ORDER INFORMATION LEAD FREE FINISH LTC3805EDD#PBF LTC3805EMSE#PBF LEAD BASED FINISH LTC3805EDD LTC3805EMSE TAPE AND REEL LTC3805EDD#TRPBF LTC3805EMSE#TRPBF TAPE AND REEL LTC3805EDD#TR LTC3805EMSE#TR PART MARKING LCJM LTCJK PART MARKING LCJM LTCJK PACKAGE DESCRIPTION 10-Lead (3mm × 3mm) Plastic DFN 10-Lead Plastic MSOP PACKAGE DESCRIPTION 10-Lead (3mm × 3mm) Plastic DFN 10-Lead Plastic MSOP TEMPERATURE RANGE –40°C to 85°C –40°C to 85°C TEMPERATURE RANGE –40°C to 85°C –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS SYMBOL VTURNON VTURNOFF VHYST VCLAMP1mA VCLAMP25mA PARAMETER VCC Turn-On Voltage VCC Turn-Off Voltage VCC Hysteresis VCC Shunt Regulator Voltage VCC Shunt Regulator Voltage The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VCC = 8V, unless otherwise noted (Note 2). CONDITIONS ● ● MIN 8 3.75 8.8 8.9 TYP 8.4 3.95 4.5 9.25 9.5 MAX 9 4.15 9.65 9.9 UNITS V V V V V 3805fb ICC = 1mA, VRUN = 0 ICC = 25mA, VRUN = 0 ● ● 2 LTC3805 ELECTRICAL CHARACTERISTICS SYMBOL ICC PARAMETER Input DC Supply Current The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VCC = 8V, unless otherwise noted (Note 2). CONDITIONS Normal Operation (fOSC = 200kHz) (Note 4) VRUN < VRUNON or VCC < VTURNON – 100mV (Micropower Start-Up) ● ● ● ● MIN TYP 360 40 MAX UNITS μA 90 1.292 1.248 5.8 0.812 0.812 μA V V μA V V nA μA/V mV/V mV/μA mV/μA kHz kHz VRUNON VRUNOFF IRUN(HYST) VFB IFB gm ΔVO(LINE) ΔVO(LOAD) fOSC DCON(MIN) DCON(MAX) fSYNC VSYNC ISS IFTO tSS(INT) tFTO(INT) tRISE tFALL VI(MAX) ISL(MAX) VOCT IOC RUN Turn-On Voltage RUN Turn-Off Voltage RUN Hysteresis Current Regulated Feedback Voltage VFB Input Current Error Amplifier Transconductance Output Voltage Line Regulation Output Voltage Load Regulation Oscillator Frequency Minimum Switch-On Duty Cycle Maximum Switch-On Duty Cycle As a Function of fOSC Minimum SYNC Amplitude Soft-Start Current Fault Timeout Current Internal Soft-Start Time Internal Fault Timeout Gate Drive Rise Time Gate Drive Fall Time Peak Current Sense Voltage Peak Slope Compensation Output Current Overcurrent Threshold Overcurrent Threshold Adjust Current VCC = VTURNON + 100mV VCC = VTURNON + 100mV 0°C ≤ TA ≤ 85°C (Note 5) –40°C ≤ TA ≤ 85°C (Note 5) VITH = 1.3V (Note 5) ITH Pin Load = ±5μA (Note 5) VTURNOFF < VCC < VCLAMP1mA (Note 5) ITH Sinking 5μA (Note 5) ITH Sourcing 5μA (Note 5) RFS = 350k RFS = 36k fOSC = 200kHz fOSC = 200kHz 70kHz < fOSC < 700kHz, 70kHz < fSYNC < 700kHz 1.122 1.092 4 0.788 0.780 1.207 1.170 5 0.800 0.800 20 333 0.05 3 3 70 700 6 ● 9 95 133 2.9 % % % V μA μA ms ms ns ns 70 67 80 –6 2 No External Capacitor on SSFLT No External Capacitor on SSFLT CLOAD = 3000pF CLOAD = 3000pF RSL = 0 (Note 6) (Note 7) ROC = 0 (Note 8) ● ● 1.8 4.5 30 30 85 100 10 85 100 10 115 115 mV μA mV μA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3805E is guaranteed to meet specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • 45°C/W) Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 5: The LTC3805 is tested in a feedback loop that servos VFB to the output of the error amplifier while maintaining ITH at the midpoint of the current limit range. Note 6: Peak current sense voltage is reduced dependent on duty cycle and an optional external resistor in series with the SENSE pin. For details, refer to Programmable Slope Compensation in the Applications Information section. Note 7: Guaranteed by design. Note 8: Overcurrent threshold voltage is reduced dependent on an optional external resistor in series with the OC pin. For details, refer to Programmable Overcurrent in the Applications Information section. 3805fb 3 LTC3805 TYPICAL PERFORMANCE CHARACTERISTICS Reference Voltage vs Temperature 812 808 VFB VOLTAGE (mV) 804 VFB (V) 800 796 792 788 –50 0.800300 0.800200 0.800100 0.800000 0.799900 0.799800 0.799700 –25 0 25 50 75 TEMPERATURE (°C) 100 125 4 5 6 7 VCC (V) 3805 G01 3805 G02 Reference Voltage vs Supply Voltage 800 700 600 fOSC (kHz) 8 9 10 500 400 300 200 100 0 Oscillator Frequency vs RFS 0 100 200 RFS (kΩ) 300 400 3805 G03 Oscillator Frequency vs Supply Voltage 203 OSCILLATOR FREQUENCY (kHz) 202 201 fOSC (kHz) 200 199 198 197 196 4 5 6 VCC (V) 3805 G04 Oscillator Frequency vs Temperature 202 1.205 1.200 201 RFS = 124kΩ 200 RUN VOLTAGE (V) 1.195 1.190 1.185 1.180 1.175 198 –50 RUN Undervoltage Lockout Thresholds vs Temperature VRUN(ON) RFS = 124kΩ 199 VRUN(OFF) 7 8 9 –25 75 0 25 50 TEMPERATURE (°C) 100 125 1.170 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 3805 G05 3805 G06 RUN Hysteresis Current vs Temperature 5.20 VCC UNDERVOLTAGE LOCKOUT (V) 9.50 8.50 7.50 6.50 5.50 4.50 VCC Undervoltage Lockout Thresholds vs Temperature VTURN(ON) 5.10 IRUN(HYST) 5.00 4.90 4.80 VTURN(OFF) 4.70 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 3.50 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 3805 G07 3805 G08 3805fb 4 LTC3805 TYPICAL PERFORMANCE CHARACTERISTICS Start-Up ICC Supply Current vs Temperature 50 START-UP SUPPLY CURRENT (μA) 48 46 44 42 40 38 36 34 32 30 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 300 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 SUPPLY CURRENT (μA) 340 350 ICC Supply Current vs Temperature 9.60 9.55 9.50 VCLAMP (V) 9.45 9.40 9.35 9.30 9.25 VCC Shunt Regulator Voltage vs Temperature VCLAMP25mA 330 320 310 VCLAMP1mA 9.20 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 3805 G09 3805 G10 3805 G11 Peak Current Sense Voltage vs Temperature 100.8 PEAK CURRENT SENSE VOLTAGE (mV) 100.6 SUPPLY CURRENT (μA) 100.4 100.2 100.0 99.8 99.6 99.4 99.2 99.0 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 102 104 Overcurrent Threshold vs Temperature 1.75 INTERNAL SOFT-START TIME (ms) 1.70 1.65 1.60 1.55 1.50 Internal Soft-Start Time vs Temperature 100 98 96 94 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 1.45 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 3805 G12 3805 G13 3805 G14 External Soft-Start Current vs Temperature 5.3 5.2 ISS SOFT-START CURRENT (μA) 5.1 5.0 4.9 4.8 4.7 4.6 4.5 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 IFTO EXTERNAL TIMEOUT CURRENT (μA) 2.1 2.0 1.9 1.8 1.7 1.6 External Timeout Current vs Temperature 1.5 –50 –25 75 0 25 50 TEMPERATURE (°C) 100 125 3805 G15 3805 G16 3805fb 5 LTC3805 PIN FUNCTIONS SSFLT (Pin 1): Soft-Start Pin. A capacitor placed from this pin to GND (Exposed Pad) controls the rate of rise of converter output voltage during start-up. This capacitor is also used for time out after a fault prior to restart. ITH (Pin 2): Error Amplifier Compensation Point. Normal operating voltage range is clamped between 0.7V and 1.9V. FB (Pin 3): Receives the feedback voltage from an external resistor divider across the output. RUN (Pin 4): An external resistor divider connects this pin to VIN and sets the thresholds for converter operation. FS (Pin 5): A resistor connected from this pin to ground sets the frequency of operation. SYNC (Pin 6): Input to synchronize the oscillator to an external source. ISENSE (Pin 7): Performs two functions: for current mode control, it monitors the switch current, using the voltage across an external current sense resistor. Pin 7 also injects a current ramp that develops slope compensation voltage across an optional external programming resistor. OC (Pin 8): Overcurrent Pin. Connect this pin to the external switch current sense resistor. An additional resistor programs the overcurrent trip level. VCC (Pin 9): Supply Pin. A capacitor must closely decouple VCC to GND (Exposed Pad). GATE (Pin 10): Gate Drive for the External N-Channel MOSFET. This pin swings from GND to VCC. Exposed Pad (Pin 11): Ground. A capacitor must closely decouple GND to VCC (Pin 9). Must be soldered to electrical ground on PCB. 3805fb 6 LTC3805 BLOCK DIAGRAM 9 VCC 4 RUN 800mV REFERENCE SSFLT 1 SOFT-START RAMP UNDERVOLTAGE LOCKOUT SHUTDOWN 10μA OC OVERCURRENT COMPARATOR SOFT-START FAULT 8 + 100mV – + ERROR AMPLIFIER CURRENT COMPARATOR R Q S SWITCHING LOGIC AND BLANKING CIRCUIT GATE DRIVER GATE FB 3 – SHUTDOWN ITH CLAMPS 20mV OSCILLATOR SLOPE COMP CURRENT RAMP GND 11 1.2V ITH FS SYNC 2 + 5 6 – 10 ISENSE 7 3805 BD 3805fb 7 LTC3805 OPERATION The LTC3805 is a programmable-frequency current mode controller for flyback, boost and SEPIC DC/DC converters. The LTC3805 is designed so that none of its pins need to come in contact with the input or output voltages of the power supply circuit of which it is a part, allowing the conversion of voltages well beyond the LTC3805’s absolute maximum ratings. Main Control Loop Please refer to the Block Diagram of this data sheet and the Typical Application shown on the front page. An external resistive voltage divider presents a fraction of the output voltage to the FB pin. The divider is designed so that when the output is at the desired voltage, the FB pin voltage equals the 800mV internal reference voltage. If the load current increases, the output voltage decreases slightly, causing the FB pin voltage to fall below the 800mV reference. The error amplifier responds by feeding current into the ITH pin causing its voltage to rise. Conversely, if the load current decreases, the FB voltage rises above the 800mV reference and the error amplifier sinks current away from the ITH pin causing its voltage to fall. The voltage at the ITH pin controls the pulse-width modulator formed by the oscillator, current comparator and SR latch. Specifically, the voltage at the ITH pin sets the current comparator’s trip threshold. The current comparator’s ISENSE input monitors the voltage across an external current sense resistor in series with the source of the external MOSFET. At the start of a cycle, the LTC3805’s oscillator sets the SR latch and turns on the external power MOSFET. The current through the external power MOSFET rises as does the voltage on the ISENSE pin. The LTC3805’s current comparator trips when the voltage on the ISENSE pin exceeds a voltage proportional to the voltage on the ITH pin. This resets the SR latch and turns off the external power MOSFET. In this way, the peak current levels through the external MOSFET and the flyback transformer’s primary and secondary windings are controlled by the voltage on the ITH pin. If the current comparator does not trip, the LTC3805 automatically limits the duty cycle to 80%, resets the SR latch, and turns off the external MOSFET. The path from the FB pin, through the error amplifier, current comparator and the SR latch implements the closed-loop current-mode control required to regulate the output voltage against changes in input voltage or output current. For example, if the load current increases, the output voltage decreases slightly, and sensing this, the error amplifier sources current from the ITH pin, raising the current comparator threshold, thus increasing the peak currents through the transformer primary and secondary. This delivers more current to the load and restores the output voltage to the desired level. The ITH pin serves as the compensation point for the control loop. Typically, an external series RC network is connected from ITH to ground and is chosen for optimal response to load and line transients. The impedance of this RC network converts the output current of the error amplifier to the ITH voltage which sets the current comparator threshold and commands considerable influence over the dynamics of the voltage regulation loop. 3805fb 8 LTC3805 OPERATION Start-Up/Shutdown The LTC3805 has two shutdown mechanisms to disable and enable operation: an undervoltage lockout on the VCC supply pin voltage, and a precision-threshold RUN pin. The voltage on both pins must exceed the appropriate threshold before operation is enabled. The LTC3805 transitions into and out of shutdown according to the state diagram shown in Figure 1. Operation in fault timeout is discussed in a subsequent section. During shutdown the LTC3805 draws only a small 40μA current. The undervoltage lockout (UVLO) mechanism prevents the LTC3805 from trying to drive the external MOSFET gate with insufficient voltage on the VCC pin. The voltage at the VCC pin must initially exceed VTURNON = 8.4V to enable LTC3805 operation. After operation is enabled, the voltage on the VCC pin may fall as low as VTURNOFF = 4V before undervoltage lockout disables the LTC3805. This wide UVLO hysteresis range supports the use of trickle charger powering schemes. See the Applications Information section for more detail. The RUN pin is connected to the input voltage using a voltage divider. Converter operation is enabled when the voltage on the RUN pin exceeds VRUNON = 1.207V and disabled when the voltage falls below VRUNOFF = 1.170V. Additional hysteresis is added by a 5μA current source acting on the voltage divider’s Thevenin resistance. Setting the input voltage range and hysteresis is further discussed in the Applications Information section. Setting the Oscillator Frequency Connect a frequency set resistor RFS from the FS pin to ground to set the oscillator frequency over a range from 70kHz to 700kHz. The oscillator frequency is calculated from: 24 • 10 9 fOSC = RFS − 1500 The oscillator may be synchronized to an external clock using the SYNC input. The rising edge of the external clock on the SYNC pin triggers the beginning of a switching period, i.e., the GATE pin going high. The pulse width of the external clock is quite flexible. The clock must stay high only for about 200ns to trigger the start of a new switching period. Conversely, the pulse width can be increased to a duty cycle not greater than 55%. Overcurrent Protection With the OC pin connected to the external MOSFET’s current sense resistor, the converter is protected in the event of an overload or short-circuit on the output. During normal operation the peak value of current in the external MOSFET, as measured by the current sense resistor (plus any adjustment for slope compensation), is set by the voltage on the ITH pin operating through the current comparator. As the output current increases, so does the voltage on the ITH pin and so does the peak MOSFET current. VRUN > VRUNON AND VCC > VTURNON LTC3805 SHUTDOWN VRUN < VRUNOFF LTC3805 ENABLED VCC < VTURNOFF VSSFLT < 0.7V LTC3805 FAULT TIMEOUT VOC > 100mV 3805 F01 Figure 1. Start-Up/Shutdown State Diagram 3805fb 9 LTC3805 OPERATION First, consider operation without overcurrent protection. For some maximum converter output current, the voltage on the ITH pin rises to and is clamped at approximately 1.9V. This corresponds to a 100mV limit on the voltage at the ISENSE pin. As the output current is further increased, the duty cycle is reduced as the output voltage sags. However, the peak current in the external MOSFET is limited by the 100mV threshold at the ISENSE pin. As the output current is increased further, eventually, the duty cycle is reduced to the 6% minimum. Since the external MOSFET is always turned on for this minimum amount of time, the current comparator no longer limits the current through the external MOSFET based on the 100mV threshold. If the output current continues to increase, the current through the MOSFET could rise to a level that would damage the converter. To prevent damage, the overcurrent pin OC is also connected to the current sense resistor, and a fault is triggered if the voltage on the OC pin exceeds 100mV. To protect itself, the converter stops operating as described in the next section. External resistors can be used to adjust the overcurrent threshold to voltages higher or lower than 100mV as described in the Applications Information section. Soft-Start and Fault Timeout Operation The soft-start and fault timeout of the LTC3805 uses either a fixed internal timer or an external timer programmed by a capacitor from the SSFLT pin to GND. The internal soft-start and fault timeout times are minimums and can be increased by placing a capacitor from the SSFLT pin to GND. Operation is shown in Figure 1. Leave the SSFLT pin open to use the internal soft-start and fault timeout. The internal soft-start is complete in about 1.8ms. In the event of an overcurrent as detected by the OC pin exceeding 100mV, the LTC3805 shuts down and an internal timing circuit waits for a fault timeout of about 4.25ms and then restarts the converter. Add a capacitor CSS from the SSFLT pin to GND to increase both the soft-start time and the time for fault timeout. During soft-start, CSS is charged with a 6μA current. When the LTC3805 comes out of shutdown, the LTC3805 quickly charges CSS to about 0.7V at which point GATE begins switching. From that point, GATE continues switching with increasing duty cycle until the SSFLT pin reaches about 2.25V at which point soft-start is over and closed-loop regulation begins. The voltage on the SSFLT pin additionally further charges to about 4.75V. CSS also performs the timeout function in the event of a fault. After a fault, CSS is slowly discharged from about 4.75V to about 0.7V by a 2μA current. When the voltage on the SSFLT pin reaches 0.7V the converter attempts to restart. More detail on programming the external soft-start fault timeout is described in the Applications Information section. Powering the LTC3805 A built-in shunt regulator from the VCC pin to GND limits the voltage on the VCC pin to approximately 9.5V as long as the shunt regulator is not forced to sink more than 25mA. The shunt regulator is always active, even when the LTC3805 is in shutdown, since it serves the vital function of protecting the VCC pin from overvoltage. The shunt regulator permits the use of a wide variety of powering schemes for the LTC3805 even from high voltage sources that exceed the LTC3805’s absolute maximum ratings. Further details on powering schemes are described in the Applications Information section. Adjustable Slope Compensation The LTC3805 injects a 10μA peak current ramp out of its ISENSE pin which can be used, in conjunction with an external resistor, for slope compensation in designs that require it. This current ramp is approximately linear and begins at zero current at 6% duty cycle, reaching peak current at 80% duty cycle. Additional details are provided in the Applications Information section. 3805fb 10 LTC3805 APPLICATIONS INFORMATION Many LTC3805 application circuits can be derived from the topology shown on the first page of this data sheet and from the topology shown in Figure 2. The LTC3805 itself imposes no limits on allowed input voltage VIN or output voltage VOUT. These are all determined by the ratings of the external power components. The factors are: Q1 maximum drain-source voltage (BVDSS), on-resistance (RDS(ON)) and maximum drain current, T1 saturation flux level and winding insulation breakdown voltages, CIN and COUT maximum working voltage, equivalent series resistance (ESR), and maximum ripple current ratings, and D1 and RSENSE power ratings. VCC Bias Power The VCC pin must be bypassed to the GND pin with a minimum 1μF ceramic or tantalum capacitor located immediately adjacent to the two pins. Proper supply bypassing is necessary to supply the high transient currents required by the MOSFET gate driver. For maximum flexibility, the LTC3805 is designed so that it can be operated from voltages well beyond the LTC3805’s absolute maximum ratings. Figure 2 shows the simplest case, in which the LTC3805 is powered with a resistor RVCC connected between the input voltage and VCC. The VIN 36V TO 72V CIN 2.2μF ×2 RSTART 100k CVCC 22μF R2 8.66k RUN ITH RITH 20k CITH 470pF CSS 0.1μF VCC LTC3805 OC RSLOPE 3k ISENSE GND 3805 F02 built-in shunt regulator limits the voltage on the VCC pin to around 9.5V as long as the internal shunt regulator is not forced to sink more than 25mA. This powering scheme has the drawback that the power loss in the resistor reduces converter efficiency and the 25mA shunt regulator maximum may limit the maximum-to-minimum range of input voltage. In some cases, the input or output voltage is within the operational range of VCC for the LTC3805. In this case, the LTC3805 is operated directly from either the input or output voltage. Figure 3 shows a 5V output converter in which RSTART and CVCC form a start-up trickle charger while D2 powers VCC from the output once the converter is in normal operation. Note that RSTART need only supply the very small 40μA micropower start-up current while VIN RVCC LTC3805 VCC CVCC GND 3805 F02 Figure 2. Powering the LTC3805 via the Internal Shunt Regulator R1 221k D2 PRI Q1 SEC R3 71.5k VOUT 5V AT 2A COUT 100μF ×2 GATE ROC 1.33k R4 13.7k SSFLT SYNC FS RFS 118k FB RSENSE 68mΩ Figure 3. Powering the LTC3805 From the Output 3805fb 11 LTC3805 APPLICATIONS INFORMATION CVCC is charged to VTURNON. At this point, assuming VRUN > VRUNON, the converter begins switching the external MOSFET and ramps up the converter output voltage at a rate set by the capacitor CSS on the SSFLT pin. Since RSTART cannot supply enough current to operate the external MOSFET, CVCC begins discharging and VCC drops. The soft-start must be fast enough and the discharge of CVCC slow enough so that the output voltage reaches its target value of 5V before VCC drops to VTURNOFF or the converter would fail to start. The typical application circuit in Figure 9 shows a different flyback converter bias power strategy for a case in which neither the input or output voltage is suitable for providing bias power to the LTC3805. A small NPN preregulator transistor and a zener diode are used to accelerate the rise of VCC and reduce the value of the VCC bias capacitor. The flyback transformer has an additional bias winding to provide bias power. Note that this topology is very powerful because, by appropriate choice of transformer turns ratio, the output voltage can be chosen without regard to the value of the input voltage or the VCC bias power for the LTC3805. The number of turns in the bias winding is chosen according to NBIAS = NSEC VCC + VD4 VOUT − VD1 Note that since VOUT is regulated by the converter control loop, VCC is also regulated although not as precisely. The value of VCC is often constrained since NBIAS and NSEC are often a limited range of small integer numbers. For proper operation, the value of VCC must be between VTURNON and VTURNOFF. Since the ratio of VTURNON to VTURNOFF is over two to one, this requirement is relatively easy to satisfy. Figure 10 shows a similar low power nonisolated telecom converter using a trickle charger. Transformer Design Considerations Transformer specification and design is perhaps the most critical part of applying the LTC3805 successfully. In addition to the usual list of caveats dealing with high frequency power transformer design, the following should prove useful. Turns Ratios Due to the use of the external feedback resistor divider ratio to set output voltage, the user has relative freedom in selecting transformer turns ratio to suit a given application. Simple ratios of small integers, e.g., 1:1, 2:1, 3:2, etc. can be employed which yield more freedom in setting total turns and transformer inductance. Simple integer turns ratios also facilitate the use of “off-the-shelf” configurable transformers. Turns ratio can be chosen on the basis of desired duty cycle. However, remember that the input supply voltage plus the secondary-to-primary referred version of the flyback pulse (including leakage spike) must not exceed the allowed external MOSFET breakdown rating. where NBIAS is the number of turns in the bias winding, NSEC is the number of turns in the secondary winding, VCC is the desired voltage to power the LTC3805, VOUT is the converter output voltage, VD1 is the forward voltage drop of D1 and VD4 is the forward voltage drop of D4. 3805fb 12 LTC3805 APPLICATIONS INFORMATION Leakage Inductance Transformer leakage inductance (on either the primary or secondary) causes a voltage spike to occur after the MOSFET (Q1) turn-off. This is increasingly prominent at higher load currents, where more stored energy must be dissipated. In some cases an RC “snubber” circuit will be required to avoid overvoltage breakdown at the MOSFET’s drain node. Application Note 19 is a good reference on snubber design. A bifilar or similar winding technique is a good way to minimize troublesome leakage inductances. However, remember that this will limit the primary-tosecondary breakdown voltage, so bifilar winding is not always practical. Setting Undervoltage and Hysteresis on VIN The RUN pin is connected to a resistive voltage divider connected to VIN as shown in Figure 4. The voltage threshold for the RUN pin is VRUNON rising and VRUNOFF falling. Note that VRUNON – VRUNOFF = 35mV of built-in voltage hysteresis that helps eliminate false trips. To introduce further user-programmable hysteresis, the LTC3805 sources 5μA out of the RUN pin when operation of LTC3805 is enabled. As a result, the falling threshold for the RUN pin also depends on the value of R1 and can be programmed by the user. The falling threshold for VIN is therefore VIN(RUN,FALLING) = VRUNOFF • R1 + R2 − R1• 5µA R2 VIN R1 RUN LTC3805 RUN/STOP CONTROL (OPTIONAL) where R1(5μA) is the additional hysteresis introduced by the 5μA current sourced by the RUN pin. When in shutdown, the RUN pin does not source the 5μA current and the rising threshold for VIN is simply VIN(RUN,RISING) = VRUNON • External Run/Stop Control To implement external run control, place a small N-channel MOSFET from the RUN pin to GND as shown in Figure 4. Drive the gate of this MOSFET high to pull the RUN pin to ground and prevent converter operation. Selecting Feedback Resistor Divider Values The regulated output voltage is determined by the resistor divider across VOUT (R3 and R4 in Figure 2). The ratio of R4 to R3 needed to produce a desired VOUT can be calculated: R3 = VOUT − 0.8V R4 0.8V R1 + R2 R2 Choose resistance values for R3 and R4 to be as large as possible in order to minimize any efficiency loss due to the static current drawn from VOUT, but just small enough so that when VOUT is in regulation the input current to the VFB pin is less than 1% of the current through R3 and R4. A good rule of thumb is to choose R4 to be less than 80k. R2 GND 3805 F04 Figure 4. Setting RUN Pin Voltage and Run/Stop Control 3805fb 13 LTC3805 APPLICATIONS INFORMATION Feedback in Isolated Applications Isolated applications do not use the FB pin and error amplifier but control the ITH pin directly using an optoisolator driven on the other side of the isolation barrier as shown in Figure 5. A detailed version is shown in Figure 9. For isolated converters, the FB pin is grounded which provides pull-up on the ITH pin. This pull-up is not enough to properly bias the optoisolator which is typically biased using a resistor to VCC. Since the ITH pin cannot sink the optoisolator bias current, a diode is required to block it from the ITH pin. A Schottky diode should be used to ensure that the optoisolator is able to pull ITH down to its lower clamp. Oscillator Synchronization The oscillator may be synchronized to an external clock by connecting the synchronization signal to the SYNC pin. The LTC3805 oscillator and turn-on of the switch are synchronized to the rising edge of the external clock. The frequency of the external sync signal must be ±33% with respect to fOSC (as programmed by RFS). Additionally, the value of fSYNC must be between 70kHz and 700kHz. Current Sense Resistor Considerations The external current sense resistor (RSENSE in Figure 2) allows the user to optimize the current limit behavior for the particular application. As the current sense resistor is varied from several ohms down to tens of milliohms, peak switch current goes from a fraction of an ampere to several amperes. Care must be taken to ensure proper circuit operation, especially with small current sense resistor values. ISOLATION BARRIER VCC LTC3805 ITH FB GND 3805 F05 For example, with the peak current sense voltage of 100mV on the ISENSE pin, a peak switch current of 5A requires a sense resistor of 0.020Ω. Note that the instantaneous peak power in the sense resistor is 0.5W and it must be rated accordingly. The LTC3805 has only a single sense line to this resistor. Therefore, any parasitic resistance in the ground side connection of the sense resistor will increase its apparent value. In the case of a 0.020Ω sense resistor, one milliohm of parasitic resistance will cause a 5% reduction in peak switch current. So the resistance of printed circuit copper traces and vias cannot necessarily be ignored. Programmable Slope Compensation The LTC3805 injects a ramping current through its ISENSE pin into an external slope compensation resistor RSLOPE. This current ramp starts at zero right after the GATE pin has been high for the LTC3805’s minimum duty cycle of 6%. The current rises linearly towards a peak of 10μA at the maximum duty cycle of 80%, shutting off once the GATE pin goes low. A series resistor RSLOPE connecting the ISENSE pin to the current sense resistor RSENSE develops a ramping voltage drop. From the perspective of the ISENSE pin, this ramping voltage adds to the voltage across the sense resistor, effectively reducing the current comparator threshold in proportion to duty cycle. This stabilizes the control loop against subharmonic oscillation. The amount of reduction in the current comparator threshold (ΔVSENSE) can be calculated using the following equation: Δ VSENSE = DutyCycle − 6% 10µA • R SLOPE 80% Note: LTC3805 enforces 6% < Duty Cycle < 80%. A good starting value for RSLOPE is 3k, which gives a 30mV drop in current comparator threshold at 80% duty cycle. Designs that do not operate at greater than 50% duty cycle do not need slope compensation and may replace RSLOPE with a direct connection. Figure 5. Circuit for Isolated Feedback 3805fb 14 LTC3805 APPLICATIONS INFORMATION Overcurrent Threshold Adjustment Figure 6 shows the connection of the overcurrent pin OC along with the ISENSE pin and the current sense resistor RSENSE located in the source circuit of the power NMOS which is driven by the GATE pin. The internal overcurrent threshold on the OC pin is set at VOCT = 100 mV which is the same as the peak current sense voltage VI(MAX) = 100 mV on the ISENSE pin. The role of the slope compensation adjustment resistor RSLOPE and the slope compensation current ISLOPE is discussed in the prior section. In combination with the overcurrent threshold adjust current IOC = 10μA, an external resistor ROC can be used to lower the overcurrent trip threshold from 100mV. This section describes how to pick ROC to achieve the desired performance. In the discussion that follows be careful to distinguish between “current limit” where the converter continues to run with the ISENSE pin limiting current on a cycle-by-cycle basis while the output voltage falls below the regulation point and “overcurrent protection” where the OC pin senses an overcurrent and shuts down the converter for a timeout period before attempting an automatic restart. One overcurrent protection strategy is for the converter to never enter current limit but to maintain output voltage regulation up to the point of tripping the overcurrent protection. Operation at minimum input voltage VIN(MIN) hits current limiting for the smallest output current and is the design point for this strategy. First, for operation at VIN(MIN), calculate the duty cycle Duty Cycle VIN(MIN) using the appropriate formula depending on whether the converter is a boost, flyback or SEPIC. Then use Duty Cycle VIN(MIN) to calculate ΔVSENSE(VIN(MIN)) using the formula in the prior section. For overcurrent protection to trip at exactly the point where current limiting would begin set: ROC(CRIT) = Δ VSENSE ( VIN(MIN)) 10µA To find the actual output current that trips overcurrent protection, calculate the peak switch current IPK(VIN(MIN)) from: 100mV − Δ VSENSE ( VIN(MIN)) IPK ( VIN(MIN)) = R SENSE Then calculate the converter output current that corresponds to IPK(VIN(MIN)). Again, the calculation depends both on converter type and the details of converter design including inductor current ripple. For minimum input voltage, ROC(CRIT) produces an overcurrent trip at an output current just before loss of output voltage regulation and the onset of current limiting. Note that the output current that causes an overcurrent trip is higher for higher input voltages but that an overcurrent trip will always occur before loss of output voltage regulation. If desired to meet a specific design target, an increase in ROC above ROC(CRIT) can be used to reduce the trip threshold and make the converter trip for a lower output current. This calculation is based on steady-state operation. Depending on design, overcurrent protection can also be triggered during a start up transient, particularly if large output filter capacitors are being charged as output voltage rises. If that is a problem, output capacitor charging can GATE LTC3805 ISENSE ROC OC IOC = 10μA RSENSE GND 3805 F06 RSLOPE ISLOPE Figure 6. Circuit to Decrease Overcurrent Threshold 3805fb 15 LTC3805 APPLICATIONS INFORMATION be slowed by using a larger value of SSFLT capacitor. It is also possible to trip overcurrent protection during a load step especially if the trip threshold is lowered by making ROC > ROC(CRIT). Another overcurrent protection strategy is keep the converter running as current limiting reduces the duty cycle and the output voltage sags. In this case, the goal is often keep the converter in normal operation over as wide a range as possible, including current limiting, and to trigger the overcurrent trip only to prevent damage. To implement this strategy use a value of ROC smaller than ROC(CRIT). This also reduces sensitivity to overcurrent trips caused by transient operation. In the limit, set ROC = 0 and connect the OC pin directly to RSENSE. This causes an overcurrent trip near minimum duty cycle or around 6%. In some cases it may be desirable to increase the trip threshold even further. In this strategy, the converter is allowed to operate all the way down to minimum duty cycle at which point the cycle-by-cycle current limit of the ISENSE pin is lost and switch current goes up proportionally to the output current. Figures 7 and 8 show two ways to do this. Figure 7 is for relatively low currents with relatively large values of RSENSE. Using this circuit the overcurrent trip threshold is increased from 100mV to: VOC = R SENSE1 + R SENSE2 100mV R SENSE1 For larger currents, values of the current sense resistors must be very small and the circuit of Figure 7 becomes impractical. The circuit of Figure 8 can be substituted and the current sense threshold is increased from 100mV to: R + R2 VOC = 1 100mV R1 where the values of R1 and R2 should be kept below 10Ω to prevent the IOC = 10μA threshold adjustment current from producing a shift in VOC. External Soft-Start Fault Timeout The external soft-start is programmed by a capacitor CSS from the SSFLT pin to GND. At the initiation of soft-start the voltage on the SSFLT pin is quickly charged to 0.7V at which point GATE begins switching. From that point, a 6μA current charges the voltage on the SSFLT pin until the voltage reaches about 2.25V at which point soft-start is over and the converter enters closed-loop regulation. The soft-start time tSS(EXT) as a function of the soft-start capacitor CSS is therefore t SS(EXT) = C SS 2.25 − 0.7V 6µA where it is assumed that the values of RSENSE1 and RSENSE2 are so small that the IOC = 10μA threshold adjustment current produces a negligible change in VOC. After soft-start is complete, the voltage on the SSFLT pin continues to charge to about a final value of 4.75V. Note that choosing a value of CSS less than 5.8nF has no effect since it would attempt to program an external soft-start time tSS(EXT) less than the mandatory minimum GATE LTC3805 ISENSE IOC = 10μA RSENSE2 RSLOPE ISLOPE GATE LTC3805 ISENSE IOC = 10μA OC RSENSE1 R1 GND 3805 F08 RSLOPE ISLOPE R2 OC RSENSE GND 3805 F07 Figure 7. Circuit to Increase the Overcurrent Threshold for Small Switch Currents Figure 8. Circuit to Increase the Overcurrent Threshold for Large Switch Currents 3805fb 16 LTC3805 APPLICATIONS INFORMATION internal soft-start time tSS(IN) = 1.8ms. However, in noisy environments a small CSS can be valuable to limit jitter in the oscillator. If there is an overcurrent fault detected on the OC pin, the LTC3805 enters a shutdown mode while a 2μA current discharges the voltage on the SSFLT pin from 4.75V to about 0.7V. The fault timeout tFTO(EXT) is therefore t FTO(EXT) = C SS 4.75V − 0.7V 2µA In the event of a persistent fault, such as a short-circuit on the converter output, the converter enters a “hiccup” mode where it continues to try and restart at repetition rate determined by CSS. If the fault is eventually removed the converter successfully restarts. At this point, the LTC3805 attempts a restart. TYPICAL APPLICATION VIN+ 36V TO 72V CIN1 2.2μF 100V CIN2 2.2μF 100V R3 221k Q2 MMBTA42 D2 PDZ6.8B 6.8V R23 221k D4 BAS516 R30 C16 51Ω 150pF R6 200V 220Ω T1 PA1861NL 4 7 8 10 1 9 5 +VOUT C01 100μF 6.3V C02 100μF 6.3V C03 100μF 6.3V VOUT+ 3.3V 3A D1 UPS840 2 R2 2Ω D6 BAT54CWTIG VOUT– VIN– Q1 FDC2512 VCC R11 6.8k RCS 0.068Ω D4 BAT760 C23, 0.1μF VCC U1 LTC3805EMSE GATE SSFLT ITH VCC FB OC ISENSE RUN FS GND SYNC 11 C17 4.7μF 10 9 8 7 6 D2 BAS516 R9 274Ω C18 330pF R12 100k ISO2 NECPS2801-1 C21 1μF C22 0.47μF C15 2200pF 250VAC C19 47pF U2 LT4430ES6 OPT 1 6 VIN OPTO 2 5 GND COMP 3 4 OC 0.6V FB C20 47nF R15 2.0k R14 22.1k VIN R5 221k 1 2 3 4 5 R20 118k R16, 1.33k R19 3.01k 3805 TA02a R8 8.66k Efficiency and Power Loss vs Load Current and VIN; VO = 3.3V 100 VIN 36V 48V 60V 72V 10 90 80 EFFICIENCY (%) NOTE: CAN ALSO USE TRICKLE CHARGER AS SHOWN IN FIGURE 10 Figure 9. Low Power Isolated Telecom Supply with NPN Preregulator 70 60 50 40 30 20 10 0 0.01 POWER LOSS (W) 1 1 0.1 LOAD CURRENT (A) 0 10 3805 TA02b 3805fb 17 LTC3805 PACKAGE DESCRIPTION DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) 0.675 ± 0.05 3.50 ± 0.05 1.65 ± 0.05 2.15 ± 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 0.38 ± 0.10 10 3.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 1.65 ± 0.10 (2 SIDES) (DD10) DFN 1103 5 0.200 REF 0.75 ± 0.05 2.38 ± 0.10 (2 SIDES) 1 0.25 ± 0.05 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3805fb 18 LTC3805 PACKAGE DESCRIPTION MSE Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1664) BOTTOM VIEW OF EXPOSED PAD OPTION 2.794 ± 0.102 (.110 ± .004) 0.889 ± 0.127 (.035 ± .005) 1 2.06 ± 0.102 (.081 ± .004) 1.83 ± 0.102 (.072 ± .004) 5.23 (.206) MIN 2.083 ± 0.102 3.20 – 3.45 (.082 ± .004) (.126 – .136) 10 0.50 0.305 ± 0.038 (.0197) (.0120 ± .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 10 9 8 7 6 0.497 ± 0.076 (.0196 ± .003) REF 4.90 ± 0.152 (.193 ± .006) 0.254 (.010) GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 1.10 (.043) MAX DETAIL “A” 0° – 6° TYP 12345 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 0.86 (.034) REF 0.50 (.0197) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.17 – 0.27 (.007 – .011) TYP 0.127 ± 0.076 (.005 ± .003) MSOP (MSE) 0603 3805fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3805 TYPICAL APPLICATION VIN+ 36V TO 72V CIN1 2.2μF 100V CIN2 2.2μF 100V R23 100k D4 BAS516 R30 51Ω 2 VIN– C16 150pF 200V R6 220Ω R12 42.2k R24 20k C23, 0.1μF VCC U1 LTC3805EMSE GATE SSFLT ITH VCC FB OC ISENSE RUN FS GND SYNC 11 C17 10μF 10 9 8 7 6 RCS 0.068Ω 3 Q1 FDC2512 R14 13.7k T1 PA1861NL 4 7 8 10 1 9 5 +VOUT C01 100μF 6.3V C02 100μF 6.3V C03 100μF 6.3V VOUT– VOUT+ 3.3V 3A D1 UPS840 C25 100pF C26 470pF C18 330pF VIN R5 221k 1 2 3 4 5 R20 118k R16, 1.33k R19 3.01k Efficiency and Power Loss vs Load Current and VIN; VO = 3.3V 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0.01 1 0.1 LOAD CURRENT (A) 0 10 3805 TA03b R8 8.66k VIN 36V 48V 60V 72V 10 POWER LOSS (W) NOTE: CAN ALSO USE NPN PREREGULATOR AS SHOWN IN FIGURE 9 3805 TA03a 1 Figure 10. Low Power Nonisolated Telecom Supply with Trickle Charger RELATED PARTS PART NUMBER LT1725 LTC1871 LT1950 LT1952 LTC3803 LT3825 DESCRIPTION General Purpose High Power Isolated Flyback Controller Wide Input Range, No RSENSETM Current Mode Boost, Flyback and SEPIC Controller Single Switch PWM Controller with Auxiliary Boost Converter Single Switch Synchronous Forward Controller Constant-Frequency Current Mode Flyback DC/DC Controller in ThinSOT Isolated No-OPTO Synchronous Flyback Controller with Wide Input Supply Range COMMENTS Suitable for Telecom 36V to 75V Inputs Constant-Frequency Current Mode Flyback DC/DC Controller in ThinSOTTM Single Switch PWM Controller with Auxiliary Boost Converter Single Switch Synchronous Forward Controller Wide Input Range, Current Mode Boost, Flyback and SEPIC Controller Input Voltage Limited Only by External Components No RSENSE and ThinSOT are Trademarks of Linear Technology Corporation. 3805fb 20 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0707 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006