LTC3872ETS8

LTC3872 No RSENSE Current Mode Boost DC/DC Controller FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO No Current Sense Resistor Required VOUT up to 60V Constant Frequency 550kHz Operation Internal Soft-Start and Optional External Soft-Start Adjustable Current Limit Pulse Skipping at Light Load VIN Range: 2.75V to 9.8V ±1.5% Voltage Reference Accuracy Current Mode Operation for Excellent Line and Load Transient Response Low Profile (1mm) SOT-23 and 3mm × 2mm DFN Packages The LTC®3872 is a constant frequency current mode boost DC/DC controller that drives an N-channel power MOSFET and requires very few external components. The No RSENSETM architecture eliminates the need for a sense resistor, improves efficiency and saves board space. The LTC3872 provides excellent AC and DC load and line regulation with ±1.5% output voltage accuracy. It incorporates an undervoltage lockout feature that shuts down the device when the input voltage falls below 2.3V. High switching frequency of 550kHz allows the use of a small inductor. The LTC3872 is available in an 8-lead low profile (1mm) ThinSOTTM package and 8-pin 3mm × 2mm DFN package. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. No RSENSE and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6498466, 6611131, 5731694. APPLICATIO S ■ ■ ■ ■ Telecom Power Supplies 42V Automotive Systems 24V Industrial Controls IP Phone Power Supplies TYPICAL APPLICATIO 1.8nF High Efficiency 3.3V Input, 5V Output Boost Converter 17.4k ITH 47pF VIN IPRG LTC3872 GND 11k 1% 34.8k 1% SW M1 VOUT 5V 2A VIN 1μH D1 10μF VIN 3.3V Efficiency and Power Loss vs Load Current 100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 0.01 0.1 1 POWER LOSS (W) 10 VFB RUN/SS NGATE 1nF 100μF ×2 3872 TA01 0 1 10 100 1000 LOAD CURRENT (mA) U 0.001 10000 3872 TA01b U U 3872fa 1 LTC3872 ABSOLUTE (Note 1) AXI U RATI GS Operating Temperature Range (Note 2) ... –40°C to 85°C Junction Temperature (Note 3) ............................. 125°C Storage Temperature Range................... –65°C to 125°C Lead Temperature (Soldering, 10 sec) TS8 Package ......................................................... 300°C Input Supply Voltage (VIN), RUN/SS .......... –0.3V to 10V IPRG Voltage..................................–0.3V to (VIN + 0.3V) VFB, ITH Voltages ....................................... –0.3V to 2.4V SW Voltage ................................................ –0.3V to 60V PACKAGE/ORDER I FOR ATIO TOP VIEW IPRG 1 ITH 2 VFB 3 GND 4 8 SW 7 RUN/SS 6 VIN 5 NGATE TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 125°C, θJA = 230°C/W ORDER PART NUMBER LTC3872ETS8 TS8 PART MARKING LCGB Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted. (Note 2) PARAMETER Input Voltage Range Input DC Supply Current Normal Operation Shutdown UVLO Undervoltage Lockout Threshold Shutdown Threshold (at RUN/SS) Regulated Feedback Voltage Feedback Voltage Line Regulation Feedback Voltage Load Regulation VFB Input Current RUN/SS Pull Up Current Typicals at VIN = 4.2V (Note 4) 2.75V ≤ VIN ≤ 9.8V, VITH = 1.3V VRUN/SS = 0V VIN < UVLO Threshold, VRUN = 0V VIN Rising VIN Falling VRUN/SS Falling VRUN/SS Rising (Note 5) 2.75V < VIN < 9V (Note 5) VITH = 1.6V (Note 5) VITH = 1V (Note 5) (Note 5) VRUN/SS = 0 0.35 ● ● ● ● ELECTRICAL CHARACTERISTICS CONDITIONS ● 2 U U W WW U W TOP VIEW GND 1 VFB 2 ITH 3 IPRG 4 9 8 7 6 5 NGATE VIN RUN/SS SW DDB PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 76°C/W EXPOSED PAD (PIN 9) IS GND MUST BE SOLDERED TO PCB ORDER PART NUMBER LTC3872EDDB DDB PART MARKING LCHT MIN 2.75 TYP MAX 9.8 UNITS V μA μA μA V V V V mV/V % % 250 8 20 2.3 2.05 0.6 0.7 1.182 2.45 2.3 0.85 0.95 1.2 0.14 0.05 –0.05 25 0.7 400 20 35 2.75 2.55 1.05 1.15 1.218 50 1.25 nA μA 3872fa LTC3872 ELECTRICAL CHARACTERISTICS PARAMETER Oscillator Frequency Normal Operation Gate Drive Rise Time Gate Drive Fall Time Peak Current Sense Voltage VFB = 1.2V CLOAD = 3000pF CLOAD = 3000pF IPRG = GND (Note 6) IPRG = Float IPRG = VIN ● ● ● The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted. (Note 2) CONDITIONS MIN 500 TYP 550 40 40 80 145 240 100 170 270 1 120 195 290 MAX 650 UNITS kHz ns ns mV mV mV ms Default Internal Soft-Start Time Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3872E is guaranteed to meet performance specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 85°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • 110°C/W) Note 4: The dynamic input supply current is higher due to power MOSFET gate charging (QG • fOSC). See Applications Information. Note 5: The LTC3872 is tested in a feedback loop which servos VFB to the reference voltage with the ITH pin forced to the midpoint of its voltage range (0.7V ≤ VITH ≤ 1.9V, midpoint = 1.3V). Note 6: Rise and fall times are measured at 10% and 90% levels. TYPICAL PERFOR A CE CHARACTERISTICS FB Voltage vs Temperature 1.25 1.24 1.23 1.22 1.21 1.20 1.19 1.18 –60 –40 –20 1.2025 1.2020 FB VOLTAGE (V) ITH VOLTAGE (V) FB VOLTAGE (V) 40 60 TEMPERATURE (˚C) 0 20 UW 80 TA = 25°C unless otherwise noted. ITH Voltage vs RUN/SS Voltage 2.5 FB Voltage Line Regulation 2.0 1.2015 1.2010 1.2005 1.2000 0.5 1.1995 1.1990 100 0 1 2 3 4 5 VIN (V) 3872 G01 3872 G02 1.5 1.0 0 6 7 8 9 10 VIN = 2.5V VIN = 3.3V VIN = 5V 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 RUN VOLTAGE (V) 3872 G03 3872fa 3 LTC3872 TYPICAL PERFOR A CE CHARACTERISTICS Shutdown IQ vs VIN 14 12 SHUTDOWN MODE IQ (μA) SHUTDOWN IQ (μA) FREQUENCY (kHz) 10 8 6 4 2 0 2 3 4 5 6 VIN (V) 3872 G04 7 Gate Drive Rise and Fall Time vs CLOAD 100 90 80 RUN THRESHOLDS (V) 70 TIME (ns) 60 50 40 30 20 10 0 0 2000 6000 4000 CLOAD (pF) 8000 10000 3872 G07 RISE TIME FALL TIME 0.94 0.92 0.90 0.88 0.86 0.84 0 2 4 6 VIN (V) 8 10 12 3872 G08 RUN THRESHOLDS (V) Frequency vs Temperature 600 MAXIMUM SENSE THRESHOLD (mV) 300 575 FREQUENCY (kHz) 550 525 500 –50 4 UW 8 9 –5 0 TA = 25°C unless otherwise noted. Frequency vs Duty Cycle 600 500 Shutdown IQ vs Temperature 20 15 400 300 200 100 0 –50 –25 0 0 25 50 75 100 125 150 TEMPERATURE (°C) 3872 G05 10 5 10 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 3278 G06 RUN/SS Threshold vs VIN 1.00 0.98 RISING 0.96 0.9 0.8 1.0 RUN/SS Threshold vs Temperature RISING FALLING 0.7 FALLING 0.6 0.5 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3872 G09 Maximum Sense Threshold vs Temperature IPRG = VIN 250 200 IPRG = FLOAT 150 100 50 0 –50 –30 –10 10 30 50 70 90 110 130 150 TEMPERATURE (°C) 3872 G11 IPRG = GND 25 50 75 100 125 150 TEMPERATURE (°C) 3872 G10 3872fa LTC3872 PI FU CTIO S IPRG (Pin 1/Pin 4): Current Sense Limit Select Pin. ITH (Pin 2/Pin 3): It serves as the error amplifier compensation point. Nominal voltage range for this pin is 0.7V to 1.9V. VFB (Pin 3/Pin 2): Receives the feedback voltage from an external resistor divider across the output. GND (Pin 4/Pin 1): Ground Pin. NGATE (Pin 5/Pin 8): Gate Drive for the External N-Channel MOSFET. This pin swings from 0V to VIN. VIN (Pin 6/Pin 7): Supply Pin. This pin must be closely decoupled to GND (Pin 4). FUNCTIONAL DIAGRAM VIN GND SW UNDERVOLTAGE LOCKOUT SHUTDOWN COMPARATOR 0.7μA RUN/SS ITH 3872 FD + INTERNAL SOFT-START RAMP – U U U (TS8/DD8) RUN/SS (Pin 7/Pin 6): Shutdown and external soft-start pin. In shutdown, all functions are disabled and the NGATE pin is held low. SW (Pin 8/Pin 5): Switch node connection to inductor and current sense input pin through external slope compensation resistor. Normally, the external N-channel MOSFET’s drain is connected to this pin. Exposed Pad (NA/Pin 9): Ground. Must be soldered to PCB for electrical contact and rated thermal performance. UV VOLTAGE REFERENCE 1.2V SLOPE COMPENSATION – + CURRENT COMPARATOR IPRG ILIM + SHDN ITH BUFFER – RS LATCH R Q S 550kHz OSCILLATOR CURRENT LIMIT CLAMP SWITCHING LOGIC CIRCUIT ERROR AMPLIFIER VIN NGATE VFB 1.2V 3872fa 5 LTC3872 OPERATIO Main Control Loop The LTC3872 is a No RSENSE constant frequency, current mode controller for DC/DC boost, SEPIC and flyback converter applications. The LTC3872 is distinguished from conventional current mode controllers because the current control loop can be closed by sensing the voltage drop across the power MOSFET switch or across a discrete sense resistor, as shown in Figures 1 and 2. This No RSENSE sensing technique improves efficiency, increases power density and reduces the cost of the overall solution. For circuit operation, please refer to the Block Diagram of the IC and the Typical Application on the front page. In normal operation, the power MOSFET is turned on when the oscillator sets the RS latch and is turned off when the current comparator resets the latch. The divided-down output voltage is compared to an internal 1.2V reference by the error amplifier, which outputs an error signal at the ITH pin. The voltage on the ITH pin sets the current comparator input threshold. When the load current increases, a fall in the FB voltage relative to the reference voltage causes the ITH pin to rise, which causes the current comparator to trip at a higher peak inductor current value. The average inductor current will therefore rise until it equals the load current, thereby maintaining output regulation. The LTC3872 can be used either by sensing the voltage drop across the power MOSFET or by connecting the SW pin to a conventional sensing resistor in the source of the power MOSFET. Sensing the voltage across the power MOSFET maximizes converter efficiency and minimizes the L VIN VIN SW LTC3872 NGATE GND GND 3872 F01 Figure 1. SW Pin (Internal Sense Pin) Connection for Maximum Efficiency 6 U component count; the maximum rating for this pin, 60V, allows MOSFET sensing in a wide output voltage range. The RUN/SS pin controls whether the IC is enabled or is in a low current shutdown state. With the RUN/SS pin below 0.85V, the chip is off and the input supply current is typically only 10μA. With an external capacitor connected to the RUN/SS pin an optional external soft-start is enabled. A 0.7μA trickle current will charge the capacitor, pulling the RUN/SS pin above shutdown threshold and slowly ramping RUN/SS to limit the VITH during start-up. Because the noise on the SW pin could couple into the RUN/SS pin, disrupting the trickle charge current that charges the RUN/SS pin, a 1M resistor is recommended to pull-up the RUN/SS pin when external soft-start is used. When RUN/SS is driven by an external logic, a minimum of 2.75V logic is recommended to allow the maximum ITH range. Light Load Operation Under very light load current conditions, the ITH pin voltage will be very close to the zero current level of 0.85V. As the load current decreases further, an internal offset at the current comparator input will assure that the current comparator remains tripped (even at zero load current) and the regulator will start to skip cycles, as it must, in order to maintain regulation. This behavior allows the regulator to maintain constant frequency down to very light loads, resulting in low output ripple as well as low audible noise and reduced RF interference, while providing high light load efficiency. L VOUT VIN VIN COUT VSW NGATE LTC3872 SW GND GND 3872 F02 D D VOUT VSW + + COUT RSENSE Figure 2. SW Pin (Internal Sense Pin) Connection for Sensing Resistor 3872fa LTC3872 APPLICATIO S I FOR ATIO Output Voltage Programming The output voltage is set by a resistor divider according to the following formula: ⎛ R2 ⎞ VO = 1.2V • ⎜ 1+ ⎟ ⎝ R1⎠ The external resistor divider is connected to the output as shown in the Typical Application on the front page, allowing remote voltage sensing. Application Circuits A basic LTC3872 application circuit is shown on the front page of this datasheet. External component selection is driven by the characteristics of the load and the input supply. Duty Cycle Considerations For a boost converter operating in a continuous conduction mode (CCM), the duty cycle of the main switch is: ⎛V +V –V ⎞ D = ⎜ O D IN ⎟ ⎝ VO + VD ⎠ where VD is the forward voltage of the boost diode. For converters where the input voltage is close to the output voltage, the duty cycle is low and for converters that develop a high output voltage from a low voltage input supply, the duty cycle is high. The LTC3872 has a built-in circuit that allows the extension of the maximum duty cycle while keeping the minimum switch off time unchanged. This is accomplished by reducing the clock frequency when the duty cycle is close to 80%. This function allows the user to obtain high output voltages from low input supply voltages. The shift of frequency with duty cycle is shown in the Typical Performance Characteristics section. U The Peak and Average Input Currents The control circuit in the LTC3872 is measuring the input current (either by using the RDS(ON) of the power MOSFET or by using a sense resistor in the MOSFET source), so the output current needs to be reflected back to the input in order to dimension the power MOSFET properly. Based on the fact that, ideally, the output power is equal to the input power, the maximum average input current is: IIN(MAX) = IO(MAX) 1 – DMAX The peak input current is: ⎛ χ ⎞ IO(MAX) IIN(PEAK) = ⎜ 1 + ⎟ • ⎝ 2 ⎠ 1 – DMAX Ripple Current IL and the χ Factor The constant χ in the equation above represents the percentage peak-to-peak ripple current in the inductor, relative to its maximum value. For example, if 30% ripple current is chosen, then χ = 0.30, and the peak current is 15% greater than the average. For a current mode boost regulator operating in CCM, slope compensation must be added for duty cycles above 50% in order to avoid subharmonic oscillation. For the LTC3872, this ramp compensation is internal. Having an internally fixed ramp compensation waveform, however, does place some constraints on the value of the inductor and the operating frequency. If too large an inductor is used, the resulting current ramp (IL) will be small relative to the internal ramp compensation (at duty cycles above 50%), and the converter operation will approach voltage mode (ramp compensation reduces the gain of the current loop). If too small an inductor is used, but the converter is still operating in CCM (continuous conduction mode), the internal ramp compensation may be inadequate to prevent subharmonic oscillation. To ensure good current 3872fa W U U 7 LTC3872 APPLICATIO S I FOR ATIO mode gain and avoid subharmonic oscillation, it is recommended that the ripple current in the inductor fall in the range of 20% to 40% of the maximum average current. For example, if the maximum average input current is 1A, choose an IL between 0.2A and 0.4A, and a value χ between 0.2 and 0.4. Inductor Selection Given an operating input voltage range, and having chosen the operating frequency and ripple current in the inductor, the inductor value can be determined using the following equation: L= VIN(MIN) ΔIL • f • DMAX where : ΔIL = χ • IO(MAX ) 1– DMAX Remember that boost converters are not short-circuit protected. Under a shorted output condition, the inductor current is limited only by the input supply capability. The minimum required saturation current of the inductor can be expressed as a function of the duty cycle and the load current, as follows: ⎛ χ ⎞ IO(MAX) IL(SAT) ≥ ⎜ 1 + ⎟ • ⎝ 2 ⎠ 1 – DMAX The saturation current rating for the inductor should be checked at the minimum input voltage (which results in the highest inductor current) and maximum output current. Operating in Discontinuous Mode Discontinuous mode operation occurs when the load current is low enough to allow the inductor current to run out during the off-time of the switch. Once the inductor current is near zero, the switch and diode capacitances resonate with the inductance to form damped ringing at 1MHz to 10MHz. If the off-time is long enough, the drain voltage will settle to the input voltage. Depending on the input voltage and the residual energy in the inductor, this ringing can cause the drain of the 8 U power MOSFET to go below ground where it is clamped by the body diode. This ringing is not harmful to the IC and it has been shown not to contribute significantly to EMI. Any attempt to damp it with a snubber will degrade the efficiency. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. Actual core loss is independent of core size for a fixed inductor value, but is very dependent on the inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore, copper losses will increase. Generally, there is a tradeoff between core losses and copper losses that needs to be balanced. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper losses and preventing saturation. Ferrite core material saturates “hard,” meaning that the inductance collapses rapidly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequently, output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Coiltronics, Coilcraft, Toko and Sumida. Power MOSFET Selection The power MOSFET serves two purposes in the LTC3872: it represents the main switching element in the power path and its RDS(ON) represents the current sensing element for the control loop. Important parameters for the power MOSFET include the drain-to-source breakdown voltage (BVDSS), the threshold voltage (VGS(TH)), the on-resistance (RDS(ON)) versus gate-to-source voltage, the gate-to-source and gate-to-drain charges (QGS and QGD, respectively), 3872fa W U U LTC3872 APPLICATIO S I FOR ATIO the maximum drain current (ID(MAX)) and the MOSFET’s thermal resistances (RTH(JC) and RTH(JA)). Logic-level (4.5V VGS-RATED) threshold MOSFETs should be used when input voltage is high, otherwise if low input voltage operation is expected (e.g., supplying power from a lithium-ion battery or a 3.3V logic supply), then sublogic-level (2.5V VGS-RATED) threshold MOSFETs should be used. Pay close attention to the BVDSS specifications for the MOSFETs relative to the maximum actual switch voltage in the application. Many logic-level devices are limited to 30V or less, and the switch node can ring during the turn-off of the MOSFET due to layout parasitics. Check the switching waveforms of the MOSFET directly across the drain and source terminals using the actual PC board layout (not just on a lab breadboard!) for excessive ringing. During the switch on-time, the control circuit limits the maximum voltage drop across the power MOSFET to about 270mV, 100mV and 170mV at low duty cycle with IPRG tied to VIN, GND, or left floating respectively. The peak inductor current is therefore limited to (270mV, 170mV and 100mV)/RDS(ON) depending on the status of the IPRG pin. The relationship between the maximum load current, duty cycle and the RDS(ON) of the power MOSFET is: 1 – DMAX RDS(ON) ≤ VSENSE(MAX) • ⎛ χ⎞ ⎜ 1 + ⎟ • IO(MAX) • ρT ⎝ 2⎠ MAXIMUM CURRENT SENSE VOLTAGE (mV) 300 IPRG = HIGH 250 200 IPRG = FLOAT 150 100 IPRG = LOW 50 0 1 20 40 60 DUTY CYCLE (%) 80 100 3872 G03 ρT NORMALIZED ON RESISTANCE Figure 3. Maximum SENSE Threshold Voltage vs Duty Cycle U VSENSE(MAX) is the maximum voltage drop across the power MOSFET. VSENSE(MAX) is typically 270mV, 170mV and 100mV. It is reduced with increasing duty cycle as shown in Figure 3. The ρT term accounts for the temperature coefficient of the RDS(ON) of the MOSFET, which is typically 0.4%/°C. Figure 4 illustrates the variation of normalized RDS(ON) over temperature for a typical power MOSFET. Another method of choosing which power MOSFET to use is to check what the maximum output current is for a given RDS(ON), since MOSFET on-resistances are available in discrete values. 1 – DMAX IO(MAX) = VSENSE(MAX) • ⎛ χ⎞ ⎜ 1 + ⎟ • RDS(ON) • ρT ⎝ 2⎠ It is worth noting that the 1 – DMAX relationship between IO(MAX) and RDS(ON) can cause boost converters with a wide input range to experience a dramatic range of maximum input and output current. This should be taken into consideration in applications where it is important to limit the maximum current drawn from the input supply. Calculating Power MOSFET Switching and Conduction Losses and Junction Temperatures In order to calculate the junction temperature of the power MOSFET, the power dissipated by the device must be known. This power dissipation is a function of the duty cycle, the load current and the junction temperature itself (due to the positive temperature coefficient of its RDS(ON)). As a 2.0 1.5 1.0 0.5 0 – 50 50 100 0 JUNCTION TEMPERATURE (°C) 150 3872 F04 W U U Figure 4. Normalized RDS(ON) vs Temperature 3872fa 9 LTC3872 APPLICATIO S I FOR ATIO result, some iterative calculation is normally required to determine a reasonably accurate value. Since the controller is using the MOSFET as both a switching and a sensing element, care should be taken to ensure that the converter is capable of delivering the required load current over all operating conditions (line voltage and temperature), and for the worst-case specifications for VSENSE(MAX) and the RDS(ON) of the MOSFET listed in the manufacturer’s data sheet. The power dissipated by the MOSFET in a boost converter is: ⎛ IO(MAX ) ⎞ PFET = ⎜ • RDS(ON) • DMAX • ρ T ⎝ 1 – DMAX ⎟ ⎠ IO(MAX ) + k • VO1 . 85 • •C •f (1 – DMAX ) RSS The first term in the equation above represents the losses in the device, and the second term, the switching losses. The constant, k = 1.7, is an empirical factor inversely related to the gate drive current and has the dimension of 1/current. From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: TJ = TA + PFET • RTH(JA) The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(CA)). This value of TJ can then be compared to the original, assumed value used in the iterative calculation process. Output Diode Selection To maximize efficiency, a fast switching diode with low forward drop and low reverse leakage is desired. The output diode in a boost converter conducts current during the switch off-time. The peak reverse voltage that the diode must withstand is equal to the regulator output voltage. The average forward current in normal operation is equal to the output current, and the peak current is equal to the peak inductor current. I2R 2 10 U ⎛ χ ⎞ IO(MAX) ID(PEAK) = IL(PEAK) = ⎜ 1 + ⎟ • ⎝ 2 ⎠ 1 – DMAX The power dissipated by the diode is: PD = IO(MAX) • VD and the diode junction temperature is: TJ = TA + PD • RTH(JA) The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the board to the ambient temperature in the enclosure. Remember to keep the diode lead lengths short and to observe proper switch-node layout (see Board Layout Checklist) to avoid excessive ringing and increased dissipation. Output Capacitor Selection Contributions of ESR (equivalent series resistance), ESL (equivalent series inductance) and the bulk capacitance must be considered when choosing the correct component for a given output ripple voltage. The effects of these three parameters (ESR, ESL and bulk C) on the output voltage ripple waveform are illustrated in Figure 5e for a typical boost converter. The choice of component(s) begins with the maximum acceptable ripple voltage (expressed as a percentage of the output voltage), and how this ripple should be divided between the ESR step and the charging/discharging ΔV. For the purpose of simplicity we will choose 2% for the maximum output ripple, to be divided equally between the ESR step and the charging/discharging ΔV. This percentage ripple will change, depending on the requirements of the application, and the equations provided below can easily be modified. For a 1% contribution to the total ripple voltage, the ESR of the output capacitor can be determined using the following equation: ESRCOUT ≤ 0.01 • VO IIN(PEAK) 3872fa W U U LTC3872 APPLICATIO S I FOR ATIO where: ⎛ χ ⎞ IO(MAX) IIN(PEAK)= ⎜ 1 + ⎟ • ⎝ 2 ⎠ 1 – DMAX For the bulk C component, which also contributes 1% to the total ripple: COUT ≥ IO(MAX) 0.01 • VO • f For many designs it is possible to choose a single capacitor type that satisfies both the ESR and bulk C requirements for the design. In certain demanding applications, however, the ripple voltage can be improved significantly by connecting two or more types of capacitors in parallel. For example, using a low ESR ceramic capacitor can minimize the ESR step, while an electrolytic capacitor can be used to supply the required bulk C. Once the output capacitor ESR and bulk capacitance have been determined, the overall ripple voltage waveform should be verified on a dedicated PC board (see Board Layout section for more information on component placement). Lab breadboards generally suffer from excessive series inductance (due to inter-component wiring), and these parasitics can make the switching waveforms look significantly worse than they would be on a properly designed PC board. The output capacitor in a boost regulator experiences high RMS ripple currents, as shown in Figure 6. The RMS output capacitor ripple current is: IRMS(COUT) ≈ IO(MAX) • VO – VIN(MIN) VIN(MIN) Note that the ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. Several capacitors may also be placed in parallel to meet size or height requirements in the design. Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric U capacitor available from Sanyo has the lowest product of ESR and size of any aluminum electrolytic, at a somewhat higher price. In surface mount applications, multiple capacitors may have to be placed in parallel in order to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount packages. In the case of tantalum, it is critical that the capacitors have been surge tested for use in switching power supplies. An excellent choice is AVX TPS series of surface mount tantalum. Also, ceramic capacitors are now available with extremely low ESR, ESL and high ripple current ratings. L D VOUT VIN SW COUT RL W U U 5a. Circuit Diagram IIN IL 5b. Inductor and Input Currents ISW tON 5c. Switch Current ID tOFF IO 5d. Diode and Output Currents ΔVCOUT VOUT (AC) ΔVESR RINGING DUE TO TOTAL INDUCTANCE (BOARD + CAP) 5e. Output Voltage Ripple Waveform Figure 5. Switching Waveforms for a Boost Converter 3872fa 11 LTC3872 APPLICATIO S I FOR ATIO Input Capacitor Selection The input capacitor of a boost converter is less critical than the output capacitor, due to the fact that the inductor is in series with the input and the input current waveform is continuous (see Figure 5b). The input voltage source impedance determines the size of the input capacitor, which is typically in the range of 10μF to 100μF. A low ESR capacitor is recommended, although it is not as critical as for the output capacitor. The RMS input capacitor ripple current for a boost converter is: IRMS(CIN) = 0.3 • VIN(MIN) • DMAX L•f Please note that the input capacitor can see a very high surge current when a battery is suddenly connected to the input of the converter and solid tantalum capacitors can fail catastrophically under these conditions. Be sure to specify surge-tested capacitors! Efficiency Considerations: How Much Does VDS Sensing Help? The efficiency of a switching regulator is equal to the output power divided by the input power (×100%). Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 + …), where L1, L2, etc. are the individual loss components as a percentage of the input power. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Although all dissipative elements in the circuit produce losses, four main sources usually account for the majority of the losses in LTC3872 application circuits: 1. The supply current into VIN. The VIN current is the sum of the DC supply current IQ (given in the Electrical Characteristics) and the MOSFET driver and control currents. The DC supply current into the VIN pin is typically about 250μA and represents a small power loss (much less than 1%) that increases with VIN. The driver current results from switching the gate capacitance of the power MOSFET; this current is typically much larger than the 12 U DC current. Each time the MOSFET is switched on and then off, a packet of gate charge QG is transferred from VIN to ground. The resulting dQ/dt is a current that must be supplied to the Input capacitor by an external supply. If the IC is operating in CCM: IQ(TOT) ≈ IQ = f • QG PIC = VIN • (IQ + f • QG) 2. Power MOSFET switching and conduction losses. The technique of using the voltage drop across the power MOSFET to close the current feedback loop was chosen because of the increased efficiency that results from not having a sense resistor. The losses in the power MOSFET are equal to: ⎛ IO(MAX ) ⎞ PFET = ⎜ • RDS(ON) • DMAX • ρ T ⎝ 1 – DMAX ⎟ ⎠ IO(MAX ) • CRSS • f + k • VO1 . 85 • 1 – DMAX The I2R power savings that result from not having a discrete sense resistor can be calculated almost by inspection. ⎛ IO(MAX ) ⎞ PR(SENSE) = ⎜ • R SENSE • DMAX ⎝ 1 – DMAX ⎟ ⎠ To understand the magnitude of the improvement with this VDS sensing technique, consider the 3.3V input, 5V output power supply shown in the Typical Application on the front page. The maximum load current is 7A (10A peak) and the duty cycle is 39%. Assuming a ripple current of 40%, the peak inductor current is 13.8A and the average is 11.5A. With a maximum sense voltage of about 140mV, the sense resistor value would be 10mΩ, and the power dissipated in this resistor would be 514mW at maximum output current. Assuming an efficiency of 90%, this sense resistor power dissipation represents 1.3% of the overall input power. In other words, for this application, the use of VDS sensing would increase the efficiency by approximately 1.3%. For more details regarding the various terms in these equations, please refer to the section Boost Converter: 3872fa W U U 2 2 LTC3872 APPLICATIO S I FOR ATIO Power MOSFET Selection. 3. The losses in the inductor are simply the DC input current squared times the winding resistance. Expressing this loss as a function of the output current yields: ⎛ IO(MAX ) ⎞ PR( WINDING) = ⎜ • RW ⎝ 1 – DMAX ⎟ ⎠ 4. Losses in the boost diode. The power dissipation in the boost diode is: PDIODE = IO(MAX) • VD The boost diode can be a major source of power loss in a boost converter. For the 3.3V input, 5V output at 7A example given above, a Schottky diode with a 0.4V forward voltage would dissipate 2.8W, which represents 7% of the input power. Diode losses can become significant at low output voltages where the forward voltage is a significant percentage of the output voltage. 5. Other losses, including CIN and CO ESR dissipation and inductor core losses, generally account for less than 2% of the total additional loss. Checking Transient Response The regulator loop response can be verified by looking at the load transient response. Switching regulators generally take several cycles to respond to an instantaneous step in resistive load current. When the load step occurs, VO immediately shifts by an amount equal to (ΔILOAD)(ESR), and then CO begins to charge or discharge (depending on VOUT 200mV/DIV AC COUPLED 2 IL 500mA/DIV 20μs/DIV 3872 F06 Figure 6. Load Transient Response for a 3.3V Input, 5V Output Boost Converter Application, 0.1A to 1A Step U the direction of the load step) as shown in Figure 6. The regulator feedback loop acts on the resulting error amp output signal to return VO to its steady-state value. During this recovery time, VO can be monitored for overshoot or ringing that would indicate a stability problem. A second, more severe transient can occur when connecting loads with large (>1μF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with CO, causing a nearly instantaneous drop in VO. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive in order to limit the inrush current di/dt to the load. Boost Converter Design Example The design example given here will be for the circuit shown on the front page. The input voltage is 3.3V, and the output is 5V at a maximum load current of 2A. 1. The duty cycle is: ⎛ V + VD – VIN ⎞ 5 + 0 . 4 – 3 . 3 = = 38 . 9 % D=⎜ O 5 + 0.4 ⎠ ⎝ VO + VD ⎟ 2. An inductor ripple current of 40% of the maximum load current is chosen, so the peak input current (which is also the minimum saturation current) is: 2 ⎛ χ ⎞ IO(MAX ) IIN(PEAK ) = ⎜1 + ⎟ • = 1.2 • = 3 . 9A ⎝ 2 ⎠ 1 – DMAX 1 – 0 . 39 The inductor ripple current is: ΔIL = χ • IO(MAX ) 1– DMAX = 0.4 • 2 = 1.3A 1– 0.39 And so the inductor value is: L= VIN(MIN) ΔIL • f • DMAX = 3.3V • 0.39 = 1.8μH . 1.3A • 550kHz The component chosen is a 2.2μH inductor made by Sumida (part number CEP125-H 1ROMH). 3872fa W U U 13 LTC3872 APPLICATIO S I FOR ATIO 3. Assuming a MOSFET junction temperature of 125°C, the room temperature MOSFET RDS(ON) should be less than: RDS(ON) ≤ VSENSE(MAX ) • 1– DMAX ⎛ χ⎞ ⎜ 1+ 2 ⎟ • IO(MAX ) • ρT ⎝ ⎠ = 0.175V • 1– 0.39 ≈ 30mΩ ⎛ 0.4 ⎞ ⎜ 1+ 2 ⎟ • 2A • 1.5 ⎝ ⎠ The MOSFET used was the Si3460, which has a maximum RDS(ON) of 27mΩ at 4.5V VGS, a BVDSS of greater than 30V, and a gate charge of 13.5nC at 4.5V VGS. 4. The diode for this design must handle a maximum DC output current of 2A and be rated for a minimum reverse voltage of VOUT, or 5V. A 25A, 15V diode from On Semiconductor (MBRB2515L) was chosen for its high power dissipation capability. 5. The output capacitor usually consists of a lower valued, low ESR ceramic. 6. The choice of an input capacitor for a boost converter depends on the impedance of the source supply and the amount of input ripple the converter will safely tolerate. For this particular design two 22μF Taiyo Yuden ceramic IPRG ITH RITH VFB CITH GND R2 R1 SW RUN/SS LTC3872 VIN L1 BOLD LINES INDICATE HIGH CURRENT PATHS Figure 7. LTC3872 Layout Diagram (See PC Board Layout Checklist) 14 + + U capacitors (JMK325BJ226MM) is required (the input and return lead lengths are kept to a few inches. As with the output node, check the input ripple with a single oscilloscope probe connected across the input capacitor terminals. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3872. These items are illustrated graphically in the layout diagram in Figure 7. Check the following in your layout: 1. The Schottky diode should be closely connected between the output capacitor and the drain of the external MOSFET. 2. The input decoupling capacitor (0.1μF) should be connected closely between VIN and GND. 3. The trace from SW to the switch point should be kept short. 4. Keep the switching node NGATE away from sensitive small signal nodes. 5. The VFB pin should connect directly to the feedback resistors. The resistive divider R1 and R2 must be connected between the (+) plate of COUT and signal ground. NGATE CIN COUT VOUT D1 M1 VIN 3872 F07 W U U 3872fa LTC3872 TYPICAL APPLICATIONS High Efficiency 3.3V Input, 12V Output Boost Converter 4.7M 0.1μF 2.2nF 23.2k ITH 100pF IPRG LTC3872 GND VFB 11.8k 1% 107k 1% COUT1 22μF ×2 SW NGATE M1 PDS1040 VOUT 12V 1.5A RUN/SS VIN L1 2.2μH CIN 10μF VIN 3.3V + COUT2 120μF 3872 F08 COUT1: TAIYO YUDEN TMK325BJ226MM L1: COILTRONICS DR125-2R2 M1: FAIRCHILD FDS6064N3 VOUT 12V AC COUPLED IL 5A/DIV ILOAD 1A/DIV STEP FROM 500mA TO 1.5A 100μs/DIV 3872 F09 3872fa 15 LTC3872 TYPICAL APPLICATIONS High Efficiency 5V Input, 12V Output Boost Converter 4.7M 1nF 2.2nF 11k ITH 100p IPRG LTC3872 GND VFB 11.8k 1% 107k 1% COUT1: TAIYO YUDEN TMK325BJ226MM L1: TOKO D124C 892NAS-3R3M M1: IRF3717 SW NGATE M1 SBM835L COUT1 22mF ´2 COUT2 68mF RUN/SS VIN L1 3.3mH CIN 10mF VIN 5V ILOAD 500mA/DIV STEP FROM 100mA TO 600mA ILOAD 5A/DIV VOUT 12V 2A + VOUT 3872 TA03 500μs/DIV 3872 TA03b High Efficiency 5V Input, 24V Output Boost Converter 4.7M 0.068μF 1nF 52.3k ITH 100p IPRG LTC3872 GND VFB 12.1k 1% 232k 1% COUT1: TAIYO YUDEN GMK316BJ106ML L1: WURTH WE-HCF 8.2μH 744392-820 M1: SILICONIX Si4884DY SW NGATE M1 UPS840 COUT1 10μF ×2 RUN/SS VIN L1 8.2μH CIN 10μF VIN 5V COUT2 68μF + VOUT 24V 1A 3872 TA04 Efficiency 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 1 10 LOAD (mA) 3872 TA04b Load Step ILOAD 500mA/DIV STEP FROM 100mA TO 600mA ILOAD 5A/DIV VOUT 500μs/DIV 3872 TA04c 100 1000 3872fa 16 LTC3872 TYPICAL APPLICATIONS High Efficiency 5V Input, 48V Output Boost Converter 1M 0.33μF 2.2nF 63.4k 1% ITH VIN IPRG LTC3872 GND VFB 12.1k 1% 475k 1% COUT1 2.2μF ×3 COUT2 68μF SW NGATE M1 D1 VOUT 48V 0.5A RUN/SS VIN L1 10μH CIN 10μF VIN 5V + COUT1: NIPPON CHEMI-CON NTS50X7R2A225KT D1: DIODES, INC. PDS760 L1: SUMIDA CDEP147 M1: VISHAY SILICONIX Si7850DP 3872 TA05 Soft-Start RUN/SS 5V/DIV IL 5A/DIV IL 2A/DIV VOUT 20V/DIV VOUT 500mV/DIV AC COUPLED 40ms/DIV 3872 TA05b Load Step ILOAD 200mA/DIV 500μs/DIV 3872 TA05c Efficiency 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 1 10 LOAD (mA) 3872 TA05d 100 1000 3872fa 17 LTC3872 PACKAGE DESCRIPTIO U DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.70 ± 0.05 2.55 ± 0.05 1.15 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.20 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 ± 0.10 (2 SIDES) R = 0.115 TYP 5 0.40 ± 0.10 8 R = 0.05 TYP 2.00 ± 0.10 (2 SIDES) 0.56 ± 0.05 (2 SIDES) 0.75 ± 0.05 4 0.25 ± 0.05 2.15 ± 0.05 (2 SIDES) BOTTOM VIEW—EXPOSED PAD 1 0.50 BSC PIN 1 R = 0.20 OR 0.25 × 45° CHAMFER (DDB8) DFN 0905 REV B 0.61 ± 0.05 (2 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) 0.200 REF 0 – 0.05 NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3872fa 18 LTC3872 PACKAGE DESCRIPTIO U TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 2.90 BSC (NOTE 4) 0.65 REF 1.22 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID 0.65 BSC 0.22 – 0.36 8 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 1.00 MAX DATUM ‘A’ 0.01 – 0.10 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0802 0.52 MAX 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 3872fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC3872 TYPICAL APPLICATIO U 3.3V Input, 5V/2A Output Boost Converter 47pF 1nF 1.8nF 17.4k ITH VIN IPRG LTC3872 GND VFB 11k 1% 34.8k 1% COUT 100μF ×2 3872 TA02 1M RUN/SS VIN L1 1μH SW CIN 10μF VIN 3.3V NGATE M1 D1 VOUT 5V 2A D1: DIODES, INC B320 L1: TOKOFDV0630-1R0 M1: SILICONIX Si3460DV RELATED PARTS PART NUMBER LT®1619 LTC1624 LTC1700 LTC1871-7 LTC1872/LTC1872B LT1930 LT1931 LTC3401/LTC3402 LTC3704 LTC1871/LTC1871-7 LTC3703/LTC3703-5 LTC3803/LTC3803-5 DESCRIPTION Current Mode PWM Controller Current Mode DC/DC Controller No RSENSE Synchronous Step-Up Controller Wide Input Range Controller SOT-23 Boost Controller 1.2MHz, SOT-23 Boost Converter Inverting 1.2MHz, SOT-23 Converter 1A/2A 3MHz Synchronous Boost Converters Positive-to Negative DC/DC Controller No RSENSE, Wide Input Range DC/DC Boost Controller 100V Synchronous Controller 200kHz Flyback DC/DC Controller COMMENTS 300kHz Fixed Frequency, Boost, SEPIC, Flyback Topology SO-8; 300kHz Operating Frequency; Buck, Boost, SEPIC Design; VIN Up to 36V Up to 95% Efficiency, Operating as Low as 0.9V Input No RSENSE, 7V Gate Drive, Current Mode Control Delievers Up to 5A, 550kHz Fixed Frequency, Current Mode Up to 34V Output, 2.6V VIN 16V, Miniature Design Positive-to Negative DC/DC Conversion, Miniature Design Up to 97% Efficiency, Very Small Solution, 0.5V ≤ VIN ≤ 5V No RSENSE, Current Mode Control, 50kHz to 1MHz No RSENSE, Current Mode Control, 2.5V ≤ VIN ≤ 36V Step-Up or Step Down, 600kHz, SSOP-16, SSOP-28 Optimized for Driving 6V MOSFETs ThinSOT 3872fa 20 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0407 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007