LTC3873EDDB-5-TRPBF

LTC3873-5 No RSENSETM Constant Frequency Current Mode Boost/Flyback/SEPIC DC/DC Controller FEATURES n n n n n n n n n n DESCRIPTION The LTC®3873-5 is a constant frequency current mode controller for boost, flyback or SEPIC DC/DC converters designed to drive an N-channel MOSFET for high input and output voltage converter applications. The LTC3873-5 provides ±1.5% output voltage accuracy and consumes only 300μA quiescent current during normal operation and only 50μA during micropower start-up. Using a 9.3V internal shunt regulator, the LTC3873-5 can be powered from a high input voltage through a resistor or it can be powered directly from a low impedance DC voltage of 9V or less. Soft-start can be programmed using an external capacitor. The LTC3873-5 is available in 8-lead ThinSOT and 2mm × 3mm DFN packages. PARAMETER VCC UV+ VCC UV– LTC3873 8.4V 4V LTC3873-5 4.1V 2.9V VIN and VOUT Limited Only by External Components Internal or Programmable External Soft-Start Constant Frequency 200kHz Operation Adjustable Current Limit Current Sense Resistor Optional ±1.5% Voltage Reference Accuracy Current Mode Operation for Excellent Line and Load Transient Response 4.1V Undervoltage Threshold for Logic Level MOSFET Applications Low Quiescent Current: 300μA Low Profile (1mm) ThinSOTTM and (0.75mm) 2mm × 3mm DFN Package APPLICATIONS n n n Telecom Power Supplies Automotive Power Supplies PoE Applications L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. No RSENSE and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION High Efficiency 5V Input, 12V Output Boost Converter 1nF 4.7nF 11.8k ITH 47pF LTC3873-5 IPRG 12k GND VFB 108k 38735 TA01a Efficiency and Power Loss vs Load Current 100 90 10000 RUN/SS VCC 10μH SW NGATE 22μF 10μF 80 EFFICIENCY (%) VIN 5V 70 60 50 40 30 20 10 0 10 100 IOUT (mA) 1000 3873 TA01b 1000 POWER LOSS (mW) VOUT 12V 2A 100 10 38735fb 1 LTC3873-5 ABSOLUTE MAXIMUM RATINGS (Note 1) VCC to GND Low Impedance Source ........................... –0.3V to 9V Current Fed ..........................................25mA Into VCC RUN/SS........................................................ –0.3V to 9V IPRG Voltage.................................–0.3V to (VCC + 0.3V) VFB, ITH Voltages ....................................... –0.3V to 2.4V SW Voltage ................................................ –0.3V to 60V Operating Temperature Range (Note 2) LTC3873E-5 ......................................... –40°C to 85°C LTC3873I-5 ........................................ –40°C to 125°C Junction Temperature (Note 3) ............................. 125°C Storage Temperature Range................... –65°C to 125°C Lead Temperature (Soldering, 10 sec) TS8 Package ..................................................... 300°C PIN CONFIGURATION TOP VIEW TOP VIEW IPRG 1 ITH 2 VFB 3 GND 4 8 SW 7 RUN/SS 6 VCC 5 NGATE GND 1 VFB 2 ITH 3 IPRG 4 9 8 7 6 5 NGATE VCC RUN/SS SW TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 125°C, θJA = 230°C/W DDB PACKAGE 8-LEAD (3mm 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 76°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH LTC3873ETS8-5#PBF LTC3873ITS8-5#PBF LTC3873EDDB-5#PBF LTC3873IDDB-5#PBF LEAD BASED FINISH LTC3873ETS8-5 LTC3873ITS8-5 LTC3873EDDB-5 LTC3873IDDB-5 TAPE AND REEL LTC3873ETS8-5#TRPBF LTC3873ITS8-5#TRPBF LTC3873EDDB-5#TRPBF LTC3873IDDB-5#TRPBF TAPE AND REEL LTC3873ETS8-5#TR LTC3873ITS8-5#TR LTC3873EDDB-5#TR LTC3873IDDB-5#TR PART MARKING* LTCSP LTCSP LCSM LCSM PART MARKING* LTCSP LTCSP LCSM LCSM PACKAGE DESCRIPTION 8-Lead Plastic TSOT-23 8-Lead Plastic TSOT-23 8-Lead (3mm × 2mm) Plastic DFN 8-Lead (3mm × 2mm) Plastic DFN PACKAGE DESCRIPTION 8-Lead Plastic TSOT-23 8-Lead Plastic TSOT-23 8-Lead (3mm × 2mm) Plastic DFN 8-Lead (3mm × 2mm) Plastic DFN TEMPERATURE RANGE –40°C to 85°C –40°C to 125°C –40°C to 85°C –40°C to 125°C TEMPERATURE RANGE –40°C to 85°C –40°C to 125°C –40°C to 85°C –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 38735fb 2 LTC3873-5 ELECTRICAL CHARACTERISTICS PARAMETER Input DC Supply Current Normal Operation Shutdown UVLO Undervoltage Lockout Threshold The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 5V unless otherwise noted. (Note 2) CONDITIONS Typicals at VCC = 5V (Note 4) VITH = 1.9V VRUN/SS = 0V VCC = UVLO Threshold – 100mV, VRUN/SS = VCC VCC Rising VCC Falling VCC Hysteresis VRUN/SS Falling VRUN/SS Rising (Note 5) 3.5V < VCC < 9V (Note 5) VITH = 1.6V (Note 5) VITH = 1V (Note 5) (Note 5) VRUN/SS = 0V VRUN/SS = 1.3V 1.5 5 70 160 CLOAD = 3000pF (Note 6) CLOAD = 3000pF (Note 6) IPRG = GND IPRG = Float IPRG = VIN IIN = 1mA, IIN = 25mA, VRUN/SS = 0V l l l l l l l l l MIN TYP 300 50 35 MAX 400 80 50 4.4 3.3 1.7 0.9 1.0 1.218 UNITS μA μA μA V V V V V V mV/V % % 3.8 2.5 0.9 0.5 0.6 1.182 4.1 2.9 1.25 0.7 0.8 1.2 0.1 0.05 –0.05 25 3 15 78 20 200 40 40 Shutdown Threshold (at RUN/SS) Regulated Feedback Voltage Feedback Voltage Line Regulation Feedback Voltage Load Regulation VFB Input Current RUN/SS Pull Up Current Maximum Duty Cycle ISLMAX, Peak Slope Compensation Current Oscillator Frequency Gate Drive Rise Time Gate Drive Fall Time Peak Current Sense Voltage 50 4.5 25 84 240 nA μA μA % μA kHz ns ns 95 165 265 9 110 185 295 9.3 3.3 125 210 325 9.6 mV mV mV V ms VIN Shunt Regulator Voltage Default Internal Soft-Start Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3873E-5 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3873I-5 is guaranteed to meet performance specifications over the full –40°C to 125°C operating temperature range. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • θJA) Note 4: The dynamic input supply current is higher due to power MOSFET gate charging (QG • fOSC). See Applications Information. Note 5: The LTC3873-5 is tested in a feedback loop which servos VFB to the reference voltage with the ITH pin forced to the midpoint of its voltage range (0.7V ≤ VITH ≤ 1.9V, midpoint = 1.3V). Note 6: Rise and fall times are measured at 10% and 90% levels. VCC = 5.6V. 38735fb 3 LTC3873-5 TYPICAL PERFORMANCE CHARACTERISTICS Regulated Feedback Voltage vs Temperature 1.25 1.24 1.23 1.22 1.21 1.20 1.19 1.18 –60 –40 –20 1.2025 1.2020 2.0 1.2015 VFB VOLTAGE (V) ITH VOLTAGE (V) 1.2010 1.2005 1.2000 0.5 1.1995 1.1990 3 4 5 7 6 VIN (V) 8 9 0 1.5 VFB VOLTAGE (V) Regulated Feedback Voltage Line Regulation 2.5 ITH Voltage vs RUN/SS Voltage VIN = 5V 1.0 40 60 80 100 120 TEMPERATURE (°C) 38735 G01 0 20 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 RUN/SS VOLTAGE (V) 38735 G03 38735 G02 Shutdown Mode IQ vs VIN 70 65 SHUTDOWN MODE IQ (μA) SHUTDOWN MODE IQ (μA) 60 55 50 45 40 35 30 25 20 3 4 5 7 6 VIN (V) 8 9 10 80 70 60 Shutdown IQ vs Temperature 100 90 80 70 TIME (ns) 60 50 40 30 20 10 0 –60 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 3873-5 G05 Gate Drive Rise and Fall Time vs CLOAD 50 40 30 RISE TIME FALL TIME 20 10 0 0 2000 6000 4000 CLOAD (pF) 8000 10000 38735 G06 3873-5 G04 RUN Threshold vs Temperature 1.0 10.2 10.1 REGULATION VOLTAGE (V) 0.9 RUN THRESHOLDS (V) 0.8 RISING 10.0 9.9 9.8 9.7 9.6 9.5 9.4 9.3 0.5 –60 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 38735 G07 Shunt Regulator Voltage vs ISHUNT 0.7 FALLING 0.6 9.2 0 5 10 15 20 25 30 ISHUNT (mA) 35 40 45 3873-5 G08 38735fb 4 LTC3873-5 TYPICAL PERFORMANCE CHARACTERISTICS Frequency vs Temperature 250 300 VIN = 5V MAXIMUM SENSE THRESHOLD (mV) 250 200 150 IPRG = GND 100 50 0 –60 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 38735 G10 Maximum Sense Threshold vs Temperature IPRG = VIN 230 FREQUECY (kHz) IPRG = FLOAT 210 190 170 150 –60 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 3873-5 G09 PIN FUNCTIONS (TS8/DD8) IPRG (Pin 1/Pin 4): Current Sense Limit Select Pin. ITH (Pin 2/Pin 3): This pin serves as the error amplifier compensation point. Nominal voltage range for this pin is 0.7V to 1.9V. VFB (Pin 3/Pin 2): This pin receives the feedback voltage from an external resistor divider across the output. GND (Pin 4/Pin 1): Ground Pin. NGATE (Pin 5/Pin 8): Gate Drive for the External N-Channel MOSFET. This pin swings from 0V to VIN. VCC (Pin 6/Pin 7): Supply Pin. This pin must be closely decoupled to GND (Pin 4). RUN/SS (Pin 7/Pin 6): Shutdown and External Soft-Start Pin. In shutdown, all functions are disabled and the NGATE pin is held low. SW (Pin 8/Pin 5): Switch node connection to inductor and current sense input pin through external slope compensation resistor. Normally, the external N-channel MOSFET’s drain is connected to this pin. Exposed Pad (NA/Pin 9): Ground. Must be soldered to PCB for electrical contact and rated thermal performance. 38735fb 5 LTC3873-5 FUNCTIONAL DIAGRAM VCC GND SW UNDERVOLTAGE LOCKOUT UV VOLTAGE REFERENCE 1.2V VCC SHUNT REGULATOR SLOPE COMPENSATION SHUTDOWN COMPARATOR – + CURRENT COMPARATOR IPRG 3μA ILIM + SHDN ITH BUFFER – RUN/SS RS LATCH R Q S 200kHz OSCILLATOR AND MAX DUTY CYCLE CURRENT LIMIT CLAMP SWITCHING LOGIC CIRCUIT VIN NGATE ITH 38735 FD 6 + INTERNAL SOFT-START RAMP – 1.2V ERROR AMPLIFIER VFB 38735fb LTC3873-5 OPERATION Main Control Loop The LTC3873-5 is a general purpose N-channel switching DC/DC converter for boost, flyback and SEPIC applications. Its No RSENSE sensing technique improves efficiency, increases power density and reduces the cost of the overall solution. For circuit operation, please refer to the Functional Diagram of the IC and the Typical Application on the front page. During normal operation, the power MOSFET is turned on when the oscillator sets the PWM latch and is turned off when the current comparator resets the latch. The divided-down output voltage is compared to an internal 1.2V reference by the error amplifier, which outputs an error signal at the ITH pin. The voltage on the ITH pin sets the current comparator input threshold. When the load current increases, a fall in the VFB voltage relative to the reference voltage causes the ITH pin to rise, causing the current comparator to trip at a higher peak inductor current value. The average inductor current will therefore rise until it equals the load current, thereby maintaining output regulation. L VIN VCC SW LTC3873-5 NGATE GND GND 38735 F01 The LTC3873-5 can be used either by sensing the voltage drop across the power MOSFET or by connecting the SW pin to a conventional sensing resistor in the source of the power MOSFET. Sensing the voltage across the power MOSFET maximizes converter efficiency and minimizes the component count; the maximum rating for this pin, 60V, allows MOSFET sensing in a wide output voltage range. Shunt Regulator A built-in shunt regulator from the VCC pin to GND limits the voltage on the VCC pin to approximately 9.3V as long as the shunt regulator is not forced to sink more than 25mA. The shunt regulator permits the use of a wide variety of powering schemes that exceed the LTC3873-5’s absolute maximum ratings. Further details on powering schemes are described in the Application Information section. Start-Up/Shutdown The LTC3873-5 has two shutdown mechanisms to disable and enable operation: an undervoltage lockout on the VCC supply pin voltage and a threshold RUN/SS pin. The LTC3873-5 transitions into and out of shutdown according to the state diagram shown in Figure 3. The undervoltage lockout (UVLO) mechanism prevents the LTC3873-5 from trying to drive a MOSFET with insufficient VGS. The voltage at the VCC pin must exceed D VOUT + COUT VSW Figure 1. SW Pin (Internal Sense Pin) Connection for Maximum Efficiency D VOUT VCC NGATE LTC3873-5 SW GND GND 38735 F02 LTC3873-5 SHUT DOWN L VIN VIN < VTURNOFF (NOMINALLY 2.9V) VRUN/SS < VSHDN (NOMINALLY 0.7V) VRUN/SS > VSHDN AND VIN > VTURNON (NOMINALLY 4.1V) VSW + COUT RSL RSENSE LTC3873-5 ENABLED 38735 F03 Figure 2. SW Pin (Internal Sense Pin) Connection for Sensing Resistor Figure 3. Start-Up/Shut Down State Diagram 38735fb 7 LTC3873-5 OPERATION VTURNON (nominally 4.1V) at least momentarily to enable LTC3873-5 operation. The VCC voltage is then allowed to fall to VTURNOFF (nominally 2.9V) before undervoltage lockout disables the LTC3873-5. The RUN/SS pin can be driven below VSHDN (nominally 0.7V) to force the LTC3873-5 into shutdown. When the chip is off, the input supply current is typically only 50μA. Keep in mind that VCC should exceed the gate threshold voltage of the switching MOSFET for safe operation. Soft-Start Leave the RUN/SS pin open to use the internal 3.3ms soft-start. During the internal soft-start, a voltage ramp limits the VITH. 3.3ms is required for ITH to ramp from zero current level to full current level. The soft-start can be lengthened by placing an external capacitor from the RUN/SS pin to the GND. A 3μA current will charge the capacitor, pulling the RUN/SS pin above the shutdown threshold and a 15μA pull-up current will continue to ramp RUN/SS to limit VITH during the start-up. When RUN/SS is driven by an external logic, a minimum of 2.75V logic is recommended to allow the maximum ITH range. Light Load Operation Under very light load current conditions, the ITH pin voltage will be very close to 0.85V. As the load current decreases further, an internal offset at the current comparator input will assure that the current comparator remains tripped (even at zero load current) and the regulator will start to skip cycles in order to maintain regulation. This behavior allows the regulator to maintain constant frequency down to very light loads, resulting in low output ripple as well as low audible noise and reduced RF interference while providing high light load efficiency. Current Sense During the switch on-time, the control circuit limits the maximum voltage drop across the current sense component to about 295mV, 110mV and 185mV at low duty cycle with IPRG tied to VIN, GND or left floating respectively. It is reduced with increasing duty cycle as shown in Figure 4. MAXIMUM CURRENT SENSE VOLTAGE (mV) 300 250 200 150 IPRG = LOW 100 50 0 1 20 40 60 DUTY CYCLE (%) 80 100 3873-5 F04 IPRG = HIGH IPRG = FLOAT Figure 4. Maximum SENSE Threshold Voltage vs Duty Cycle 38735fb 8 LTC3873-5 APPLICATIONS INFORMATION VCC Bias Power The VCC pin must be bypassed to the GND pin with a minimum 10μF ceramic or tantalum capacitor located immediately adjacent to the two pins. Proper supply bypassing is necessary to supply the high transient currents required by the MOSFET gate driver. For maximum flexibility, the LTC3873-5 is designed so that it can be operated from voltages well beyond the LTC3873-5’s absolute maximum ratings. In the simplest case, the LTC3873-5 can be powered with a resistor connected between the input voltage and VCC. The built-in shunt regulator limits the voltage on the VCC pin to around 9.3V as long as the shunt regulator is not forced to sink more than 25mA. This powering scheme has the drawback that the power loss in the resistor reduces converter efficiency and the 25mA shunt regulator maximum may limit the maximum-minimum range of input voltage. The circuit in Figure 5 shows a second way to power the LTC3873-5. An external series pre-regulator consisting of series pass transistor Q1, zener diode D1 and bias resistor RB brings VCC to at least 7.6V nominal, well above the undervoltage lockout threshold. VIN LTC3873-5 VCC D1 8.2V CVCC 0.1μF GND 38735 F05 resistor (RSL) connecting the SW pin to the current sense resistor (RSENSE) thus develops a ramping voltage drop. From the perspective of the SW pin, this ramping voltage adds to the voltage across the sense resistor, effectively reducing the current comparator threshold in proportion to duty cycle. The amount of reduction in the current comparator threshold (ΔVSENSE) can be calculated using the following equation: ΔVSENSE = Duty Cycle – 6% 20μA • RSLOPE 80% Note the external programmable slope compensation is only needed when the internal slope compensation is not sufficient. In some applications RSL can be shorted. For the LTC3873-5, when the RDS(ON) sensing technique is used, the ringing on the SW pin disrupts the tiny slope compensation current out of the pin. It is not recommended to add external slope compensation in this case. Output Voltage Programming The output voltage is set by a resistor divider according to the following formula: ⎛ R2⎞ VO = 1.2V • ⎜1+ ⎟ ⎝ R1⎠ The external resistor divider is connected to the output as shown in Figure 4, allowing remote voltage sensing. Choose resistance values for R1 and R2 to be as large as possible in order to minimize any efficiency loss due to the static current drawn from VOUT, but just small enough so that when VOUT is in regulation, the error caused by the nonzero input current to the VFB pin is less than 1%. A good rule of thumb is to choose R1 to be 24k or less. Transformer Design Considerations Transformer specification and design is perhaps the most critical part of applying the LTC3873-5 successfully. In addition to the usual list of caveats dealing with high frequency power transformer design, the following should prove useful. RB Q1 Figure 5. External Pre-Regulator for VCC Bias Power Slope Compensation The LTC3873-5 has built-in internal slope compensation to stabilize the control loop against sub-harmonic oscillation. It also provides the ability to externally increase slope compensation by injecting a ramping current out of its SW pin into an external slope compensation resistor (RSL in Figure 2). This current ramp starts at zero right after the NGATE pin has been high. The current rises linearly towards a peak of 20μA at the maximum duty cycle of 80%, shutting off once the NGATE pin goes low. A series 38735fb 9 LTC3873-5 APPLICATIONS INFORMATION Turns Ratios Due to the use of the external feedback resistor divider ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. Simple ratios of small integers, e.g., 1:1, 2:1, 3:2, etc. can be employed which yield more freedom in setting total turns and mutual inductance. Simple integer turns ratios also facilitate the use of “off-the-shelf” configurable transformers such as the Coiltronics VERSA-PAC series in applications with high input to output voltage ratios. For example, if a 6-winding VERSA-PAC is used with three windings in series on the primary and three windings in parallel on the secondary, a 3:1 turns ratio will be achieved. Turns ratio can be chosen on the basis of desired duty cycle. However, remember that the input supply voltage plus the secondary-to-primary referred version of the flyback pulse (including leakage spike) must not exceed the allowed external MOSFET breakdown rating. Leakage Inductance Transformer leakage inductance (on either the primary or secondary) causes a voltage spike to occur after the output switch (Q1) turn-off. This is increasingly prominent at higher load currents where more stored energy must be dissipated. In some cases a “snubber” circuit will be required to avoid overvoltage breakdown at the MOSFET’s drain node. Application Note 19 is a good reference on snubber design. A bifilar or similar winding technique is a good way to minimize troublesome leakage inductances. However, remember that this will limit the primary-tosecondary breakdown voltage, so bifilar winding is not always practical. Power MOSFET Selection The power MOSFET serves two purposes in the LTC3873-5: it represents the main switching element in the power path and its RDS(ON) represents the current sensing element for the control loop. Important parameters for the power MOSFET include the drain-to-source breakdown voltage (BVDSS), the threshold voltage (VGS(TH)), the on-resistance (RDS(ON)) versus gate-to-source voltage, the gate-to-source and gate-to-drain charges (QGS and QGD, respectively), the maximum drain current (ID(MAX)) and the MOSFET’s thermal resistances (RTH(JC) and RTH(JA)). Current Limit Programming During the switch on-time, the control circuit limits the maximum voltage drop across the current sense component to about 270mV, 100mV and 170mV at low duty cycle with IPRG tied to VIN, GND or left floating respectively. For boost applications with RDS(ON) sensing, refer to the LTC3872 data sheet for the selection of MOSFET RDS(ON). MOSFETs have conduction losses (I2R) and switching losses. For VDS < 20V, high current efficiency generally improves with large MOSFETs with low RDS(ON), while for VDS > 20V the transition losses rapidly increase to the point that the use of a higher RDS(ON) device with lower reverse transfer capacitance, CRSS, actually provides higher efficiency. Output Capacitors The output capacitor is normally chosen by its effective series resistance (ESR), which determines output ripple voltage and affects efficiency. Low ESR ceramic capacitors are often used to minimize the output ripple. Boost regulators have large RMS ripple current in the output capacitor that must be rated to handle the current. The output ripple current (RMS) is: IRMS(COUT ) ≈ IOUT(MAX ) • Output ripple is then simply: VOUT = RESR(ΔIL(RMS)) The output capacitor for flyback converter should have a ripple current rating greater than: IRMS = IOUT • DMAX 1 – DMAX VOUT – VIN(MIN) VIN(MIN) 38735fb 10 LTC3873-5 APPLICATIONS INFORMATION Input Capacitors The input capacitor of a boost converter is less critical due to the fact that the input current waveform is triangular, and does not contain large square wave currents as found in the output capacitor. The input voltage source impedance determines the size of the capacitor that is typically 10μF to 100μF A low ESR is recommended although not as critical . as the output capacitor can be on the order of 0.3Ω. The RMS input ripple current for a boost converter is: IRMS(CIN) = 0.3 • VIN(MIN) L•f • DMAX the maximum step-up ratio or maximum output voltage with the given input voltage of: VOUT(MAX ) = VIN(MIN) 1 – 0.8% – VD Please note that the input capacitor can see a very high surge current when a battery is suddenly connected to the input of the converter and solid tantalum capacitors can fail catastrophically under these conditions. In a flyback converter, the input flows in pulses placing severe demands on the input capacitors. Select an input capacitor with a ripple current rating greater than: IRMS = PIN VIN(MIN) 1 – DMAX DMAX Current and voltage stress on the power switch and synchronous rectifiers, input and output capacitor RMS currents and transformer utilization (size vs power) are impacted by duty factor. Unfortunately duty factor cannot be adjusted to simultaneously optimize all of these requirements. In general, avoid extreme duty factors since this severely impacts the current stress on most of the components. A reasonable target for duty factor is 50% at nominal input voltage. Using this rule of thumb, the ideal transformer turns ratio is: NIDEAL = VOUT 1 – D VOUT • = VIN D VIN Output Diode Selection To maximize efficiency, a fast switching diode with low forward drop and low reverse leakage is desired. The output diode in a boost converter conducts current during the switch off-time. The peak reverse voltage that the diode must withstand is equal to the regulator output voltage. The average forward current in normal operation is equal to the output current, and the peak current is equal to the peak inductor current. Duty Cycle Considerations The LTC3873-5 imposes a maximum duty cycle limit of 80% typical. For a flyback converter, the maximum duty cycle prevents the transformer core from saturation. In a boost converter application, however, it sets a limit on 38735fb 11 LTC3873-5 TYPICAL APPLICATIONS 1W Isolated Housekeeping Telecom Converter PRIMARY SIDE 10V, 100mA OUTPUT BAS516 T1 • 2.2μF VIN 36V TO 75V 221k 8.8k 8.2V 1nF 22k LTC3873-5 NGATE ITH GND 10nF 1.2k VFB IPRG SW 10μF RUN/SS VCC BAS516 100Ω 1μF BAS516 • 2.2μF • FDC2512 SECONDARY SIDE 10V, 100mA OUTPUT SECONDARY SIDE GROUND T1: PULSE ENGINEERING PA0648 OR TYCO TTI8698 0.1Ω PRIMARY GROUND 38735 TA04 9V to 15V VIN, 12V VOUT SEPIC Converter VIN 9V TO 15V T1 4.56μH BH510-1009 BH ELECTRONICS 1 4 10μF 3 + 100μF 20V 2 • • 3 10μF 25V 301Ω UPS840 + 100k 1 2 10nF 33.2k 11k 3 4 LTC3873-5 IPRG ITH SW RUN/SS 8 7 6 5 4.7μF 0.1μF 3873-5 TA04 Si4840 47μF 16V 3 10μF 16V VOUT 12V 2A VFB = 1.2V VCC GND NGATE 38735fb 12 LTC3873-5 TYPICAL APPLICATIONS –10V to –15V VIN, –5V VOUT Negative-to-Negative (Negative Buck) Converter J1 GND C4 10μF 25V 1 IPRG LTC3873-5 2 R3 15k J2 –VIN –10V TO –15V C3 4.7nF R2 1.2k 3 4 ITH VFB = 1.2V GND RUN/SS VCC NGATE 7 6 5 C1 1μF C2 0.1μF Q1 R5 10k 1 2 3 3873-3 TA05 R1 301Ω SW 8 D1 L1 6.4μH COUT 100μF 6.3V 3 J3 GND R4 4.99k J4 –VOUT –5V 3A 5 4 Q2 BC857 6 38735fb 13 LTC3873-5 PACKAGE DESCRIPTION TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 0.52 MAX 0.65 REF 2.90 BSC (NOTE 4) 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.65 BSC 0.22 – 0.36 8 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 1.00 MAX DATUM ‘A’ 0.01 – 0.10 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0802 38735fb 14 LTC3873-5 PACKAGE DESCRIPTION DDB Package 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702 Rev B) 0.61 0.05 (2 SIDES) 0.70 0.05 2.55 0.05 1.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.20 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 0.10 (2 SIDES) R = 0.115 TYP 5 0.40 8 0.10 R = 0.05 TYP PIN 1 BAR TOP MARK (SEE NOTE 6) 2.00 0.10 (2 SIDES) 0.56 0.05 (2 SIDES) 0.75 0.05 0.25 0.200 REF 4 0.05 2.15 0.05 (2 SIDES) 1 0.50 BSC PIN 1 R = 0.20 OR 0.25 45 CHAMFER (DDB8) DFN 0905 REV B 0 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 38735fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3873-5 TYPICAL APPLICATION 5V Output Nonisolated Telecom Housekeeping Power Supply VIN 36V TO 72V 4.7μF 100V X5R T1 UPS840 300μF 6.3V X5R 3 221k D1 5.1V 10μF VCC ITH NGATE LTC3873-5 RUN/SS GND SW IPRG VFB 12k 36k • VOUT 5V 2A MAX • FDC2512 56k 2.2nF 0.1μF 68mΩ 38735 TA03 D1: MBR0540T1 T1: COOPER CTX02-15242 RELATED PARTS PART NUMBER LT 1619 LTC1624 LTC1700 LTC1871-7 LTC1872/LTC1872B LT1930 LT1931 LTC3401/LTC3402 LTC3704 LTC1871/LTC1871-7 LTC3703/LTC3703-5 LTC3803/LTC3803-5 LTC3805 LT3825 LT3837 LTC3873 ® DESCRIPTION Current Mode PWM Controller Current Mode DC/DC Controller No RSENSE Synchronous Step-Up Controller Wide Input Range Controller SOT-23 Boost Controller 1.2MHz, SOT-23 Boost Converter Inverting 1.2MHz, SOT-23 Converter 1A/2A 3MHz Synchronous Boost Converters Positive-to Negative DC/DC Controller No RSENSE, Wide Input Range DC/DC Boost Controller 100V Synchronous Controller 200kHz Flyback DC/DC Controller Adjustable Frequency Flyback Controller Isolated No-Opto Synchronous Flyback Controller Isolated No-Opto Synchronous Flyback Controller No RSENSE Constant Frequency Boost/Flyback/SEPIC Controller COMMENTS 300kHz Fixed Frequency, Boost, SEPIC, Flyback Topology SO-8; 300kHz Operating Frequency; Buck, Boost, SEPIC Design; VIN Up to 36V Up to 95% Efficiency, Operating as Low as 0.9V Input No RSENSE, 7V Gate Drive, Current Mode Control Delievers Up to 5A, 550kHz Fixed Frequency, Current Mode Up to 34V Output, 2.6V VIN 16V, Miniature Design Positive-to Negative DC/DC Conversion, Miniature Design Up to 97% Efficiency, Very Small Solution, 0.5V ≤ VIN ≤ 5V No RSENSE, Current Mode Control, 50kHz to 1MHz No RSENSE, Current Mode Control, 2.5V ≤ VIN ≤ 36V Step-Up or Step Down, 600kHz, SSOP-16, SSOP-28 VIN and VOUT Limited Only by External Components VIN and VOUT Limited Only by External Components VIN: 24V to 75V, Up to 80W, Current Mode Control VIN: 4.5V to 20V, Up to 60W, Current Mode Control VIN and VOUT Limited Only by External Components, 200kHz Frequency, ThinSOT or DFN Package 38735fb 16 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0908 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007