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LTC4440ES6-5

LTC4440ES6-5

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTC4440ES6-5 - High Speed, High Voltage, High Side Gate Driver - Linear Technology

  • 数据手册
  • 价格&库存
LTC4440ES6-5 数据手册
LTC4440-5 High Speed, High Voltage, High Side Gate Driver FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Wide Operating VIN Range: Up to 60V Rugged Architecture Tolerant of 80V VIN Transients Powerful 1.85Ω Driver Pull-Down (with 6V Supply) Powerful 1.1A Peak Current Driver Pull-Up (with 6V Supply) 7ns Fall Time Driving 1000pF Load 10ns Rise Time Driving 1000pF Load Drives Standard Threshold MOSFETs TTL/CMOS Compatible Inputs with Hysteresis Input Thresholds are Independent of Supply Undervoltage Lockout Low Profile (1mm) SOT-23 (ThinSOTTM) and Thermally Enhanced 8-Pin MSOP Packages The LTC®4440-5 is a high frequency high side N-channel MOSFET gate driver that is designed to operate in applications with VIN voltages up to 60V. The LTC4440-5 can also withstand and continue to function during 80V VIN transients. The powerful driver capability reduces switching losses in MOSFETs with high gate capacitances. The LTC4440-5’s pull-up has a peak output current of 1.1A and its pull-down has an output impedance of 1.85Ω. The LTC4440-5 features supply independent TTL/CMOS compatible input thresholds with 350mV of hysteresis. The input logic signal is internally level-shifted to the bootstrapped supply, which may function at up to 95V above ground. The LTC4440-5 is optimized for driving (5V) logic level FETs and contains an undervoltage lockout circuit that disables the external MOSFET when activated. The LTC4440-5 is available in the low profile (1mm) SOT-23 or a thermally enhanced 8-lead MSOP package. PARAMETER Max Operating TS Absolute Max TS MOSFET Gate Drive VCC UV+ VCC UV– LTC4440-5 60V 80V 4V to 15V 3.2V 3.04V LTC4440 80V 100V 8V to 15V 6.3V 6.0V APPLICATIO S ■ ■ ■ ■ ■ Telecommunications Power Systems Distributed Power Architectures Server Power Supplies High Density Power Modules General Purpose Low-Side Driver , LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6677210. TYPICAL APPLICATIO VIN 36V TO 60V VCC 4V TO 15V LTC4440-5 VCC BOOST INP GND TG TS Synchronous Phase-Modulated Full-Bridge Converter LTC4440-5 Driving a 1000pF Capacitive Load TG-TS 2V/DIV LTC4440-5 LTC3722-1 VCC BOOST INP GND TG TS 4440 TA01 INP 2V/DIV • • 50ns/DIV VCC = BOOST-TS = 5V 4440-5 TA02 U 44405fa U U 1 LTC4440-5 ABSOLUTE MAXIMUM RATINGS Supply Voltage VCC ....................................................... – 0.3V to 15V BOOST – TS ......................................... – 0.3V to 15V INP Voltage ............................................... – 0.3V to 15V BOOST Voltage (Continuous) ................... – 0.3V to 85V BOOST Voltage (100ms) .......................... – 0.3V to 95V TS Voltage (Continuous) ............................. – 5V to 70V PACKAGE/ORDER INFORMATION TOP VIEW INP GND VCC GND 1 2 3 4 8 7 6 5 TS TG BOOST NC VCC 1 GND 2 INP 3 TOP VIEW 6 BOOST 5 TG 4 TS 9 MS8E PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 40°C/W (NOTE 4) EXPOSED PAD IS GND (PIN 9), MUST BE SOLDERED TO PCB ORDER PART NUMBER LTC4440EMS8E-5 MS8E PART MARKING LTBRG Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS SYMBOL IVCC PARAMETER DC Supply Current Normal Operation UVLO Undervoltage Lockout Threshold CONDITIONS Main Supply (VCC) The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 6V, VTS = GND = 0V, unless otherwise noted. MIN TYP MAX UNITS INP = 0V VCC < UVLO Threshold (Falling) – 0.1V VCC Rising VCC Falling Hysteresis ● ● UVLO Bootstrapped Supply (BOOST – TS) IBOOST DC Supply Current Normal Operation INP = 0V INP = 6V INP Ramping High INP Ramping Low ● ● Input Signal (INP) VIH VIL VIH – VIL IINP High Input Threshold Low Input Threshold Input Voltage Hysteresis Input Pin Bias Current 1.2 0.8 1.6 1.25 0.350 ±0.01 ±2 2 1.6 V V V µA 44405fa 2 U U W WW U W (Note 1) TS Voltage (100ms) ..................................... – 5V to 80V Peak Output Current < 1µs (TG) ............................... 4A Operating Ambient Temperature Range (Note 2) .............................................. – 40°C to 85°C Junction Temperature (Note 3) ............................ 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C S6 PACKAGE 6-LEAD PLASTIC SOT-23 TJMAX = 125°C, θJA = 230°C/W ORDER PART NUMBER LTC4440ES6-5 S6 PART MARKING LTBRF 200 18 2.75 2.60 3.20 3.04 160 325 40 3.65 3.50 µA µA V V mV 0 310 450 µA µA LTC4440-5 ELECTRICAL CHARACTERISTICS SYMBOL VOH VOL IPU RDS tr tf tPLH tPHL PARAMETER High Output Voltage Low Output Voltage Peak Pull-Up Current Output Pull-Down Resistance Output Rise Time Output Fall Time Output Low-High Propagation Delay Output High-Low Propagation Delay Output Gate Driver (TG) The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = VBOOST = 6V, VTS = GND = 0V, unless otherwise noted. CONDITIONS ITG = –10mA, VOH = VBOOST – VTG ITG = 100mA ● ● ● MIN TYP 0.7 185 MAX UNITS V 275 2.75 mV A Ω ns ns ns ns 0.75 1.1 1.85 10 100 7 70 Switching Timing 10% – 90%, CL = 1nF 10% – 90%, CL = 10nF 10% – 90%, CL = 1nF 10% – 90%, CL = 10nF ● ● 35 33 65 65 ns ns Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC4440-5 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • θJA°C/W) Note 4: Failure to solder the exposed back side of the MS8E package to the PC board will result in a thermal resistance much higher than 40°C/W. TYPICAL PERFOR A CE CHARACTERISTICS VCC Supply Quiescent Current vs Voltage 350 300 QUIESCENT CURRENT (µA) 250 INP = GND 200 INP = VCC 150 100 50 0 0 10 5 VCC SUPPLY VOLTAGE (V) 15 4440-5 G01 300 250 200 150 100 50 0 0 5 10 15 4440-5 G02 OUTPUT (TG-TS) VOLTAGE (mV) QUIESCENT CURRENT (µA) UW BOOST-TS Supply Quiescent Current vs Voltage 400 350 INP = VCC Output Low Voltage (VOL) vs Supply Voltage 300 250 200 150 100 50 0 3 4 BOOST-TS SUPPLY VOLTAGE (V) 5 6 7 8 9 10 11 12 13 14 15 BOOST-TS SUPPLY VOLTAGE (V) 4440-5 G03 44405fa 3 LTC4440-5 TYPICAL PERFOR A CE CHARACTERISTICS Output High Voltage (VOH) vs Supply Voltage 16 14 2.0 1.8 1.6 VIH VIL HIGH OUTPUT VOLTAGE (V) INPUT THRESHOLD (V) 12 ITG = 1mA 10 8 6 4 2 0 4 5 6 7 8 9 10 11 12 13 14 15 BOOST-TS SUPPLY VOLTAGE (V) 4440-5 G04 ITG = 10mA ITG = 100mA VCC Supply Current vs Temperature 250 3.5 INP = GND 3.4 QUIESCENT CURRENT (µA) RISING 3.2 3.1 3.0 2.9 2.8 2.7 2.6 FALLING QUIESCENT CURRENT (µA) 200 INP = VCC UVLO THRESHOLD VOLTAGE (V) 150 100 50 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G08 Input (INP) Threshold vs Temperature 2.0 1.8 380 370 HYSTERESIS (VIH-VIL) (mV) INPUT THRESHOLD (V) 1.6 1.4 PEAK CURRENT (A) VIH VIL 1.2 1.0 0.8 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G11 4 UW Input (INP) Thresholds vs Supply Voltage INPUT (INP) 5V/DIV 2MHz Operation 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 4 5 6 OUTPUT (TG) 5V/DIV 250ns/DIV VCC = BOOST-TS = 12V 7 8 9 10 11 12 13 14 15 VCC SUPPLY VOLTAGE (V) 4440-5 G05 4440-5 G07 VCC Undervoltage Lockout Thresholds vs Temperature 400 350 300 250 200 150 100 50 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G09 BOOST-TS Quiescent Current vs Temperature 3.3 2.5 –55 –35 –15 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G10 Input Threshold Hysteresis vs Temperature 3.5 3.0 Peak Driver (TG) Pull-Up Current vs Temperature BOOST-TS = 15V 360 350 340 330 320 310 300 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G12 2.5 BOOST-TS = 12V 2.0 1.5 1.0 0.5 0 –55 –35 –15 BOOST-TS = 4V BOOST-TS = 6V 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G13 44405fa LTC4440-5 TYPICAL PERFOR A CE CHARACTERISTICS Output Driver Pull-Down Resistance vs Temperature 3.0 2.5 PROPAGATION DELAY (ns) 2.0 BOOST-TS = 4V BOOST-TS = 6V RDS (Ω) 1.5 1.0 0.5 0 –55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G14 Driving a 3300pF Capacitive Load TG-TS 2V/DIV INP 2V/DIV 4440-5 G16 50ns/DIV VCC = BOOST-TS = 5V PI FU CTIO S SOT-23 Package VCC (Pin 1): Chip Supply. This pin powers the internal low side circuitry. A low ESR ceramic bypass capacitor should be tied between this pin and the GND pin (Pin 2). GND (Pin 2): Chip Ground. INP (Pin 3): Input Signal. TTL/CMOS compatible input referenced to GND (Pin 2). TS (Pin 4): Top (High Side) source connection or GND if used in ground referenced applications. TG (Pin 5): High Current Gate Driver Output (Top Gate). This pin swings between TS and BOOST. BOOST (Pin 6): High Side Bootstrapped Supply. An external capacitor should be tied between this pin and TS (Pin 4). Normally, a bootstrap diode is connected between VCC (Pin 1) and this pin. Voltage swing at this pin is from VCC – VD to VIN + VCC – VD, where VD is the forward voltage drop of the bootstrap diode. UW Propagation Delay vs Temperature 50 45 40 tPLH 35 tPHL 30 25 20 –55 –35 –15 VCC = BOOST = 6V BOOST-TS = 15V BOOST-TS = 12V 5 25 45 65 85 105 125 TEMPERATURE (°C) 4440-5 G15 Driving a 3300pF Capacitive Load TG-TS 5V/DIV INP 2V/DIV 50ns/DIV VCC = BOOST-TS = 12V 4440-5 G17 U U U 44405fa 5 LTC4440-5 PI FU CTIO S Exposed Pad MS8E Package INP (Pin 1): Input Signal. TTL/CMOS compatible input referenced to GND (Pin 2). GND (Pins 2, 4): Chip Ground. VCC (Pin 3): Chip Supply. This pin powers the internal low side circuitry. A low ESR ceramic bypass capacitor should be tied between this pin and the GND pin (Pin 2). NC (Pin 5): No Connect. No connection required. For convenience, this pin may be tied to Pin 6 (BOOST) on the application board. BOOST (Pin 6): High Side Bootstrapped Supply. An external capacitor should be tied between this pin and TS (Pin 8). Normally, a bootstrap diode is connected between VCC (Pin 3) and this pin. Voltage swing at this pin is from VCC – VD to VIN + VCC – VD, where VD is the forward voltage drop of the bootstrap diode. TG (Pin 7): High Current Gate Driver Output (Top Gate). This pin swings between TS and BOOST. TS (Pin 8): Top (High Side) source connection or GND if used in ground referenced applications. Exposed Pad (Pin 9): Ground. Must be electrically connected to Pins 2 and 4 and soldered to PCB ground for optimum thermal performance. BLOCK DIAGRA 4V TO 15V GND TS TI I G DIAGRA 6 W W U U UW U BOOST VCC UNDERVOLTAGE LOCKOUT VIN UP TO 60V, TRANSIENT UP TO 80V TG BOOST INP LEVEL SHIFTER 44405 BD GND TS INPUT RISE/FALL TIME < 10ns INPUT (INP) VIH VIL OUTPUT (TG) tr tPLH tf tPHL 90% 10% 4440 TD 44405fa LTC4440-5 APPLICATIO S I FOR ATIO Overview The LTC4440-5 receives a ground-referenced, low voltage digital input signal to drive a high side N-channel power MOSFET whose drain can float up to 80V above ground, eliminating the need for a transformer between the low voltage control signal and the high side gate driver. The LTC4440-5 normally operates in applications with input supply voltages (VIN) up to 60V, but is able to withstand and continue to function during 80V, 100ms transients on the input supply. The powerful output driver of the LTC4440-5 reduces the switching losses of the power MOSFET, which increase with transition time. The LTC4440-5 is capable of driving a 1nF load with 10ns rise and 7ns fall times using a bootstrapped supply voltage VBOOST–TS of 6V. Input Stage The LTC4440-5 employs TTL/CMOS compatible input logic level or thresholds that allow a low voltage digital signal to drive standard threshold power MOSFETs. The LTC44405 contains an internal voltage regulator that biases the input buffer, allowing the input thresholds (VIH = 1.6V, VIL = 1.25V) to be relatively independent of variations in VCC. The 350mV hysteresis between VIH and VIL eliminates false triggering due to noise during switching transitions. However, care should be taken to keep this pin from any noise pickup, especially in high frequency, high voltage applications. The LTC4440-5 input buffer has a high input impedance and draws negligible input current, simplifying the drive circuitry required for the input. Output Stage A simplified version of the LTC4440-5’s output stage is shown in Figure 1 . The pull-down device is an N-channel MOSFET (N1) and the pull-up device is an NPN bipolar junction transistor (Q1). The output swings from the lower rail (TS) to within an NPN VBE (~ 0.7V) of the positive rail (BOOST). This large voltage swing is important in driving external power MOSFETs, whose RDS(ON) is inversely proportional to its gate overdrive voltage (VGS – VTH). The LTC4440-5’s peak pull-up (Q1) current is 1.1A while the pull-down (N1) resistance is 1.85Ω, with a BOOST-TS supply of 6V. The low impedance of N1 is required to Rise/Fall Time Since the power MOSFET generally accounts for the majority of the power loss in a converter, it is important to quickly turn it on or off, thereby minimizing the transition time in its linear region. The LTC4440-5 can drive a 1nF load with a 10ns rise time and 7ns fall time. The LTC4440-5’s rise and fall times are determined by the peak current capabilities of Q1 and N1. The predriver that drives Q1 and N1 uses a nonoverlapping transition scheme to minimize cross-conduction currents. N1 is fully turned off before Q1 is turned on and vice versa. 44405fa U BOOST VIN UP TO 100V LTC4440-5 Q1 TG POWER MOSFET N1 CGS LOAD INDUCTOR 4440 F01 W UU CGD TS V– Figure 1. Capacitance Seen by TG During Switching discharge the power MOSFET’s gate capacitance during high-to-low signal transitions. When the power MOSFET’s gate is pulled low (gate shorted to source through N1) by the LTC4440-5, its source (TS) is pulled low by its load (e.g., an inductor or resistor). The slew rate of the source/ gate voltage causes current to flow back to the MOSFET’s gate through the gate-to-drain capacitance (CGD). If the MOSFET driver does not have sufficient sink current capability (low output impedance), the current through the power MOSFET’s CGD can momentarily pull the gate high, turning the MOSFET back on. A similar scenario exists when the LTC4440-5 is used to drive a low side MOSFET. When the low side power MOSFET’s gate is pulled low by the LTC4440-5, its drain voltage is pulled high by its load (e.g., inductor or resistor). The slew rate of the drain voltage causes current to flow back to the MOSFET’s gate through its gate-to-drain capacitance. If the MOSFET driver does not have sufficient sink current capability (low output impedance), the current through the power MOSFET’s CGD can momentarily pull the gate high, turning the MOSFET back on. 7 LTC4440-5 APPLICATIO S I FOR ATIO Power Dissipation To ensure proper operation and long-term reliability, the LTC4440-5 must not operate beyond its maximum temperature rating. Package junction temperature can be calculated by: TJ = TA + PD (θJA) where: TJ = Junction Temperature TA = Ambient Temperature PD = Power Dissipation θJA = Junction-to-Ambient Thermal Resistance Power dissipation consists of standby and switching power losses: PD = PSTDBY + PAC where: PSTDBY = Standby Power Losses PAC = AC Switching Losses The LTC4440-5 consumes very little current during standby. The DC power loss at VCC = 6V and VBOOST–TS = 6V is only (250µA)(5V) = 1.2mW with INP = 0V. AC switching losses are made up of the output capacitive load losses and the transition state losses. The capacitive load losses are primarily due to the large AC currents needed to charge and discharge the load capacitance during switching. Load losses for the output driver driving a pure capacitive load COUT would be: Load Capacitive Power = (COUT)(f)(VBOOST–TS)2 The power MOSFET’s gate capacitance seen by the driver output varies with its VGS voltage level during switching. A power MOSFET’s capacitive load power dissipation can be calculated using its gate charge, QG. The QG value corresponding to the MOSFET’s VGS value (VCC in this case) can be readily obtained from the manufacturer’s QG vs VGS curves: Load Capacitive Power (MOS) = (VBOOST–TS)(QG)(f) Transition state power losses are due to both AC currents required to charge and discharge the driver’s internal 8 U nodal capacitances and cross-conduction currents in the internal gates. Undervoltage Lockout (UVLO) The LTC4440-5 contains an undervoltage lockout detector that monitors VCC. When VCC falls below 3.04V, the internal buffer is disabled and the output pin TG is pulled down to TS. Bypassing and Grounding The LTC4440-5 requires proper bypassing on the VCC and VBOOST–TS supplies due to its high speed switching (nanoseconds) and large AC currents (Amperes). Careless component placement and PCB trace routing may cause excessive ringing and under/overshoot. To obtain the optimum performance from the LTC4440-5: A. Mount the bypass capacitors as close as possible between the VCC and GND pins and the BOOST and TS pins. The leads should be shortened as much as possible to reduce lead inductance. B. Use a low inductance, low impedance ground plane to reduce any ground drop and stray capacitance. Remember that the LTC4440-5 switches >2A peak currents and any significant ground drop will degrade signal integrity. C. Plan the power/ground routing carefully. Know where the large load switching current is coming from and going to. Maintain separate ground return paths for the input pin and the output power stage. D. Keep the copper trace between the driver output pin and the load short and wide. E. When using the MS8E package, be sure to solder the exposed pad on the back side of the LTC4440-5 package to the board. Correctly soldered to a 2500mm2 double-sided 1oz copper board, the LTC4440-5 has a thermal resistance of approximately 40°C/W. Failure to make good thermal contact between the exposed back side and the copper board will result in thermal resistances far greater than 40°C/W. 44405fa W UU LTC3722/LTC4440-5 420W 36V-60VIN to 12V/35A Isolated Full-Bridge Supply L1 1.3µH 51Ω 2W D2 D3 0.47µF 0.47µF 100V 100V D4 D5 4 11 VOUT 3 12V T1 5(105µH):1:1 D1 13k 1/2W VIN VIN 36V TO 60V 1µ F 100V –VIN 1µ F 100V ×4 12V 3 • 2 10 0.47µF 100V A C 51Ω 2W • 1 1 8 VH 820pF 200V 15Ω 1W D6 L3 0.85µH VH –VOUT VOUT VOUT VCC 6 INP BOOST LTC4440-5EMS8E 7 TG GND GND TS Si7852DP ×2 Si7852DP ×2 • • 4 4 2 2 • TYPICAL APPLICATIO S 8 0.22µF 8 0.22µF 4 11 • L2 150nH 10 D 12V 8 Q1 Q2 2 • B 12V C1, C2 180µF 16V ×2 + 1µ F Si7852DP ×4 –VOUT –VOUT 12V/35A • Si7852DP ×2 Si7852DP ×2 Q4 T2 5:5(105µH):1:1 D7 6 D8 1 D9 3.3V 4.87k 1/4W Si7852DP ×4 Q3 7 1.1k ISNS 0.02Ω 1.5W 0.02Ω 1.5W C3 68µF 20V 12V 100Ω L4 1mH + • 1.10k 6 CSE+ 9 100Ω 5 220pF SYNC T3 1(1.5mH):0.5 1 4 4.87k 1/4W 909Ω 5 CSE– 2 3 1.10k 11 ME ME2 CSF+ LTC3901EGN GND PGND GND2 PGND2 8 4 10 13 909Ω 12 CSF– 14 15 16 MF MF2 VCC 1 PVCC TIMER 7 330pF VOUT VOUT 0.47µF, 100V TDK C3216X7R2A474M 1µF, 100V TDK C4532X7R2A105M C1,C2: SANYO 16SP180M C3: AVX TPSE686M020R0150 C4: MURATA DE2E3KH222MB3B D1, D4-D6: MURS120T3 D2, D3, D7, D8: BAS21 D9: MMBZ5226B D10: MMBZ5240B D11: BAT54 D12: MMBZ231B L1: SUMIDA CDEP105-1R3MC-50 L2: PULSE PA0651 L3: PA1294.910 L4: COILCRAFT DO1608C-105 Q1, Q2: ZETEX FMMT619 Q3, Q4: ZETEX FMMT718 T1, T2: PULSE PA0526 T3: PULSE PA0785 39.2k 100Ω MMBT3904 1k 20k 22Ω 8 B D 10Ω 10Ω C 21 19 17 16 OUTA OUTB OUTC OUTD OUTF OUTE LTC3722EGN-1 CS 3 750Ω 20 15 ISNS 5VREF A 11 9 ADLY PDLY 0.1µF 1µ F 1µ F D10 10V VIN 12V 4.99k 220pF 20k 1/4W 200k –VOUT 330Ω 1 MOC207 6 0.047µF 3 2.7k 9.53k 22nF 470Ω 1/4W 150Ω 10 SBUS 18 10k 182k VIN 12 CT SPRG RLEB FB GND PGND 24 13 10k 33k 8.25k 68nF 23 5 6 22 MMBT3904 UVLO VREF 8 1 5.1k 180pF DPRG NC SYNC SS COMP 7 4 D11 330pF 2.2nF 5 8 2 1 220pF 1µ F 14 2 5VREF 150k V+ LT1431CS8 COLL REF 100k D12 5.1V GND-F GND-S 6 5 8 2.49k –VOUT 4440 TA03 30.1k 0.47µF 220pF C4 2.2nF 250V U VCC 6 INP BOOST LTC4440-5EMS8E 7 TG GND GND TS 7 • • LTC4440-5 44405fa 9 LTC4440-5 2 • • • TYPICAL APPLICATIO S 2 4 0.1µF 0.1µF 5 A B VF 1.5k ISNS 12V L4 1mH D5 1 D6 1k 6 11 CSF+ 9 100Ω 220pF A B 6 4 3 SDRA CS COMP SPRG RLEB SS DPRG VREF 1 243k 68nF 0.47µF 330pF 750Ω 22nF 5 8 2 100k D8 10V 16 12 14 9 150k 270pF 33k 10k 11 10 MOC207 6 0.1µF 3 V+ LT1431CS8 1 COLL REF C4 2.2nF 250V GND-F GND-S 6 5 4440 TA05 2 4 3 • VCC 6 3 INP BOOST LTC4440-5ES6 5 4.7Ω TG GND TS 11 9 VF D2 1µF 100V 7 1k 1/4W VCC 6 3 A INP BOOST LTC4440-5ES6 5 4.7Ω Si7852DP TG GND TS Si7852DP 4 • + C1, C2 47µF 16V ×2 12V/20A 1µ F 97 Si7852DP Si7852DP VE 6.19k 1/4W 6.19k 1/4W 866Ω 12 CSF – 14 15 MF MF2 6 CSE+ LTC3901EGN GND PGND GND2 PGND2 8 4 10 13 1k Si7370DP ×2 Si7370DP ×2 42VIN 96 48VIN –VOUT –VOUT 56VIN 95 R1 0.03Ω 1.5W R2 0.03Ω 1.5W C3 68µF 20V EFFICIENCY (%) + • 866Ω 5 CSE– 2 3 16 ME ME2 VCC 1 PVCC TIMER 7 470pF VOUT –VOUT 42.2k 100Ω VOUT 94 T2 1(1.5mH):0.5 1 4 SYNC 1k 93 6 20 22Ω 8 5 0.1µF 8 10 16 12 14 LOAD CURRENT (A) 18 MMBT3904 1µF 4.7µF D7 10V VIN ISNS 665Ω 12V 200Ω 1/4W 2 SDRB LTC3723EGN-1 15 UVLO FB GND CT 13 7 8 1µF DRVA 5 VCC DRVB 30k 1/4W 22nF 1 100Ω 1/4W 1k 10k 9.53k 22nF 464k 1.5nF 8 2.49k –VOUT 66.5k 1µF, 100V TDK C3225X7R2A105M C1,C2: SANYO 16TQC47M C3: AVX TPSE686M020R0150 C4: MURATA GHM3045X7R222K-GC D2: DIODES INC. ES1B D3-D6: BAS21 D7, D8: MMBZ5240B L4: COILCRAFT DO1608C-105 L5: COILCRAFT DO1813P-561HC L6: PULSE PA1294.132 OR PANASONIC ETQP1H1R0BFA R1, R2: IRC LRC2512-R03G T1: PULSE PA0805.004 T2: PULSE PA0785 U 10 LTC3723-1 240W 42-56VIN to 12V/20A Isolated 1/4Brick (2.3" × 1.45") VF 470pF 100V 12V D3 T1 4T:6T(65µHMIN):6T:2T:2T VE L6 1.25µH VOUT VOUT VE 1 10Ω 1W D4 L5 0.56µH VIN VIN 42V TO 56V 1µF 100V –VIN 1µF 100V ×3 12V 1 B • • 44405fa LTC4440-5 PACKAGE DESCRIPTION MS8E Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1662) 2.794 ± 0.102 (.110 ± .004) 0.889 ± 0.127 (.035 ± .005) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 5.23 (.206) MIN 2.083 ± 0.102 3.20 – 3.45 (.082 ± .004) (.126 – .136) 0.254 (.010) 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) 1.10 (.043) MAX RECOMMENDED SOLDER PAD LAYOUT SEATING NOTE: PLANE 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.62 MAX 0.95 REF 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.20 BSC 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U 8 7 65 0.52 (.0205) REF 1 2.06 ± 0.102 (.081 ± .004) 1.83 ± 0.102 (.072 ± .004) DETAIL “A” 0° – 6° TYP 4.90 ± 0.152 (.193 ± .006) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 1 23 4 8 0.86 (.034) REF BOTTOM VIEW OF EXPOSED PAD OPTION 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.127 ± 0.076 (.005 ± .003) MSOP (MS8E) 0603 S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID 0.95 BSC 0.80 – 0.90 0.30 – 0.45 6 PLCS (NOTE 3) 0.01 – 0.10 1.90 BSC S6 TSOT-23 0302 REV B 44405fa 11 LTC4440-5 TYPICAL APPLICATIO L1 0.56µH VIN 48VIN –VIN 1 A 3 VCC 6 INP BOOST LTC4440-5ES6 5 TG GND TS 2 4 0.22µF 12V B Si7852DP ×2 VIN 12V MMBT3904 15k 1/4W 215k 15 UVLO DPRG 100pF 1µF 1µF 30.1k 330pF 12V MMBZ5242B 12 62k VREF RAMP CT SPRG GND CS SS 1 9 150pF 0.47µF 8 16 10k 470pF 0.47µF 7 FB 1k 2N7002 4.7k 11V A 6 120Ω 5 DRVA VCC LTC3723EGN-2 SDRA COMP 10 14 13 D4 7.5Ω D5 7.5Ω 4 DRVB SDRB 2 22Ω T3 1(1.5mH):0.5 1 4 C3 68µF D2 L3 1mH 1 D3 6 1µF 100V 1µF 100V 1µF 100V VIN 1µF 100V 1µF 100V 2 T2 70(980µH):1 8 7 240W 42V-56VIN to Unregulated 12V Half-Bridge Converter VE • • 11V D1 • 3 Si7852DP ×2 1µF 100V • • • + • RELATED PARTS PART NUMBER LT®1161 LTC1693 Family LT1952 LT3010/LT3010-5 LT3430 LTC3705 Family LTC3722-1/ LTC3722-2 LTC3723-1/ LTC3723-2 LT3781/LTC1698 LT3804 LTC3900 LTC3901 LTC4440 LTC4441 DESCRIPTION Quad Protected High Side MOSFET Driver High Speed Dual MOSFET Drivers Single Switch Synchronous Forward Controller 50mA, 3V to 80V Low Dropout Micropower Regulators High Voltage, 3A, 200kHz Step-Down Switching Regulator Isolated Power Supply Chipset Synchronous Dual Mode Phase Modulated Full-Bridge Controllers Synchronous Push-Pull PWM Controllers 36V to 72V Input Isolated DC/DC Converter Chip Set Secondary Side Dual Output Controller with Opto Driver Synchronous Rectifier Driver for Forward Converters Secondary Side Synchronous Driver for Push-Pull and Full-Bridge Converters High Speed, High Voltage, High Side Gate Driver 6A MOSFET Driver COMMENTS 8V to 48V Supply Range, tON = 200µs, tOFF = 28µs 1.5A Peak Output Current, 4.5V ≤ VIN ≤ 13.2V 25W to 500W DC/DC Controller Low Quiescent Current (30µA), Stable with Small (1µF) Ceramic Capacitor Input Voltages Up to 60V, Internal 0.1Ω Power Switch, Current Mode Architecture, 16-Pin Exposed Pad TSSOP Package Primary and Secondary Side Controllers; Simple as Buck Circuit; Polyphase® Operation Adaptive Zero Voltage Switching, High Output Power Levels (Up to Kilowatts) Current Mode or Voltage Mode Push-Pull Controllers Synchronous Rectification; Overcurrent, Overvoltage, UVLO Protection; Power Good Output Signal; Voltage Margining; Compact Solution Regulates Two Secondary Outputs, Optocoupler Feedback Divider and Second Output Synchronous Driver Controller Programmable Time Out, Reverse Inductor Current Sense Programmable Time Out, Reverse Inductor Current Sense High Side Source up to 100V, 8V to 15V Gate Drive Supply, Undervoltage Lockout, 6-Lead ThinSOT or 8-Lead Exposed MSOP Package Adjustable Gate Drive from 5V to 8V, 5V ≤ VIN ≤ 28V PolyPhase is a registered trademark of Linear Technology Corporation. 44405fa 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U 7 9 11 VF L2 0.22µH 1500pF 100V 20Ω 1W VOUT VOUT 4 + CS+ 1 C2 180µF 16V 1µF 3 5 Si7370DP ×2 C1 2.2nF 250V T1 5:4:4:2:2 VF 4.7k 1/4W 10k 11 CSF+ 9 SYNC 3k 12 Si7370DP ×2 –VOUT VE 4.7k 1/4W 10k 14 15 6 CSE+ 3k 5 2 3 16 33.2k 1 100Ω MMBT3904 1k 1µF 1µF 10V MMBZ5240B 4440 TA04 –VOUT CSF – MF MF2 CSE– ME ME2 VCC PVCC TIMER 7 330pF VOUT LTC3901EGN GND PGND GND2 PGND2 8 4 10 13 • 0.1µF 8 • 100Ω 5 3 11 220pF 0.22µF B CS+ 1µF, 100V TDK C4532X7R2A105M C1: MURATA DE2E3KH222MB3B C2: SANYO 16SP180M C3: AVX TPSE686M020R0150 D1-D3: BAS21 D4, D5: MMBD914 –VOUT L1: COILCRAFT DO1813P-561HC L2: SUMIDA CDEP105-0R2NC-50 L3: COILCRAFT DO1608C-105 T1: PULSE PA0801.005 T2: PULSE P8207 T3: PULSE PA0785 LT 1205 REV A • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005
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