LTC1154 High Side Micropower MOSFET Driver FEATURES
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DESCRIPTION
The LTC®1154 single high side gate driver allows using low cost N-channel FETs for high side switching applications. An internal charge pump boosts the gate drive voltage above the positive rail, fully enhancing an N-channel MOS switch with no external components. Micropower operation, with 8μA standby current and 85μA operating current, allows use in virtually all systems with maximum efficiency. Included on chip is programmable overcurrent sensing. A time delay can be added to prevent false triggering on high inrush current loads. An active high shutdown input is also provided and interfaces directly to a standard PTC thermistor for thermal shutdown. An open-drain output is provided to report switch status to the μP An active . low enable input is provided to control multiple switches in banks. The LTC1154 is available in both 8-pin DIP and 8-pin SOIC packages.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Fully Enhances N-Channel Power MOSFETs 8μA IQ Standby Current 85μA IQ ON Current No External Charge Pump Capacitors 4.5V to 18V Supply Range Short-Circuit Protection Thermal Shutdown via PTC Thermistor Status Output Indicates Shutdown Available in 8-Pin SOIC and PDIP Packages
APPLICATIONS
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Laptop Computer Power Switching SCSI Termination Power Switching Cellular Telephone Power Management Battery Charging and Management High Side Industrial and Automotive Switching Stepper Motor and DC Motor Control
TYPICAL APPLICATION
Ultralow Voltage Drop High Side Switch with Short-Circuit Protection
5V 51k IN μP EN LTC1154 STATUS GND G SD IRLR024 VS 0.1μF** 200k** DS 0.036Ω* 2.7A MAX SUPPLY CURRENT (μA)
Standby Supply Current
50 45 40 35 30 25 20 15 10 5 0 0 5 10 15 SUPPLY VOLTAGE (V) 20
LTC1153 • TA02
VIN = 0V TJ = 25°C
5V LOAD
ALL COMPONENTS SHOWN ARE SURFACE MOUNT. * IMS026 INTERNATIONAL MANUFACTURING SERVICE, INC. (401) 683-9700 ** NOT REQUIRED IF LOAD IS RESISTIVE OR INDUCTIVE.
LTC1154 • TA01
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LTC1154 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage ..........................................................22V Input Voltage.......................(VS + 0.3V) to (GND – 0.3V) Enable Input Voltage ...........(VS + 0.3V) to (GND – 0.3V) Gate Voltage .........................(VS + 24V) to (GND – 0.3V) Status Output Voltage ...............................................15V Current (Any Pin) ...................................................50mA
Operating Temperature LTC1154C ................................................ 0°C to 70°C LTC1154H .......................................... –40°C to 150°C Storage Temperature Range....................–65°c to 150°C Lead Temperature (Soldering, 10 sec.) ................. 300°C
PIN CONFIGURATION
TOP VIEW IN 1 ENABLE 2 STATUS 3 GND 4 8 7 6 5 VS DRAIN SENSE GATE SHUTDOWN IN 1 ENABLE 2 STATUS 3 GND 4 TOP VIEW 8 7 6 5 VS DRAIN SENSE GATE SHUTDOWN
N8 PACKAGE 8-LEAD PLASTIC DIP TJMAX = 100°C, θJA = 130°C/W
S8 PACKAGE 8-LEAD PLASTIC SOIC TJMAX = 100°C, θJA = 150°C/W
ORDER INFORMATION
LEAD FREE FINISH LTC1154CN8#PBF LTC1154CS8#PBF LTC1154HS8#PBF LEAD BASED FINISH LTC1154CN8 LTC1154CS8 LTC1154HS8 TAPE AND REEL LTC1154CN8#TRPBF LTC1154CS8#TRPBF LTC1154HS8#TRPBF TAPE AND REEL LTC1154CN8#TR LTC1154CS8#TR LTC1154HS8#TR 1154 1154H 1154 1154H PART MARKING PART MARKING PACKAGE DESCRIPTION 8-Lead Plastic DIP 8-Lead Plastic SIOC 8-Lead Plastic SIOC PACKAGE DESCRIPTION 8-Lead Plastic DIP 8-Lead Plastic SIOC 8-Lead Plastic SIOC TEMPERATURE RANGE 0°C to 70°C 0°C to 70°C –40°C to 150°C TEMPERATURE RANGE 0°C to 70°C 0°C to 70°C –40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 4.5V to 18V, TA = 25°C, VEN = 0V, VSD = 0V unless otherwise noted.
SYMBOL VS IQ PARAMETER Supply Voltage Quiescent Current OFF Quiescent Current ON Quiescent Current ON VINH Input High Voltage VS = 5V, VIN = 0V VS = 5V, VIN = 5V VS = 12V, VIN = 5V
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
l
MIN 4.5
TYP 8 85 180
MAX 18 20 120 400
UNITS V μA μA μA V
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LTC1154 ELECTRICAL CHARACTERISTICS
SYMBOL VINL IIN CIN VENH VENL IEN VSDH VSDL ISD VSEN ISEN VGATE – VS PARAMETER Input Low Voltage Input Current Input Capacitance ENABLE Input High Voltage ENABLE Input Low Voltage ENABLE Input Current Shutdown Input High Voltage Shutdown Input Low Voltage Shutdown Input Current Drain Sense Threshold Voltage Drain Sense Input Current Gate Voltage Above Supply 0V < VSEN < VS VS = 5V VS = 6V VS = 12V ISTAT = 400μA VSTAT = 12V VS = 5V, CGATE = 1000pF Time for VGATE > VS + 2V Time for VGATE > VS + 5V VS = 12V, CGATE = 1000pF Time for VGATE > VS + 5V Time for VGATE > VS + 10V tOFF tSC tSD Turn-OFF Time Short-Circuit Turn-OFF Time Shutdown Turn-OFF Time VS = 5V, CGATE = 1000pF Time for VGATE < 1V , , VS = 12V, CGATE = 1000pF Time for VGATE < 1V VS = 5V, CGATE = 1000pF Time for VGATE < 1V , , VS = 12V, CGATE = 1000pF Time for VGATE < 1V VS = 5V, CGATE = 1000pF Time for VGATE < 1V , , VS = 12V, CGATE = 1000pF Time for VGATE < 1V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. 0V < VIN < VS 0V < VIN < VS
l l l l l l l l l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 4.5V to 18V, TA = 25°C, VEN = 0V, VSD = 0V unless otherwise noted.
CONDITIONS
l
MIN
l
TYP
MAX 0.8 ±1
UNITS V μA pF V
0V < VIN < VS
5 3.5 2.6 1 2 0.8 ±1 80 75 6 7.5 15 100 100 7 8.3 18 0.05 120 125 ±0.1 9 15 25 0.4 1 30 100 20 50 10 10 5 5 110 450 80 160 36 28 25 23 17 13 300 1000 200 500 60 60 40 40 40 35 0.6 ±1
V μA V V μA mV mV μA V V V V μA μs μs μs μs μs μs μs μs μs μs
VSTAT ISTAT tON
Status Output Low Voltage Status Output Leakage Current Turn-ON Time
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LTC1154 TYPICAL PERFORMANCE CHARACTERISTICS
Standby Supply Current
50 45 40 SUPPLY CURRENT (μA) SUPPLY CURRENT (μA) 35 30 25 20 15 10 5 0 0 5 10 15 SUPPLY VOLTAGE (V) 20
LTC1154 • TPC01
Supply Current ON
1000 24 TA = 25°C 22 20 18 VGATE – VS (V) 16 14 12 10 8 6 0 0 5 10 15 SUPPLY VOLTAGE (V) 20
LTC1154 • TPC02
High Side Gate Voltage
VIN = 0V TA = 25°C
900 800 700 600 500 400 300 200 100 0
0
5
10 15 SUPPLY VOLTAGE (V)
20
LTC1154 • TPC03
Input Threshold Voltage
2.4 2.2 INPUT THRESHOLD VOLTAGE (V) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 5 15 10 SUPPLY VOLTAGE (V) 20
LTC1154 • TPC04
Drain Sense Threshold Voltage
150 DRAIN SENSE THRESHOLD VOLTAGE (mV) 140 130 120 VGATE (V) 110 100 90 80 70 60 50 0 5 15 10 SUPPLY VOLTAGE (V) 20 30 27 24 21 18 15 12 9 6 3 0
Low Side Gate Voltage
VON VOFF
0
2
4 6 SUPPLY VOLTAGE (V)
8
10
LTC1154 • TPC06
Turn-ON Time
1000 900 800 TURN-OFF TIME (μs) TURN-ON TIME (μs) 700 600 500 400 300 200 100 0 0 5 VGS = 5V CGATE = 1000pF 50 45 40 35 30 25 20 15 10 5 20
LTC1153 • TPC07
Turn-OFF Time
50 CGATE = 1000pF TIME FOR VGATE < 1V TURN-OFF TIME (μs) 45 40 35 30 25 20 15 10 5 0 0 5 10 15 SUPPLY VOLTAGE (V) 20
LTC1154 • TPC08
Short-Circuit Turn-OFF Delay Time
CGATE = 1000pF TIME FOR VGATE < 1V VSEN = VS – 1V NO EXTERNAL DELAY
VGS = 2V
10 15 SUPPLY VOLTAGE (V)
0
0
5
10 15 SUPPLY VOLTAGE (V)
20
LTC1154 • TPC09
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LTC1154 TYPICAL PERFORMANCE CHARACTERISTICS
Standby Supply Current
50 45 40 SUPPLY CURRENT (μA) 35 30 25 20 15 10 5 0 –50 –25 VS = 18V VS = 5V 50 25 0 75 TEMPERATURE (°C) 100 125 SUPPLY CURRENT (μA) VIN = 0V VEN = 0V 1000 900 800 700 600 500 400 300 200 100 0 –50 VS = 5V VS = 12V INPUT THRESHOLD VOLTAGE (V) VIN = 5V VEN = 0V
Supply Current ON
2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 100 125
Input ON Threshold Voltage
VS = 5V VS = 18V
–25
25 0 50 75 TEMPERATURE (°C)
0.4 –50
–25
25 0 50 75 TEMPERATURE (°C)
100
125
LTC1154 • TPC10
LTC1154 • TPC11
LTC1154 • TPC12
Shutdown Threshold Voltage
2.4 SHUTDOWN THRESHOLD VOLTAGE (V) 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 –50 –25 25 0 50 75 TEMPERATURE (°C) 100 125 VS = 5V VS = 18V ENABLE THRESHOLD VOLTAGE (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
ENABLE Threshold Voltage
VS = 12V 1000
Gate Drive Current
TA = 25°C GATE DRIVE CURRENT (μA) 100 VS = 18V VS = 12V 10
DISABLE
1
VS = 5V
ENABLE –25 25 0 50 75 TEMPERATURE (°C) 100 125 0.1 0 4 8 12 16 GATE VOLTAGE ABOVE SUPPLY (V) 20
0 –50
LTC1154 • TPC13
LTC1154 • TPC14 LTC1154 • TPC15
PIN FUNCTIONS
Input and Shutdown Pins The LTC1154 input pin is active high and activates all of the protection and charge pump circuitry when switched ON. The shutdown pin is designed to immediately disable the switch if a secondary fault condition (over temperature, etc.) is detected. The LTC1154 logic and shutdown inputs are high impedance CMOS gates with ESD protection diodes to ground and supply and therefore should not be forced beyond the power supply rails. The shutdown pin should be connected to ground when not in use. ENABLE Input Pin The ENABLE input can be used to enable a number of LTC1154 high side switches in banks or to provide a secondary means of control. It can also act as an inverting input. The ENABLE input is a high impedance CMOS gate with ESD clamp diodes to ground and supply and therefore should not be forced beyond the power supply rails. This pin should be grounded when not in use.
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LTC1154 PIN FUNCTIONS
Gate Drive Pin The gate drive pin is either driven to ground when the switch is turned OFF or driven above the supply rail when the switch is turned ON. This pin is a relatively high impedance when driven above the rail (the equivalent of a few hundred kΩ). Care should be taken to minimize any loading of this pin by parasitic resistance to ground or supply. Supply Pin The supply pin of the LTC1154 serves two vital purposes. The first is obvious: it powers the input, gate drive, regulation and protection circuitry. The second purpose is less obvious: it provides a Kelvin connection to the top of the drain sense resistor for the internal 100mV reference. The LTC1154 is designed to be continuously powered so that the gate of the MOSFET is actively driven at all times. If it is necessary to remove power from the supply pin and then re-apply it, the input pin (or enable pin) should be cycled a few milliseconds after the power is re-applied to reset the input latch and protection circuitry. Also, the input and enable pins should be isolated with 10k resistors to limit the current flowing through the ESD protection diodes to the supply pin. The supply pin of the LTC1154 should never be forced below ground as this may result in permanent damage to the device. A 300Ω resistor should be inserted in series with the ground pin if negative supply voltage transients are anticipated. Drain Sense Pin The drain sense pin is compared against the supply pin voltage. If the voltage at this pin is more than 100mV below the supply pin, the input latch will be reset and the MOSFET gate will be quickly discharged. Cycle the input, or ENABLE input, to reset the short-circuit latch and turn the MOSFET back on. This pin is also a high impedance CMOS gate with ESD protection and therefore should not be forced beyond the power supply rails. To defeat the overcurrent protection, short the drain sense to supply. Some loads, such as large supply capacitors, lamps, or motors require high inrush currents. An RC time delay can be added between the sense resistor and the drain sense pin to ensure that the drain sense circuitry does not false-trigger during start-up. This time constant can be set from a few microseconds to many seconds. However, very long delays may put the MOSFET in risk of being destroyed by a short-circuit condition. (see Applications Information Section). Status Pin The status pin is an open-drain output which is driven low whenever a fault condition is detected. A 51k pull-up resistor should be connected between this output and a logic supply. The status pins of multiple LTC1154s can be OR’d together if independent fault sensing is not required. No connection is required to this pin when not in use.
BLOCK DIAGRAM
ANALOG SECTION VS LOW STANDBY CURRENT REGULATOR COMP 100mV REFERENCE 10μs DELAY SHUTDOWN TTL-TO-CMOS CONVERTER DRAIN SENSE SHUTDOWN
GATE CHARGE AND DISCHARGE CONTROL LOGIC ANALOG DIGITAL R INPUT TTL-TO-CMOS CONVERTER VOLTAGE REGULATORS INPUT LATCH ONE SHOT S OSCILLATOR AND CHARGE PUMP FAST/SLOW GATE CHARGE LOGIC
GATE
ENABLE
GND FAULT DETECTION AND STATUS OUTPUT DRIVER
LTC1154 • BD01
STATUS
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LTC1154 TRUTH TABLE
INPUTS IN X L H H H EN H X L L L SD X X L L OUTPUTS GATE STATUS L L H L L H H H L L SWITCH CONDITION SWITCH OFF SWITCH OFF SWITCH ON SWITCH LATCHED OFF (OVER CURRENT) SWITCH LATCHED OFF (SHUTDOWN)
L = LOGIC LOW H = LOGIC HIGH X = IRRELEVANT
= EDGE TRIGGERED
The Truth Table demonstrates how the LTC1154 receives inputs and returns status information to the μP The . ENABLE and input signal from the μP controls the switch in its normal operating mode, where the rise and fall time of the gate drive are controlled to limit EMI and RFI emissions. The shutdown and overcurrent detection circuitry however, switch the gate off at a much higher rate to limit the exposure of the MOSFET switch and the load to dangerous conditions. The status pin remains high as long as the switch is operating normally, and is driven low only when a fault condition is detected. Note that the shutdown pin is edge-sensitive and latches the output off even if the shutdown pin returns to a low state.
OPERATION
The LTC1154 is a single micropower MOSFET driver with built-in protection, status feedback and gate charge pump. The LTC1154 consists of the following functional blocks: TTL and CMOS Compatible Inputs The LTC1154 input and shutdown input have been designed to accommodate a wide range of logic families. Both input thresholds are set at about 1.3V with approximately 100mV of hysteresis. A low standby current voltage regulator provides continuous bias for the TTL-to-CMOS converter. The TTL-to-CMOS converter output enables the rest of the circuitry. In this way the power consumption is kept to a minimum in the standby mode. ENABLE Input The ENABLE input is CMOS compatible and inhibits the input signal whenever it is held logic high. This input should be grounded when not in use. Internal Voltage Regulation The output of the TTL-to-CMOS converter drives two regulated supplies which power the low voltage CMOS logic and analog blocks. The regulator outputs are isolated from each other so that the noise generated by the charge pump logic is not coupled into the 100mV reference or the analog comparator. Gate Charge Pump Gate drive for the MOSFET switch is produced by an adaptive charge pump circuit which generates a gate voltage substantially higher than the power supply voltage. The charge pump capacitors are included on chip and therefore no external components are required to generate the gate drive. Drain Current Sense The LTC1154 is configured to sense the current flowing into the drain of the power MOSFET in a high side application. An internal 100mV reference is compared to the drop across a sense resistor (typically 0.002Ω to 0.10Ω) in series with the drain lead. If the drop across this resistor exceeds the internal 100mV threshold, the input latch is reset and the gate is quickly discharged via a large N-channel transistor. Controlled Gate Rise and Fall Times When the input is switched ON and OFF the gate is charged , by the internal charge pump and discharged in a controlled
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LTC1154 OPERATION
manner. The charge and discharge rates have been set to minimize RFI and EMI emissions in normal operation. If a short-circuit or current overload condition is encountered, the gate is discharged very quickly (typically a few microseconds) by a large N-channel transistor. Status Output Driver The status circuitry continuously monitors the fault detection logic. This open-drain output is driven low when the gate of the MOSFET is driven low by the protection circuitry. The status circuitry is reset along with the input latch when the input, or ENABLE input, is cycled.
APPLICATIONS INFORMATION
MOSFET and Load Protection The LTC1154 protects the power MOSFET switch by removing drive from the gate as soon as an overcurrent condition is detected. Resistive and inductive loads can be protected with no external time delay in series with the drain sense pin. Lamp loads, however, require that the overcurrent protection be delayed long enough to start the lamp but short enough to ensure the safety of the MOSFET. Resistive Loads Loads that are primarily resistive should be protected with as short a delay as possible to minimize the amount of time that the MOSFET is subjected to an overload condition. The drain sense circuitry has a built-in delay of approximately 10μs to eliminate false triggering by power supply or load transient conditions. This delay is sufficient to “mask” short load current transients and the starting of a small capacitor (0.1mH) may require diodes connected directly across the inductor to safely divert the stored energy to ground. Many inductive loads have these diodes included. If not, a diode of the proper current rating should be connected across the load, as shown in Figure 2, to safely divert the stored energy.
12V IN EN LTC1154 STATUS GND G 15V SD IRFZ24 VS DS
+
100μF 0.036Ω
CLOAD ≤ 1μF
RLOAD 12Ω
LTC1154 • F01
Figure 1. Protecting Resistive Loads
12V IN EN LTC1154 STATUS GND G 15V SD IRFZ24 VS DS
+
100μF 0.036Ω
1N5400
12V, 1A SOLENOID
LTC1154 • F02
Figure 2. Protecting Inductive Loads
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LTC1154 APPLICATIONS INFORMATION
Capacitive Loads Large capacitive loads, such as complex electrical systems with large bypass capacitors, should be powered using the circuit shown in Figure 3. The gate drive to the power MOSFET is passed through an RC delay network, R1 and C1, which greatly reduces the turn-on ramp rate of the switch. And since the MOSFET source voltage follows the gate voltage, the load is powered smoothly and slowly from ground. This dramatically reduces the start-up current flowing into the supply capacitor(s) which, in turn, reduces supply transients and allows for slower activation of sensitive electrical loads. (Diode, D1, provides a direct path for the LTC1154 protection circuitry to quickly discharge the gate in the event of an overcurrent condition).
12V IN EN LTC1154 STATUS GND G SD C1 0.33μF 15V R1 100k VS CD 0.01μF DS D1 1N4148 R2 100k MTP3055E OUT
Lamp Loads The inrush current created by a lamp during turn-on can be 10 to 20 times greater than the rated operating current. The circuit shown in Figure 4 shifts the current limit threshold up by a factor of 11:1 (to 30A) for 100ms when the bulb is first turned on. The current limit then drops down to 2.7A after the inrush current has subsided.
12V
+
470μF IN EN LTC1154 STATUS GND G 1M SD 9.1V MTP3055EL VS DS VN2222LL 0.1μF 10k 100k 0.036Ω
+
470μF 0.036Ω RD 100k
12V/1A BULB
LTC1154 • F04
Figure 4. Lamp Driver with Delayed Protection
Selecting RD and CD Figure 5 is a graph of normalized overcurrent shutdown time versus normalized MOSFET current. This graph is used to select the two delay components, RD and CD, which make up a simple RC delay between the drain sense resistor and the drain sense input.
10 OVERCURRENT SHUTDOWN TIME (1 = RC)
+
CLOAD 100μF
LTC1154 • F03
Figure 3. Powering Large Capacitive Loads
The RC network, RD and CD, in series with the drain sense input should be set to trip based on the expected characteristics of the load after start-up. With this circuit, it is possible to power a large capacitive load and still react quickly to an overcurrent condition. The ramp rate at the output of the switch as it lifts off ground is approximately: dV/dt = (VGATE – VTH)/(R1 • C1) And therefore the current flowing into the capacitor during start-up is approximately: ISTART-UP = CLOAD • dV/dt Using the values shown in Figure 3, the start-up current is less than 100mA and does not false-trigger the drain sense circuitry which is set at 2.7A with a 1ms delay.
1
0.1
0.01 1 10 100 MOSFET CURRENT (1 = SET CURRENT)
LTC1154 • F05
Figure 5. Overcurrent Shutdown Time vs MOSFET Current
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LTC1154 APPLICATIONS INFORMATION
The Y axis of the graph is normalized to one RC time constant. The X axis is normalized to the current. (The set current is defined as the current required to develop 100mV across the drain sense resistor). Note that the shutdown time is shorter for increasing levels of MOSFET current. This ensures that the total energy dissipated by the MOSFET is always within the bounds established by the manufacturer for safe operation. (See MOSFET data sheet for further information). Using a Speed-Up Diode To reduce the amount of time that the power MOSFET is in a short-circuit condition, “bypass” the delay resistor with a small signal diode as shown in Figure 6. The diode will engage when the drop across the drain sense resistor exceeds about 0.7V, providing a direct path to the sense pin and dramatically reducing the amount of time the MOSFET is in an overload condition. The drain sense resistor value
12V IN EN LTC1154 STATUS GND G 15V SD LOAD IRF530 VS 0.01μF DS 12V 5V 120k 10k 5V μP OR CONTROL LOGIC
+
10μF IN 10k EN 10k LTC1154 STATUS GND 300Ω G 15V SD 10k LOAD MTP12N06 DS VS 0.05Ω
LTC1154 • F07
Figure 7. Reverse Battery Protection
Since the LTC1154 draws very little current while in normal operation, the drop across the ground resistor is minimal. The 5V μP (or control logic) is protected by the 10k resistors in series with the input and status pins. Current Limited Power Supplies The LTC1154 requires at least 3.5V at the supply pin to ensure proper operation. It is therefore necessary that the supply to the LTC1154 be held higher than 3.5V at all times, even when the output of the switch is short circuited to ground. The output voltage of a current limited regulator may drop very quickly during short-circuit and pull the supply pin of the LTC1154 below 3.5V before the shutdown circuitry has had time to respond and remove drive from the gate of the power MOSFET. A supply filter should be
>7V
+
100μF 1N4148 100k 0.036Ω
LTC1154 • F06
Figure 6. Using a Speed-Up Diode
+
100μF
5V/2A REGULATOR *20Ω
+
10μF 0.1Ω
is selected to limit the maximum DC current to 2.8A. The diode conducts when the drain current exceeds 20A and reduces the turn-off time to 15μs. Reverse Battery Protection The LTC1154 can be protected against reverse battery conditions by connecting a resistor in series with the ground lead as shown in Figure 7. The resistor limits the supply current to less than 50mA with –12V applied.
+
IN EN LTC1154 STATUS GND G SD VS 0.1μF DS 47μF*
1N4148 100k
IRLR024 SHORTCIRCUIT
*SUPPLY FILTER COMPONENTS
LTC1154 • F08
Figure 8. Supply Filter for Current Limited Supplies
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LTC1154 APPLICATIONS INFORMATION
added as shown in Figure 8 which holds the supply pin of the LTC1154 high long enough for the overcurrent shutdown circuitry to respond and fully discharge the gate. Five volt linear regulators with small output capacitors are the most difficult to protect as they can “switch” from a voltage mode to a current limited mode very quickly. The large output capacitors on many switching regulators may be able to hold the supply pin of the LTC1154 above 3.5V sufficiently long that this extra filtering is not required. Because the LTC1154 is micropower in both the standby and ON state, the voltage drop across the supply filter is less than 2mV, and does not significantly alter the accuracy of the 100mV drain sense threshold voltage.
TYPICAL APPLICATIONS
High Side Driver with Thermal Shutdown
5V IN μP OR CONTROL LOGIC EN LTC1154 STATUS† GND G 30k SD PTC THERMISTOR (100°C)* 6V LOAD SWITCH IS SHUTDOWN WHEN VS > 5.7V
LTC1154 • TA03 LTC1154 • TA05
High Side Driver with Overvoltage Shutdown
5V 4.75V TO 5.25V IN μP OR CONTROL LOGIC IRLZ24 EN LTC1154 STATUS† GND G SD 5V LOAD VS 100Ω DS 5.6V IRLD024
6V VS DS
+
100μF
+
10μF
*RL3006-50-100-25-PT0 KEYSTONE
†A 51k pullup resistor should be connected between Status Output and 5V Logic Supply.
High Side Driver with Undervoltage Shutdown
5V
24V to 28V High Side Switch with Thermal Shutdown
24V TO 28V
+
100μF 1N4148* 10k
+
100μF 3k
+
5V IN μP OR CONTROL LOGIC EN LTC1154 STATUS† GND G SD 6V LOAD * KEYSTONE RL2006-100-100-30-PT. MOUNT ON MOSFET OR LOAD HEAT SINK
LTC1154 • TA04
1μF** VS DS IRLZ24 2N2907
5V IN μP OR CONTROL LOGIC EN LTC1154 STATUS† GND G VS DS
+
18V 10μF
MTP12N06 200k
SD PTC THERMISTOR (100°C)* 24V TO 28V LOAD
*OPTIONAL IF SUPPLY VOLTAGE LESS THAN 6V. **CAPACITOR CHARGED TO SUPPLY VOLTAGE. SHUTDOWN OCCURS WHEN SUPPLY VOLTAGE DROPS BY 0.6V.
10k
LTC1154 • TA06
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LTC1154 TYPICAL APPLICATIONS
24V to 28V Switch with Bootstrapped Supply
24V TO 28V
High Side Relay Driver with Overcurrent Protection and Status Feedback
12V
+
100μF 100k
+
100μF 2Ω 0.02Ω
5V IN μP OR CONTROL LOGIC EN LTC1154 STATUS GND
†
+
18V VS DS G 200k SD PTC THERMISTOR (100°C)* 24V TO 28V LOAD 1N4148 10μF 6.2k
5V IN μP OR CONTROL LOGIC MTP15N06E EN LTC1154 STATUS GND
†
VS 0.01μF DS
10k 1N4148 MTD3055E
G 15V SD 1N4001
TO 12V LOAD
* KEYSTONE RL2006-100-100-30-PT. MOUNT ON MOSFET OR LOAD HEAT SINK. IQ(OFF) = 60 A, IQ(ON) = 1mA.
LTC1154 • TA07
COIL CURRENT LIMITED TO 350mA. CONTACT CURRENT LIMITED TO 5A.
LTC1154 • TA08
†A 51k pullup resistor should be connected between Status Output and 5V Logic Supply.
“4-Cell-to-5V” Extremely Low Voltage Drop Regulator with Overcurrent Shutdown, Status Feedback, Ramped Turn-ON and 8μA Standby Current
4-CELL BATTERY PACK 5V IN μP OR CONTROL LOGIC EN LTC1154 STATUS† GND G 0.22μF SD VS DS 1N4148 200pF 100k 100k 10k 8 7 1 3 LT1431 6 5 4 5V/2A IRLR024
+
100μF 0.036Ω
+
470μF ESR < 0.5Ω
LTC1154 • TA09
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LTC1154 TYPICAL APPLICATIONS
Bank Controlled High Side Switches with “Global” Thermal and Overvoltage Shutdown
12V IN EN LTC1154 STATUS GND G 15V SD OUTPUT 1 IRLR024 VS 100Ω DS
+
470μF
IN 5V EN 51k LTC1154 STATUS GND
VS DS G 15V SD OUTPUT 2 IRLR024
μP OR CONTROL LOGIC
IN EN LTC1154 STATUS GND
VS DS G 15V SD OUTPUT 3 IRLR024
IN EN LTC1154 STATUS GND
VS DS G 15V SD PTC THERMISTOR (100°C)*
LTC1154 • TA10
120k
IRLR024
OUTPUT 4 15V
*KEYSTONE RL2006-100-100-30-PT. MOUNT ON COMMON HEAT SINK.
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13
LTC1154 TYPICAL APPLICATIONS
12V Step-Up Regulator with Ultralow Standby Current, Overcurrent Protection and Status Feedback
0.02Ω 5V IRLZ24 50μH 1N5820 12V/1A 330μF 47μF ON/OFF 51k IN EN LTC1154 STATUS STATUS GND G SD 0.1μF VS 0.22μF DS 1N4148 100k 100k 1k 1μF
LTC1154 • TA11
+
470μF
20Ω
+
10k 1N4148
+
+
150μF
5 VIN VSW LT1070 2 FB VC GND 3 1 4 10.72k 1%
1.24k 1%
12V Step-Up Regulator with 1A Overcurrent Protection, Switch Status Feedback and Ramped Output
50μH 5V 1N5820
+
150μF 5 VSW 4 LT1070 2 FB VC GND 3 1 1k 1μF VIN
+
330μF 1N4148 10.72k 1% ON/OFF 51k IN EN LTC1154 STATUS STATUS GND G 12V SD 0.22μF VS 0.1μF 1.24k 1% DS 1N4148 100k 100k IRF530 10k 0.1Ω
+
12V/1A 47μF
LTC1154 • TA12
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14
LTC1154 PACKAGE DESCRIPTION
N8 Package 8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
.400* (10.160) MAX 8 7 6 5
.255 ± .015* (6.477 ± 0.381)
1 .300 – .325 (7.620 – 8.255)
2
3
4 .130 ± .005 (3.302 ± 0.127)
.045 – .065 (1.143 – 1.651)
.008 – .015 (0.203 – 0.381) +.035 .325 –.015 8.255 +0.889 –0.381
.065 (1.651) TYP .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076)
N8 1002
(
)
.100 (2.54) BSC
INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
NOTE: 1. DIMENSIONS ARE
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15
LTC1154 PACKAGE DESCRIPTION
S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.045 ±.005 .050 BSC
8 .189 – .197 (4.801 – 5.004) NOTE 3 7 6 5
.245 MIN
.160 ±.005
.228 – .244 (5.791 – 6.197)
.150 – .157 (3.810 – 3.988) NOTE 3
.030 ±.005 TYP RECOMMENDED SOLDER PAD LAYOUT
.010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) 0°– 8° TYP
1
2
3
4
.053 – .069 (1.346 – 1.752)
.004 – .010 (0.101 – 0.254)
.016 – .050 (0.406 – 1.270) NOTE: 1. DIMENSIONS IN
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.014 – .019 (0.355 – 0.483) TYP
.050 (1.270) BSC
SO8 0303
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16
LTC1154 REVISION HISTORY
REV B DATE 4/11 DESCRIPTION Updated Graph TPC05 Updated SCSI Termination Typical Application Updated Related Parts
(Revision history begins at Rev B)
PAGE NUMBER 4 18 18
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
17
LTC1154 TYPICAL APPLICATIONS
Auto-Reset High Side Switch with Overcurrent and Overcurrent Temperature Shutdown
12V RT 1M** ON/OFF 1M
+
100μF 0.036Ω IN EN VS DS LTC1154 G 200k GND SD PTC THERMISTOR (100°C)* 12V LOAD 18V MTP12N06
+
CT 100μF** VN2222LL
STATUS
*KEYSTONE RL2006-100-100-30-PT. **AUTO-RESET PERIOD ≈ 800ms WITH COMPONENTS SHOWN
LTC1154 • TA13
SCSI Termination Power Switch with 1A Overcurrent Shutdown, Auto-Reset and Load Soft-Start
0.1Ω 5V MTD3055EL 1N5817
+
1M 1M 100μF 20Ω 10k 1N4148
+
10μF
ON/OFF
IN EN
VS 0.1μF DS LTC1154 G
+
47μF 1N4148 100k 100k
+
1μF VN2222LL GND
SD
0.22μF
RELATED PARTS
PART NUMBER LTC4440/LTC4440-5 LTC4441/LTC4441-1 LT1910 LTC4446 LTC4444/LTC4444-5 LTC4442/LTC4449 DESCRIPTION High Speed, High Voltage High Side Gate Driver N-Channel MOSFET Gate Driver Protected High Side Gate Driver High Voltage Synchronous N-Channel MOSFET Driver without Shoot Thru Protection High Voltage Synchronous N-Channel MOSFET Driver with Shoot Thru Protection High Speed Synchronous N-Channel MOSFET Driver COMMENTS Up to 80V Supply Voltage, 8V ≤ VCC ≤ 15V, 2.4A Peak Pull-Up/1.5Ω Peak Pull-Down Up to 25V Supply Voltage, 5V ≤ VCC ≤ 25V, 6A Peak Output Current Up to 48V Supply Voltage, Short Circuit Protected Up to 100V Supply Voltage, 7.2V ≤ VCC ≤ 13.5V, 3A Peak Pull-Up/0.55Ω Peak Pull-Down Up to 100V Supply Voltage, 4.5V/7.2V ≤ VCC ≤ 13.5V, 3A Peak Pull-Up/ 0.55Ω Peak Pull-Down Up to 38V Supply Voltage, 4.5V/6V ≤ VCC ≤ 9.5V, 3.2A Peak Pull-Up/ 4.5A Peak Pull-Down
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18 Linear Technology Corporation
(408) 432-1900 ● FAX: (408) 434-0507
●
LT 0411 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1992