LTC6079HGN

LTC6078/LTC6079 Micropower Precision, Dual/Quad CMOS Rail-to-Rail Input/Output Amplifiers FEATURES ■ ■ ■ DESCRIPTIO ■ ■ ■ ■ ■ ■ ■ Maximum Offset Voltage of 25µV (25°C) Maximum Offset Drift of 0.7µV/°C Maximum Input Bias: 1pA (25°C) 50pA (≤85°C) Micropower: 54µA per Amp 95dB CMRR (Min) 100dB PSRR (Min) Input Noise Voltage Density: 16nV/√Hz Rail-to-Rail Inputs and Outputs 2.7V to 5.5V Operation Voltage LTC6078 Available in 8-Lead MSOP and 10-Lead DFN Packages; LTC6079 Available in 16-Lead SSOP and DFN Packages The LTC®6078/LTC6079 are dual/quad, low offset, low noise operational amplifiers with low power consumption and rail-to-rail input/output swing. Input offset voltage is trimmed to less than 25µV and the CMOS inputs draw less than 50pA of bias current. The low offset drift, excellent CMRR, and high voltage gain make it a good choice for precision signal conditioning. Each amplifier draws only 54µA current on a 3V supply. The micropower, rail-to-rail operation of the LTC6078/LTC6079 is well suited for portable instruments and single supply applications. The LTC6078/LTC6079 are specified on power supply voltages of 3V and 5V from –40 to 125°C. The dual amplifier LTC6078 is available in 8-lead MSOP and 10-lead DFN packages. The quad amplifier LTC6079 is available in 16-lead SSOP and DFN packages. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Patent Pending. APPLICATIO S ■ ■ ■ ■ ■ Photodiode Amplifier High Impedance Sensor Amplifier Microvolt Accuracy Threshold Detection Instrumentation Amplifiers Battery Powered Applications TYPICAL APPLICATIO SMT 1/4W 150k 0.1µF OMEGA 5TC-TT-K-30-36 THERMOCOUPLE SMT 1/4W 150k LT1025 5V Thermocouple Signal Conditioner 14 5V NUMBER OF AMPS OUT OF 200 NORMALLY FLOATING + 1/2 LTC6078 LTC6078MS8 VS = 3V 12 VCM = 0.5V TA = 25°C 10 8 6 4 2 0 –11 –9 –7 –5 –3 –1 1 VOS (µV) – 2.49M 1k 40.6µV/°C 100pF OUT = 10mV/°C 0°C TO 500°C ±0.5°C K 10k 5.6pF 60789 TA01a AMPLIFIER PROTECTED TO ±190V, ACCIDENTAL CONTACT U VOS Distribution 3 5 7 9 60789 TA01b U U 60789fa 1 LTC6078/LTC6079 ABSOLUTE (Note 1) AXI U RATI GS Specified Temperature Range (Note 4) LTC6078C, LTC6079C .............................. 0°C to 70°C LTC6078I, LTC6079I ............................ –40°C to 85°C LTC6078H, LTC6079H........................ –40°C to 125°C Junction Temperature DFN Packages ................................................... 125°C All Other Packages ............................................ 150°C Storage Temperature Range DFN Packages .................................... –65°C to 125°C All Other Packages ............................. –65°C to 150°C Lead Temperature (Soldering, 10 Sec) .................. 300°C Total Supply Voltage (V+ to V–) ...................................6V Input Voltage...................................................... V– to V+ Output Short Circuit Duration (Note 2) ............ Indefinite Operating Temperature Range (Note 3) LTC6078C, LTC6079C .......................... –40°C to 85°C LTC6078I, LTC6079I ............................ –40°C to 85°C LTC6078H, LTC6079H........................ –40°C to 125°C (Not Available in DFN Package) PACKAGE/ORDER I FOR ATIO TOP VIEW OUTA –INA +INA V– SHDN_A 1 2 3 4 5 A B 10 V + 9 OUTB 8 –INB 7 +INB 6 SHDN_B OUTA –INA +INA V– 1 2 3 4 TOP VIEW A B DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W UNDERSIDE METAL CONNECTED TO V– MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 200°C/W TOP VIEW OUTA –INA +INA V + TOP VIEW 16 OUTD OUTA –INA +INA V+ +INB –INB OUTB NC 1 2 3 4 5 6 7 8 B C A D 1 2 3 4 5 6 7 8 B C A D 15 –IND 14 +IND 13 V – +INB –INB OUTB NC 12 +INC 11 –INC 10 OUTC 9 NC DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W UNDERSIDE METAL CONNECTED TO V– GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 150°C, θJA = 110°C/W Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades and parametric grades are identified by a label on the shipping container. 60789fa 2 U U W WW U W ORDER PART NUMBER LTC6078CDD LTC6078IDD 8 7 6 5 V+ OUTB –INB +INB DD PART MARKING* LBBB LBBB MS8 PART MARKING* LTAJZ LTAJZ LTAJZ LTAJZ LTAJZ LTAJZ DHC PART MARKING* 6079 6079 GN PART MARKING 6079 6079I 6079H ORDER PART NUMBER LTC6078ACMS8 LTC6078CMS8 LTC6078AIMS8 LTC6078IMS8 LTC6078AHMS8 LTC6078HMS8 ORDER PART NUMBER LTC6079CDHC LTC6079IDHC ORDER PART NUMBER LTC6079CGN LTC6079IGN LTC6079HGN 16 OUTD 15 –IND 14 +IND 13 V – 12 +INC 11 –INC 10 OUTC 9 NC LTC6078/LTC6079 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER VOS Offset Voltage (Note 5) CONDITIONS LTC6078MS8, LTC6078AMS8, LTC6079GN VCM = 0.5V, 2.5V LTC6078DD, LTC6079DHC VCM = 0.5V, 2.5V LTC6078AMS8 VCM = 0.5V LTC6078MS8 VCM = 0.5V LTC6079GN VCM = 0.5V LTC6078DD VCM = 0.5V LTC6079DHC VCM = 0.5V LTC6078AMS8 LTC6078MS8 LTC6078DD, LTC6079GN LTC6079DHC VCM = V+/2 VCM = V+/2 VCM = V+/2 VCM = V+/2 0.1Hz to 10Hz f = 1kHz f = 10kHz The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted. C, I SUFFIXES MIN TYP ±7 ±7 ±20 ±25 ±30 ±30 ±35 ±0.2 ±0.3 ±0.3 0.2 10 0.1 0.5 1 18 16 0.56 ● H SUFFIX MIN TYP ±7 ±25 ±30 ±35 MAX ±25 ±95 ±135 ±165 UNITS MAX ±25 ±30 ±70 ±97 ±115 ±120 ±150 ±0.7 ±1.1 ±1.4 ±1.8 1 50 25 ● ● ● ● ● ● ● ● ● ● ● μV μV μV μV μV μV μV μV/°C μV/°C μV/°C μV/°C pA pA pA pA µVP-P nV/√Hz nV/√Hz fA/√Hz ΔVOS ⁄ΔT Input Offset Voltage Drift (Note 5) ±0.2 ±0.3 0.2 150 0.1 10 1 18 16 0.56 ±0.7 ±1.1 ±1.4 1 350 100 IB IOS en Input Bias Current (Note 6) Input Offset Current (Note 6) Input Noise Voltage Input Noise Voltage Density in Input Noise Current Density (Note 8) Input Common Mode Range V– Differential Input Capacitance Common Mode Input Capacitance Common Mode Rejection Ratio All Packages LTC6078AMS8 LTC6078AMS8 LTC6078MS8 LTC6078MS8 LTC6079GN LTC6079GN LTC6078DD, LTC6079DHC LTC6078DD, LTC6079DHC VCM = 0V to 3V VCM = 0V to 3V VCM = 0V to 1.7V VCM = 0V to 3V VCM = 0V to 1.7V VCM = 0V to 3V VCM = 0V to 1.7V VCM = 0V to 3V VCM = 0V to 1.7V ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● V+ 10 18 V– 10 18 95 87 91 85 89 84 88 110 103 103 100 102 100 102 V+ V pF pF dB dB dB dB dB dB dB dB dB dB dB mV mV mV CDIFF CCM CMRR 95 87 91 85 89 84 88 83 87 100 97 35 350 110 105 103 102 102 102 102 100 102 120 1 15 150 1 10 100 30 300 PSRR VOUT Power Supply Rejection Ratio VS = 2.7V to 5.5V Output Voltage, High (Referred to V+) Output Voltage, Low (Referred to V–) No Load ISOURCE = 0.2mA ISOURCE = 2mA No Load ISINK = 0.2mA ISINK = 2mA RLOAD = 10k, 0.5V ≤ VOUT ≤ 2.5V Source Sink AV = 1 RL = 100k RL = 10k, CL = 200pF AV = 1, 1V Step 100 97 40 400 120 1 15 150 1 10 100 35 350 mV mV mV dB mA mA V/μs kHz kHz Deg μs 60789fa AVOL ISC SR GBW Φ0 tS Large-Signal Voltage Gain Output Short-Circuit Current Slew Rate Gain-Bandwidth Product (fTEST = 10kHz) Phase Margin Settling Time 0.1% 115 5 7 420 360 130 10 14 0.05 750 66 24 110 4 6 420 320 125 10 14 0.05 750 66 24 ● 3 LTC6078/LTC6079 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER IS Supply Current (per Amplifier) Shutdown Current (per Amplifier) VS Supply Voltage Range Channel Separation Shutdown Logic tON tOFF Turn on Time Turn off Time Leakage of SHDN Pin CONDITIONS No Load ● The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted. C, I SUFFIXES MIN TYP 54 ● ● H SUFFIX MIN TYP 54 MAX 72 80 UNITS μA μA μA MAX 72 78 1 5.5 Shutdown, VSHDN ≤ 0.8V, LTC6078DD Guaranteed by the PSRR Test fs = 10kHz, RL = 10k SHDN High, LTC6078DD SHDN Low, LTC6078DD VSHDN = 0.8V to 2V, LTC6078DD VSHDN = 2V to 0.8V, LTC6078DD VSHDN = 0V, LTC6078DD 0.3 2.7 –110 2 2.7 –110 2 5.5 V dB V V µs µs μA ● ● 0.8 50 2 0.6 50 2 0.8 The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. SYMBOL PARAMETER VOS Offset Voltage CONDITIONS LTC6078MS8, LTC6078AMS8, LTC6079GN VCM = 0.5V LTC6078DD, LTC6079DHC VCM = 0.5V LTC6078AMS8 VCM = 0.5V LTC6078MS8 VCM = 0.5V LTC6079GN VCM = 0.5V LTC6078DD VCM = 0.5V LTC6079DHC VCM = 0.5V LTC6078AMS8 LTC6078MS8 LTC6078DD, LTC6079GN LTC6079DHC VCM = V+/2 VCM = V+/2 VCM = V+/2 VCM = V+/2 0.1Hz to 10Hz f = 1kHz f = 10kHz C, I SUFFIXES MIN TYP ±10 ±10 ±20 ±25 ±30 ±30 ±35 ±0.2 ±0.3 ±0.3 0.2 10 0.1 0.5 1 18 16 0.56 ● H SUFFIX MIN TYP ±10 ±25 ±30 ±35 MAX ±30 ±100 ±140 ±170 UNITS MAX ±30 ±35 ±75 ±102 ±120 ±125 ±155 ±0.7 ±1.1 ±1.4 ±1.8 1 50 25 ● ● ● ● ● ● ● ● ● ● ● μV μV μV μV μV μV μV μV/°C μV/°C μV/°C μV/°C pA pA pA pA µVP-P nV/√Hz nV/√Hz fA/√Hz ΔVOS ⁄ΔT Input Offset Voltage Drift (Note 7) ±0.2 ±0.3 0.2 150 0.1 10 1 18 16 0.56 ±0.7 ±1.1 ±1.4 1 350 100 IB IOS en Input Bias Current Input Offset Current Input Noise Voltage Input Noise Voltage Density in Input Noise Current Density (Note 8) Input Common Mode Range V– Differential Input Capacitance Common Mode Input Capacitance V+ 10 18 V– 10 18 V+ V pF pF CDIFF CCM 60789fa 4 LTC6078/LTC6079 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CMRR Common Mode Rejection Ratio CONDITIONS All Packages LTC6078AMS8 LTC6078AMS8 LTC6078MS8 LTC6078MS8 LTC6079GN LTC6079GN LTC6078DD, LTC6079DHC LTC6078DD, LTC6079DHC VCM = 0V to 5V VCM = 0V to 5V VCM = 0V to 3.7V VCM = 0V to 5V VCM = 0V to 3.7V VCM = 0V to 5V VCM = 0V to 3.7V VCM = 0V to 5V VCM = 0V to 3.7V The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. C, I SUFFIXES MIN ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● H SUFFIX MIN 91 90 94 88 90 86 90 TYP 105 105 105 100 105 100 105 MAX UNITS dB dB dB dB dB dB dB dB dB dB dB mV mV mV 45 450 mV mV mV dB mA mA V/μs kHz kHz Deg μs 74 84 5 5.5 μA μA μA V dB 1.2 V V µs µs μA TYP 105 105 105 100 105 100 105 100 105 120 MAX 91 90 94 88 90 86 90 86 90 100 97 50 500 PSRR VOUT Power Supply Rejection Ratio VS = 2.7V to 5.5V Output Voltage, High (Referred to V+) Output Voltage, Low (Referred to V–) No Load ISOURCE = 0.5mA ISOURCE = 5mA No Load ISINK = 0.5mA ISINK = 5mA RLOAD = 10k, 0.5V ≤ VOUT ≤ 4.5V Source Sink AV = 1 RL = 100k RL = 10k, CL = 200pF AV = 1, 1V Step No Load 120 97 2 20 200 1 15 150 110 12 12 420 320 125 25 25 0.05 750 66 24 74 82 5 5.5 2.7 –110 3.5 1.2 55 1.5 2 20 200 1 15 150 40 400 55 550 AVOL ISC SR GBW Φ0 tS IS Large-Signal Voltage Gain Output Short-Circuit Current Slew Rate Gain-Bandwidth Product (fTEST = 10kHz) Phase Margin Settling Time 0.1% Supply Current (per Amplifier) Shutdown Current (per Amplifier) 115 14 14 420 360 130 25 25 0.05 750 66 24 55 ● ● Shutdown, VSHDN ≤ 1.2V, LTC6078DD Guaranteed by the PSRR Test fs = 10kHz, RL = 10k SHDN High, LTC6078DD SHDN Low, LTC6078DD VSHDN = 1.2V to 3.5V, LTC6078DD VSHDN = 1.2V to 3.5V, LTC6078DD VSHDN = 0V, LTC6078DD ● ● 1.5 2.7 –110 3.5 50 2 0.6 VS Supply Voltage Range Channel Separation Shutdown Logic ● ● tON tOFF Turn on Time Turn off Time Leakage of SHDN Pin 50 2 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted. Note 3: The LTC6078C/LTC6079C and LTC6078I/LTC6079I are guaranteed functional over the operating temperature range of –40°C to 85°C. The LTC6078H/LTC6079H are guaranteed functional over the operating temperature range of –40°C to 125°C. Note 4: The LTC6078C/LTC6079C are guaranteed to meet specified performance from 0°C to 70°C. The LTC6078C/LTC6079C are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LTC6078I/LTC6079I are guaranteed to meet specified performance from –40°C to 85°C. The LTC6078H/LTC6079H are guaranteed to meet specified performance from –40°C to 125°C. Note 5: VOS and VOS drift are 100% tested at 25°C and 125°C. Note 6: IB and IOS are guaranteed by the VS = 5V test. Note 7: VOS drift is guaranteed by the VS = 3V test. Note 8: Current noise is calculated from in = √2qIB, where q = 1.6 • 10–19 coulomb. 60789fa 5 LTC6078/LTC6079 TYPICAL PERFOR A CE CHARACTERISTICS VOS Distribution 14 NUMBER OF AMPS OUT OF 200 LTC6078MS8 VS = 3V 12 VCM = 0.5V TA = 25°C 10 VOS (µV) 8 6 4 2 0 –11 –9 –7 –5 –3 –1 1 VOS (µV) 40 30 20 VOS (µV) 0.5 1.0 2.0 1.5 VCM (V) 10 0 –10 –20 –30 3 5 7 9 –40 0 2.5 3.0 VOS Drift Distribution 50 NUMBER OF AMPS OUT OF 200 LTC6078MS8 45 VS = 3V VCM = 0.5V 40 T = –40°C TO 125°C A 35 30 25 20 15 10 5 0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 µV/°C 60789 G04 INPUT BIAS CURRENT (pA) INPUT BIAS CURRENT (pA) Input Bias vs VCM 400 300 INPUT BIAS CURRENT (pA) 200 100 –0 –100 –200 –300 –400 0 1 2 VCM (V) 60789 G07 NOISE VOLTAGE (nV/√Hz) 70 60 50 40 30 20 10 0 VS = 3V VCM = 0.5V VS = 5V VCM = 0.5V 1 10 100 1k FREQUENCY (Hz) 10k 100k 60789 G08 3 4 5 VOLTAGE NOISE (500nV/DIV) 6 UW 60789 G01 VOS vs VCM VS = 3V TA = 25°C REPRESENTATIVE PARTS 100 VOS vs VCM VS = 5V 80 TA = 25°C REPRESENTATIVE PARTS 60 40 20 0 –20 –40 –60 –80 –100 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCM (V) 60789 G03 60789 G02 Input Bias vs Temperature 180 VS = 5V 160 VCM = 2.5V 140 120 100 80 60 40 20 0 0 25 50 75 100 TEMPERATURE (°C) 125 60789 G05 Input Bias vs VCM 30 24 18 12 6 –0 –6 –12 –18 –24 –30 0 1 2 VCM (V) 60789 G06 VS = 5V TA = 70°C TA = 85°C 3 4 5 Voltage Noise Spectrum VS = 5V TA = 125°C 90 80 0.1Hz to 10Hz Output Voltage Noise VS = 5V VCM = 0.5V TIME (5s/DIV) 60789 G09 60789fa LTC6078/LTC6079 TYPICAL PERFOR A CE CHARACTERISTICS Output Voltage Swing vs Load Current +VS OUTPUT VOLTAGE SWING (V) (REFERRED TO SUPPLY VOLTAGE) +VS –0.5 SOURCE SUPPLY CURRENT (µA) +VS –1.0 +VS –1.5 +VS –2.0 –VS +2.0 –VS +1.5 –VS +1.0 –VS +0.5 –VS 0.01 TA = 125°C TA = 25°C TA = –55°C SINK VS = 5V VCM = 0.7V 60 50 40 30 20 10 0 0.1 1 10 LOAD CURRENT (mA) 100 60789 G10 SUPPLY CURRENT (µA) Open Loop Gain vs Frequency 100 80 60 GAIN (dB) 40 20 0 VS = 5V –20 VCM = 0.5V CL = 200pF TA = 25°C –40 10k 1k GAIN –20 –40 10M 60789 G13 PHASE CMRR (dB) 40 20 0 PSRR (dB) 100k 1M FREQUENCY (Hz) Output Impedance vs Frequency 10000 1000 OUTPUT IMPEDANCE (Ω) 100 10 AV = 1 1 0.1 0.01 100 VS = 5V VCM = 0.5V TA = 25°C AV = 100 AV = 10 20mV/DIV 1k 10k FREQUENCY (Hz) 100k UW RL = 10k RL = 100k 60789 G16 Supply Current vs Supply Voltage 65 Supply Current vs Temperature PER AMPLIFIER VCM = 0.5V VS = 5V 60 55 VS = 3V 50 PER AMPLIFIER VCM = 0.5V TA = 25°C 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 60789 G11 45 40 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 60789 G12 CMRR vs Frequency 100 80 60 PHASE (DEG) 120 100 80 60 40 20 0 –20 100 VS = 5V VCM = 0.5V TA = 25°C RL = 1k 140 120 100 80 60 40 20 0 1k 10k 100k FREQUENCY (Hz) 1M 10M 60789 G14 PSRR vs Frequency VS = 5V VCM = 0.5V TA = 25°C 1 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 60789 G15 Small Signal Transient Large Signal Transient 1V/DIV 1M VS = 5V RL = 10k CL = 100pF 20µs/DIV 60789 G17 VS = 5V RL = 10k CL = 100pF 200µs/DIV 60789 G18 60789fa 7 LTC6078/LTC6079 TYPICAL PERFOR A CE CHARACTERISTICS Disabled Output Impedence vs Frequency 1000 VS = 5V VCM = 0.5V TA = 25°C AV = 1 OVERSHOOT (%) 50 CHANNEL SEPARATION (dB) OUTPUT IMPEDANCE (kΩ) 100 10 1 0.1 0.01 100 1k 10k 100k FREQUENCY (Hz) PI FU CTIO S OUT: Amplifier Output –IN: Inverting Input +IN: Noninverting Input V+: Positive Supply V–: Negative Supply ⎯SH⎯D⎯N⎯_⎯A: Shutdown Pin of Amplifier A, active low and only ⎯ valid for LTC6078DD. An internal current source pulls the pin to V+ when floating. ⎯SH⎯D⎯N⎯_⎯B: Shutdown Pin of Amplifier B, active low and only ⎯ valid for LTC6078DD. An internal current source pulls the pin to V+ when floating. NC: Not internally connected. Exposed Pad: Connected to V–. 8 UW 1M Overshoot vs CL VS = 5V 45 VCM = 0.5V TA = 25°C 40 35 30 25 20 15 10 5 0 10M 10 100 CAPACITIVE LOAD (pF) 1000 60789 G20 Channel Separation vs Frequency –100 VS = 5V VCM = 0.5V –105 RL = 10k –110 –115 –120 –125 –130 –135 100 AV = 1 AV = 10 1k 10k 100k FREQUENCY (Hz) 1M 10M 60789 G21 60789 G19 U U U 60789fa LTC6078/LTC6079 APPLICATIO S I FOR ATIO Preserving Input Precision Preserving input accuracy of the LTC6078/LTC6079 requires that the application circuit and PC board layout do not introduce errors comparable or greater than the 10µV typical offset of the amplifiers. Temperature differentials across the input connections can generate thermocouple voltages of 10’s of microvolts so the connections to the input leads should be short, close together and away from heat dissipating components. Air current across the board can also generate temperature differentials. The extremely low input bias currents (0.2pA typical) allow high accuracy to be maintained with high impedance sources and feedback resistors. Leakage currents on the PC board can be higher than the input bias current. For example, 10GΩ of leakage between a 5V supply lead and an input lead will generate 500pA! Surround the input leads with a guard ring driven to the same potential as the input common mode to avoid excessive leakage in high impedance applications. Input Clamps Large differential voltages across the inputs over very long time periods can impact the precisely trimmed input offset voltage of the LTC6078/LTC6079. As an example, a 2V differential voltage between the inputs over a period of 100 hours can shift the input offset voltage by tens of microvolts. If the amplifier is to be subjected to large differential input voltages, adding back-to-back diodes between the two inputs will minimize this shift and retain the DC precision. If necessary, current-limiting series resistors can be added in front of the diodes, as shown in Figure 1. These diodes are not necessary for normal closed loop applications. 500Ω NUMBER OF AMPLIFIERS + – 60789 F01 500Ω Figure 1. Op Amp with Input Voltage Clamp U Capacitive Load LTC6078/LTC6079 can drive capactive load up to 200pF in unity gain. The capacitive load driving capability increases as the amplifier is used in higher gain configurations. A small series resistance between the ouput and the load further increases the amount of capacitance the amplifier can drive. ⎯SH⎯D⎯N Pins ⎯ Pins 5 and 6 are used for power shutdown on the LTC6078 in the DD package. If they are floating, internal current sources pull Pins 5 and 6 to V+ and the amplifiers operate normally. In shutdown, the amplifier output is high impedance, and each amplifier draws less than 2µA current. When the chip is turned on, the supply current per amplifier is about 35µA larger than its normal values for 50µs. Rail-to-Rail Input The input stage of LTC6078/LTC6079 combines both PMOS and NMOS differential pairs, extending its input common mode voltage range to both positive and negative supply voltages. At high input common mode range, the NMOS pair is on. At low common mode range, the PMOS pair is on. The transition happens when the common voltage is between 1.3V and 0.9V below the positive supply. Thermal Hysteresis Figure 2 shows the input offset hysteresis of LTC6078MS8 for 3 thermal cycles from –45°C to 90°C. The typical offset shift after the 3 cycles is only 1µV. 50 VS = 3 V 45 VCM = 0.5V 40 35 30 25 20 15 10 5 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 VOS CHANGE FROM INITIAL VALUE 6 1ST CYCLE 2ND CYCLE 3RD CYCLE 60789 F02 W U U Figure 2. VOS Thermal Hysteresis of LTC6078MS8 60789fa 9 LTC6078/LTC6079 APPLICATIO S I FOR ATIO PC Board Layout Mechanical stress on a PC board and soldering-induced stress can cause the VOS and VOS drift to shift. The DD and DHC packages are more sensitive to stress. A simple way to reduce the stress-related shifts is to mount the IC near the short edge of the PC board, or in a corner. The board edge acts as a stress boundary, or a region where the flexure of the board is minimum. The package should always be mounted so that the leads absorb the stress and not the package. The package is generally aligned with the leads paralled to the long side of the PC board. The most effective technique to relieve the PC board stress is to cut slots in the board around the op amp. These slots can be cut on three sides of the IC and the leads can exit on SI PLIFIED SCHE ATIC V+ R1 M10 M11 C1 R2 M8 I1 1µA V– I2 D4 V+ VBIAS M5 +IN D3 V– –IN D5 BIAS GENERATION D1 V– V– NOTE: SHDN IS ONLY AVAILABLE IN THE DFN10 PACKAGE M3 M4 R3 R4 60789 SS V+ M1 D6 M2 M6 M7 V+ D2 SHDN V– Simplified Schematic of the Amplifier 10 U the fourth side. Figure 3 shows the layout of a LTC6078DD with slots at three sides. LONG DIMENSION SLOTS 60789 F03 W W U U Figure 3. Vertical Orientation of LTC6078DD with Slots W – A1 A2 + V+ D7 OUTPUT CONTROL D8 V– OUT + C2 M9 60789fa – LTC6078/LTC6079 TYPICAL APPLICATIO S 2.7V High Side Current Sense VDD R1 VDD 5V 0V COLUMBIA RESEARCH LABS 3021 ACCELERATOR U RS + 1/2 LTC6078 2N7002 VOUT R2 IL LOAD – VOUT = IL • R2 R2 • R – VOS • R1 S R1 60789 TA02 0V ≤ VOUT ≤ VDD – VGS, MOSFET Low Average Power IR LED Driver VDD ON/OFF 909k 100k VDD HSDL-4220 2N7002 + 1/2 LTC6078 – SHDN VARYING ON DUTY CYCLE REDUCES AVERAGE POWER CONSUMPTION 49.9Ω 60789 TA03 Accelerometer Signal Conditioner 2.5V + 1/2 LTC6078 VOUT – 1M –2.5V VOUT = 60mV/g WHERE g = EARTH'S GRAVITATIONAL CONSTANT 1000pF 60789 TA04 Photodiode Amplifier 2.5V 1M – TEMD1000 IR PHOTODIODE 1/2 LTC6078 3.8pF VOUT + –2.5V AT 870nm (IR), VOUT = 600mV/µW RECEIVED POWER 60789 TA05 60789fa 11 LTC6078/LTC6079 TYPICAL APPLICATIO S 6 Decade Current Log Amplifier – C 100Ω IIN VCC LT6650 IN 1µF OUT GND VSUP 5.2V TO 20V IN 1µF LT1761-5 SHDN BYP BAT54S VDD 100k LTC6906 VDD 0.1µF OUT 499k GRD GND VBIAS SET 1M DIV VDD A TO C: LTC6079 H: GE PARAMETRICS G-CAP 2 HUMIDITY SENSOR 148pF TO 178pF, 0% TO 90% RH M1: VN2222L 12 U + B + – Q2 100Ω 33µF Q1 100k 133k VDD – A 1000pF – D + + 1.58k PRECISION RESISTOR PT146 1k +3500ppm/°C 60789 TA07 VOUT 1µF 10nA ≤ IIN ≤ 10mA Q1, Q2: DIODES INC. DMMT3906W A TO D: LTC6079 VOUT ≈ 150mV • log (IIN) + 1.23V, IIN IN AMPS Humidity Sensor Signal Conditioner OUT 0.01µF 1µF VDD 5V VDD 49.9k 49.9k M1 VDD 100k VBIAS 100k GAIN TRIM 75pF H 1000pF 34.8k 1k – 100k B – A 1k – C + + VDD 10k 47.5k 100k OFFSET TRIM + 0.1µF VOUT 0V TO 5V 0% TO 100% RH 60789 TA08 60789fa LTC6078/LTC6079 TYPICAL APPLICATIO S LDO Load Balancing VIN 1.8V TO 20V + 10µF 0 ≤ ILOAD ≤ 1.5A 1.22V ≤ VOUT ≤ VDD LDO LOADS MATCH TO WITHIN 1mA WITH 10mΩ OF BALLAST RESISTANCE (2 INCHES OF AWG 28 GAUGE STRANDED WIRE) A, B: LTC6078 VCC 57.6k LT1634 1.25V U IN OUT LT1763 0.01µF 10µF SHDN BYP FB R2 2k R1 2k BALLAST RESISTANCE: IDENTICAL LENGTH THERMALLY MATED WIRE OR PCB TRACE IN OUT LT1763 0.01µF 10µF 100Ω ILOAD 2k 2k 0.1µF 1k ⎛ R1⎞ VOUT = 1.22V ⎜1 + ⎟ ⎝ R2⎠ SHDN BYP FB LOAD – A 10k + 10µF 100Ω IN OUT LT1763 0.01µF SHDN BYP FB 2k 2k 0.1µF 1k VDD – B 10k + 60789 TA09 pH Probe Amplifier PRECISION RESISTOR PT146 1k +3500ppm/°C A + pH 1k – – B VOUT + 1000pF SENSOR: SENSOREX S200C pH PROBE LTC6078 INPUT IMPEDANCE ≈ 1TΩ OR GREATER VOUT = 1.25V + 59.2mV • (pH – 7) A, B: LTC6078 60789 TA10 60789fa 13 LTC6078/LTC6079 TYPICAL APPLICATIO S Thermistor Amplifier with Overtemperature Alarm VDD 1k LT1634 1.25V 29.4k 200k 0.01µF 3200Ω YSI #44201 THERMOLINEAR NETWORK 6250Ω 143k H B 20k VDD – VIN + LTC6078 A 1 14 U – D 71.5k TOV + + B + C VOUT – + A – 100k 100k 178k 50k 100k 60789 TA12 – OFFSET TRIM A TO D: LTC6079, VDD = 2.7V TO 5.5V, VSS = GND VOUT = 0 → 1V FOR 0°C TO 100°C, LINEAR TOV → HIGH WHEN T ≥ 90°C GAIN TRIM Precision Sample-and-Hold LTC6943 6 9 7 5 4 0.1µF – + LTC6078 B VOUT 14 S/H ISUPPLY < 200µA VOLTAGE DROOP = 130nV/ms TYP SLEW RATE = 0.05V/ms TYP ACQ TIME = 84µs TYP TO 0.1% 60789 TA13 60789fa LTC6078/LTC6079 TYPICAL APPLICATIO S Precision Voltage-Controlled Current Source VDD VIN U + 1/2 LTC6078 – IOUT = VIN RSET IERROR < 0.1% AT IOUT = 1µA 1k 6 0.68µF 7 9 1µF 10 1µF RSET 1k 11 15 12 IOUT LTC6943 14 0.001µF 60789 TA14 60Hz Notch 2.5V R2 – R1 10M VIN 540pF 270pF 270pF –2.5V VOUT = 1 + R2 • VIN R1 5M NOTCH DEPTH = –60dB AT 60Hz, RTI 60789 TA15 1/2 LTC6078 VOUT 10M + () 60789fa 15 LTC6078/LTC6079 PACKAGE DESCRIPTIO U DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) 0.675 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 0.38 ± 0.10 10 3.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 5 0.200 REF 0.75 ± 0.05 2.38 ± 0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 1 1.65 ± 0.10 (2 SIDES) (DD10) DFN 1103 3.50 ± 0.05 1.65 ± 0.05 2.15 ± 0.05 (2 SIDES) 0.25 ± 0.05 0.50 BSC 0.00 – 0.05 60789fa 16 LTC6078/LTC6079 PACKAGE DESCRIPTIO U DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) 0.65 ± 0.05 3.50 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 4.40 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 ± 0.10 (2 SIDES) R = 0.20 TYP R = 0.115 TYP 9 16 0.40 ± 0.10 3.00 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 8 0.200 REF 0.75 ± 0.05 4.40 ± 0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 1 0.25 ± 0.05 0.50 BSC 1.65 ± 0.10 (2 SIDES) PIN 1 NOTCH (DHC16) DFN 1103 1.65 ± 0.05 2.20 ± 0.05 (2 SIDES) 0.00 – 0.05 60789fa 17 LTC6078/LTC6079 PACKAGE DESCRIPTIO U MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 3.20 – 3.45 (.126 – .136) 5.23 (.206) MIN 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 8 7 65 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT DETAIL “A” 0° – 6° TYP 1 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.127 ± 0.076 (.005 ± .003) MSOP (MS8) 0204 0.254 (.010) GAUGE PLANE 4.90 ± 0.152 (.193 ± .006) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 23 4 0.86 (.034) REF 1.10 (.043) MAX NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.65 (.0256) BSC 60789fa 18 LTC6078/LTC6079 PACKAGE DESCRIPTIO U GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .045 ± .005 .189 – .196* (4.801 – 4.978) 16 15 14 13 12 11 10 9 .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 0° – 8° TYP .254 MIN RECOMMENDED SOLDER PAD LAYOUT 23 4 56 7 8 .004 – .0098 (0.102 – 0.249) .0532 – .0688 (1.35 – 1.75) .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 60789fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LTC6078/LTC6079 TYPICAL APPLICATIO U DC Accurate Composite Amplifier, Gain of 1000 VCC VIN + LT1226 VOUT VDD 1M – 0.1µF VEE 100Ω 10Ω 10k – VCC 2.49k VDD LT1634BCS8-5 VSS 2.49k VEE VSS 1/2 LTC6078 + 10k 10Ω CIRCUIT BW ≈ 1.25MHz en = 2.6nV/√Hz (RTI) AT 1kHz CIRCUIT VOS = 25µV (MAX) RTI 60789 TA06 RELATED PARTS PART NUMBER LTC2051/LTC2052 LT6011/LT6012 DESCRIPTION Dual/Quad Zero-Drift Op Amps Dual/Quad Precision Op Amps COMMENTS 3µV VOS, 30nV/°C VOS Drift 60µV VOS, IB = 300pA, IS = 135µA 60789fa 20 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0506 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005