LTC6084HMS8-TRPBF

FEATURES n n n LTC6084/LTC6085 Dual/Quad 1.5MHz, Rail-to-Rail, CMOS Amplifiers DESCRIPTION The LTC®6084/LTC6085 are dual/quad, low cost, low offset, rail-to-rail input/output, unity-gain stable CMOS operational amplifiers that feature 1pA of input bias current. A 1.5MHz gain bandwidth, and 0.5V/μs slew rate, along with the wide supply range and a low 0.75mV offset, make the LTC6084/LTC6085 useful in an extensive variety of applications from data acquisition to medical equipment and consumer electronics. The 110μA supply current and the shutdown mode are ideal for signal processing applications which demand performance with minimal power. The LTC6084/LTC6085 have an output stage which swings within 5mV of either supply rail to maximize signal dynamic range in low supply applications. The input common mode range includes the entire supply voltage. These op amps are specified on power supply voltages of 2.5V and 5V from –40°C to 125°C. The dual amplifier LTC6084 is available in 8-lead MSOP and 10-lead DFN packages. The quad amplifier LTC6085 is available in 16-lead SSOP and DFN packages. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n n n n n n n n Low Offset Voltage: 750μV Maximum Low Offset Drift: 5μV/°C Maximum Low Input Bias Current: 1pA (Typical at 25°C) 40pA (≤85°C) Rail-to-Rail Inputs and Outputs 2.5V to 5.5V Operation Voltage Gain Bandwidth Product: 1.5MHz CMRR: 70dB Minimum PSRR: 95dB Minimum Supply Current: 110μA per Amplifier Shutdown Current: 1.1μA per Amplifier Available in 8-Lead MSOP and 10-Lead DFN Packages (LTC6084) and 16-Lead SSOP and DFN Packages (LTC6085) APPLICATIONS n n n n Portable Test Equipment Medical Equipment Consumer Electronics Data Acquisition TYPICAL APPLICATION Shock Sensor Amplifier 200k 20M 20M 10000 1000 INPUT BIAS CURRENT (pA) 3V 100 TA = 85°C 10 TA = 25°C 1 0.1 0.01 Input Bias Current vs Common Mode Voltage VS = 5V TA = 125°C 470pF – 100k 3V 100k 0.22μF 60845 TA01 2k * 1/2 LTC6084 + VOUT = 120mV/g 7Hz TO 5kHz *SHOCK SENSOR MURATA ERIE PKGS-OOMX1 www.murata.com 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 COMMON MODE VOLTAGE (V) 5 60845 TA01b 60845f 1 LTC6084/LTC6085 ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V+ to V–) ...................................6V Input Voltage......................................................V – to V+ Input Current........................................................±10mA SHDNA /SHDNB Voltage .....................................V – to V+ Output Short Circuit Duration (Note 2)............. Indefinite Operating Temperature Range (Note 3) LTC6084C/LTC6085C ........................... –40°C to 85°C LTC6084H/LTC6085H ......................... –40°C to 125°C Specified Temperature Range (Note 4) LTC6084C/LTC6085C ............................... 0°C to 70°C LTC6084H/LTC6085H ........................... –40°C to 125° Junction Temperature ........................................... 150°C Storage Temperature Range................... –65°C to 125°C Lead Temperature (Soldering, 10 sec) MS8, GN Only ................................................... 300°C PIN CONFIGURATION TOP VIEW TOP VIEW + – OUTA 8 V+ –INA +INA V– SHDNA 7 OUTB 6 –INB 5 +INB 1 + – 10 V+ A 9 OUTB 11 B 8 –INB 7 +INB 6 SHDNB + – B MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 200°C/W TOP VIEW OUTA –INA +INA V+ +INB –INB OUTB NC 1 A D + – + – A D 3 4 5 6 7 8 14 +IND 13 V– +INA V+ +INB –INB OUTB NC 3 4 5 6 7 8 17 + –B + –B C– + 12 +INC 11 –INC 10 OUTC 9 NC C– + GN PACKAGE 16-LEAD PLASTIC SSOP NARROW TJMAX = 150°C, θJA = 110°C/W DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH LTC6084CMS8#PBF LTC6084HMS8#PBF LTC6084CDD#PBF LTC6084HDD#PBF TAPE AND REEL LTC6084CMS8#TRPBF LTC6084HMS8#TRPBF LTC6084CDD#TRPBF LTC6084HDD#TRPBF PART MARKING* LTDNG LTDNG LDNH LDNH PACKAGE DESCRIPTION 8-Lead Plastic MSOP 8-Lead Plastic MSOP 10-Lead (3mm × 3mm) Plastic DFN 10-Lead (3mm × 3mm) Plastic DFN SPECIFIED TEMPERATURE RANGE 0°C to 70°C –40°C to 125°C 0°C to 70°C –40°C to 125°C 60845f 2 + – + – 2 + – OUTA –INA +INA V– 1 2 3 4 2 3 4 5 A DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 11) IS V–, MUST BE SOLDERED TO PCB TOP VIEW 16 OUTD 15 –IND OUTA –INA 1 2 16 OUTD 15 –IND 14 +IND 13 V– 12 +INC 11 –INC 10 OUTC 9 NC LTC6084/LTC6085 ORDER INFORMATION LEAD FREE FINISH LTC6085CGN#PBF LTC6085HGN#PBF LTC6085CDHC#PBF LTC6085HDHC#PBF TAPE AND REEL LTC6085CGN#TRPBF LTC6085HGN#TRPBF LTC6085CDHC#TRPBF LTC6085HDHC#TRPBF PART MARKING* 6085 6085 6085 6085 PACKAGE DESCRIPTION 16-Lead Plastic SSOP 16-Lead Plastic SSOP 16-Lead (5mm × 3mm) Plastic DFN 16-Lead (5mm × 3mm) Plastic DFN SPECIFIED TEMPERATURE RANGE 0°C to 70°C –40°C to 125°C 0°C to 70°C –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX SYMBOL VOS PARAMETER Offset Voltage (Note 5) CONDITIONS LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC MIN TYP 300 300 MAX 750 1100 900 1350 5 MIN H SUFFIX TYP 300 300 MAX 750 1100 1100 1600 5 UNITS μV μV μV μV μV/°C pA pA pA pA nV/√Hz nV/√Hz μVP-P fA/√Hz V+ V ELECTRICAL CHARACTERISTICS l l l ΔVOS/ΔT IB IOS en Input Offset Voltage Drift (Note 6) Input Bias Current (Notes 5, 7) Input Offset Current (Notes 5, 7) Input Noise Voltage Density Input Noise Voltage Input Noise Current Density (Note 8) Input Common Mode Range Guaranteed by 5V Test Guaranteed by 5V Test f = 1kHz f = 10kHz 0.1Hz to 10Hz 2 1 2 1 l l 40 0.5 30 31 27 3 0.56 31 27 3 0.56 V+ V– 0.5 750 150 in l V– CIN Input Capacitance Differential Mode Common Mode f = 100kHz 5 9 l l l l l l l l l 5 9 64 61 94 89 5 85 460 5 85 460 400 150 80 115 0.5 39 220 0.5 36 200 2000 10 100 10 100 pF pF dB dB dB dB mV mV mV mV mV mV V/mV V/mV CMRR PSRR VOUT Common Mode Rejection 0 ≤ VCM ≤ 2.5V Ratio Power Supply Rejection Ratio Output Voltage, High, (Referred to V+) Output Voltage, Low, (Referred to V–) VS = 2.5V to 5.5V No Load ISOURCE = 1mA ISOURCE = 5mA No Load ISINK = 1mA ISINK = 5mA 64 63 94 91 80 115 0.5 39 220 0.5 36 200 AVOL Large-Signal Voltage Gain RLOAD = 10k 400 200 2000 60845f 3 LTC6084/LTC6085 ELECTRICAL CHARACTERISTICS SYMBOL ISC SR GBW Φ0 tS IS PARAMETER Output Short-Circuit Current Slew Rate Gain Bandwidth Product (fTEST = 10kHz) Phase Margin Settling Time 0.1% Supply Current (Per Amplifier) Shutdown Current (Per Amplifier) VS Supply Voltage Range Channel Separation Shutdown Logic tON tOFF Turn On Time Turn Off Time Leakage of SHDN Pin CONDITIONS Source and Sink AV = 1 RLOAD = 50k RL = 10k, CL = 150pF AV = 1 , VSTEP = 1V, AV = 1 No Load Shutdown, VSHDNx ≤ 0.5V Guaranteed by the PSRR Test fS = 10kHz SHDNx High SHDNx Low VSHDNx = 0.5V to 1.8V VSHDNx = 1.8V to 0.5V VSHDNx = 0V l l l l l l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 2.5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX MIN 7.7 6 0.9 0.7 TYP 12.5 0.5 1.5 45 6 110 0.2 2.5 –120 1.8 0.5 7 1 0.2 0.3 7 1 0.2 0.5 1.8 0.5 130 140 0.3 5.5 2.5 –120 0.9 0.6 MAX MIN 7.7 4.5 H SUFFIX TYP 12.5 0.5 1.5 45 6 110 0.2 130 145 0.5 5.5 MAX UNITS mA mA V/μs MHz Deg μs μA μA μA V dB V V μs μs μA The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX SYMBOL VOS PARAMETER Offset Voltage (Note 5) CONDITIONS LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC LTC6084MS8, LTC6085GN LTC6084DD, LTC6085DHC MIN TYP 300 300 MAX 750 1100 900 1350 5 MIN H SUFFIX TYP 300 300 MAX 750 1100 1100 1600 5 UNITS μV μV μV μV μV/°C pA pA pA pA nV/√Hz nV/√Hz μVP-P fA/√Hz V+ V l l l ΔVOS/ΔT IB IOS en Input Offset Voltage Drift (Note 6) Input Bias Current (Notes 5, 7) Input Offset Current (Notes 5, 7) Input Noise Voltage Density Input Noise Voltage Input Noise Current Density (Note 8) Input Common Mode Range f = 1kHz f = 10kHz 0.1Hz to 10Hz 2 1 2 1 l l 40 0.5 30 31 27 3 0.56 31 27 3 0.56 V+ V– 0.5 750 150 in l V– CIN Input Capacitance Differential Mode Common Mode f = 100kHz 5 9 5 9 pF pF 60845f 4 LTC6084/LTC6085 ELECTRICAL CHARACTERISTICS SYMBOL CMRR PSRR VOUT PARAMETER CONDITIONS l l l l l l l l l l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. C SUFFIX MIN 70 68 94 91 TYP 84 115 0.5 39 220 0.5 36 200 1000 400 7.7 6 0.9 0.7 5000 12.5 0.5 l H SUFFIX MAX MIN 70 66 94 89 5 85 460 5 85 460 1000 300 7.7 4.5 0.9 0.6 TYP 84 115 0.5 39 220 0.5 36 200 5000 12.5 0.5 1.5 45 5 130 140 1.8 5.5 2.5 –120 3.5 1.2 1.2 7 1 0.9 0.5 1.2 110 1.1 130 145 2 5.5 10 100 10 100 MAX UNITS dB dB dB dB mV mV mV mV mV mV V/mV V/mV mA mA V/μs MHz Deg μs μA μA μA V dB V V μs μs μA Common Mode Rejection 0 ≤ VCM ≤ 5V Ratio Power Supply Rejection Ratio Output Voltage, High, (Referred to V+) Output Voltage, Low, (Referred to V–) VS = 2.5V to 5.5V No Load ISOURCE = 1mA ISOURCE = 5mA No Load ISINK = 1mA ISINK = 5mA AVOL ISC SR GBW Φ0 tS IS Large-Signal Voltage Gain RLOAD = 10k Output Short-Circuit Current Slew Rate Gain Bandwidth Product (fTEST = 10kHz) Phase Margin Settling Time 0.1% Supply Current (Per Amplifier) Shutdown Current (Per Amplifier) Source and Sink AV = 1 RLOAD = 50k RL = 10k, CL = 150pF AV = 1 , VSTEP = 1V, AV = 1 No Load Shutdown, VSHDNx ≤ 1.2V Guaranteed by the PSRR Test fS = 10kHz SHDNx High SHDNx Low VSHDNx = 1.2V to 3.5V VSHDNx = 3.5V to 1.2V VSHDNx = 0V 1.5 45 5 110 1.1 l l l VS Supply Voltage Range Channel Separation Shutdown Logic 2.5 –120 3.5 7 1 tON tOFF Turn On Time Turn Off Time Leakage of SHDN Pin l 0.5 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and the total output current. Note 3: The LTC6084C/LTC6085C are guaranteed functional over the operating temperature range of –40°C to 85°C. The LTC6084H/LTC6085H are guaranteed functional over the operating temperature range of –40°C to 125°C. Note 4: The LTC6084C/LTC6085C are guaranteed to meet specified performance from 0°C to 70°C. The LTC6084C/LTC6085C are designed, characterized and expected to meet specified performance from –40°C to 85°C but are not tested or QA sampled at these temperatures. The LTC6084H/LTC6085H are guaranteed to meet specified performance from –40°C to 125°C. Note 5: ESD (Electrostatic Discharge) sensitive device. ESD protection devices are used extensively internal to the LTC6084/LTC6085; however, high electrostatic discharge can damage or degrade the device. Use proper ESD handling precautions. Note 6: This parameter is not 100% tested. Note 7: This specification is limited by high speed automated test capability. See Typical Performance Characteristic curves for actual performance. Note 8: Current noise is calculated from in = √2qIB, where q = 1.6 • 10–19 coulombs. 60845f 5 LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS VOS Distribution 20 LTC6084 MS8 18 VS = 5V VCM = 0.5V 16 T = 25°C A 14 100 UNITS VOS (mV) 12 10 8 6 4 2 0 –1 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 VOS (mV) 1 1.0 VOS vs VCM VS = 5V 0.8 TA = 25°C REPRESENTATIVE PARTS 0.6 0.4 0.2 0.0 –0.2 –0.4 –0.6 –0.8 –1.0 0 0.5 1 1.5 2 2.5 3 VCM (V) 3.5 4 4.5 5 PERCENT OF UNITS (%) 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 VOS Drift Distribution LTC6084 MS8 VS = 5V VCM = 2.5V TA = –40°C TO 125°C 78 UNITS PERCENTAGE OF UNITS (%) –1 –0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 DISTRIBUTION (μV/°C) 60845 G03 60845 G01 60845 G02 Input Bias vs Temperature 1000 VS = 5V VCM = 2.5V 10000 1000 INPUT BIAS CURRENT (pA) INPUT BIAS CURRENT (pA) 100 100 Input Bias Current vs Common Mode Voltage VS = 5V TA = 125°C INPUT NOISE VOLTAGE (nV/√Hz) 100 90 80 70 60 50 40 30 20 10 Input Noise Voltage vs Frequency VS = 5V VCM = 2.5V TA = 25°C TA = 85°C 10 TA = 25°C 1 0.1 10 1 25 40 55 70 85 100 TEMPERATURE (°C) 115 130 0.01 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 COMMON MODE VOLTAGE (V) 5 10 100 1k 10k FREQUENCY (Hz) 100k 60845 G06 60845 G04 60845 G05 0.1Hz to 10Hz Output Voltage Noise VS = 5V VCM = 2.5V INPUT NOISE VOLTAGE (2μV/DIV) NOISE CURRENT (fA/√Hz) 600 Input Noise Current vs Frequency 5.0 OUTPUT HIGH SATURATION VOLTAGE (V) Output Saturation Voltage vs Load Current (Output High) VS = 5V 4.5 V = 2.5V CM 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.1 TA = –55°C TA = 25°C TA = 125°C 1 10 LOAD CURRENT (mA) SINK SOURCE 500 400 300 200 100 0 TIME (1s/DIV) 60845 G07 1 10 100 1k FREQUENCY (Hz) 10k 100k 60845 G08 100 60845 G09 60845f 6 LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage 140 120 130 SUPPLY CURRENT (μA) 100 80 60 40 20 0 PER AMPLIFIER VCM = 0.5V TA = 25°C 0 0.5 1 1.5 2 2.5 3 3.5 4 TOTAL SUPPLY VOLTAGE (V) 4.5 5 SUPPLY CURRENT (μA) 140 Supply Current vs Temperature PER AMPLIFIER VCM = 0.5V 120 VS = 5V VS = 2.5V 100 110 90 –55 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 60845 G11 60845 G10 Open-Loop Gain vs Frequency 100 90 80 70 60 50 40 30 20 10 0 –10 –20 –30 –40 CL = 5pF RL = 10k VCM = VS/2 80 TA = 25°C 60 40 GAIN 20 0 VS = 5V VS = 2.5V 1k 10k 100k 1M FREQUENCY (Hz) –20 –40 10M 60845 G12 CMRR vs Frequency 100 120 110 100 90 80 70 60 50 40 30 20 10 0 –10 VS = 5V VCM = 2.5V RL = 1k TA = 25°C PSRR (dB) 100 90 80 70 60 50 40 30 20 10 0 1k 10k 100k 1M FREQUENCY (Hz) 10M 60845 G13 PSRR vs Frequency VS = 5V VCM = 2.5V TA = 25°C PHASE PHASE (DEG) CMRR (dB) GAIN (dB) –10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 60845 G14 Output Impedance vs Frequency 10000 VS = 5V V = 2.5V 1000 T CM 25°C A= OUTPUT IMPEDANCE (kΩ) 100 10 1 0.1 0.01 0.001 100 AV = 10 AV = 2 AV = 1 1000 Disabled Output Impedance vs Frequency VS = 5V VCM = 1V AV = 1 TA = 25°C OVERSHOOT (%) 40 Capacitive Load Handling VS = 5V 35 VCM = 2.5V AV = 1 30 25 20 15 10 5 RS = 10Ω OUTPUT IMPEDANCE (Ω) 100 10 1 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 0.1 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 60845 G16 0 10 60845 G14 + – RS CL RS = 50Ω 100 CAPACITIVE LOAD (pF) 1000 60845 G17 60845f 7 LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS Capacitive Load Handling 50 VS = 5V 45 VCM = 2.5V A = –1 40 V OVERSHOOT (%) 35 30 25 20 15 10 5 0 10 1k –90 –95 CHANNEL SEPARATION (dB) RS = 10Ω –100 –105 –110 –115 –120 –125 –130 10000 60845 G17 Channel Separation vs Frequency VS = 5V VCM = 2.5V TA = 25°C THD AND NOISE (%) 1 Total Harmonic Distortion and Noise vs Frequency VS = 3V VCM = 1.5V RL = 10k 0.1 AV = –2, VIN = 1VP-P AV = 2, VIN = 1VP-P 0.01 AV = 1, VIN = 2VP-P AV = 1, VIN = 1VP-P 0.1 1 10 FREQUENCY (kHz) 100 60845 G20 RS = 50Ω 1k 100 1000 CAPACITIVE LOAD (pF) Total Harmonic Distortion and Noise vs Frequency 1 VS = 5V VCM = 2.5V RL = 10k THD AND NOISE (%) 10 THD AND NOISE (%) 0.1 AV = 2, VIN = 1VP-P 0.01 AV = –2, VIN = 1VP-P 0.001 AV = 1, VIN = 2VP-P AV = 1, VIN = 1VP-P THD AND NOISE (%) 0.0001 0.01 0.1 1 10 FREQUENCY (kHz) Small Signal Response 100mV/DIV VS = 5V AV = 1 RL = ∞ 2μs/DIV 60845 G24 8 + – RS CL –135 0.001 0.01 0.1 1 FREQUENCY (MHz) 10 60845 G19 0.001 0.01 Total Harmonic Distortion and Noise vs Output Voltage RL = 10k VCM = VS/2 AV = 1 VS = 3V AT 20kHz 0.1 Total Harmonic Distortion and Noise vs Load Resistance AV = 1 VCM = VS/2 AT 1kHz 1 0.01 0.1 0.01 VS = 5V AT 20kHz VS = 3V AT 1kHz VS = 3V, VIN = 1VP-P 0.001 VS = 5V, VIN = 2VP-P 0.001 VS = 5V AT 1kHz 100 60845 G21 0.0001 0 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT VOLTAGE (VP-P) 4.5 5 0.0001 0.1 1 10 LOAD RESISTANCE TO GROUND (kΩ) 100 60845 G22 60845 G23 Small Signal Response Large Signal Response 100mV/DIV 1V/DIV VS = 5V AV = 1 RL = ∞ CL = 220pF 2μs/DIV 60845 G25 VS = 5V AV = 1 RL = ∞ 20μs/DIV 60845 G26 60845f LTC6084/LTC6085 TYPICAL PERFORMANCE CHARACTERISTICS Large Signal Response Large Signal Response Large Signal Response 1V/DIV 1V/DIV 1V/DIV VS = 5V AV = –1 RL = 1k 20μs/DIV 60845 G27 VS = 5V AV = 1 RL = ∞ 20μs/DIV 60845 G28 VS = 5V AV = –1 RL = 1k 20μs/DIV 60845 G29 PIN FUNCTIONS OUT: Amplifier Output. –IN: Inverting Input. +IN: Noninverting Input. V+: Positive Supply. V–: Negative Supply. SHDNA: Shutdown Pin of Amplifier A, active low and only available with the LTC6084DD. An internal current source pulls the pin to V+ when floating. SHDNB: Shutdown Pin of Amplifier B, active low and only available with the LTC6084DD. An internal current source pulls the pin to V+ when floating. NC: Not Internally Connected. Exposed Pad: Connected to V–. 60845f 9 LTC6084/LTC6085 APPLICATIONS INFORMATION OUT R NO SOLDER MASK OVER THE GUARD RING R IN+ LEAKAGE CURRENT GUARD RING V– 60845 F01 LTC6084 NO LEAKAGE CURRENT OUT LTC6084 IN– VIN R IN– IN+ GND V– 60845 F02 Figure 1. Sample Layout. Unity-Gain Configuration. Using Guard Ring to Shield High Impedance Input from Board Leakage Figure 2. Sample Layout. Inverting Gain Configuration. Using Guard Ring to Shield High Impedance Input from Board Leakage Rail-to-Rail Input The input stage of LTC6084/LTC6085 combines both PMOS and NMOS differential pairs, extending its input common mode voltage to both positive and negative supply voltages. At high input common mode range, NMOS pair is on. At low common mode range, the PMOS pair is on. The transition happens when the common voltage is between 1.3 and 0.9V below the positive supply. Achieving Low Input Bias Current The DD and DHC packages are leadless and make contact to the PCB beneath the package. Solder flux used during the attachment of the part to the PCB can create leakage current paths and can degrade the input bias current performance of the part. All inputs are susceptible because the backside paddle is connected to V– internally. As the input voltage or V– changes, a leakage path can be formed and alter the observed input bias current. For lowest bias current use the LTC6084/LTC6085 in the leaded MSOP/GN package. With fine PCB design rules, you can also provide a guard ring around the inputs. For example, in high source impedance applications such as pH probes, photo diodes, strain gauges, etc., the low input bias current of these parts requires a clean board layout to minimize additional leakage current into a high impedance signal node. A mere 100GΩ of PC board resistance between a 5V supply trace and input trace near ground potential adds 50pA of leakage current. This leakage is far greater than the bias current of the operational amplifier. A guard ring around the high impedance input traces driven by a low impedance source equal to the input voltage prevents such leakage problems. The guard ring should extend as far as necessary to shield the high impedance signal from any and all leakage paths. Figure 1 shows the use of a guard ring in a unity-gain configuration. In this case the guard ring is connected to the output and is shielding the high impedance noninverting input from V–. Figure 2 shows the inverting gain configuration. Rail-to-Rail Output The output stage of the LTC6084/LTC6085 swings within 5mV of the supply rails when driving high impedance loads, in other words when no DC load current is present. See the Typical Performance Characteristics for curves of output swing versus load current. The class AB design of the output stage enables the op amp to supply load currents which are much greater than the quiescent supply current. For example, the room temperature short circuit current is typically 12.5mA. Capacitive Load LTC6084/LTC6085 can drive a capacitive load up to 300pF in unity gain. The capacitive load driving capability increases as the amplifier is used in higher gain configurations. A small series resistance between the output and the load further increases the amount of capacitance the amplifier can drive. 60845f 10 LTC6084/LTC6085 APPLICATIONS INFORMATION SHDN Pins Pins 5 and 6 are used for power shutdown of the LTC6084 in the DD package. If they are floating, internal current sources pull pins 5 and 6 to V+ and the amplifiers operate normally. In shutdown the amplifier output is high impedance, and each amplifier draws less than 1μA current. This feature allows the part to be used in muxed output applications as shown in Figure 3. 10k 5V 5V 10k ESD The LTC6084/LTC6085 has reverse-biased ESD protection diodes on all inputs and outputs as shown in the Simplified Schematic. If these pins are forced beyond either supply, unlimited current will flow through these diodes. If the current is transient and limited to 100mA or less, no damage to the device will occur. The amplifier input bias current is the leakage current of these ESD diodes. This leakage is a function of the temperature and common mode voltage of the amplifier, as shown in the Typical Performance Characteristics. Noise In the frequency region above 1kHz, the LTC6084/LTC6085 shows good noise voltage performance. In this region, noise can be dominated by the total source resistance of the particular application. Specifically, these amplifiers exhibit the noise of a 58k resistor, meaning it is desirable to keep the source and feedback resistance at or below this value, i.e., RS + RG||RFB ≤ 58k. Above this total source impedance, the noise voltage is dominated by the resistors. At low frequency, noise current can be estimated from the expression in = √2qIB, where q = 1.6 • 10–19 coulombs. Equating √4kTRΔf and R√2qIBΔf shows that for a source resistor below 50GΩ the amplifier noise is dominated by the source resistance. Noise current rises with frequency. See the curve Input Noise Current vs Frequency in the Typical Performance Characteristics section. + 10k INA A LTC6084 (DD PACKAGE) SHDN A 10k – 10k 5V 10k 10k INB + B OUT – 10k 5V SHDN B FAIRCHILD NC7SZ04 OR EQUIVALENT SEL = 5V, OUT = –INA SEL = 0V, OUT = –INB SEL 60845 F03 Figure 3. Inverting Amplifier with Muxed Output 60845f 11 LTC6084/LTC6085 SIMPLIFIED SCHEMATIC Simplified Schematic of the Amplifier V+ R1 M10 M11 C1 R2 M8 I1 1μA V– +IN D3 D6 V– –IN D5 BIAS GENERATION D1 V– V– NOTE: SHDN IS ONLY AVAILABLE IN THE DFN PACKAGE M3 M4 R3 R4 60845 SS I2 D4 V+ VBIAS M5 – A1 + V+ D7 V+ M1 M2 M6 M7 OUTPUT CONTROL D8 V– A2 OUT V+ D2 SHDN V– – + C2 M9 TYPICAL APPLICATIONS Gain Selectable Amplifier 5V 10k VIN + A – SHDNA 4.02k VOUT 1k 10k + – B SHDNB 24.3k 1k 5V SEL SEL = 5V, GAIN = 25 SEL = 0V, GAIN = 5 A, B: LTC6084 in DFN10 FAIRCHILD NC7SZ04 OR EQUIVALENT 60845 TA02 60845f 12 LTC6084/LTC6085 PACKAGE DESCRIPTION DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699) 0.675 ±0.05 3.50 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 0.38 ± 0.10 10 3.00 ±0.10 (4 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 1.65 ± 0.10 (2 SIDES) (DD) DFN 1103 5 0.200 REF 0.75 ±0.05 2.38 ±0.10 (2 SIDES) 1 0.25 ± 0.05 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 60845f 13 LTC6084/LTC6085 PACKAGE DESCRIPTION DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) 0.65 ± 0.05 3.50 ± 0.05 1.65 ± 0.05 2.20 ± 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 4.40 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 ± 0.10 (2 SIDES) R = 0.20 TYP R = 0.115 TYP 9 16 0.40 ± 0.10 3.00 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) 1.65 ± 0.10 (2 SIDES) PIN 1 NOTCH (DHC16) DFN 1103 8 0.200 REF 0.75 ± 0.05 4.40 ± 0.10 (2 SIDES) 1 0.25 ± 0.05 0.50 BSC 0.00 – 0.05 NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE BOTTOM VIEW—EXPOSED PAD 60845f 14 LTC6084/LTC6085 PACKAGE DESCRIPTION MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 8 7 65 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT DETAIL “A” 0° – 6° TYP 1 23 4 4.90 ± 0.152 (.193 ± .006) 0.254 (.010) GAUGE PLANE 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 1.10 (.043) MAX 0.86 (.034) REF 0.22 – 0.38 (.009 – .015) TYP NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.65 (.0256) BSC 0.1016 ± 0.0508 (.004 ± .002) MSOP (MS8) 0307 REV F GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .045 ± .005 .189 – .196* (4.801 – 4.978) 16 15 14 13 12 11 10 9 .254 MIN .150 – .165 .229 – .244 (5.817 – 6.198) .150 – .157** (3.810 – 3.988) .009 (0.229) REF .0165 ± .0015 .0250 BSC 1 .015 ± .004 × 45° (0.38 ± 0.10) .0532 – .0688 (1.35 – 1.75) 23 4 56 7 8 .004 – .0098 (0.102 – 0.249) RECOMMENDED SOLDER PAD LAYOUT .007 – .0098 (0.178 – 0.249) .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 0° – 8° TYP .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 60845f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC6084/LTC6085 TYPICAL APPLICATION Bipolar Analog Isolation Amplifier VCC 1M 1% VCC OC1 VIN 1M 1% 10pF OC1 2k +5V 1/2 LTC6084 10pF OC1 OC2 1M 3pF – + – + VOUT = VIN LTC6240HV –5V OC2 – + 1/2 LTC6084 GNDB 2k OC2 BW ≈ 40kHz, EITHER POLARITY LARGE SIGNAL TRANSITION DELAY ≈ 50μs SMALL SIGNAL DEAD ZONE: |VIN| ≤ 10mV GNDA VCC = 5V, VIN = ±5V RELATIVE TO GNDA OC1, OC2: AVAGO TECHNOLOGIES HCNR201 www.avagotech.com VOUT = ±5V, RELATIVE TO GNDB 60845 TA03 RELATED PARTS PART NUMBER LTC6078/LTC6079 LTC6081/LTC6082 LTC6087/LTC6088 LTC6240/LTC6241/ LTC6242 LTC6244 DESCRIPTION Dual/Quad Micropower Precision Rail-to-Rail Op Amps Dual/Quad Precision Rail-to-Rail Input/Output Amps Dual/Quad 14MHz Rail-to-Rail Input/Output Amps COMMENTS 25μV VOS(MAX), 0.7μV/°C VOS Drift(MAX), 1pA IBIAS(MAX) 70μV VOS(MAX), 0.8μV/°C VOS Drift(MAX), 1pA IBIAS(MAX) 750μV VOS(MAX), 5μV/°C VOS Drift(MAX), 1pA IBIAS Single/Dual/Quad Low Noise Rail-to-Rail Output Op Amps 7nV/√Hz Noise, 0.2pA IBIAS, 18MHz Gain Bandwidth Dual Low Noise Rail-to-Rail Output Op Amps 8nV/√Hz Noise, 1pA IBIAS, 50MHz Gain Bandwidth 60845f 16 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0708 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008