LTC6244HVCMS8

LTC6244 Dual 50MHz, Low Noise, Rail-to-Rail, CMOS Op Amp FEATURES ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO ■ ■ Input Bias Current: 1pA (Typ at 25°C) Low Offset Voltage: 100µV Max Low Offset Drift: 2.5µV/°C Max 0.1Hz to 10Hz Noise: 1.5µVP-P Slew Rate: 40V/µs Gain Bandwidth Product: 50MHz Output Swings Rail-to-Rail Supply Operation: 2.8V to 6V LTC6244 2.8V to ±5.25V LTC6244HV Low Input Capacitance: 2.1pF Available in 8-Pin MSOP and Tiny DFN Packages The LTC®6244 is a dual high speed, unity-gain stable CMOS op amp that features a 50MHz gain bandwidth, 40V/µs slew rate, 1pA of input bias current, low input capacitance and rail-to-rail output swing. The 0.1Hz to 10Hz noise is just 1.5µVP-P and 1kHz noise is guaranteed to be less than 12nV/√Hz. This excellent AC and noise performance is combined with wide supply range operation, a maximum offset voltage of just 100µV and drift of only 2.5µV/°C, making it suitable for use in many fast signal processing applications, such as photodiode amplifiers. This op amp has an output stage that swings within 35mV of either supply rail to maximize the signal dynamic range in low supply applications. The input common mode range extends to the negative supply. It is fully specified on 3V and 5V, and an HV version guarantees operation on supplies of ±5V. The LTC6244 is available in the 8-pin MSOP, and for compact designs, it is packaged in the tiny dual fine pitch lead free (DFN) package. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. APPLICATIO S ■ ■ ■ ■ ■ ■ Photodiode Amplifiers Charge Coupled Amplifiers Low Noise Signal Processing Active Filters Medical Instrumentation High Impedance Transducer Amplifier TYPICAL APPLICATIO 5V PHILIPS BF862 JFET 5V 4.99k –5V 4.7µF* 4.99k VBB HAMAMATSU LARGE AREA PHOTODIODE S1227-1010BQ CPD = 3000pF * CAN BE MICROPHONIC, FILM, X7R, IF NEEDED. IPD Very Low Noise Large Area Photodiode 0.25pF 120 110 1M NUMBER OF UNITS VOUT = 1M • IPD BW = 350kHz NOISE = 291nV AT 10kHz VOUT 100 90 80 70 60 50 40 30 20 10 0 –60 LTC6244MS8 VS = 5V, 0V VCM = 2.5V TA = 25°C – 1/2 LTC6244HV + –5V 6244 TA01a 20 40 –40 –20 0 INPUT OFFSET VOLTAGE (µV) U VOS Distribution 60 6244 G01 U U 6244f 1 LTC6244 ABSOLUTE AXI U RATI GS Total Supply Voltage (V+ to V–) LTC6244 .................................................................7V LTC6244HV ...........................................................12V Input Voltage.......................... (V+ + 0.3V) to (V– – 0.3V) Input Current........................................................±10mA Output Short Circuit Duration (Note 2) ............ Indefinite Operating Temperature Range LTC6244C ............................................ –40°C to 85°C LTC6244I ............................................. –40°C to 85°C LTC6244H .......................................... –40°C to 125°C PACKAGE/ORDER I FOR ATIO TOP VIEW OUT A 1 –IN A 2 +IN A 3 V– 4 A B 9 8 V+ 7 OUT B 6 –IN B 5 +IN B DD PACKAGE 8-LEAD (3mm ´ 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 9) CONNECTED TO V– (PCB CONNECTION OPTIONAL) ORDER PART NUMBER LTC6244CDD LTC6244HVCDD LTC6244IDD LTC6244HVIDD DD PART MARKING* LCCF LCGD LCCF LCGD Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identifed by a label on the shipping container. 2 U U W WW U W (Note 1) Specified Temperature Range (Note 3) LTC6244C ................................................ 0°C to 70°C LTC6244I ............................................. –40°C to 85°C LTC6244H .......................................... –40°C to 125°C Junction Temperature ........................................... 150°C DD Package ...................................................... 125°C Storage Temperature Range................... –65°C to 150°C DD Package ....................................... –65°C to 125°C Lead Temperature (Soldering, 10 sec) .................. 300°C TOP VIEW OUT A –IN A +IN A V– 1 2 3 4 8 7 6 5 V+ OUT B –IN B +IN B MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 250°C/W ORDER PART NUMBER LTC6244CMS8 LTC6244HVCMS8 LTC6244IMS8 LTC6244HVIMS8 LTC6244HMS8 MS8 PART MARKING* LTCCM LTCGF LTCCM LTCGF LTCCM 6244f LTC6244 AVAILABLE OPTIO S PART NUMBER LTC6244CMS8 LTC6244CDD LTC6244HVCMS8 LTC6244HVCDD LTC6244IMS8 LTC6244IDD LTC6244HVIMS8 LTC6244HVIDD LTC6244HMS8 SPECIFIED TEMP RANGE 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C –40°C to 85°C –40°C to 85°C –40°C to 85°C –40°C to 85°C –40°C to 125°C SPECIFIED SUPPLY VOLTAGE 3V, 5V 3V, 5V 3V, 5V, ±5V 3V, 5V, ±5V 3V, 5V 3V, 5V 3V, 5V, ±5V 3V, 5V, ±5V 3V, 5V PACKAGE MS8 DD MS8 DD MS8 DD MS8 DD MS8 PART MARKING LTCCM LCCF LTCGF LCGD LTCCM LCCF LTCGF LCGD LTCCM ELECTRICAL CHARACTERISTICS SYMBOL VOS PARAMETER Input Offset Voltage (Note 4) (LTC6244C/I, LTC6244HVC/I) The ● denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V, VCM = 2.5V unless otherwise noted. CONDITIONS MS8 Package 0°C to 70°C –40°C to 85°C DD Package 0°C to 70°C –40°C to 85°C VOS Match Channel-to-Channel (Note 5) MS8 Package 0°C to 70°C –40°C to 85°C DD Package 0°C to 70°C –40°C to 85°C TC VOS IB IOS Input Offset Voltage Drift, MS8 (Note 6) Input Bias Current (Notes 4, 7) Input Offset Current (Notes 4, 7) Input Noise Voltage en in RIN CIN Input Noise Voltage Density Input Noise Current Density (Note 8) Input Resistance Input Capacitance Differential Mode Common Mode Input Voltage Range Common Mode Rejection CMRR Match Channel-to-Channel (Note 5) Common Mode f = 100kHz 3.5 2.1 Guaranteed by CMRR 0V ≤ VCM ≤ 3.5V ● ● ● ● ● ● ● ● ● ● ● ● ● ● VCM CMRR U MIN TYP 40 MAX 100 225 300 650 800 950 160 275 325 800 900 1.1 2.5 75 UNITS µV µV µV µV µV µV µV µV µV µV µV mV µV/°C pA pA pA pA µVP-P nV/√Hz fA/√Hz Ω pF pF 100 40 150 0.7 1 0.5 75 1.5 8 0.56 1012 12 0.1Hz to 10Hz f = 1kHz 0 74 72 105 100 3.5 V dB dB 6244f 3 LTC6244 ELECTRICAL CHARACTERISTICS SYMBOL AVOL PARAMETER Large Signal Voltage Gain (LTC6244C/I, LTC6244HVC/I) The ● denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V, VCM = 2.5V unless otherwise noted. CONDITIONS VO = 1V to 4V RL = 10k to VS/2 0°C to 70°C –40°C to 85°C VO = 1.5V to 3.5V RL = 1k to VS/2 0°C to 70°C –40°C to 85°C MIN 1000 600 450 300 200 150 TYP 2500 MAX UNITS V/mV V/mV V/mV V/mV V/mV V/mV 35 75 300 35 75 325 mV mV mV mV mV mV dB dB V 35 6.25 35 18 1.9 50 35 3.7 535 7.4 mA mA MHz V/µs MHz ns ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● 1000 VOL Output Voltage Swing Low (Note 9) No Load ISINK = 1mA ISINK = 5mA No Load ISOURCE = 1mA ISOURCE = 5mA VS = 2.8V to 6V, VCM = 0.2V 15 40 150 15 45 175 75 73 2.8 25 105 100 VOH Output Voltage Swing High (Note 9) PSRR Power Supply Rejection PSRR Match Channel-to-Channel (Note 5) Minimum Supply Voltage (Note 10) ISC IS GBW SR FPBW ts Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate (Note 11) Full Power Bandwidth (Note 12) Settling Time Frequency = 20kHz, RL = 1kΩ AV = –2, RL = 1kΩ VOUT = 3VP-P, RL = 1kΩ VSTEP = 2V, AV = –1, RL = 1kΩ, 0.1% ● ● ● (LTC6244C/I, LTC6244HVC/I) The ● denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C. VS = 3V, 0V, VCM = 1.5V unless otherwise noted. SYMBOL VOS PARAMETER Input Offset Voltage (Note 4) CONDITIONS MS8 Package 0°C to 70°C –40°C to 85°C DD Package 0°C to 70°C –40°C to 85°C VOS Match Channel-to-Channel (Note 5) MS8 Package 0°C to 70°C –40°C to 85°C DD Package 0°C to 70°C –40°C to 85°C IB IOS Input Bias Current (Notes 4, 7) Input Offset Current (Notes 4, 7) Input Noise Voltage en in VCM Input Noise Voltage Density Input Noise Current Density (Note 8) Input Voltage Range Guaranteed by CMRR ● ● ● ● ● ● ● ● ● ● ● MIN TYP 40 MAX 175 250 325 650 800 950 200 300 350 800 900 1.1 75 UNITS µV µV µV µV µV µV µV µV µV µV µV mV pA pA pA pA µVP-P nV/√Hz fA/√Hz V 6244f 100 40 150 1 0.5 75 1.5 8 0.56 0 1.5 12 0.1Hz to 10Hz f = 1kHz 4 LTC6244 ELECTRICAL CHARACTERISTICS SYMBOL CMRR PARAMETER Common Mode Rejection CMRR Match Channel-to-Channel (Note 5) AVOL Large Signal Voltage Gain VO = 1V to 2V RL = 10k to VS/2 0°C to 70°C –40°C to 85°C No Load ISINK = 1mA No Load ISOURCE = 1mA VS = 2.8V to 6V, VCM = 0.2V (LTC6244C/I, LTC6244HVC/I) The ● denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C. VS = 3V, 0V, VCM = 1.5V unless otherwise noted. CONDITIONS 0V ≤ VCM ≤ 1.5V ● ● MIN 70 68 200 100 85 TYP 105 100 800 MAX UNITS dB dB V/mV V/mV V/mV ● ● ● ● ● ● ● ● ● ● ● VOL VOH PSRR Output Voltage Swing Low (Note 9) Output Voltage Swing High (Note 9) Power Supply Rejection PSRR Match Channel-to-Channel (Note 5) Minimum Supply Voltage (Note 10) 12 45 12 50 75 73 2.8 8 35 15 4.8 50 105 100 30 110 30 110 mV mV mV mV dB dB V mA ISC IS GBW Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Frequency = 20kHz, RL = 1kΩ 5.8 mA MHz ● (LTC6244HVC/I) The ● denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, 0V, VCM = 0V unless otherwise noted. SYMBOL VOS PARAMETER Input Offset Voltage (Note 4) CONDITIONS MS8 Package 0°C to 70°C –40°C to 85°C DD Package 0°C to 70°C –40°C to 85°C VOS Match Channel-to-Channel (Note 5) MS8 Package 0°C to 70°C –40°C to 85°C DD Package 0°C to 70°C –40°C to 85°C TC VOS IB IOS Input Offset Voltage Drift, MS8 (Note 6) Input Bias Current (Notes 4, 7) Input Offset Current (Notes 4, 7) Input Noise Voltage en in RIN CIN Input Noise Voltage Density Input Noise Current Density (Note 8) Input Resistance Input Capacitance Differential Mode Common Mode Common Mode f = 100kHz 3.5 2.1 pF pF 6244f MIN ● ● ● ● ● ● ● ● ● ● ● TYP 50 MAX 220 275 375 700 800 1050 250 325 400 900 1000 1100 2.5 75 UNITS µV µV µV µV µV µV µV µV µV µV µV µV µV/°C pA pA pA pA µVP-P nV/√Hz fA/√Hz Ω 100 50 150 0.7 1 0.5 75 1.5 8 0.56 1012 12 0.1Hz to 10Hz f = 1kHz 5 LTC6244 ELECTRICAL CHARACTERISTICS SYMBOL VCM CMRR PARAMETER Input Voltage Range Common Mode Rejection CMRR Match Channel-to-Channel (Note 5) AVOL Large Signal Voltage Gain VO = –3.5V to 3.5V RL = 10k 0°C to 70°C –40°C to 85°C RL = 1k 0°C to 70°C –40°C to 85°C VOL Output Voltage Swing Low (Note 9) No Load ISINK = 1mA ISINK = 10mA No Load ISOURCE = 1mA ISOURCE = 10mA VS = 2.8V to 10.5V, VCM = 0.2V (LTC6244HVC/I) The ● denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, 0V, VCM = 0V unless otherwise noted. CONDITIONS Guaranteed by CMRR –5V ≤ VCM ≤ 3.5V ● ● ● MIN –5 80 78 2500 1500 1200 700 400 300 TYP 105 95 6000 MAX 3.5 UNITS V dB dB V/mV V/mV V/mV V/mV V/mV V/mV ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● 3500 15 45 360 15 45 360 75 73 2.8 40 35 18 1.9 55 7 50 40 4.25 330 110 106 40 75 550 40 75 550 mV mV mV mV mV mV dB dB V mA VOH Output Voltage Swing High (Note 9) PSRR Power Supply Rejection PSRR Match Channel-to-Channel (Note 5) Minimum Supply Voltage (Note 10) ISC IS GBW SR FPBW ts Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate (Note 11) Full Power Bandwidth (Note 12) Settling Time Frequency = 20kHz, RL = 1kΩ AV = –2, RL = 1kΩ VOUT = 3VP-P, RL = 1kΩ VSTEP = 2V, AV = –1, RL = 1kΩ, 0.1% 8.8 mA MHz V/µs MHz ns ● ● ● (LTC6244H) The ● denotes the specifications which apply from –40°C to 125°C, otherwise specifications are at TA = 25°C. VS = 5V, 0V, VCM = 2.5V unless otherwise noted. SYMBOL VOS PARAMETER Input Offset Voltage (Note 4) CONDITIONS MS8 Package ● ● ● ● ● MIN TYP 40 40 0.7 1 MAX 125 400 160 400 2.5 2 UNITS µV µV µV µV µV/°C pA nA pA pA V dB dB VOS Match Channel-to-Channel (Note 5) MS8 Package TC VOS IB IOS VCM CMRR Input Offset Voltage Drift, MS8 (Note 6) Input Bias Current (Notes 4, 7) Input Offset Current (Notes 4, 7) Input Voltage Range Common Mode Rejection CMRR Match Channel-to-Channel (Note 5) Guaranteed by CMRR 0V ≤ VCM ≤ 3.5V 0.5 250 0 74 72 3.5 ● ● ● 6244f 6 LTC6244 ELECTRICAL CHARACTERISTICS SYMBOL AVOL PARAMETER Large Signal Voltage Gain (LTC6244H) The ● denotes the specifications which apply from –40°C to 125°C, otherwise specifications are at TA = 25°C. VS = 5V, 0V, VCM = 2.5V unless otherwise noted. CONDITIONS VO = 1V to 4V RL = 10k to VS/2 VO = 1.5V to 3.5V RL = 1k to VS/2 VOL Output Voltage Swing Low (Note 9) No Load ISINK = 1mA ISINK = 5mA No Load ISOURCE = 1mA ISOURCE = 5mA VS = 2.8V to 6V, VCM = 0.2V ● ● ● ● ● ● ● ● ● ● ● ● ● MIN 350 125 TYP MAX UNITS V/mV V/mV 40 85 325 40 85 325 75 73 2.8 20 6.25 30 17 1.8 7.4 mV mV mV mV mV mV dB dB V mA mA MHz V/µs MHz VOH Output Voltage Swing High (Note 9) PSRR Power Supply Rejection PSRR Match Channel-to-Channel (Note 5) Minimum Supply Voltage (Note 10) ISC IS GBW SR FPBW Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Slew Rate (Note 11) Full Power Bandwidth (Note 12) Frequency = 20kHz, RL = 1kΩ AV = –2, RL = 1kΩ VOUT = 3VP-P, RL = 1kΩ ● ● ● (LTC6244H) The ● denotes the specifications which apply from –40°C to 125°C, otherwise specifications are at TA = 25°C. VS = 3V, 0V, VCM = 1.5V unless otherwise noted. SYMBOL VOS PARAMETER Input Offset Voltage (Note 4) CONDITIONS MS8 Package ● ● ● ● MIN TYP 40 40 1 MAX 175 400 200 420 2 UNITS µV µV µV µV pA nA pA pA V dB dB V/mV VOS Match Channel-to-Channel (Note 5) MS8 Package IB IOS VCM CMRR Input Bias Current (Notes 4, 7) Input Offset Current (Notes 4, 7) Input Voltage Range Common Mode Rejection CMRR Match Channel-to-Channel (Note 5) AVOL VOL VOH PSRR Large Signal Voltage Gain Output Voltage Swing Low (Note 9) Output Voltage Swing High (Note 9) Power Supply Rejection VO = 1V to 2V RL = 10k to VS/2 No Load ISINK = 1mA No Load ISOURCE = 1mA VS = 2.8V to 6V, VCM = 0.2V Guaranteed by CMRR 0V ≤ VCM ≤ 1.5V 0.5 250 0 70 68 75 30 110 30 110 75 1.5 ● ● ● ● ● ● ● ● ● mV mV mV mV dB 6244f 7 LTC6244 (LTC6244H) The ● denotes the specifications which apply from –40°C to 125°C, otherwise specifications are at TA = 25°C. VS = 3V, 0V, VCM = 1.5V unless otherwise noted. SYMBOL PARAMETER PSRR Match Channel-to-Channel (Note 5) Minimum Supply Voltage (Note 10) ISC IS GBW Short-Circuit Current Supply Current per Amplifier Gain Bandwidth Product Frequency = 20kHz, RL = 1kΩ CONDITIONS ● ● ● ● ● ELECTRICAL CHARACTERISTICS MIN 73 2.8 5 TYP MAX UNITS dB V mA 4.8 28 5.8 mA MHz Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 3: The LTC6244C/LTC6244HVC are guaranteed to meet specified performance from 0°C to 70°C. They are designed, characterized and expected to meet specified performance from –40°C to 85°C, but are not tested or QA sampled at these temperatures. The LTC6244I/LTC6244HVI, are guaranteed to meet specified performance from –40°C to 85°C. The LTC6244H is guaranteed to meet specified performance from –40°C to 125°C. Note 4: ESD (Electrostatic Discharge) sensitive device. ESD protection devices are used extensively internal to the LTC6244; however, high electrostatic discharge can damage or degrade the device. Use proper ESD handling precautions. Note 5: Matching parameters are the difference between the two amplifiers of the LTC6244. CMRR and PSRR match are defined as follows: CMRR and PSRR are measured in µV/V on the amplifiers. The difference is calculated between the sides in µV/V. The result is converted to dB. Note 6: This parameter is not 100% tested. Note 7: This specification is limited by high speed automated test capability. See Typical Characteristics curves for actual typical performance. Note 8: Current noise is calculated from the formula: in = (2qIB)1/2 where q = 1.6 × 10–19 coulomb. The noise of source resistors up to 50GΩ dominates the contribution of current noise. See also Typical Characteristics curve Noise Current vs Frequency. Note 9: Output voltage swings are measured between the output and power supply rails. Note 10: Minimum supply voltage is guaranteed by the power supply rejection ratio test. Note 11: Slew rate is measured in a gain of –2 with RF = 1k and RG = 500Ω. VIN is ±1V and VOUT slew rate is measured between –1V and +1V. On the LTC6244HV/LTC6245HV, VIN is ±2V and VOUT slew rate is measured between –2V and +2V. Note 12: Full-power bandwidth is calculated from the slew rate: FPBW = SR/2πVP. 6244f 8 LTC6244 TYPICAL PERFOR A CE CHARACTERISTICS VOS Distribution 120 110 100 90 NUMBER OF UNITS 80 70 60 50 40 30 20 10 0 0 –60 20 40 –40 –20 0 INPUT OFFSET VOLTAGE (µV) 60 6244 G01 LTC6244MS8 VS = 5V, 0V VCM = 2.5V TA = 25°C NUMBER OF UNITS 40 30 20 10 –500 –350 –200 –50 100 250 INPUT OFFSET VOLTAGE (µV) 400 6244 G02 NUMBER OF UNITS VOS Temperature Coefficient Distribution 11 10 9 NUMBER OF UNITS 8 7 6 5 4 3 2 1 0 –6 –5 –4 –3 –2 –1 0 1 2 3 DISTRIBUTION (µV/°C) 4 5 6 1 0 LTC6244DD VS = 5V, 0V VCM = 2.5V 2 LOTS –55°C TO 125°C 8 7 SUPPLY CURRENT (mA) OFFSET VOLTAGE (µV) Input Bias Current vs Common Mode Voltage 10000 MS8 PACKAGE VS = 5V, 0V 800 TA = 125°C INPUT BIAS CURRENT (pA) 700 600 500 400 300 200 100 0 –100 –200 –300 0.1 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 COMMON MODE VOLTAGE (V) 5 INPUT BIAS CURRENT (pA) INPUT BIAS CURRENT (pA) 1000 100 TA = 85°C 10 TA = 25°C 1 UW 6422 G19 6244 G06 VOS Distribution 60 50 LTC6244DD VS = 5V, 0V VCM = 2.5V TA = 25°C VOS Temperature Coefficient Distribution 14 13 LTC6244MS8 VS = 5V, 0V 12 VCM = 2.5V 11 2 LOTS 10 –55°C TO 125°C 9 8 7 6 5 4 3 2 1 0 –2.4 –1.6 –0.8 0 0.8 DISTRIBUTION (µV/°C) 1.6 2.4 6422 G03 Supply Current vs Supply Voltage (Per Amplifier) 500 400 300 200 100 0 Offset Voltage vs Input Common Mode Voltage VS = 5V, 0V NORMALIZED TO 25°C VOS VALUE 6 5 4 3 2 TA = 125°C TA = 25°C TA = –55°C 0 2 8 10 6 TOTAL SUPPLY VOLTAGE (V) 4 12 6244 G04 –100 TA = 125°C TA = 25°C TA = –55°C –1 –0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 INPUT COMMON MODE VOLTAGE (V) 6244 G05 –200 –300 –400 Input Bias Current vs Common Mode Voltage 10000 MS8 PACKAGE VS = 5V, 0V 1000 Input Bias Current vs Temperature MS8 PACKAGE VCM = VS/2 100 VS = 10V TA = 125°C TA = 25°C TA = 85°C 10 VS = 5V 1 –400 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 0.6 0.8 1.0 COMMON MODE VOLTAGE (V) 6244 G07 0.1 25 35 45 55 65 75 85 95 105 115 125 TEMPERATURE (°C) 6244 G08 6244f 9 LTC6244 TYPICAL PERFOR A CE CHARACTERISTICS Output Saturation Voltage vs Load Current (Output Low) 10 OUTPUT LOW SATURATION VOLTAGE (V) OUTPUT HIGH SATURATION VOLTAGE (V) VS = 5V, 0V 10 GAIN BANDWIDTH (MHz) 1 0.1 TA = 125°C TA = 25°C TA = –55°C 0.1 1 10 LOAD CURRENT (mA) 100 6244 G09 0.01 Open Loop Gain vs Frequency 100 90 80 70 60 GAIN (dB) 50 40 30 20 10 0 –10 –20 10k VS = ±5V VS = ±1.5V 100k 1M 10M FREQUENCY (Hz) GAIN PHASE CL = 5pF 100 RL = 1k VCM = VS/2 80 60 40 20 0 –20 –40 –60 –80 –100 –120 100M 6244 G12 GAIN BANDWIDTH (MHz) 40 70 60 50 40 GAIN BANDWIDTH 30 SLEW RATE (V/µs) Output Impedance vs Frequency 1000 100 OUTPUT IMPEDANCE (Ω) 10 AV = 10 1 0.1 0.01 0.001 10k AV = 1 AV = 2 COMMON MODE REJECTION RATIO (dB) TA = 25°C VS = ±2.5V 110 100 90 80 70 60 50 40 30 20 10 0 CHANNEL SEPARATION (dB) 100k 1M 10M FREQUENCY (Hz) 10 UW 6244 G15 Output Saturation Voltage vs Load Current (Output High) VS = 5V, 0V Gain Bandwidth and Phase Margin vs Temperature 80 VS = ±5V PHASE MARGIN 60 40 PHASE MARGIN (DEG) VS = ±1.5V 20 0 70 60 50 40 CL = 5pF RL = 1k GAIN BANDWIDTH VS = ±5V VS = ±1.5V 5 25 45 65 85 105 125 TEMPERATURE (°C) 6244 G11 1 –20 0.1 TA = 125°C TA = 25°C TA = –55°C 0.1 1 10 LOAD CURRENT (mA) 100 6244 G10 0.01 30 –55 –35 –15 Gain Bandwidth and Phase Margin vs Supply Voltage 120 TA = 25°C CL = 5pF RL = 1k PHASE MARGIN 60 50 PHASE MARGIN (DEG) 50 Slew Rate vs Temperature AV = –2 48 RF = 1k, RG = 500Ω 46 CONDITIONS: SEE NOTE 11 44 42 40 38 36 34 32 30 28 –50 VS = ±5V VS = ±2.5V –25 RISING FALLING PHASE (DEG) 0 2 10 4 6 8 TOTAL SUPPLY VOLTAGE (V) 12 6244 G13 50 25 0 75 TEMPERATURE (°C) 100 125 6244 G14 Common Mode Rejection Ratio vs Frequency TA = 25°C VS = ±2.5V 0 Channel Separation vs Frequency TA = 25°C –10 V = ±2.5V S –20 AV = 1 –30 –40 –50 –60 –70 –80 –90 –100 –110 100k 1M 10M FREQUENCY (Hz) 100M 6244 G16 100M –10 10k –120 10k 100 1M 10M FREQUENCY (Hz) 100M 6244 G17 6244f LTC6244 TYPICAL PERFOR A CE CHARACTERISTICS Power Supply Rejection Ratio vs Frequency 100 POWER SUPPLY REJECTION RATIO (dB) 90 80 70 60 50 40 30 20 10 0 –10 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M 6244 G18 250 CHANGE IN OFFSET VOLTAGE (µV) 200 150 100 50 0 –50 OUTPUT SHORT-CIRCUIT CURRENT (mA) NEGATIVE SUPPLY POSITIVE SUPPLY Open-Loop Gain –40 –50 INPUT VOLTAGE (µV) –60 –70 –80 RL = 1k –90 RL = 10k TA = 25°C VS = ±5V INPUT VOLTAGE (µV) –40 –50 –60 –70 –80 –90 INPUT VOLTAGE (µV) –100 –110 23 –5 –4 –3 –2 –1 0 1 OUTPUT VOLTAGE (V) 4 5 Offset Voltage vs Output Current 200 150 OFFSET VOLTAGE (µV) 100 50 0 –50 TA = –55°C TA = 125°C TA = 25°C VS = ±5V CHANGE IN OFFSET VOLTAGE (µV) –5 –10 –15 –20 –25 –30 –35 –40 –45 NOISE VOLTAGE (nV/√Hz) –100 –150 – 200 –50 –40 –30 –20 –10 0 10 20 30 40 50 OUTPUT CURRENT (mA) 6244 G25 UW TA = 25°C VS = ±2.5V 6244 G22 Minimum Supply Voltage 300 VCM = VS/2 50 40 30 20 10 0 –10 –20 –30 –40 Output Short-Circuit Current vs Power Supply Voltage SINKING –100 –150 –200 –250 –300 0 1 TA = 125°C TA = 25°C TA = –55°C 2345678 TOTAL SUPPLY VOLTAGE (V) 9 10 SOURCING TA = 125°C TA = 25°C TA = –55°C 2 3.5 3 2.5 4 4.5 POWER SUPPLY VOLTAGE (±V) 5 –50 1.5 6244 G20 6244 G21 Open-Loop Gain TA = 25°C VS = 5V, 0V –40 –50 –60 –70 –80 –90 Open-Loop Gain TA = 25°C VS = 3V, 0V RL = 10k RL = 100k RL = 10k RL = 1k –100 –110 0 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT VOLTAGE (V) 4.5 5 6244 G22 –100 –110 0 0.5 2 1.5 1 OUTPUT VOLTAGE (V) 2.5 3 6244 G23 Warm-Up Drift vs Time TA = 25°C VS = ±1.5V 40 35 30 25 20 15 10 5 0 0 5 10 15 20 25 30 35 40 45 50 55 60 TIME AFTER POWER UP (SEC) 6244 G26 Noise Voltage vs Frequency TA = 25°C VS = ±2.5V VCM = 0V VS = ±5V VS = ±2.5V 10 100 1k 10k FREQUENCY (Hz) 100k 6244 G27 6244f 11 LTC6244 TYPICAL PERFOR A CE CHARACTERISTICS 0.1Hz to 10Hz Voltage Noise 1000 VS = 5V, 0V VOLTAGE NOISE (500nV/DIV) NOISE CURRENT (fA/√Hz) 100 OVERSHOOT (%) 40 1k 10 30 20 10 1 RS = 50Ω TIME (1s/DIV) 6244 G28 0.1 100 0 1k 10k FREQUENCY (Hz) 100k 6244 G29 10 Series Output Resistance and Overshoot vs Capacitive Load 60 50 OVERSHOOT (%) 40 1k Series Output Resistance and Overshoot vs Capacitive Load 60 50 VOUT = 100mV VS = ± 2.5V AV = 1 900 RS = 10Ω SETTLING TIME (ns) Settling Time vs Output Step (Noninverting) VS = ±5V 800 AV = 1 TA = 25°C 700 600 500 400 300 200 10mV 10mV 1mV VIN VOUT = 100mV VS = ± 2.5V AV = –1 30pF RS = 10Ω OVERSHOOT (%) 40 30 RS = 50Ω 20 10 0 10 100 CAPACITIVE LOAD (pF) 1000 6244 G32 30 20 10 0 10 100 CAPACITIVE LOAD (pF) 1000 6244 G31 Settling Time vs Output Step (Inverting) VIN Maximum Undistorted Output Signal vs Frequency 10 OUTPUT VOLTAGE SWING (VP-P) –30 –40 DISTORTION (dBc) –50 9 8 7 6 5 4 3 2 VS = ±5V TA = 25°C HD2, HD3 < –40dBc AV = –1 AV = +2 SETTLING TIME (ns) 600 500 400 300 200 100 0 –4 –3 –2 0 1 –1 2 OUTPUT STEP (V) 3 6244 G34 1mV 10mV 12 + – VS = ±5V 800 AV = –1 TA = 25°C 700 900 1k 1k VOUT 1k 1mV 10mV 4 1 10k 100k 1M FREQUENCY (Hz) + – + – 1k RS CL RS = 50Ω RS CL 100 0 –4 –3 –2 0 1 –1 2 OUTPUT STEP (V) 3 4 Distortion vs Frequency VS = ±2.5V AV = +1 VOUT = 2VP-P RL = 1k, 2ND –60 –70 –80 RL = 1k, 3RD –90 –100 10k 10M 6244 G35 100k 1M FREQUENCY (Hz) + – + – UW Noise Current vs Frequency TA = 25°C VS = ±2.5V VCM = 0V 60 50 Series Output Resistance and Overshoot vs Capacitive Load VOUT = 100mV VS = ± 2.5V AV = –2 30pF 500Ω RS = 10Ω RS CL 100 CAPACITIVE LOAD (pF) 1000 6244 G30 NOTE: EXCEEDS INPUT COMMON MODE RANGE VOUT 1k 1mV 6244 G33 10M 6244 G36 6244f LTC6244 TYPICAL PERFOR A CE CHARACTERISTICS Distortion vs Frequency –30 –40 DISTORTION (dBc) –50 –60 RL = 1k, 2ND –70 –80 –90 –100 10k RL = 1k, 3RD VS = ±2.5V AV = +2 VOUT = 2VP-P DISTORTION (dBc) –30 –40 –50 –60 –70 –80 –90 –100 10k RL = 1k, 3RD 100k 1M FREQUENCY (Hz) 10M 6244 G38 DISTORTION (dBc) 100k 1M FREQUENCY (Hz) Small-Signal Response 0V VS = ±2.5V AV = 1 RL = ∞ 200ns/DIV Large-Signal Response 0V VOUT 0V 2V/DIV VS = ±2.5V AV = –1 RL = 1k UW 6244 G37 6244 G40 Distortion vs Frequency –30 VS = ±5V AV = +1 VOUT = 2VP-P –40 –50 –60 –70 –80 –90 Distortion vs Frequency VS = ±5V AV = +2 VOUT = 2VP-P RL = 1k, 2ND RL = 1k, 2ND RL = 1k, 3RD 100k 1M FREQUENCY (Hz) 10M 6244 G39 10M –100 10k Small-Signal Response Large-Signal Response 0V 0V VS = ±2.5V AV = 1 RL = ∞ CL = 75pF 200ns/DIV 6244 G41 VS = ±5V AV = 1 RL = ∞ 2µs/DIV 6244 G42 Output Overdrive Recovery VIN 0V 1V/DIV 200ns/DIV 6244 G43 VS = ±2.5V AV = 3 RL = 3k 200ns/DIV 6244 G44 6244f 13 LTC6244 APPLICATIO S I FOR ATIO Amplifier Characteristics Figure 1 is a simplified schematic of the LTC6244, which has a pair of low noise input transistors M1 and M2. A simple folded cascode Q1, Q2 and R1, R2 allow the input stage to swing to the negative rail, while performing level shift to the Differential Drive Generator. Low offset voltage is accomplished by laser trimming the input stage. Capacitor C1 reduces the unity cross frequency and improves the frequency stability without degrading the gain bandwidth of the amplifier. Capacitor CM sets the overall amplifier gain bandwidth. The differential drive generator supplies signals to transistors M3 and M4 that swing the output from rail-to-rail. The photo of Figure 2 shows the output response to an input overdrive with the amplifier connected as a voltage follower. If the negative going input signal is less than a diode drop below V–, no phase inversion occurs. For input signals greater than a diode drop below V–, limit the current to 3mA with a series resistor RS to avoid phase inversion. The input common mode voltage range extends from V– to V+ – 1.5V. In unity gain voltage follower applications, exceeding this range by applying a signal that reaches 1V from the positive supply rail can create a low level instability at the output. Loading the amplifier with several hundred micro-amps will reduce or eliminate the instability. V+ V– DESD1 VIN+ VIN– DESD3 V– V+ BIAS DESD4 C1 V– V– Q1 Q2 M4 V+ DESD2 M1 M2 DIFFERENTIAL DRIVE GENERATOR ITAIL CM M3 V+ DESD5 VO DESD6 +2.5V VOUT AND VIN OF FOLLOWER WITH LARGE INPUT OVERDRIVE V– –2.5V R1 R2 V– 6244 F01 Figure 1. Simplified Schematic 14 U ESD The LTC6244 has reverse-biased ESD protection diodes on all input and outputs as shown in Figure 1. These diodes protect the amplifier for ESD strikes to 4kV. If these pins are forced beyond either supply, unlimited current will flow through these diodes. If the current transient is less than 1 second and limited to one hundred milliamps or less, no damage to the device will occur. The amplifier input bias current is the leakage current of these ESD diodes. This leakage is a function of the temperature and common mode voltage of the amplifier, as shown in the Typical Performance Chacteristics. Noise The LTC6244 exhibits low 1/f noise in the 0.1Hz to 10Hz region. This 1.5µVP-P noise allows these op amps to be used in a wide variety of high impedance low frequency applications, where Zero-Drift amplifiers might be inappropriate due to their input sampling characteristic. In the frequency region above 1kHz the LTC6244 also shows good noise voltage performance. In this frequency region, noise can easily be dominated by the total source V+ 2.5V W U U + RS 0Ω VIN 6244 F02 1/2 LTC6244 VOUT – –2.5V Figure 2. Unity Gain Follower Test Circuit 6244f LTC6244 APPLICATIO S I FOR ATIO resistance of the particular application. Specifically, these amplifiers exhibit the noise of a 4k resistor, meaning it is desirable to keep the source and feedback resistance at or below this value, i.e., RS + RG||RFB ≤ 4k. Above this total source impedance, the noise voltage is not dominated by the amplifier. Noise current can be estimated from the expression in = √2qIB, where q = 1.6 • 10–19 coulombs. Equating √4kTRΔf and RS√2qIBΔf shows that for source resistors below 50GΩ the amplifier noise is dominated by the source resistance. See the Typical Characteristics curve Noise Current vs Frequency. Proprietary design techniques are used to obtain simultaneous low 1/f noise and low input capacitance. Low input capacitance is important when the amplifier is used with high source and feedback resistors. High frequency noise from the amplifier tail current source, ITAIL in Figure 1, couples through the input capacitance and appears across these large source and feedback resistors. Stability The good noise performance of these op amps can be attributed to large input devices in the differential pair. Above several hundred kilohertz, the input capacitance can cause amplifier stability problems if left unchecked. When the feedback around the op amp is resistive (RF), a pole will be created with RF , the source resistance, source capacitance (RS, CS), and the amplifier input capacitance. CF RF RS CS Figure 3. Compensating Input Capacitance U In low gain configurations and with RF and RS in even the kilohm range (Figure 3), this pole can create excess phase shift and possibly oscillation. A small capacitor CF in parallel with RF eliminates this problem. Achieving Low Input Bias Current The DD package is leadless and makes contact to the PCB beneath the package. Solder flux used during the attachment of the part to the PCB can create leakage current paths and can degrade the input bias current performance of the part. All inputs are susceptible because the backside paddle is connected to V– internally. As the input voltage changes or if V– changes, a leakage path can be formed and alter the observed input bias current. For lowest bias current, use the LTC6244 in the MS8 package. Photodiode Amplifiers Photodiodes can be broken into two categories: large area photodiodes with their attendant high capacitance (30pF to 3000pF) and smaller area photodiodes with relatively low capacitance (10pF or less). For optimal signal-to-noise performance, a transimpedance amplifier consisting of an inverting op amp and a feedback resistor is most commonly used to convert the photodiode current into voltage. In low noise amplifier design, large area photodiode amplifiers require more attention to reducing op amp input voltage noise, while small area photodiode amplifiers require more attention to reducing op amp input current noise and parasitic capacitances. – CIN 6244 F03 W U U OUTPUT + 6244f 15 LTC6244 APPLICATIO S I FOR ATIO Large Area Photodiode Amplifiers A simple large area photodiode amplifier is shown in Figure 4a. The capacitance of the photodiode is 3650pF (nominally 3000pF), and this has a significant effect on the noise performance of the circuit. For example, the photodiode capacitance at 10kHz equates to an impedance of 4.36kΩ, so the op amp circuit with 1MΩ feedback has a noise gain of NG = 1 + 1M/4.36k = 230 at that frequency. Therefore, the LTC6244 input voltage noise gets to the output as NG • 7.8nV/√Hz = 1800nV/√Hz, and this can clearly be seen in the circuit’s output noise spectrum in Figure 4b. Note that we have not yet accounted for the op amp current noise, or for the 130nV/√Hz of the gain resistor, but these are obviously trivial compared to the op CF 3.9pF RF 1M IPD 5V VOUT = 1M • IPD BW = 52kHz NOISE = 1800nV/√Hz AT 10kHz VOUT – HAMAMATSU LARGE AREA PHOTODIODE S1227-1010BQ CPD = 3000pF 1/2 LTC6244HV + –5V 6244 F04a Figure 4a. Large Area Photodiode Transimpedance Amplifier OUTPUT NOISE (800nV/ÖHz/DIV) 1k 10k FREQUENCY (Hz) 100k 6244 F04b Figure 4b. Output Noise Spectral Density of the Circuit of Figure 4a. At 10kHz, the 1800nV/√Hz Output Noise is Due Almost Entirely to the 7.8nV Voltage Noise of the LTC6244 and the High Noise Gain of the 1M Feedback Resistor Looking Into the High Photodiode Capacitance 16 U amp voltage noise and the noise gain. For reference, the DC output offset of this circuit is about 100µV, bandwidth is 52kHz, and the total noise was measured at 1.7mVRMS on a 100kHz measurement bandwidth. An improvement to this circuit is shown in Figure 5a, where the large diode capacitance is bootstrapped by a 1nV/√Hz JFET. This depletion JFET has a VGS of about –0.5V, so that RBIAS forces it to operate at just over 1mA of drain current. Connected as shown, the photodiode has a reverse bias of one VGS, so its capacitance will be slightly lower than in the previous case (measured 2640pF), but the most drastic effects are due to the bootstrapping. Figure 5b shows the output noise of the new circuit. Noise at 10kHz is now 220nV/√Hz, and the 130nV/√Hz noise thermal noise floor of the 1M feedback resistor is discernible at low frequencies. What has happened is that the 7.8nV/√Hz of the op amp has been effectively replaced by the 1nV/√Hz of the JFET. This is because the 1M feedback resistor is no longer “looking back” into the large photodiode capacitance. It is instead looking back into a JFET gate capacitance, an op amp input capacitance, and some parasitics, approximately 10pF total. The large photodiode capacitance is across the gate-source voltage of the low noise JFET. Doing a sample calculation at 10kHz as before, the photodiode capacitance looks like 6kΩ, so the 1nV/√Hz of the JFET creates a current noise of 1nV/6k = 167fA/√Hz. This current noise necessarily flows through the 1M feedback resistor, and so appears as 167nV/√Hz at the output. Adding the 130nV/√Hz of the resistor (RMS wise) gives a total calculated noise density of 210nV/√Hz, agreeing well with the measured noise of Figure 5b. Another drastic improvement is in bandwidth, now over 350kHz, as the bootstrap enabled a reduction of the compensating feedback capacitance. Note that the bootstrap does not affect the DC accuracy of the amplifier, except by adding a few picoamps of gate current. There is one drawback to this circuit. Most photodiode circuits require the ability to set the amount of applied reverse bias, whether it’s 0V, 5V, or 200V. This circuit has a fixed reverse bias of about 0.5V, dictated by the JFET. 6244f W U U LTC6244 APPLICATIO S I FOR ATIO CF 0.25pF 5V PHILIPS BF862 JFET IPD 5V 5V PHILIPS BF862 JFET 5V 4.99k –5V 4.7µF X7R 4.99k 6244 F04a RF 1M VOUT = 1M • IPD BW = 350kHz OUTPUT NOISE = 220nV/√Hz AT10kHz VOUT RBIAS 4.99k –5V – HAMAMATSU LARGE AREA PHOTODIODE S1227-1010BQ CPD = 3000pF 1/2 LTC6244HV + –5V VBB Figure 5a. Large Area Diode Bootstrapping OUTPUT NOISE (200nV/ÖHz/DIV) 1k 10k FREQUENCY (Hz) 100k 6244 F05b Figure 5b: Output Noise Spectral Density of Figure 5a. The Simple JFET Bootstrap Improves Noise (and Bandwidth) Drastically. Noise Density at 10kHz is Now 220nV/√Hz, About a 8.2x Reduction. This is Mostly Due to the Bootstrap Effect of Swapping the 1nV/√Hz of the JFET for the 7.8nV/√Hz of the Op Amp OUTPUT NOISE (275nV/ÖHz/DIV) The solution is as shown in the circuit of Figure 6a, which uses a capacitor-resistor pair to enable the AC benefits of bootstrapping while allowing a different reverse DC voltage on the photodiode. The JFET is still running at the same current, but an arbitrary reverse bias may be applied to the photodiode. The output noise spectrum of the circuit with 0V of photodiode reverse bias is shown in Figure 6b. Photodiode capacitance is again 3650pF, as in the original circuit of Figure 4a. This noise plot with 0V bias shows that bootstrapping alone was responsible for a factor of 6.2 noise reduction, from 1800nV/√Hz to 291nV/√Hz at 10kHz, independent of photodiode capacitance. However, photodiode capacitance can now can be reduced arbitrarily U CF 0.25pF RF 1M VOUT = 1M • IPD BW = 250kHz OUTPUT NOISE = 291nV/√Hz AT 10kHz VOUT W U U – IPD 1/2 LTC6244HV + –5V 6244 F06a HAMAMATSU LARGE AREA PHOTODIODE S1227-1010BQ CPD = 3000pF Figure 6a. The Addition of a Capacitor and Resistor Enable the Benefit of Bootstrapping While Applying Arbitrary Photodiode Bias Voltage VBB 1k 10k FREQUENCY (Hz) 100k 6244 F06b Figure 6b: Output Spectrum of Circuit of Figure 6a, with Photodiode Bias at 0V. Photodiode Capacitance is Back Up, as in the Original Circuit of Figure 4a. However, it can be Reduced Arbitrarily by Providing Reverse Bias. This Plot Shows that Bootstrapping Alone Reduced the 10kHz Noise Density by a Factor of 6.2, from 1800nV/√Hz to 291nV/√Hz. by providing reverse bias, and the photodiode can also be reversed to support either cathode or anode connections for positive or negative going outputs. The circuit on the last page of this data sheet shows further reduction in noise by paralleling four JFETs to attain 152nV/√Hz at 10kHz, a noise of 12 times less than the basic photodiode circuit of Figure 4a. 6244f 17 LTC6244 APPLICATIO S I FOR ATIO Small Area Photodiode Amplifiers Small area photodiodes have very low capacitance, typically under 10pF and some even below 1pF. Their low capacitance makes them more approximate current sources to higher frequencies than large area photodiodes. One of the challenges of small area photodiode amplifier design is to maintain low input capacitance so that voltage noise does not become an issue and current noise dominates. A simple small area photodiode amplifier using the LTC6244 is shown in Figure 7. The input capacitance of the amplifier consists of CDM and one CCM (because the +input is CF 0.1pF RF 1M IPD SMALL AREA PHOTODIODE VISHAY TEMD1000 CPD = 1.8pF 5V – 1/2 LTC6244HV VOUT = 1M • IPD BW = 350kHz NOISE = 120mVRMS MEASURED ON A 350kHz BW VOUT –5V + –5V 6244 F07 Figure 7. LTC6244 in a Normal TIA Configuration IPD SMALL AREA PHOTODIODE VISHAY TEMD1000 CPD = 1.8pF 5 + – 6 –5V A1 1/2 LTC6244HV R2 1k C1 56pF R1 4999 Figure 8a: Using Both Op Amps for Higher Bandwidth. A1 Provides a Gain of 3 Within the Loop, Increasing the Gain Bandwidth Product. This Bootstraps the CDM Accross A1’s Inputs, Reducing Amplifier Input Capacitance. Inversion is Provided by A2, so that the Photodiode Looks Into a Noninverting Input. Pin 5 was Selected Because it is in the Corner, Removing One Lead Capacitance 18 U grounded), or about 6pF total. The small photodiode has 1.8pF, so the input capacitance of the amplifier is dominating the capacitance. The small feedback capacitor is an actual component (AVX Accu-F series), but it is also in parallel with the op amp lead, resistor and parasitic capacitances, so the total real feedback capacitance is probably about 0.4pF. The reason this is important is that this sets the compensation of the circuit and, with op amp gain bandwidth, the circuit bandwidth. The circuit as shown has a bandwidth of 350kHz, with an output noise of 120µVRMS measured over that bandwidth. The circuit of Figure 8a makes some slight improvements. Operation is still transimpedance mode, with RF setting the gain to 1MΩ. However, a noninverting input stage A1 with a gain of 3 has been inserted, followed by the usual inverting stage performed by A2. Note what this achieves. The amplifier input capacitance is bootstrapped by the feedback of R2:R1, eliminating the effect of A1’s input CDM (3.5pF), and leaving only one CCM (2.1pF). The op amp at Pins 5, 6 and 7 was chosen for the input amplifier to eliminate extra pin-to-pin capacitance on the (+) input. The lead capacitance on the corner of an MSOP package is only about 0.15pF. By using this noninverting configuration, input capacitance is minimized. 0.07pF (PARASITIC) RF 1M 5V 8 7 R3 1k R4 6.98k C2 150pF 1 6244 F08a W U U 2 – 3 A2 1/2 LTC6244HV VOUT = 1M • IPD BW = 1.6MHz NOISE = 1.2mVRMS MEASURED ON A 2MHz BW VOUT + 4 –5V 6244f LTC6244 APPLICATIO S I FOR ATIO Total capacitance at the amplifier’s input is now one CCM (2.1pF) plus the photodiode capacitance CPD (1.8pF), or about 4pF accounting for parasitics. The shunt impedance at 1MHz, for example, is XC = 1/(2πfC) = 39.8kΩ, and therefore, the noise gain at 1MHz is NG = 1+Rf/XC = 26. The input voltage noise of this amplifier is about 15nV/√Hz, after accounting for the effects of R1 through R3, the noise of the second stage and the fact that voltage noise does rise with frequency. Multiplying the noise gain by the input voltage noise gives an output noise density due to voltage noise of 26 • 15nV/√Hz = 390nV/√Hz. But the noise spectral density plot of Figure 8b shows an output noise of 782nV/√Hz at 1MHz. The extra output noise is due to input current noise, multiplied by the feedback impedance. So while the circuit of Figure 8a does increase bandwidth, it does not offer a noise advantage. Note, however, that the 1.2mVRMS of noise is now measured in a 2MHz bandwidth, instead of over a 350kHz bandwidth of the previous example. A Low Noise Fully Differential Buffer/Amplifier In differential signal conditioning circuits, there is often a need to monitor a differential source without loading or OUTPUT NOISE (150nV/ÖHz/DIV) 50k Figure 8b: Output Noise Spectrum of the Circuit in Figure 8a. Noise at 1MHz is 782nV/√Hz, Due Mostly to the Input Current Noise Rising with Frequency U adding appreciable noise to the circuit. In addition, adding gain to low level signals over appreciable bandwidth is extremely useful. A typical application for a low noise, high impedance, differential amplifier is in the baseband circuit of an RFID (radio frequency identification) receiver. The baseband signal of a UHF RFID receiver is typically a low level differential signal at the output of a demodulator with differential output impedance in the range of 100Ω to 400Ω. The bandwidth of this signal is 1MHz or less. The circuit of Figure 9a uses an LTC6244 to make a low noise fully differential amplifier. The amplifier’s gain, input impedance and –3dB bandwidth can be specified independently. Knowing the desired gain, input impedance and –3dB bandwidth, RG, CF and CIN can be calculated from the equations shown in Figure 9b. The common mode gain of this amplifier is equal to one (VOUTCM = VINCM) and is independent of resistor matching. The component values in the Figure 9a circuit implement a 970kHz, gain = 5, differential amplifier with 4k input impedance. The output differential DC offset is typically less than 500µV. The differential input referred noise voltage density is shown in Figure 10. The total input referred noise in a 1MHz bandwidth is 16µVRMS. 1M FREQUENCY (Hz) 5M 6244 F08b W U U 6244f 19 LTC6244 APPLICATIO S I FOR ATIO + 1/2 LTC6244 VOUT+ CF 33pF 2k INPUT REFERRED NOISE (nV/ÖHz) – + RIN 2k VIN RG 10k CIN 82pF CIN 82pF RG 10k 2k VIN– RIN 2k 2k 2k CF 33pF V+ – 1/2 LTC6244 6244 F09a + V– Figure 9a. Low Noise Fully Differential Buffer/Amplifier (f–3dB = 970kHz, Gain = 5, RIN = 4k) Input Impedance = 2 • RIN Gain = VOUT – VOUT VIN – VIN + – + – = RG RIN Maximum Gain = CF = CIN = f3dB = 5MHz f3dB 1 4398 • f3dB • (Gain + 2) Gain + 2 8.977 • Gain • RIN • f3dB 1 4000 • π 2 • RG • CF • CIN Figure 9b. Design Equations for Figure 9a Circuit 20 U 32 28 24 20 16 12 8 4 10k 100k FREQUENCY (Hz) 1M 6244 F10 W U U f–3dB = 970kHz GAIN = 5 RIN = 4k Figure 10. Differential Input Referred Noise A Low Noise AC Difference Amplifier In the signal conditioning of wideband sensors and transducers, a low noise amplifier is often used to provide gain for low level AC difference signals in the frequency range of a few Hertz to hundreds of kilo-Hertz. In addition, the amplifier must reject common mode AC signals and its input impedance should be higher than the differential source impedance. Typical applications are piezoelectric sensors used in sonar, sound and ultrasound systems and LVDT (linear variable differential transformers) for displacement measurements in process control and robotics. The Figure 11a circuit is a low noise, single supply AC difference amplifier. The amplifier’s low frequency –3dB bandwidth is set with resistor R5 and capacitor C3, while the upper –3dB bandwidth is set with R2 and C1. The input common mode DC voltage can vary from ground to V+ and the output DC voltage is equal to the VREF voltage. The amplifier’s gain is the ratio of resistors R2 to R1 (R4 = R2 and R3 = R1). The component values in the circuit of Figure 11a implement an 800Hz to 160kHz AC amplifier with a gain equal to 10 and 12nV/√Hz input referred voltage noise density shown in Figure 11b. The total input referred wideband noise is 4.5µVRMS, in the bandwidth of 500Hz to 200kHz. VOUT– 6244f LTC6244 APPLICATIO S I FOR ATIO R1 2k V1 1/2 LTC6244 C3 1000pF V+ R4 20k C2 47pF V2 1/2 LTC6244 VOUT = GAIN • (V2 – V1 + VREF ) GAIN = R2 R3 = R1, R4 = R2, C1 = C2 R1 BANDWIDTH = fHI – fLO fHI = 1 1 ,f = 2 • π • R2 • C1 LO 2 • π • R5 • C3 Figure 11a. Low Noise AC Difference Amplifier (Bandwidth 800Hz to 160kHz, Gain = 10) INPUT REFERRED NOISE (nV/ÖHz) 28 24 20 16 12 8 4 0 BW = 800Hz TO 160kHz GAIN = 10 1 10 FREQUENCY (kHz) Figure 11b. Input Referred Noise – R3 2k + U C1 47pF R2 20k VOUT R5 200k VREF 6244 F11a + – W U U 1000 6244 F11b 6244f 21 LTC6244 PACKAGE DESCRIPTIO U DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) 0.675 ± 0.05 PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5 0.38 ± 0.10 8 3.00 ± 0.10 (4 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 1203 3.5 ± 0.05 1.65 ± 0.05 2.15 ± 0.05 (2 SIDES) 1.65 ± 0.10 (2 SIDES) 0.200 REF 0.75 ± 0.05 4 0.25 ± 0.05 2.38 ± 0.10 (2 SIDES) 1 0.50 BSC 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 6244f 22 LTC6244 PACKAGE DESCRIPTIO U MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 3.20 – 3.45 (.126 – .136) 5.23 (.206) MIN 0.42 ± 0.038 (.0165 ± .0015) TYP 0.65 (.0256) BSC 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 8 7 65 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT DETAIL “A” 0° – 6° TYP 1 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.127 ± 0.076 (.005 ± .003) MSOP (MS8) 0204 0.254 (.010) GAUGE PLANE 4.90 ± 0.152 (.193 ± .006) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 23 4 0.86 (.034) REF 1.10 (.043) MAX NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.65 (.0256) BSC 6244f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTC6244 TYPICAL APPLICATION Ultralow Noise Large Area Photodiode Amplifier 5V 5V 5V 5V J1 R2 5V R1 J2 R3 RF 1M J3 R4 J4 CF 0.25pF –5V Photodiode Amplifier Output Noise Spectal Density OUTPUT NOISE (200nV/ÖHz/DIV) 1 – C1 R5 4.99k –5V C2 C3 C4 IPD 1/2 LTC6244HV VOUT = 1M • IPD BW = 400kHz NOISE = 150µVRMS MEASURED ON 100kHz BANDWIDTH VOUT 6244 TA02a + HAMAMATSU LARGE AREA PHOTODIODE S1227-1010BQ CPD = 3000pF –5V C1 TO C4: 4.7µF X7R J1 TO J4: PHILIPS BF862 JFETS R1 TO R4: 4.99k 10 (kHz) 100 6244 TA02b RELATED PARTS PART NUMBER LTC1151 LT1792 LTC2050 LTC2051/LTC2052 LTC2054/LTC2055 LT6241/LT6242 DESCRIPTION ±15V Zero-Drift Op Amp Low Noise Precision JFET Op Amp Zero-Drift Op Amp Dual/Quad Zero-Drift Op Amp Single/Dual Zero-Drift Op Amp Dual/Quad, 18MHz CMOS Op Amps COMMENTS Dual High Voltage Operation ±18V 6nV/√Hz Noise, ±15V Operation 2.7 Volt Operation, SOT-23 Dual/Quad Version of LTC2050 in MS8/GN16 Packages Micropower Version of the LTC2050/LTC2051 in SOT-23 and DD Packages Low Noise, Rail-to-Rail 6244f 24 Linear Technology Corporation (408) 432-1900 ● LT 0706 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006