LTC6603

LTC6603 Dual Adjustable Lowpass Filter FEATURES n n n n n n n n n n n n DESCRIPTION The LTC®6603 is a dual, matched, programmable lowpass filter for communications receivers and transmitters. The selectivity of the LTC6603, combined with its linear phase, phase matching and dynamic range, make it suitable for filtering in many communications systems. With 1.5° phase matching between channels, the LTC6603 can be used in applications requiring pairs of matched filters, such as transceiver I and Q channels. Furthermore, the differential inputs and outputs provide a simple interface for most communications systems. The sampled data filter does not require an external clock yet its cutoff frequency can be set with a single external resistor with an accuracy of 3.5% or better. The external resistor programs an internal oscillator whose frequency is divided prior to being applied to the filter networks. This allows up to three cutoff frequencies that can be obtained for each external resistor value, allowing the cutoff frequency to be programmed over a range of more than six octaves. Alternatively, the cutoff frequency can be set with an external clock. The filter gain can also be programmed to 1, 2, 4 or 16. The LTC6603 features a low power shutdown mode that can be programmed through the serial interface and is available in a 24-pin 4mm × 4mm QFN package. Guaranteed Phase and Gain Matching Specs Programmable BW Up to 2.5MHz Programmable Gain (0dB/6dB/12dB/24dB) 9th Order Linear Phase Response Differential, Rail-to-Rail Inputs and Outputs Low Noise: –145dBm/Hz (Input Referred) Low Distortion: –75dBc at 200kHz Simple Pin Programming or SPI Interface Set the Max Speed/Power with an External R Operates from 2.7V to 3.6V Input Range from 0V to 5.5V 4mm × 4mm QFN Package APPLICATIONS n n n n Small/Low Cost Basestations: IDEN, PHS, TD-SCDMA, CDMA2000, WCDMA, UMTS Low Cost Repeaters, Radio Links, and Modems 802.11x Receivers JTRS L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 2.5MHz I and Q Lowpass Filter and Dual ADC 5V 3V 49.9Ω 100nH* 0.1μF 0.1μF I OUTPUT V+IN IIN QIN 0.1μF +INA –INA +INB –INB RBIAS VOCM 0.1μF CAP GAIN1 GAIN0 GND GND BASEBAND GAIN CONTROL CLKCNTL SDO SDI LPFO LPF1 6603 TA01a LTC2297 Phase Matching 180pF 10pF 14-BIT ADC 180pF 10pF 60 50 40 VS = 3V, BW = 156.25kHz f = 125kHz, TA = 25°C 1000 UNITS V+A V+D 49.9Ω 100nH* +OUTA –OUTA +OUTB LTC6603 –OUTB CLKIO 49.9Ω 100nH* 180pF Q OUTPUT 10pF 14-BIT ADC 180pF 10pF VCM 2.2μF UNITS (%) 30 20 10 0 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 MISMATCH (DEG) 30.9k SER 49.9Ω 100nH* 3V 1.5 2 2.5 6603 TA01b 3V *COILCRAFT 0603HP 6603f 1 LTC6603 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW GAIN0(D0) +OUTA 18 –OUTA 17 SER 25 16 V+D 15 CLKIO 14 GND 13 +OUTB 7 +INB 8 –INB 9 10 11 12 LPFO(SCLK) –OUTB SDO SDI GAIN1 +INA –INA V+IN to GND ................................................................6V V+A , V+D to GND .........................................................4V V+A to V+D .............................................. –0.3V to +0.3V Filter Inputs to GND ....................... –0.3V to V+IN + 0.3V Pins 3, 4 to GND ............................. –0.3V to V+A + 0.3V Pins 5, 6, 9-11, 15, 17, 21, 22 to GND ................. –0.3V to V+D + 0.3V Maximum Input Current .......................................±10mA Output Short Circuit Duration........................... Indefinite Operating Temperature Range (Note 2) LTC6603CUF .......................................–40°C TO 85°C LTC6603IUF ........................................–40°C TO 85°C Specified Temperature Range (Note 3) LTC6603CUF ...........................................0°C TO 70°C LTC6603IUF ........................................–40°C TO 85°C Storage Temperature Range................... –65°C to 150°C 24 23 22 21 20 19 V+IN 1 V+A 2 VOCM 3 RBIAS 4 CLKCNTL 5 LPF1(CS) 6 UF PACKAGE 24-LEAD (4mm × 4mm) PLASTIC QFN TJMAX = 150°C, θJA = 37°C/W, θJC = 4.3°C/W EXPOSED PAD (PIN 25) IS GND. MUST BE SOLDERED TO THE PCB. ORDER INFORMATION LEAD FREE FINISH LTC6603CUF#PBF LTC6603IUF#PBF TAPE AND REEL LTC6603CUF#TRPBF LTC6603IUF#TRPBF PART MARKING* 6603 6603 PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE 24-Lead (4mm × 4mm) Plastic QFN 0°C to 70°C 24-Lead (4mm × 4mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+A = V+D = V+IN = 3V, VICM = VOCM = 1.5V, Gain = 0dB, lowpass cutoff = 2.5MHz, internal clocking with RBIAS = 30.9k unless otherwise noted. PARAMETER Filter Gain Either Channel CONDITIONS External Clock = 80MHz, Filter Cutoff (fC)= 156.25kHz, VIN = 3.6VP-P, Pin 3 Open DC Gain, Gain Set = 0dB fIN = 62.5kHz (0.4 • fC), Relative to DC Gain fIN = 125kHz (0.8 • fC), Relative to DC Gain fIN = 156.25kHz (fC), Relative to DC Gain fIN = 234.375kHz (1.5 • fC), Relative to DC Gain External Clock = 80MHz, Filter Cutoff (fC)= 156.25kHz, VIN = 3.6VP-P, Pin 3 Open DC Gain, Gain Set = 0dB fIN = 62.5kHz (0.4 • fC) fIN = 125kHz (0.8 • fC) fIN = 156.25kHz (fC) MIN TYP MAX UNITS ELECTRICAL CHARACTERISTICS l l l l l l l l l 0.25 –0.5 0.4 –0.6 CAP 0.4 –0.3 0.6 –0.4 –32 ±0.03 ±0.03 ±0.03 ±0.03 0.55 –0.1 0.8 –0.2 –29.5 ±0.1 ±0.1 ±0.1 ±0.15 dB dB dB dB dB dB dB dB dB Matching of Filter Gain 6603f 2 LTC6603 ELECTRICAL CHARACTERISTICS PARAMETER Filter Phase Either Channel CONDITIONS External Clock = 80MHz, Filter Cutoff (fC)= 156.25kHz, VIN = 3.6VP-P, Pin 3 Open fIN = 62.5kHz (0.4 • fC) fIN = 125kHz (0.8 • fC) fIN = 156.25kHz (fC) External Clock = 80MHz, Filter Cutoff (fC)= 156.25kHz, VIN = 3.6VP-P, Pin 3 Open fIN = 62.5kHz (0.4 • fC) fIN = 125kHz (0.8 • fC) fIN = 156.25kHz (fC) External Clock = 80MHz, Filter Cutoff (fC)= 2.5MHz, VIN = 3.6VP-P, Pin 3 Open DC Gain, Gain Set = 0dB fIN = 1MHz (0.4 • fC), Relative to DC Gain fIN = 2MHz (0.8 • fC), Relative to DC Gain fIN = 2.5MHz (fC), Relative to DC Gain fIN = 4MHz (1.5 • fC), Relative to DC Gain External Clock = 80MHz, Filter Cutoff (fC)= 2.5MHz, VIN = 3.6VP-P, Pin 3 Open fIN = 2MHz (0.8 • fC) fIN = 2.5MHz (fC) External Clock = 80MHz, Filter Cutoff (fC)= 2.5MHz, VIN = 3.6VP-P, Pin 3 Open fIN = 1MHz (0.4 • fC) fIN = 2MHz (0.8 • fC) fIN = 2.5MHz (fC) External Clock = 80MHz, Filter Cutoff (fC)= 2.5MHz, VIN = 3.6VP-P, Pin 3 Open fIN = 1MHz (0.4 • fC) fIN = 2MHz (0.8 • fC) fIN = 2.5MHz (fC) l l l l l l l l l l l l l l l l l l l l l l l l l l l l l l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+A = V+D = V+IN = 3V, VICM = VOCM = 1.5V, Gain = 0dB, lowpass cutoff = 2.5MHz, internal clocking with RBIAS = 30.9k unless otherwise noted. MIN 158 –44 –152 TYP 161 –39 –146 ±0.2 ±0.4 ±0.5 0 –2 –0.7 –1.1 0.5 –0.8 0.4 0.1 –43 ±0.05 ±0.2 150 –45 –152 155 –39 –141 MAX 163 –36 –142 ±1.5 ±3 ±4 1.2 –0.1 1.5 1 –32.6 ±0.2 ±0.4 159 –28 –126 ±2.5 ±4 ±4 ±3 ±3 ±3.5 0 5.6 11.2 22.5 0.5 6 11.8 23.2 ±0.1 ±0.05 ±0.05 ±0.1 –124 –129 –135 –145 –53 –59 –65 –76 –75 1.6 5 1.2 6.6 12.5 24 ±0.2 ±0.1 ±0.15 ±0.2 UNITS deg deg deg deg deg deg dB dB dB dB dB dB dB deg deg deg deg deg deg % % % dB dB dB dB dB dB dB dB dBm/Hz dBm/Hz dBm/Hz dBm/Hz dBm dBm dBm dBm dB kΩ kΩ 6603f Matching of Filter Phase Filter Gain Either Channel Matching of Filter Gain Filter Phase Either Channel Matching of Filter Phase Filter Cutoff Accuracy CLKCNTL = 3V (Note 4) when Self Clocked RBIAS = 200k RBIAS = 54.9k RBIAS = 30.9k DC Gain Filter Cutoff (fC) = 2.5MHz, 0.6V to 2.4V Each Output, Pin 3 Open Gain Setting = 0dB Gain Setting = 6dB Gain Setting = 12dB Gain Setting = 24dB Filter Cutoff (fC) = 2.5MHz, 0.6V to 2.4V Each Output, Pin 3 Open Gain Setting = 0dB Gain Setting = 6dB Gain Setting = 12dB Gain Setting = 24dB Voltage Noise Referred to the Input Gain = 0dB Gain = 6dB Gain = 12dB Gain = 24dB Noise Bandwidth = 5MHz, Referred to the Input Gain = 0dB Gain = 6dB Gain = 12dB Gain = 24dB VIN = 2VP-P, fIN = 200kHz, Gain Setting = 24dB Gain = 24dB, RBIAS = 30.9k, Filter Cutoff (fC) = 2.5MHz Differential Common Mode DC Gain Matching Noise At 200kHz Integrated Noise THD Input Impedance 3 LTC6603 ELECTRICAL CHARACTERISTICS PARAMETER VOS Differential CONDITIONS Input Referred Differential Offset Voltage at Either Output Lowest Cutoff Frequency, Gain Setting = 24dB Highest Cutoff Frequency, Gain Setting = 24dB Lowest Cutoff Frequency, Gain Setting = 0dB Highest Cutoff Frequency, Gain Setting = 0dB fC = 625kHz Common Mode Input from 0 to 3V, V+IN = 3V Common Mode Input from 0 to 5V, V+IN = 5V V+A = V+D = 3V, Pin 3 Open V+A = V+D = 3V, Pin 3 Open Common Mode Offset Voltage, VOCM = 1.5V, Supplies = 3V VOSCM = VOUT-CM – VOCM Source 1mA, Relative to V+A Sink 1mA, Relative to GND Sourcing Sinking Internal Clock (RBIAS = 30.9k); Sum of the Currents into V+D, V+A, and V+IN All Supplies Set to 3V fC = 156.25kHz fC = 625kHz fC = 2.5MHz Sum of the Currents into V+D, V+A, and V+IN; All Supplies Set to 3V Shutdown Via Serial Interface V+D, V+A Relative to GND V+IN Relative to GND V+D = V+A = V+IN, All from 2.7V to 3.6V V+D = V+A = 3V, V+IN from 4.5V to 5.5V l l l l l l l l l l l l l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+A = V+D = V+IN = 3V, VICM = VOCM = 1.5V, Gain = 0dB, lowpass cutoff = 2.5MHz, internal clocking with RBIAS = 30.9k unless otherwise noted. MIN TYP MAX ±8 ±14 ±40 ±60 60 60 1.3 2.5 90 90 1.45 3.4 100 200 150 7 11 25 30 1.5 4.5 185 500 400 UNITS mV mV mV mV dB dB V kΩ mV mV mV mA mA CMRR Differential VOCM Pin Voltage VOCM Pin Input Impedance VOSCM Output Swing Short-Circuit Current Supply Current l l l l l l l l l l 88 121 162 170 2.7 2.7 40 65 30.9 54.9 1.17 40 50 85 96 130 175 235 3.6 5.5 mA mA mA μA V V dB dB Supply Current, Shutdown Mode Supply Voltage PSRR RBIAS Resistor Range CLKCNTL = 3V Clock Frequency Error < ±3.5% Clock Frequency Error < ±3% RBIAS Pin Voltage 30.9k < RBIAS < 200k Clock Frequency Drift RBIAS = 30.9k CLKCNTL Pin Open Over Temperature Clock Frequency Drift V+A, V+D from 2.7V to 3.6V, RBIAS = 30.9k CLKCNTL Pin Open Over Supply Output Clock Duty Cycle RBIAS = 30.9k 54.9 200 kΩ kΩ V ppm/ºC l l l l 0.2 45 V+D – 0.3 50 0.5 55 %/V % V CLKIO Pin High Level CLKCNTL = 0V (Note 5) Input Voltage CLKIO Pin Low Level Input Voltage CLKIO Pin Input Current CLKCNTL = 0V (Note 5) CLKCNTL = 0V CLKIO = 0V (Note 6) CLKIO = V+D 0.3 V l l –1 10 2.95 2.9 μA μA V V CLKIO Pin High Level V+A = V+D = 3V, CLKCNTL = 3V Output Voltage IOH = –1mA IOH = –4mA 6603f 4 LTC6603 ELECTRICAL CHARACTERISTICS PARAMETER CLKIO Pin Low Level Output Voltage CLKIO Pin Rise Time CLKIO Pin Fall Time SER High Level Input Voltage SER Low Level Input Voltage SER Input Current CLKCNTL High Level Input Voltage CLKCNTL Low Level Input Voltage CLKCNTL Input Current CONDITIONS V+A = V+D = 3V, CLKCNTL = 3V IOL = 1mA IOL = 4mA V+A = V+D = CLKCNTL = 3V, CLOAD = 5pF V+A = V+D = CLKCNTL = 3V, CLOAD = 5pF Pin 17 Pin 17 Pin 17 = 0V (Note 6) Pin 17 = V+D Pin 5 Pin 5 CLKCNTL = 0V (Note 6) CLKCNTL = V+D l l l l l l l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V+A = V+D = V+IN = 3V, VICM = VOCM = 1.5V, Gain = 0dB, lowpass cutoff = 2.5MHz, internal clocking with RBIAS = 30.9k unless otherwise noted. MIN TYP 0.05 0.1 0.3 0.3 V+D – 0.3 0.3 –10 2 V+D – 0.5 0.5 –25 –15 15 MAX UNITS V V ns ns V V μA μA V V μA μA 25 Pin Programmable Control Mode Specifications. Specifications apply to pins 6, 9, 21 and 22 in pin programmable control mode. SYMBOL V+D = 2.7V to 3.6V VIH VIL IIN Digital Input High Voltage Digital Input Low Voltage Digital Input Current Pins 6, 9, 21, 22 Pins 6, 9, 21, 22 Pins 6, 9, 21, 22 (Note 6) l l l PARAMETER CONDITIONS MIN 2 TYP MAX UNITS V 0.8 –1 1 V μA Serial Port DC and Timing Specifications. Specifications apply to pins 6, 9-11, and 21 in serial programming mode. SYMBOL V+D = 2.7V to 3.6V VIH VIL IIN VOH VOL t1 (Note 5) t2 (Note 5) t3 t4 t5 t6 (Note 5) t7 (Note 5) t8 t9 (Note 5) Digital Input High Voltage Digital Input Low Voltage Digital Input Current Digital Output High Voltage Digital Output Low Voltage SDI Valid to SCLK Setup SDI Valid to SCLK Hold SCLK Low SCLK High CS Pulse Width LSB SCLK to CS CS Low to SCLK SDO Output Delay SCLK Low to CS Low CL = 15pF Pins 6, 9, 10 Pins 6, 9, 10 Pins 6, 9, 10 (Note 6) Pins 11, 21 Sourcing 500μA Pins 11, 21 Sinking 500μA l l l l l l l l l l l l l l PARAMETER CONDITIONS MIN 2 TYP MAX UNITS V 0.8 –1 VSUPPLY – 0.3 0.3 60 0 100 100 60 60 30 125 0 1 V μA V V ns ns ns ns ns ns ns ns ns 6603f 5 LTC6603 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: LTC6603C and LTC6603I are guaranteed functional over the operating temperature range of –40°C to 85°C. Note 3: LTC6603C is guaranteed to meet specified performance from 0°C to 70°C. The LTC6603C is designed, characterized and expected to meet specified performance from –40°C to 85°C but is not tested or QA sampled at these temperatures. The LTC6603I is guaranteed to meet the specified performance limits from –40°C to 85°C. Note 4: This test measures the internal oscillator accuracy (deviation from the fCLK equation). Variations in the internal oscillator cause variations in the filter cutoff frequency. See the “Applications Information” section. Note 5: Guaranteed by design, not subject to test. Note 6: To conform to the logic IC standard, current out of a pin is arbitrarily given a negative value. TYPICAL PERFORMANCE CHARACTERISTICS DC Gain Matching 70 70 VS = 3V, BW = 2.5MHz GAIN SETTING = 0dB, TA = 25°C 60 1000 UNITS 50 UNITS (%) UNITS (%) 40 30 20 10 0 –0.2 –0.15 –0.1 –0.05 0 0.05 0.1 0.15 0.2 MISMATCH (dB) 6603 G01 DC Gain Matching VS = 3V, BW = 156.25kHz GAIN SETTING = 0dB, TA = 25°C 60 1000 UNITS 50 40 30 20 10 0 –0.06 –0.04 –0.02 0 0.02 0.04 0.06 0.08 0.1 MISMATCH (dB) 6603 G02 Phase Matching 30 25 20 UNITS (%) 15 10 5 0 –2.5 –2–1.5–1–0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 MISMATCH (DEG) 6603 G03 VS = 3V, BW = 2.5MHz f = 2MHz, TA = 25°C 1000 UNITS Phase Matching 60 50 40 UNITS (%) GAIN (dB) 35 30 20 10 0 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 MISMATCH (DEG) VS = 3V, BW = 156.25kHz f = 125kHz, TA = 25°C 1000 UNITS 30 20 10 0 –10 –20 –30 –40 –50 Gain and Group Delay vs Frequency 800 GAIN = 24dB 760 720 GAIN = 0dB GAIN = 12dB GAIN = 6dB GROUP DELAY 680 640 600 560 520 480 440 400 10M 6603 G05 GROUP DELAY (ns) 1.5 2 2.5 RBIAS = 30.9k, VS = 3V –60 LPF1 = 1, BW = 2.5MHz TA = 25°C –70 10k 100k 1M FREQUENCY (Hz) 6603 G04 6603f 6 LTC6603 TYPICAL PERFORMANCE CHARACTERISTICS Gain and Group Delay vs Frequency 30 20 10 0 GAIN (dB) –10 –20 –30 GROUP DELAY –40 RBIAS = 30.9k, VS = 3V –50 LPF1 = 0, LPF0 = 1, –60 BW = 625kHz TA = 25°C –70 10k 100k 1M FREQUENCY (Hz) GAIN = 0dB GAIN = 24dB GAIN = 12dB GAIN = 6dB 3.5 3.3 3.1 2.9 2.7 2.5 2.3 2.1 1.9 1.7 1.5 10M 6603 G06 Gain and Group Delay vs Frequency 30 20 10 0 GAIN (dB) –10 –20 –30 –40 RBIAS = 30.9k, VS = 3V –50 LPF1 = LPF0 = 0, –60 BW = 156.25kHz TA = 25°C –70 1k 10k 100k FREQUENCY (Hz) GROUP DELAY (ns) GAIN = 12dB GAIN = 6dB GAIN = 0dB GROUP DELAY GAIN = 24dB 12.0 11.5 11.0 DISTORTION (dBc) 10.5 10.0 9.5 9.0 8.5 8.0 7.5 7.0 1M 6603 G07 Distortion vs Input Frequency –50 RBIAS = 30.9k, VS = 3V LPF1 = 1, BW = 2.5MHz VOUT = 2VP-P, TA = 25°C –60 HD3, GAIN = 24dB HD3, GAIN = 0dB –70 HD2, GAIN = 0dB –80 HD2, GAIN = 24dB GROUP DELAY (μs) –90 100 500 900 1300 1700 INPUT FREQUENCY (kHz) 6603 G08 Distortion vs Input Frequency –60 –65 DISTORTION (dBc) –70 –75 –80 –85 –90 100 RBIAS = 54.9k, VS = 3V LPF1 = 1, BW = 1.41MHz TA = 25°C DISTORTION (dBc) HD3, GAIN = 0dB –60 Distortion vs Input Frequency –70 RBIAS = 30.9k, VS = 3V LPF1 = 0, LPF0 = 1, BW = 625kHz –65 VOUT = 2VP-P, TA = 25°C HD3, GAIN = 0dB DISTORTION (dBc) –70 –75 –80 –85 –90 HD2, GAIN = 24dB HD2, GAIN = 0dB 20 120 220 420 320 INPUT FREQUENCY (kHz) 520 6603 G10 Distortion vs Input Frequency HD3, GAIN = 0dB –75 –80 HD2, GAIN = 24dB –85 HD2, GAIN = 0dB –90 HD3, GAIN = 24dB HD3, GAIN = 24dB HD2, GAIN = 0dB HD2, GAIN = 24dB HD3, GAIN = 24dB 300 700 500 900 INPUT FREQUENCY (kHz) 1100 6603 G09 –95 RBIAS = 30.9k, VS = 3V LPF1 = LPF0 = 0, BW = 156.25kHz VOUT = 2VP-P, TA = 25°C –100 50 90 110 130 10 30 70 INPUT FREQUENCY (kHz) 150 6603 G11 Distortion vs Output Voltage FILTER CUTOFF FREQUENCY DEVIATION (%) –60 RBIAS = 30.9k, VS = 3V, LPF1 = 0, LPF0 = 1, BW = 2.5MHz, GAIN = 24dB, TA = 25°C HD3, f = 1MHz 0.2 0.1 0.0 –0.1 –0.2 –0.3 –0.4 –0.5 –0.6 –0.7 Filter Cutoff Accuracy vs Supply Voltage FILTER CUTOFF FREQUENCY DEVIATION (%) LPF1 = LPF0 = 0, BW = 156.25kHz 1.0 Filter Cutoff Accuracy vs Temperature VS = 3V 0.8 RBIAS = 30.9k 0.6 0.4 0.2 0.0 –0.2 –0.4 –0.6 –0.8 –50 –30 BW = 2.5MHz BW = 156.25kHz BW = 625kHz –70 DISTORTION (dBc) LPF1 = 0, LPF0 = 1, BW = 625kHz HD2, f = 1MHz –80 LPF1 = 1, BW = 2.5MHz –90 HD3, f = 200kHz HD2, f = 200kHz –100 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 OUTPUT VOLTAGE (VP-P) 6603 G11 –0.8 RBIAS = 30.9k TA = 25°C –0.9 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V) 6603 G13 –10 10 30 50 TEMPERATURE (°C) 70 90 6603 G14 6603f 7 LTC6603 TYPICAL PERFORMANCE CHARACTERISTICS Common Mode Rejection Ratio 100 90 80 CMRR (dB) CMRR (dB) 70 60 50 40 VS = 3V, RBIAS = 30.9k 30 LPF1 = 1, BW = 2.5MHz TA = 25°C 20 10k 100k 1M FREQUENCY (Hz) GAIN = 12dB GAIN = 24dB GAIN = 0dB GAIN = 6dB 110 100 90 80 GAIN = 6dB 70 60 50 40 30 10M 6603 G15 Common Mode Rejection Ratio VS = 3V, RBIAS = 30.9k LPF1 = 0, LPF0 = 1, BW = 625kHz, TA = 25°C GAIN = 24dB GAIN = 0dB GAIN = 12dB CMRR (dB) 120 110 100 90 80 70 60 50 Common Mode Rejection Ratio GAIN = 24dB GAIN = 12dB GAIN = 0dB GAIN = 6dB 20 10k 100k 1M FREQUENCY (Hz) 10M 6603 G16 VS = 3V, RBIAS = 30.9k 40 LPF1 = LPF0 = 0, BW = 156.25kHz, TA = 25°C 30 1k 10k 100k FREQUENCY (Hz) 1M 6603 G17 Common Mode Rejection 100 COMMON MODE REJECTION (dB) 90 80 GAIN = 6dB 70 GAIN = 12dB 60 GAIN = 24dB 50 40 VS = 3V, RBIAS = 30.9k LPF1 = 1, BW = 2.5MHz, TA = 25°C 30 10k 100k 1M FREQUENCY (Hz) CMR = ΔVIN-CM/ΔVOUT-DIFF COMMON MODE REJECTION (dB) GAIN = 0dB 110 100 90 80 70 60 Common Mode Rejection 100 COMMON MODE REJECTION (dB) VS = 3V, RBIAS = 30.9k LPF1 = 0, LPF1 = 1, BW = 625kHz, TA = 25°C GAIN = 0dB GAIN = 6dB Common Mode Rejection GAIN = 12dB 90 80 GAIN = 24dB GAIN = 0dB 70 GAIN = 6dB CMR = ΔVIN-CM/ΔVOUT-DIFF VS = 3V, RBIAS = 30.9k LPF1 = LPF0 = 0, BW = 156.25kHz, TA = 25°C 1k 10k 100k FREQUENCY (Hz) 1M 6603 G20 GAIN = 12dB GAIN = 24dB 60 10M 6603 G18 CMR = ΔVIN-CM/ΔVOUT-DIFF 50 10k 100k 1M FREQUENCY (Hz) 50 10M 6603 G19 OIP3 vs Average Signal Frequency 41 GAIN = 6dB 40 GAIN = 12dB 39 OIP3 (dBm) OIP3 (dBm) 38 37 36 GAIN = 0dB 42 GAIN = 24dB 44 46 OIP3 vs Average Signal Frequency 43 GAIN = 12dB 42 GAIN = 0dB 41 GAIN = 6dB GAIN = 24dB OIP3 (dBm) 40 39 38 37 36 35 OIP3 vs Average Signal Frequency GAIN = 0dB GAIN = 12dB GAIN = 6dB GAIN = 24dB 40 VS = 3V, RBIAS = 30.9k, TA = 25°C 35 LPF1 = 0, LPF0 = 1, BW = 625kHz VOUT = 6dBm PER TONE FOR 2-TONE TEST Δf = 10kHz 34 100 500 900 1300 1700 2100 2500 AVERAGE FREQUENCY OF TWO TONES (kHz) 6603 G21 38 VS = 3V, RBIAS = 30.9k, TA = 25°C LPF1 = 0, LPF0 = 1, BW = 625kHz VOUT = 6dBm PER TONE FOR 2-TONE TEST Δf = 10kHz 36 0 100 200 300 400 500 600 AVERAGE FREQUENCY OF TWO TONES (kHz) 6603 G22 VS = 3V, RBIAS = 30.9k, TA = 25°C LPF1 = 0, LPF0 = 1, BW = 156.25kHz VOUT = 6dBm PER TONE FOR 2-TONE TEST Δf = 10kHz 20 40 60 80 100 120 140 160 AVERAGE FREQUENCY OF TWO TONES (kHz) 6603 G23 6603f 8 LTC6603 TYPICAL PERFORMANCE CHARACTERISTICS OIP3 vs Temperature 42 41 40 OIP3 (dBm) 39 BW = 625kHz, FREQUENCY = 200kHz 38 BW = 156.25kHz, FREQUENCY = 60kHz 37 36 BW = 2.5MHz, FREQUENCY = 1MHz 0.001 –30 –10 10 30 50 TEMPERATURE (°C) 70 90 6603 G23 Output Impedance vs Frequency 10 VS = 3V, RBIAS = 30.9k, TA = 25°C LPF1 = 0, LPF0 = 1, BW = 625kHz LPF1 = LPF0 = 0, BW = 156.25kHz 0.1 200 180 SUPPLY CURRENT (mA) 160 140 Supply Current vs Supply Voltage TA = 25°C RBIAS = 30.9k BW = 2.5MHz OUTPUT IMPEDANCE (Ω) VS = 3V, RBIAS = 30.9k PASSBAND GAIN = 24dB VOUT = 6dBm PER TONE FOR 2-TONE TEST Δf = 10kHz 1 BW = 625kHz 120 100 80 60 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 SUPPLY VOLTAGE (V) 6603 G26 0.01 LPF1 = 1, BW = 2.5MHz BW = 156.25kHz 35 –50 1k 10k 100k 1M FREQUENCY (Hz) 10M 6603 G25 Supply Current vs Temperature 180 160 SUPPLY CURRENT (mA) 140 VOLTAGE (V) 120 100 80 60 –50 BW = 156.25kHz TA = 25°C RBIAS = 30.9k BW = 2.5MHz 5 4 3 2 1 0 –1 Clock Output Operating at 80MHz RBIAS = 30.9k, VS = 3V TA = 25°C RBIAS PIN VOLTAGE (V) 1.25 RBIAS Pin Voltage vs IRBIAS TA = 25°C VS = 3V 1.20 BW = 625kHz 1.15 –30 –10 10 30 50 TEMPERATURE (°C) 70 90 –2 –14 –12 –10 1.10 –8 –6 –4 TIME (ns) –2 0 2 0 5 10 15 IRBIAS (μA) 20 25 6603 G29 6603 G27 6603 G28 Input Referred Noise Density 1000 VOLTAGE NOISE DENSITY (nV/√Hz) GAIN = 0dB GAIN = 6dB GAIN = 12dB 10 GAIN = 24dB VOLTAGE NOISE DENSITY (nV/√Hz) 1000 Input Referred Noise Density 1000 VOLTAGE NOISE DENSITY (nV/√Hz) Input Referred Noise Density GAIN = 0dB GAIN = 6dB 100 GAIN = 12dB GAIN = 24dB 100 GAIN = 0dB 100 GAIN = 6dB GAIN = 12dB GAIN = 24dB 10 VS = 3V, RBIAS = 30.9k LPF1 = 0, LPF0 = 1, BW = 625kHz TA = 25°C 100k 1M FREQUENCY (Hz) 10M 6603 G31 10 VS = 3V, RBIAS = 30.9k LPF1 = 0, LPF0 = 0, BW = 156.25kHz TA = 25°C 1k 10k 100k FREQUENCY (Hz) 1M 6603 G32 1 VS = 3V, RBIAS = 30.9k LPF1 = 1, BW = 2.5MHz TA = 25°C 100k 1M FREQUENCY (Hz) 10M 6603 G30 0.1 10k 1 10k 1 6603f 9 LTC6603 TYPICAL PERFORMANCE CHARACTERISTICS Integral Input Referred Noise 1000 VS = 3V, RBIAS = 30.9k LPF1 = 1,BW = 2.5MHz TA = 25°C VOLTAGE NOISE (μV) GAIN = 6dB GAIN = 0dB 1000 Integral Input Referred Noise VS = 3V, RBIAS = 30.9k LPF1 = 0, LPF0 = 1, BW = 625kHz TA = 25°C GAIN = 0dB VOLTAGE NOISE (μV) GAIN = 6dB GAIN = 12dB 1000 Integral Input Referred Noise VS = 3V, RBIAS = 30.9k LPF1 = LPF0 = 0, BW = 156.25kHz TA = 25°C GAIN = 0dB GAIN = 6dB GAIN = 12dB GAIN = 24dB 10 VOLTAGE NOISE (μV) 100 100 100 GAIN = 24dB 10 10 GAIN = 12dB GAIN = 24dB 1 10k 100k 1M INTEGRATION BW (Hz) 10M 6603 G33 1 10k 100k 1M INTEGRATION BW (Hz) 10M 6603 G34 1 10k 100k INTEGRATION BW (Hz) 1M 6603 G35 PIN FUNCTIONS V+IN (Pin 1): Input Voltage Supply (2.7V ≤ V ≤ 5.5V). This supply must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1μF capacitor unless it is tied to V+A (Pin 2). The bypass should be as close as possible to the IC, but is not as critical as the bypassing of V+A and V+D (Pin16). V+A (Pin 2): Analog Voltage Supply (2.7V ≤ V ≤ 3.6V). This supply must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1μF capacitor. The bypass should be as close as possible to the IC. VOCM (Pin 3): Output common mode voltage reference. If floated, an internal resistive divider sets the voltage on this pin to half the supply voltage (typically 1.5V), maximizing the dynamic range of the filter. If this pin is floated, it must be bypassed with a quality 1μF capacitor to ground. This pin has a typical input impedance of 3.4k and may be overdriven. Driving this pin to a voltage other than the default value will reduce the signal range the filter can handle before clipping. RBIAS (Pin 4): Oscillator Frequency-Setting Resistor Input. The value of the resistor connected between this pin and ground determines the frequency of the master oscillator, and sets the bias currents for the filter networks. The voltage on this pin is held by the LTC6603 to approximately 1.17V. For best performance, use a precision metal film resistor with a value between 30.9k and 200k and limit the capacitance on this pin to less than 10pF This resistor is . necessary even if an external clock is used. CLKCNTL (Pin 5): Clock Control Input. This three-state input selects the function of CLKIO (Pin 15). Tying the CLKCNTL pin to ground allows the CLKIO pin to be driven by an external clock (CLKIO is the master clock input). If the CLKCNTL pin is floated, the internal oscillator is enabled, but the master clock is not present at the CLKIO pin (CLKIO is a no-connect). If the CLKCNTL pin is tied to V+D (Pin 16), the internal oscillator is enabled and the master clock is present at the CLKIO pin (CLKIO is the master clock output). To detect a floating CLKCNTL pin, the LTC6603 attempts to pull the pin toward mid-supply. This is realized with two internal 15μA current sources, one tied to V+D and CLKCNTL and the other one tied to ground and CLKCNTL. Therefore, driving the CLKCNTL pin high requires sourcing approximately 15μA. Likewise, driving the CLKCNTL pin low requires sinking 15μA. When the CLKCNTL pin is floated, it should be bypassed by a 1nF capacitor to ground or be surrounded by a ground shield to prevent excessive coupling from other PCB traces. 6603f 10 LTC6603 PIN FUNCTIONS LPF1(CS) (Pin 6): TTL Level Input. When in pin programmable control mode, this pin is the MSB of the lowpass cutoff frequency control code; in serial control mode, this pin is the chip select input (active low). +INB, –INB (Pins 7, 8): Channel B differential inputs. The input range and input resistance are described in the Applications Information section. Input voltages which exceed V+IN (Pin 1) should be avoided. LPF0(SCLK) (Pin 9): TTL Level Input. When in pin programmable control mode, this pin is the LSB of the lowpass cutoff frequency control code; in serial control mode, this pin is the clock of the serial interface. SDI (Pin 10): TTL Level Input. When in pin programmable control mode, this pin is left floating; in serial control mode, this pin is the serial data input. SDO (Pin 11): TTL Level Input. When in pin programmable control mode, this pin is left floating; in serial control mode, this pin is the serial data output. –OUTB, +OUTB (Pins 12, 13): Channel B differential filter outputs. These pins can drive 1k and/or 50pF loads. For larger capacitive loads, an external 100Ω series resistor is recommended for each output. The common mode voltage of the filter outputs is the same as the voltage at VOCM (Pin 3). GND (Pin 14): Ground. Should be tied to a ground plane for best performance. CLKIO (Pin 15): When CLKCNTL (Pin 5) is tied to ground, CLKIO is the master clock input. When CLKCNTL is floated, CLKIO is pulled to ground by a weak pulldown. When CLKCNTL is tied to V+D (Pin 16), CLKIO is the master clock output. When configured as a clock output, this pin can drive 1k and/or 5pF loads (heavier loads will cause inaccuracies). V+D (Pin 16): Digital Voltage Supply (2.7V ≤ V ≤ 3.6V). This supply must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1μF capacitor. The bypass should be as close as possible to the IC. SER (Pin 17): Interface Selection Input. When tied to V+D (Pin 16) or floated, the interface is in pin programmable control mode, i.e. the filter gain and cutoff frequencies are programmed by the GAIN1, GAIN0, LPF1 and LPF0 pins. When SER is tied to ground, the filter gain, the filter cutoff frequency and shutdown mode are programmed by the serial interface. –OUTA, +OUTA (Pins 18, 19): Channel A differential filter outputs. These pins can drive 1k and/or 50pF loads. For larger capacitive loads, an external 100Ω series resistor is recommended for each output. The common mode voltage of the filter outputs is the same as the voltage at VOCM (Pin 3). CAP (Pin 20): Connect a 0.1μF bypass capacitor to this pin. Pin 20 is a buffered version of Pin 3. GAIN0(D0) (Pin 21): TTL Level Input. When in pin programmable control mode, this pin is the LSB of the gain control code; in serial control mode, this pin is the LSB of the serial control register, an output. GAIN1 (Pin 22): TTL Level Input. When in pin programmable control mode, this pin is the MSB of the gain control code; in serial control mode, this pin is a no-connect. –INA, +INA (Pins 23, 24): Channel A differential inputs. The input range and input resistance are described in the Applications Information section. Input voltages which exceed V+IN (Pin 1) should be avoided. Exposed Pad (Pin 25): Ground. The Exposed Pad must be soldered to PCB. 6603f 11 LTC6603 BLOCK DIAGRAM +INA 24 –INA 23 GAIN1 22 GAIN0(D0) 21 CAP 20 +OUTA 19 V+IN 1 CHANNEL A 18 –OUTA GAIN V+A 2 CONTROL V+A BIAS LPF 17 SER CLK VOCM 3 TO PIN 20 16 V+D GND RBIAS 4 BIAS/OSC CONTROL LOGIC CLOCK GENERATOR 15 CLKIO BIAS CLKCNTL 5 CONTROL CLK 14 GND GAIN LPF LPF1(CS) 6 CHANNEL B 13 +OUTB 7 +INB 8 –INB 9 LPF0(SCLK) 10 SDI 11 SDO 12 –OUTB 6603 BD TIMING DIAGRAM t1 t2 SCLK Timing Diagram of the Serial Interface t4 t3 t6 t7 t9 SDI D3 D2 D1 D0 D7 • • • • D4 D3 t5 CS t8 D4 PREVIOUS BYTE D3 D2 D1 D0 D7 • • • • D4 CURRENT BYTE D3 6603 TD SDO 6603f 12 LTC6603 APPLICATIONS INFORMATION Theory of Operation (Refer to Block Diagram) The LTC6603 features two matched filter channels, each containing gain control and lowpass filter networks that are controlled by a single control block and clocked by a single clock generator. The gain and cutoff frequency can be separately programmed. The two channels are not independent, i.e. if the gain is set to 24dB then both channels have a gain of 24dB. The filter can be clocked with an external clock source, or using the internal oscillator. A resistor connected to the RBIAS pin sets the bias currents for the filter networks and the internal oscillator frequency (unless driven by an external clock). Altering the clock frequency changes the filter bandwidth. This allows the filters to be “tuned” to many different bandwidths. Pin Programmable Interface As shown in Figure 1, connecting SER to V+D allows the filter to be directly controlled through the pin programmable control lines GAIN1, GAIN0, LPF1 and LPF0. The GAIN0(D0) pin is bidirectional (input in pin programmable control mode, output in serial mode). In pin programmable control mode, the voltage at GAIN0(D0) cannot exceed V+D; otherwise, large currents can be injected to V+D through the parasitic diodes (see Figure 2). Connecting a 10k resistor at the GAIN0(D0) pin (see Figure 1) is recommended for current limiting, to less than 10mA. SER has an internal 3.3V LTC6603 V+IN V+A V+D pull-up to V+D. None of the logic inputs have an internal pull-up or pull-down. Serial Interface Connecting SER to ground allows the filter to be controlled through the SPI serial interface. When CS is low, the serial data on SDI is shifted into an 8-bit shift-register on the rising edge of the clock (SCLK), with the MSB transferred first (see Figure 3). Serial data on SDO is shifted out on the clock’s falling edge. A high CS will load the 8 bits of the shift-register into an 8-bit D-latch, which is the serial control register. The clock is disabled internally when CS is pulled high. Note: SCLK must be low before CS is pulled low to avoid an extra internal clock pulse. SDO is always active in serial mode (never tri-stated) and cannot be “wire-or’ed” to other SPI outputs. In addition, SDO is not forced to zero when CS is pulled high. An LTC6603 may be daisy chained with other LTC6603s or other devices having serial interfaces. Daisy chaining is accomplished by connecting the SDO of the lead chip to the SDI of the next chip, while SCLK and CS remain common to all chips in the daisy chain. The serial data is clocked to all the chips then the CS signal is pulled high to update all of them simultaneously. Figure 4 shows an example of two LTC6603s in a daisy chained SPI configuration. 3.3V LTC6603 V+IN V+A V+D 0.1μF 0.1μF + – VIN +INA –INA SER LPF1(CS) LPF0(SCLK) +OUTA –OUTA + VOUT + – LPF1 LPF0 μP VIN +INA –INA SER LPF1(CS) LPF0(SCLK) +OUTA –OUTA + VOUT – – GAIN1 GAIN0(D0) GND GAIN1 GAIN0 10k GAIN1 GAIN0(D0) GND LOWPASS CUTOFF = 2.5MHz (fCLK = 80MHz) GAIN = 4 GAIN, BANDWIDTHS ARE SET BY MICROPROCESSOR. 10k RESISTORS ON GAIN0(OUT) PROTECTS THE DEVICE WHEN VGAIN0 > V+D 6603 F01 Figure 1. Filter in Pin Programmable Control Mode 6603f 13 LTC6603 APPLICATIONS INFORMATION SHUTDOWN V+D OUT NO 4-BIT GAIN, BW FUNCTION CONTROL CODE CS 8-BIT LATCH GAIN0(D0) SDI Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 8-BIT SHIFT-REGISTER (INTERNAL NODE) 6603 F02 SCLK SDO 6603 F03 Figure 2. Bidirectional Design of GAIN0(OUT) Pin Figure 3. Diagram of Serial Interface (MSB First Out) 3.3V LTC6603 #1 3.3V LTC6603 #2 0.1μF V+IN V+A V+D 0.1μF V+IN V+A V+D + VIN1 +INA –INA SER +OUTA –OUTA + – VOUT1 + VIN2 +INA –INA SER LPF1(CS) +OUTA –OUTA + – VOUT2 – – CSX μP SCLK SDI LPF1(CS) LPF0(SCLK) SDI GND GAIN0(D0) SDO OUT1 LPF0(SCLK) SDI GND GAIN0(D0) SDO OUT2 SDO SCLK SDI D15 D11 D10 D9 D8 D7 D3 D2 D1 D0 GAIN, BW CONTROL WORD FOR #2 SHUTDOWN FOR #2 CS GAIN, BW CONTROL WORD FOR #1 SHUTDOWN FOR #1 6603 F04 Figure 4. Two Devices in a Daisy Chain Serial Control Register Definition D7 GAIN0 D6 GAIN1 D5 LPF0 D4 LPF1 D3 D2 D1 SHDN D0 OUT 6603f NO FUNCTION NO FUNCTION 14 LTC6603 APPLICATIONS INFORMATION GAIN1 and GAIN0 are the gain control bits (register bits D6 and D7 when in serial mode). Their function is shown in Table 1. In serial mode, register bit D1 can be set to “1” to put the device into a low power shutdown mode. Register bit D0 is a general purpose output (Pin 21) when in serial mode. Table 1. Gain Control GAIN 1 0 0 1 1 GAIN 0 0 1 0 1 PASSBAND GAIN (dB) 0 6 12 24 Self-Clocking Operation The LTC6603 features a unique internal oscillator which sets the filter cutoff frequency using a single external resistor connected to the RBIAS pin. The clock frequency is determined by the following simple formula (see Figure 5): fCLK = 247.2MHz • 10k/RBIAS Note: RBIAS ≤ 200k The design is optimized for V+A, V+D = 3V, fCLK = 45MHz, where the filter cutoff frequency error is typically