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LTC699I

LTC699I

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTC699I - Microprocessor Supervisory Circuit - Linear Technology

  • 数据手册
  • 价格&库存
LTC699I 数据手册
LTC699 Microprocessor Supervisory Circuit FEATURES s s s s s s s s DESCRIPTIO Guaranteed Reset Assertion at VCC = 1V 1.5mA Maximum Supply Current SO-8 Packaging 4.65V Precision Voltage Monitor Power OK/Reset Time Delay: 200ms Minimum External Component Count Performance Specified Over Temperature Superior Upgrade for MAX699 The LTC699 provides power supply monitoring for microprocessor-based systems. The features include microprocessor reset and watchdog timing. Precise internal voltage reference and comparator circuit monitor the power supply line. When an out-of-tolerance condition occurs, the RESET output is forced to active low. In addition, the RESET output is guaranteed to remain logic low even with VCC as low as 1V. An internal watchdog timer is also available, which forces the RESET output to active low when the watchdog input is not toggled prior to the time-out period of 1.6 seconds. The LTC699 is offered in DIP and surface mount packages. APPLICATI s s s s S Critical µP Power Monitoring Intelligent Instruments Computers and Controllers Automotive Systems TYPICAL APPLICATI +5V BLOCK DIAGRA VCC 500k VCC RESET LTC699 WDI GND µP POWER µP RESET + RESET PULSE GENERATOR µP SYSTEM I/O LINE 1.3V C1 – OSC 0.1µF 0.1µF WDI TRANSITION DETECTOR LTC699 TA1 MICROPROCESSOR RESET AND WATCHDOG TIMING IN A SINGLE CHIP FOR MICROPROCESSOR SYSTEMS. W U RESET GND WATCHDOG TIMER LTC699 BD UO UO 1 LTC699 ABSOLUTE (Notes 1 and 2) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW VCC VCC 1 2 LTC699 8 GND 7 RESET 6 WDI 5 NC Terminal Voltage VCC ................................................... –0.3V to 6.0V WDI Input .............................. – 0.3V to VCC + 0.3V RESET Output ...................................... – 0.3V to 6V Power Dissipation............................................. 500mW Operating Temperature Range LTC699C .............................................. 0°C to 70°C LTC699I ........................................... –40°C to 85°C Storage Temperature Range ................. –65°C to 150°C Lead Temperature (Soldering, 10 sec.)................ 300°C ORDER PART NUMBER LTC699CN8 LTC699IN8 GND 3 GND 4 N8 PACKAGE 8-LEAD PLASTIC DIP TOP VIEW VCC VCC GND GND 1 2 LTC699 3 4 6 5 8 7 GND RESET WDI NC LTC699CS8 LTC699IS8 S8 PACKAGE 8-LEAD PLASTIC SOIC ELECTRICAL CHARACTERISTICS VCC = +5V, TA = 25°C, unless otherwise noted. PARAMETER Operating Voltage Range Supply Current Power Down Reset Assertion Power Up Reset De-Assertion Reset Threshold Hysteresis Reset Active Time Watchdog Time-out Period q CONDITONS q q q q MIN 3.0 TYP 0.6 0.6 4.65 40 200 200 1.6 1.6 1 8 4 25 4.5 MAX 5.5 1.5 2.5 4.75 4.75 240 280 2.0 2.25 UNITS V mA V V mV ms sec ms/V ms/V ns mV V mA V µA q 160 140 1.2 1.0 Reset Active Time PSRR Watchdog Time-out Period PSRR Minimum WDI Input Pulse Width RESET output Voltage at VCC = 1V (Note 3) RESET output Voltage RESET Output Short Circuit Current WDI Input Threshold WDI Input Current VIL = 0.4, V VIH = 3.5V ISINK = 10µA, VCC = 1V ISINK = 1.6mA, VCC = 4.25V Output Sink Current Logic Low Logic High WDI = VOUT WDI = 0V q 200 200 0.4 0.8 2.0 q q –50 4 –8 50 The q denotes specifications which apply over the operating temperature range. Note 1: Absolute maximum ratings are those values beyond which the life of device may be impaired. Note 2: All voltage values are with respect to GND. Note 3: RESET is active low, open drain output. 2 U W U U WW W LTC699 PI FU CTIO S VCC: +5V supply input. The VCC pin should be bypassed with a 0.1µF capacitor. GND: Ground pin. RESET: Open drain output for µP reset control. When VCC falls below the reset voltage threshold (4.65V typically), RESET goes active low. After VCC returns to 5V, the reset pulse generator forces RESET to remain active low for a minimum of 140ms . When the watchdog timer is enabled but not serviced prior to the time-out period, the reset pulse generator also forces RESET to active low for a minimum of 140ms for every time-out period (see Figure 2). WDI: Watchdog Input, WDI, is a three level input. Driving WDI either high or low for longer than the watchdog timeout period forces RESET low. Floating WDI disables the Watchdog Timer. The timer resets itself with each transition of the Watchdog Input (see Figure 2). TYPICAL PERFOR A CE CHARACTERISTICS RESET Output Voltage vs Supply Voltage 5 TA = 25°C EXTERNAL PULLUP = 10µA RESET OUTPUT VOLTAGE (V) RESET ACTIVE TIME (ms) 4 3 224 216 208 200 192 184 –50 –25 RESET VOLTAGE THRESHOLD (V) 2 1 0 0 1 3 4 2 SUPPLY VOLTAGE (V) APPLICATI S I FOR ATIO Microprocessor Reset The LTC699 uses a bandgap voltage reference and a precision voltage comparator C1 to monitor the 5V supply input VCC (see BLOCK DIAGRAM). When VCC falls below the reset voltage threshold, the RESET output is forced to active low state. The reset voltage threshold accounts for a 5% variation on VCC, so the RESET output becomes active low when VCC falls below 4.65V typical. On powerup, the RESET signal is held active low for a minimum of 140ms after reset voltage threshold is reached to allow the power supply and microprocessor to stabilize. On power- Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights. U W UW U U UO U U Reset Active Time vs Temperature 232 VCC = 5V 4.65 4.64 4.63 4.62 4.61 4.66 Reset Voltage Threshold vs Temperature 5 LTC699 G01 0 50 75 25 TEMPERATURE (°C) 100 125 LTC699 G02 4.60 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 LTC699 G03 down, the RESET signal remains active low even with VCC as low as 1V. This capability helps hold the microprocessor in stable shutdown condition. Figure 1 shows the timing diagram of the RESET signal. The precision voltage comparator, C1, typically has 40mV of hysteresis which ensures that glitches at VCC pin do not activate the RESET output. Response time is typically 10µs. To help prevent mistriggering due to transient loads, VCC pin should be bypassed with a 0.1µF capacitor with the leads trimmed as short as possible. 3 LTC699 APPLICATI S I FOR ATIO V2 VCC RESET t1 Figure 1. Reset Active Time Watchdog Timer The LTC699 provides a watchdog timer function to monitor the activity of the microprocessor. If the microprocessor does not toggle the Watchdog Input (WDI) within the time-out period, RESET is forced to active low for a minimum of 140ms. The watchdog time-out period is fixed at a 1.0 second minimum on the LTC699, which is adequate time for most systems to service the watchdog timer immediately after a reset. Figure 2 shows the timing diagram of watchdog time-out period and reset active time. The watchdog time-out period is restarted as soon VCC = 5V WDI t2 RESET t1 Figure 2. Watchdog Time-Out Period and Reset Active Time PACKAGE DESCRIPTIO N8 Package 8-Lead Plastic DIP Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic SOIC D D E B1 A Q1 8 7 6 C S e1 INCHES 0.130 ± 0.006 0.020 MIN 0.018 ± 0.003 0.045 – 0.065 0.009 – 0.015 0.400 MAX 0.300 – 0.320 MILLIMETERS 3.302 ± 0.127 0.508 MIN 0.457 ± 0.076 1.143 – 1.651 0.229 – 0.381 10.160 MAX 7.620 – 8.128 L A1 1 eA SYMBOL A A1 B B1 C D E B 2 3 MILLIMETERS SYMBOL INCHES 0.250 ± 0.010 6.350 ± 0.254 E1 0.325 + 0.025 8.255 + 0.635 eA –0.381 –0.015 0.100 ± 0.010 2.540 ± 0.254 e1 3.175 MIN L 0.125 MIN 1.651 TYP Q1 0.065 TYP S 0.045 ± 0.015 1.143 ± 0.381 TJMAX 110°C 4 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977 U V1 V2 V1 = RESET VOLTAGE THRESHOLD V2 = RESET VOLTAGE THRESHOLD + RESET THRESHOLD HYSTERESIS V1 t1 t1 = RESET ACTIVE TIME LTC699 F01 U W U UO as RESET is inactive. When either a high-to-low or low-tohigh transition occurs at the WDI pin prior to time-out, the watchdog time is reset and begins to time out again. To ensure the watchdog time does not time out, either a highto-low or low-to-high transition on the WDI pin must occur at or less than the minimum time-out period. If the input to the WDI pin remains either high or low, reset pulses will be issued every 1.6 seconds typically. The watchdog time can be deactivated by floating the WDI pin. The timer is also disabled when VCC falls below the reset voltage threshold. t2 t1 t1 = RESET ACTIVE TIME t2 = WATCHDOG TIME-OUT PERIOD t1 LTC699 F02 8 7 6 5 5 h × 45° C A B L SYMBOL A A1 B C D E e1 A1 H E E1 α 4 N8 1191 θJA 130°C/W INCHES 0.053 – 0.069 0.004 – 0.010 0.014 – 0.019 0.008 – 0.010 0.189 – 0.197 0.150 – 0.157 MILLIMETERS 1.346 – 1.753 0.102 – 0.254 0.356 – 0.483 0.203 – 0.254 4.801 – 5.004 3.810 – 3.988 SYMBOL e H h L α MILLIMETERS INCHES 1.270 TYP 0.050 TYP 0.228 – 0.244 5.791 – 6.198 0.010 – 0.020 0.254 – 0.508 0.016 – 0.050 0.406 – 1.270 0° – 8° TYP 1 2 3 4 S8 1191 TJMAX 110° C θJA 180°C/W CONDITIONS: PCB MOUNT ON FR4 MATERIAL, STILL AIR AT 25° C, COPPER TRACE LT/GP 0192 10K REV 0 © LINEAR TECHNOLOGY CORPORATION 1992
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