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LTM4600IVPBF

LTM4600IVPBF

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTM4600IVPBF - 10A High Effi ciency DC/DC μModule - Linear Technology

  • 数据手册
  • 价格&库存
LTM4600IVPBF 数据手册
LTM4600 10A High Efficiency DC/DC µModule FEATURES ■ ■ ■ ■ DESCRIPTIO ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Complete Switch Mode Power Supply Wide Input Voltage Range: 4.5V to 20V 10A DC, 14A Peak Output Current Parallel Two µModule™ DC/DC Converters for 20A Output Current 0.6V to 5V Output Voltage 1.5% Output Voltage Regulation Ultrafast Transient Response Current Mode Control Pb-Free (e4) RoHS Compliant Package with GoldPad Finish Up to 92% Efficiency Programmable Soft-Start Output Overvoltage Protection Optional Short-Circuit Shutdown Timer Small Footprint, Low Profile (15mm × 15mm × 2.8mm) Surface Mount LGA Package The LTM®4600 is a complete 10A, DC/DC step down power supply. Included in the package are the switching controller, power FETs, inductor, and all support components. Operating over an input voltage range of 4.5V to 20V, the LTM4600 supports an output voltage range of 0.6V to 5V, set by a single resistor. This high efficiency design delivers 10A continuous current (14A peak), needing no heat sinks or airflow to meet power specifications. Only bulk input and output capacitors are needed to finish the design. The low profile package (2.8mm) enables utilization of unused space on the bottom of PC boards for high density point of load regulation. High switching frequency and an adaptive on-time current mode architecture enables a very fast transient response to line and load changes without sacrificing stability. Fault protection features include integrated overvoltage and short circuit protection with a defeatable shutdown timer. A built-in soft-start timer is adjustable with a small capacitor. The LTM4600 is packaged in a thermally enhanced, compact (15mm × 15mm) and low profile (2.8mm) over-molded Land Grid Array (LGA) package suitable for automated assembly by standard surface mount equipment. The LTM4600 is Pb-free and RoHS compliant. APPLICATIO S ■ ■ ■ ■ Telecom and Networking Equipment Servers Industrial Equipment Point of Load Regulation , LTC, LT and LTM are registered trademarks of Linear Technology Corporation. µModule is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6100678, 6580258, 5847554, 6304066. TYPICAL APPLICATIO Efficiency vs Load Current with 12VIN (FCB = 0) 100 90 80 EFFICIENCY (%) 70 60 50 40 4600 TA01a 10A µModule Power Supply with 4.5V to 20V Input VIN 4.5V TO 20V VIN CIN VOUT LTM4600 VOSET PGND SGND COUT VOUT 1.5V 10A 66.5k 30 20 0 2 4 8 6 LOAD CURRENT (A) U 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT 10 12 4600 TA01b U U 4600fa 1 LTM4600 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO fADJ SVIN EXTVCC VOSET TOP VIEW FCB, EXTVCC, PGOOD, RUN/SS, VOUT .......... –0.3V to 6V VIN, SVIN, fADJ ............................................ –0.3V to 20V VOSET, COMP ............................................. –0.3V to 2.7V Operating Temperature Range (Note 2) ... –40°C to 85°C Junction Temperature ........................................... 125°C Storage Temperature Range................... –45°C to 125°C VIN COMP SGND RUN/SS FCB PGOOD PGND VOUT LGA PACKAGE 104-LEAD (15mm × 15mm × 2.8mm) TJMAX = 125°C, θJA = 15°C/W, θJC = 6°C/W, θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS WEIGHT = 1.7g ORDER PART NUMBER LTM4600EV#PBF LTM4600IV#PBF LGA PART MARKING LTM4600EV LTM4600IV Consult LTC Marketing for parts specified with wider operating temperature ranges. The ● denotes the specifications which apply over the –40°C to 85°C temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. External CIN = 120µF, COUT = 200µF/Ceramic per typical application (front page) configuration. SYMBOL VIN(DC) VOUT(DC) PARAMETER Input DC Voltage Output Voltage FCB = 0V VIN = 5V or 12V, VOUT = 1.5V, IOUT = 0A CONDITIONS ● ELECTRICAL CHARACTERISTICS MIN 4.5 1.478 1.470 TYP MAX 20 UNITS V V V V A A mA mA mA mA µA A A A ● 1.50 1.50 3.4 0.6 0.7 1.2 42 1.0 52 35 1.52 3.13 3.64 1.522 1.530 4 Input Specifications VIN(UVLO) IINRUSH(VIN) Under Voltage Lockout Threshold Input Inrush Current at Startup IOUT = 0A IOUT = 0A. VOUT = 1.5V, FCB = 0 VIN = 5V VIN = 12V IOUT = 0A, EXTVCC Open VIN = 12V, VOUT = 1.5V, FCB = 5V VIN = 12V, VOUT = 1.5V, FCB = 0V VIN = 5V, VOUT = 1.5V, FCB = 5V VIN = 5V, VOUT = 1.5V, FCB = 0V Shutdown, RUN = 0.8V, VIN = 12V VIN = 12V, VOUT = 1.5V, IOUT = 10A VIN = 12V, VOUT = 3.3V, IOUT = 10A VIN = 5V, VOUT = 1.5V, IOUT = 10A IQ(VIN) Input Supply Bias Current 75 IS(VIN) Input Supply Current 4600fa 2 U W U U WW W LTM4600 ELECTRICAL CHARACTERISTICS SYMBOL IOUTDC PARAMETER Output Specifications Output Continuous Current Range VIN = 12V, VOUT = 1.5V (See Output Current Derating Curves for Different VIN, VOUT and TA) Line Regulation Accuracy Load Regulation Accuracy VOUT = 1.5V, IOUT = 0A, FCB = 0V, VIN = 4.5V to 20V VOUT = 1.5V, IOUT = 0A to 10A, FCB = 0V VIN = 5V VIN = 12V (Note 3) VIN = 12V, VOUT = 1.5V, IOUT = 0A, FCB = 0V VOUT = 1.5V, IOUT = 5A, FCB = 0V VOUT = 1.5V, IOUT = 10A VIN = 12V VIN = 5V VOUT = 1.5V, Load Step: 0A/µs to 5A/µs COUT = 3 • 22µF 6.3V, 470µF 4V Pos Cap, See Table 2 Load: 10% to 90% to 10% of Full Load Output Voltage in Foldback VIN = 12V, VOUT = 1.5V VIN = 5V, VOUT = 1.5V IOUT = 0A, VOUT = 1.5V ● ● The ● denotes the specifications which apply over the –40°C to 85°C temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration. CONDITIONS MIN 0 TYP MAX 10 UNITS A ΔVOUT/ΔVIN ΔVOUT/ΔIOUT 0.15 0.3 % ● ±1 ±1.5 10 800 0.5 0.7 36 15 % % mVP-P kHz ms ms mV VOUT(AC) fs tSTART Output Ripple Voltage Output Ripple Voltage Frequency Turn-On Time ΔVOUTLS Voltage Drop for Dynamic Load Step tSETTLE IOUTPK Settling Time for Dynamic Load Step Output Current Limit 25 14 14 0.591 0.594 0.8 –0.5 0.8 0.6 0.6 1.5 –1.2 1.8 100 16 100 0.57 0.6 –1 7.5 –7.5 10 –10 2 0.15 0.4 0.63 –2 12.5 –12.5 0.609 0.606 2 –3 3 µs A A V V V µA µA mV mA kΩ V µA % % % V Control Stage VOSET VRUN/SS IRUN(C)/SS IRUN(D)/SS VIN – SVIN IEXTVCC RFBHI VFCB IFCB PGOOD Output ΔVOSETH ΔVOSETL ΔVOSET(HYS) VPGL PGOOD Upper Threshold PGOOD Lower Threshold PGOOD Hysteresis PGOOD Low Voltage VOSET Rising VOSET Falling VOSET Returning IPGOOD = 5mA Current into EXTVCC Pin Resistor Between VOUT and FB Pins Forced Continuous Threshold Forced Continuous Pin Current VFCB = 0.6V Voltage at VOSET Pin RUN ON/OFF Threshold Soft-Start Charging Current Soft-Start Discharging Current VRUN/SS = 0V VRUN/SS = 4V EXTVCC = 0V, FCB = 0V EXTVCC = 5V, FCB = 0V, VOUT = 1.5V, IOUT = 0A Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM4600E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4600I is guaranteed and tested over the –40°C to 85°C temperature range. Note 3: Test assumes current derating verses temperature. 4600fa 3 LTM4600 TYPICAL PERFOR A CE CHARACTERISTICS (See Figure 17 for all curves) Efficiency vs Load Current with 5VIN (FCB = 0) 100 90 80 EFFICIENCY (%) EFFICIENCY (%) 70 60 50 40 30 0 2 8 6 4 LOAD CURRENT (A) 0.6VOUT 1.2VOUT 1.5VOUT 2.5VOUT 10 12 4600 G01 70 60 50 40 30 20 0 2 8 6 LOAD CURRENT (A) 4 0.6VOUT 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT 10 12 4600 G02 EFFICIENCY (%) Efficiency vs Load Current with Different FCB Settings 90 80 70 EFFICIENCY (%) 60 FCB = GND 50 40 30 20 0.1 VIN = 12V VOUT = 1.5V 1 LOAD CURRENT (A) 10 4600 G04 FCB > 0.7V VOUT = 50mV/DIV 1.8V Transient Response 25µs/DIV 1.8V AT 5A/µs LOAD STEP COUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POS CAP C3 = 100pF 4 UW Efficiency vs Load Current with 12VIN (FCB = 0) 100 90 80 100 90 80 70 60 50 40 30 Efficiency vs Load Current with 18VIN (FCB = 0) 1.5VOUT 1.8VOUT 2.5VOUT 3.3VOUT 0 2 4 8 6 LOAD CURRENT (A) 10 12 4600 G03 1.2V Transient Response 1.5V Transient Response IOUT = 5A/DIV 25µs/DIV 1.2V AT 5A/µs LOAD STEP COUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POS CAP C3 = 100pF 4600 G05 25µs/DIV 1.5V AT 5A/µs LOAD STEP COUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POS CAP C3 = 100pF 4600 G06 2.5V Transient Response 3.3V Transient Response 4600 G07 25µs/DIV 2.5V AT 5A/µs LOAD STEP COUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POS CAP C3 = 100pF 4600 G08 25µs/DIV 3.3V AT 5A/µs LOAD STEP COUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POS CAP C3 = 100pF 4600 G09 4600fa LTM4600 TYPICAL PERFOR A CE CHARACTERISTICS (See Figure 17 for all curves) Start-Up, IOUT = 0A VOUT (0.5V/DIV) IIN (0.5A/DIV) 200µs/DIV VIN = 12V VOUT = 1.5V COUT = 200µF NO EXTERNAL SOFT-START CAPACITOR Short-Circuit Protection, IOUT = 10A 5.5 5.0 VOUT (0.5V/DIV) IIN (0.5A/DIV) 4.5 4.0 3.5 VOUT (V) 3.0 2.5 2.0 1.5 1.0 0.5 0 20µs/DIV VIN = 12V VOUT = 1.5V COUT = 2× 200µF/X5R NO EXTERNAL SOFT-START CAPACITOR UW 4600 G10 Start-Up, IOUT = 10A (Resistive Load) VOUT (0.5V/DIV) IIN (0.5A/DIV) Short-Circuit Protection, IOUT = 0A VOUT (0.5V/DIV) IIN (0.2A/DIV) 200µs/DIV VIN = 12V VOUT = 1.5V COUT = 200µF NO EXTERNAL SOFT-START CAPACITOR 4600 G11 20µs/DIV VIN = 12V VOUT = 1.5V COUT = 2× 200µF/X5R NO EXTERNAL SOFT-START CAPACITOR 4600 G12 VIN to VOUT Stepdown Ratio fADJ = OPEN 5V 3.3V 2.5V 1.8V 1.5V 1.2V 0.6V 0 5 10 VIN (V) SEE FREQUENCY ADJUSTMENT DISCUSSION FOR 12VIN TO 5VOUT AND 5VIN TO 3.3VOUT CONVERSION 4600 G14 4600 G13 15 20 4600fa 5 LTM4600 PI FU CTIO S VIN (Bank 1): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. fADJ (Pin A15): A 110k resistor from VIN to this pin sets the one-shot timer current, thereby setting the switching frequency. The LTM4600 switching frequency is typically 850kHz. An external resistor to ground can be selected to reduce the one-shot timer current, thus lower the switching frequency to accommodate a higher duty cycle step down requirement. See the applications section. SVIN (Pin A17): Supply Pin for Internal PWM Controller. Leave this pin open or add additional decoupling capacitance. EXTVCC (Pin A19): External 5V supply pin for controller. If left open or grounded, the internal 5V linear regulator will power the controller and MOSFET drivers. For high input voltage applications, connecting this pin to an external 5V will reduce the power loss in the power module. The EXTVCC voltage should never be higher than VIN. VOSET (Pin A21): The Negative Input of The Error Amplifier. Internally, this pin is connected to VOUT with a 100k precision resistor. Different output voltages can be programmed with additional resistors between the VOSET and SGND pins. COMP (Pin B23): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V with 0.8V corresponding to zero sense voltage (zero current). EXTVCC 81 VOSET 91 SVIN 71 fADJ 61 7 6 5 4 3 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 6 401 39 301 29 201 19 101 09 001 98 88 99 78 89 68 79 58 69 48 59 49 38 VOUT BANK 3 94 06 17 28 84 95 07 18 74 85 96 08 64 75 86 97 54 65 76 87 44 55 66 77 34 45 56 67 24 35 46 57 25 36 47 14 04 15 26 37 93 PGND BANK 2 23 4600 PN01 12 22 32 42 83 13 73 03 51 92 63 41 82 53 31 43 72 62 33 05 16 27 23 21 52 8 VIN BANK 1 02 11 01 9 1 U U U (See Package Description for Pin Assignment) SGND (Pin D23): Signal Ground Pin. All small-signal components should connect to this ground, which in turn connects to PGND at one point. RUN/SS (Pin F23): Run and Soft-Start Control. Forcing this pin below 0.8V will shut down the power supply. Inside the power module, there is a 1000pF capacitor which provides approximately 0.7ms soft-start time with 200µF output capacitance. Additional soft-start time can be achieved by adding additional capacitance between the RUN/SS and SGND pins. The internal short-circuit latchoff can be disabled by adding a resistor between this pin and the VIN pin. This pullup resistor must supply a minimum 5µA pull up current. FCB (Pin G23): Forced Continuous Input. Grounding this pin enables forced continuous mode operation regardless of load conditions. Tying this pin above 0.63V enables discontinuous conduction mode to achieve high efficiency operation at light loads. There is an internal 4.75K resistor between the FCB and SGND pins. PGOOD (Pin J23): Output Voltage Power Good Indicator. When the output voltage is within 10% of the nominal voltage, the PWRGD is open drain output. Otherwise, this pin is pulled to ground. PGND (Bank 2): Power ground pins for both input and output returns. VOUT (Bank 3): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing High Frequency output decoupling capacitance directly between these pins and GND pins. TOP VIEW A B C D E F G H J K COMP SGND RUN/SS FCB PGOOD L M N P R T 4600fa LTM4600 SI PLIFIED BLOCK DIAGRA RUN/SS 1000pF PGOOD Q1 COMP FCB COUT 4.75k fADJ SGND 10Ω Q2 PGND CONTROLLER 15µF 6.3V INT COMP VOUT 1.5V/10A MAX 1.5µF EXTVCC VOSET R6 66.5k 100k 0.5% Figure 1. Simplified LTM4600 Block Diagram DECOUPLI G REQUIRE E TS SYMBOL CIN COUT PARAMETER External Input Capacitor Requirement (VIN = 4.5V to 15V, VOUT = 1.5V) External Output Capacitor Requirement (VIN = 4.5V to 15V, VOUT = 1.5V) W SVIN LTM4600 VIN 4.5V TO 20V CIN 4600 F01 UW U W TA = 25°C, VIN = 12V. Use Figure 1 configuration. MIN 20 100 200 TYP MAX UNITS µF µF CONDITIONS IOUT = 10A IOUT = 10A, Refer to Table 2 in the Applications Information Section 4600fa 7 LTM4600 OPERATIO µModule Description The LTM4600 is a standalone non-isolated synchronous switching DC/DC power supply. It can deliver up to 10A of DC output current with only bulk external input and output capacitors. This module provides a precisely regulated output voltage programmable via one external resistor from 0.6VDC to 5.0VDC, not to exceed 80% of the input voltage. The input voltage range is 4.5V to 20V. A simplified block diagram is shown in Figure 1 and the typical application schematic is shown in Figure 17. The LTM4600 contains an integrated LTC constant on-time current-mode regulator, ultra-low RDS(ON) FETs with fast switching speed and integrated Schottky diode. The typical switching frequency is 800kHz at full load. With current mode control and internal feedback loop compensation, the LTM4600 module has sufficient stability margins and good transient performance under a wide range of operating conditions and with a wide range of output capacitors, even all ceramic output capacitors (X5R or X7R). Current mode control provides cycle-by-cycle fast current limit. In addition, foldback current limiting is provided in an over-current condition while VFB drops. Also, the LTM4600 has defeatable short circuit latch off. Internal overvoltage and undervoltage comparators pull the open-drain PGOOD output low if the output feedback voltage exits a 8 U ±10% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET Q1 is turned off and bottom FET Q2 is turned on and held on until the overvoltage condition clears. Pulling the RUN/SS pin low forces the controller into its shutdown state, turning off both Q1 and Q2. Releasing the pin allows an internal 1.2µA current source to charge up the softstart capacitor. When this voltage reaches 1.5V, the controller turns on and begins switching. At low load current the module works in continuous current mode by default to achieve minimum output voltage ripple. It can be programmed to operate in discontinuous current mode for improved light load efficiency when the FCB pin is pulled up above 0.8V and no higher than 6V. The FCB pin has a 4.75k resistor to ground, so a resistor to VIN can set the voltage on the FCB pin. When EXTVCC pin is grounded or open, an integrated 5V linear regulator powers the controller and MOSFET gate drivers. If a minimum 4.7V external bias supply is applied on the EXTVCC pin, the internal regulator is turned off, and an internal switch connects EXTVCC to the gate driver voltage. This eliminates the linear regulator power loss with high input voltage, reducing the thermal stress on the controller. The maximum voltage on EXTVCC pin is 6V. The EXTVCC voltage should never be higher than the VIN voltage. Also EXTVCC must be sequenced after VIN. 4600fa LTM4600 APPLICATIO S I FOR ATIO The typical LTM4600 application circuit is shown in Figure 17. External component selection is primarily determined by the maximum load current and output voltage. Output Voltage Programming and Margining The PWM controller of the LTM4600 has an internal 0.6V±1% reference voltage. As shown in the block diagram, a 100k/0.5% internal feedback resistor connects VOUT and FB pins. Adding a resistor RSET from VOSET pin to SGND pin programs the output voltage: VO = 0.6V • 100k + RSET RSET Table 1 shows the standard vaules of 1% RSET resistor for typical output voltages: Table 1. RSET (kΩ) VO (V) Open 0.6 100 1.2 66.5 1.5 49.9 1.8 43.2 2 31.6 2.5 22.1 3.3 13.7 5 Voltage margining is the dynamic adjustment of the output voltage to its worst case operating range in production testing to stress the load circuitry, verify control/protection functionality of the board and improve the system reliability. Figure 2 shows how to implement margining function with the LTM4600. In addition to the feedback resistor RSET, several external components are added. Turn off both transistor QUP and QDOWN to disable the margining. When QUP is on and QDOWN is off, the output voltage is margined up. The output voltage is margined LTM4600 VOUT RDOWN 100k QDOWN VOSET PGND SGND RSET 2N7002 RUP QUP 2N7002 4600 F02 Figure 2. 4600fa U down when QDOWN is on and QUP is off. If the output voltage VO needs to be margined up/down by ±M%, the resistor values of RUP and RDOWN can be calculated from the following equations: (RSET RUP )• VO •(1+ M%) = 0.6V (RSET RUP ) + 100kΩ RSET • VO •(1– M%) = 0.6V RSET + (100kΩ RDOWN) Input Capacitors The LTM4600 µModule should be connected to a low ac-impedance DC source. High frequency, low ESR input capacitors are required to be placed adjacent to the module. In Figure 20, the bulk input capacitor CIN is selected for its ability to handle the large RMS current into the converter. For a buck converter, the switching duty-cycle can be estimated as: D= VO VIN Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: ICIN(RMS) = IO(MAX) • D •(1− D) η% In the above equation, η% is the estimated efficiency of the power module. C1 can be a switcher-rated electrolytic aluminum capacitor, OS-CON capacitor or high volume ceramic capacitors. Note the capacitor ripple current ratings are often based on only 2000 hours of life. This makes it advisable to properly derate the input capacitor, or choose a capacitor rated at a higher temperature than required. Always contact the capacitor manufacturer for derating requirements. In Figure 16, the input capacitors are used as high frequency input decoupling capacitors. In a typical 10A output application, 1-2 pieces of very low ESR X5R or X7R, 10µF ceramic capacitors are recommended. This decoupling capacitor should be placed directly adjacent W U U 9 LTM4600 APPLICATIO S I FOR ATIO the module input pins in the PCB layout to minimize the trace inductance and high frequency AC noise. Output Capacitors The LTM4600 is designed for low output voltage ripple. The bulk output capacitors COUT is chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. COUT can be low ESR tantalum capacitor, low ESR polymer capacitor or ceramic capacitor (X5R or X7R). The typical capacitance is 200µF if all ceramic output capacitors are used. The internally optimized loop compensation provides sufficient stability margin for all ceramic capacitors applications. Additional output filtering may be required by the system designer, if further reduction of output ripple or dynamic transient spike is required. Refer to Table 2 for an output capacitance matrix for each output voltage Droop, peak to peak deviation and recovery time during a 5A/µs transient with a specific output capacitance. Fault Conditions: Current Limit and Over current Foldback The LTM4600 has a current mode controller, which inherently limits the cycle-by-cycle inductor current not only in steady state operation, but also in transient. To further limit current in the event of an over load condition, the LTM4600 provides foldback current limiting. If the output voltage falls by more than 50%, then the maximum output current is progressively lowered to about one sixth of its full current limit value. 10 U Soft-Start and Latchoff with the RUN/SS pin The RUN/SS pin provides a means to shut down the LTM4600 as well as a timer for soft-start and over-current latchoff. Pulling the RUN/SS pin below 0.8V puts the LTM4600 into a low quiescent current shutdown (IQ ≤ 75µA). Releasing the pin allows an internal 1.2µA current source to charge up the timing capacitor CSS. Inside LTM4600, there is an internal 1000pF capacitor from RUN/SS pin to ground. If RUN/SS pin has an external capacitor CSS_EXT to ground, the delay before starting is about: tDELAY = 1.5V •(C SS _ EXT + 1000pF ) 1.2µA When the voltage on RUN/SS pin reaches 1.5V, the LTM4600 internal switches are operating with a clamping of the maximum output inductor current limited by the RUN/SS pin total soft-start capacitance. As the RUN/SS pin voltage rises to 3V, the soft-start clamping of the inductor current is released. VIN to VOUT Stepdown Ratios There are restrictions in the maximum VIN to VOUT step down ratio that can be achieved for a given input voltage. These contraints are shown in the Typical Performance Characteristics curves labeled “VIN to VOUT Stepdown Ratio”. Note that additional thermal de-rating may apply. See the Thermal Considerations and Output Current DeRating sections of this data sheet. 4600fa W U U LTM4600 APPLICATIO S I FOR ATIO TYPICAL MEASURED VALUES COUT1 VENDORS TDK TAIYO YUDEN TAIYO YUDEN VOUT (V) 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 2.5 2.5 2.5 2.5 2.5 2.5 2.5 2.5 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 5 5 CIN (CERAMIC) 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V 2 × 10µF 25V Table 2. Output Voltage Response Verses Component Matrix (Refer to Figure 17) PART NUMBER C4532X5R0J107MZ (100UF,6.3V) JMK432BJ107MU-T ( 100µF, 6.3V) JMK316BJ226ML-T501 ( 22µF, 6.3V) COUT1 (CERAMIC) 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 3 × 22µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 1 × 100µF 6.3V 2 × 100µF 6.3V 3 × 22µF 6.3V 4 × 100µF 6.3V 1 × 100µF 6.3V 3 × 22µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 2 × 100µF 6.3V 1 × 100µF 6.3V 3 × 22µF 6.3V 4 × 100µF 6.3V 1 × 100µF 6.3V 3 × 22µF 6.3V 2 × 100µF 6.3V 4 × 100µF 6.3V 4 × 100µF 6.3V 4 × 100µF 6.3V COUT2 (BULK) 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 470µF 2.5V 330µF 6.3V NONE 470µF 4V 330µF 6.3V 470µF 4V NONE 470µF 4V 470µF 4V 330µF 6.3V NONE 330µF 6.3V 470µF 4V 470µF 4V NONE 470µF 4V 470µF 4V 330µF 6.3V NONE NONE NONE CCOMP NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE NONE COUT2 VENDORS SANYO POS CAP SANYO POS CAP SANYO POS CAP C3 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF 100pF VIN (V) 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 5 5 5 5 12 12 12 12 7 7 7 7 12 12 12 12 15 20 DROOP (mV) 35 35 40 49 35 35 40 49 36 37 44 61 36 37 44 54 40 44 46 62 40 44 44 62 48 56 57 60 48 51 56 70 64 66 82 100 52 64 64 76 188 159 PART NUMBER 6TPE330MIL (330µF, 6.3V) 2R5TPE470M9 (470µF, 2.5V) 4TPE470MCL (470µF, 4V) PEAK TO PEAK (mV) 68 70 80 98 68 70 80 98 75 79 84 118 75 79 89 108 81 88 91 128 81 85 91 125 103 113 116 115 103 102 113 159 126 132 166 200 106 129 126 144 375 320 RECOVERY TIME (µs) 25 20 20 20 25 20 20 20 25 20 20 20 25 20 20 20 30 20 20 20 30 20 20 20 30 30 30 25 30 30 30 25 30 30 35 25 30 35 30 25 25 25 LOAD STEP (A/µs) 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 CIN (BULK) 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V 150µF 35V U 4600fa W U U 11 LTM4600 APPLICATIO S I FOR ATIO After the controller has been started and given adequate time to charge up the output capacitor, CSS is used as a short-circuit timer. After the RUN/SS pin charges above 4V, if the output voltage falls below 75% of its regulated value, then a short-circuit fault is assumed. A 1.8µA current then begins discharging CSS. If the fault condition persists until the RUN/SS pin drops to 3.5V, then the controller turns off both power MOSFETs, shuting down the converter permanently. The RUN/SS pin must be actively pulled down to ground in order to restart operation. The over-current protection timer requires the soft-start timing capacitor CSS be made large enough to guarantee that the output is in regulation by the time CSS has reached the 4V threshold. In general, this will depends upon the size of the output capacitance, output voltage and load current characteristic. A minimum external soft-start capacitor can be estimated from: C SS _ EXT + 1000pF > C OUT • VOUT (10–3 [F / VS ]) Generally 0.1µF is more than sufficient. Since the load current is already limited by the current mode control and current foldback circuitry during a shortcircuit, over-current latchoff operation is NOT always needed or desired, especially the output has large amount of capacitance or the load draw huge current during start up. The latchoff feature can be overridden by a pull-up current greater than 5µA but less than 80µA to the RUN/SS pin. The additional current prevents the discharge of CSS during a fault and also shortens the soft-start period. Using a resistor from RUN/SS pin to VIN is a simple solution 12 U to defeat latchoff. Any pull-up network must be able to maintain RUN/SS above 4V maximum latchoff threshold and overcome the 4µA maximum discharge current. Figure 3 shows a conceptual drawing of VRUN during startup and short circuit. VRUN/SS 4V 3.5V 3V 1.5V SHORT-CIRCUIT LATCH ARMED t SOFT-START CLAMPING OF IL RELEASED VO 75%VO OUTPUT OVERLOAD HAPPENS SHORT-CIRCUIT LATCHOFF SWITCHING STARTS t 4600 F03 W U U Figure 3. RUN/SS Pin Voltage During Startup and Short-Circuit Protection VIN 500k VIN LTM4600 RUN/SS PGND SGND 4600 F04 Figure 4. Defeat Short-Circuit Latchoff with a Pull-Up Resistor to VIN 4600fa LTM4600 APPLICATIO S I FOR ATIO Enable The RUN/SS pin can be driven from logic as shown in Figure 5. This function allows the LTM4600 to be turned on or off remotely. The ON signal can also control the sequence of the output voltage. RUN/SS ON LTM4600 PGND SGND 2N7002 4600 F05 Figure 5. Enable Circuit with External Logic Output Voltage Tracking For the applications that require output voltage tracking, several LTM4600 modules can be programmed by the power supply tracking controller such as the LTC2923. Figure 6 shows a typical schematic with LTC2923. CoinVIN 5V Q1 DC/DC 3.3V VIN VIN RONB RONA VCC ON LTC2923 RAMPBUF RTB1 TRACK1 RTA1 RTB2 TRACK2 RTA2 GND FB2 SDO STATUS GATE RAMP FB1 LTM4600 VOSET VOUT 49.9k 1.8V VIN VIN LTM4600 VOSET VOUT 66.5k 4600 F06 Figure 6. Output Voltage Tracking with the LTC2923 Controller U cident, ratiometric and offset tracking for VO rising and falling can be implemented with different sets of resistor values. See the LTC2923 data sheet for more details. EXTVCC Connection An internal low dropout regulator produces an internal 5V supply that powers the control circuitry and FET drivers. Therefore, if the system does not have a 5V power rail, the LTM4600 can be directly powered by VIN. The gate driver current through LDO is about 18mA. The internal LDO power dissipation can be calculated as: PLDO_LOSS = 18mA • (VIN – 5V) The LTM4600 also provides an external gate driver voltage pin EXTVCC. If there is a 5V rail in the system, it is recommended to connect EXTVCC pin to the external 5V rail. Whenever the EXTVCC pin is above 4.7V, the internal 5V LDO is shut off and an internal 50mA P-channel switch connects the EXTVCC to internal 5V. Internal 5V is supplied from EXTVCC until this pin drops below 4.5V. Do not apply more than 6V to the EXTVCC pin and ensure that EXTVCC < VIN. The following list summaries the possible connections for EXTVCC: 1. EXTVCC grounded. Internal 5V LDO is always powered from the internal 5V regulator. 2. EXTVCC connected to an external supply. Internal LDO is shut off. A high efficiency supply compatible with the MOSFET gate drive requirements (typically 5V) can improve overall efficiency. With this connection, it is always required that the EXTVCC voltage can not be higher than VIN pin voltage. Discontinuous Operation and FCB Pin The FCB pin determines whether the internal bottom MOSFET remains on when the inductor current reverses. There is an internal 4.75k pulling down resistor connecting this pin to ground. The default light load operation mode is forced continuous (PWM) current mode. This mode provides minimum output voltage ripple. 1.5V 4600fa W U U 13 LTM4600 APPLICATIO S I FOR ATIO In the application where the light load efficiency is important, tying the FCB pin above 0.6V threshold enables discontinuous operation where the bottom MOSFET turns off when inductor current reverses. Therefore, the conduction loss is minimized and light load efficient is improved. The penalty is that the controller may skip cycle and the output voltage ripple increases at light load. Paralleling Operation with Load Sharing Two or more LTM4600 modules can be paralleled to provide higher than 10A output current. Figure 7 shows the necessary interconnection between two paralleled modules. The OPTI-LOOP™ current mode control ensures good current sharing among modules to balance the thermal stress. The new feedback equation for two or more LTM4600s in parallel is: 100k + RSET N VOUT = 0.6 V • RSET where N is the number of LTM4600s in parallel. VIN VIN LTM4600 PGND COMP VOSET SGND RSET VOUT VOUT (20AMAX) COMP VOSET SGND VIN PGND 4600 F07 LTM4600 VOUT Figure 7. Parallel Two µModules with Load Sharing OPTI-LOOP is a trademark of Linear Technology Corporation. 14 U Thermal Considerations and Output Current Derating The power loss curves in Figures 8 and 13 can be used in coordination with the load current derating curves in Figures 9 to 12, and Figures 14 to 15 for calculating an approximate θJA for the module with various heatsinking methods. Thermal models are derived from several temperature measurements at the bench, and thermal modeling analysis. Application Note 103 provides a detailed explanation of the analysis for the thermal models, and the derating curves. Tables 3 and 4 provide a summary of the equivalent θJA for the noted conditions. These equivalent θJA parameters are correlated to the measure values, and improved with air-flow. The case temperature is maintained at 100°C or below for the derating curves. This allows for 4W maximum power dissipation in the total module with top and bottom heatsinking, and 2W power dissipation through the top of the module with an approximate θJC between 6°C/W to 9°C/W. This equates to a total of 124°C at the junction of the device. Safety Considerations The LTM4600 modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current should be provided to protect each unit from catastrophic failure. 4600fa W U U LTM4600 APPLICATIO S I FOR ATIO 4.5 4.0 MAXIMUM LOAD CURRENT (A) 9 8 7 6 5 4 0 LFM 200 LFM 400 LFM 50 60 80 70 AMBIENT TEMPERATURE (°C) 90 4600 F09 VOUT = 1.5V 10 3.5 POWER LOSS (W) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 2 6 8 4 OUTPUT CURRENT (A) 10 4600 F08 MAXIMUM LOAD CURRENT (A) 12V LOSS 5V LOSS Figure 8. Power Loss vs Load Current 10 MAXIMUM LOAD CURRENT (A) 9 8 7 6 5 4 0 LFM 200 LFM 400 LFM 50 55 VIN = 12V VO = 1.5V MAXIMUM LOAD CURRENT (A) 10 9 8 7 6 5 4 3 VIN = 12V VO = 1.5V POWER LOSS (W) 60 65 70 75 80 85 AMBIENT TEMPERATURE (°C) 90 50 4600 F11 Figure 11. No Heatsink 10 9 MAXIMUM LOAD CURRENT (A) 8 7 6 5 4 3 2 1 0 40 0 LFM 200 LFM 400 LFM VIN = 12V VO = 3.3V MAXIMUM LOAD CURRENT (A) 50 60 80 70 AMBIENT TEMPERATURE (°C) 4600 F14 Figure 14. No Heatsink U VIN = 5V VO = 1.5V 10 9 8 7 6 5 4 0 LFM 200 LFM 400 LFM 50 60 70 80 90 AMBIENT TEMPERATURE (°C) 100 4600 F10 W U U VIN = 5V VO = 1.5V Figure 9. No Heatsink Figure 10. BGA Heatsink 5.0 VIN = 12V 4.5 VOUT = 3.3V 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100 4600 F12 0 LFM 200 LFM 400 LFM 60 70 80 90 AMBIENT TEMPERATURE (°C) 0 2 4 6 8 OUTPUT CURRENT (A) 10 4600 F13 Figure 12. BGA Heatsink Figure 13. Power Loss vs Load Current 10 9 8 7 6 5 4 VIN = 12V VO = 3.3V 0 LFM 200 LFM 400 LFM 40 60 70 80 90 50 AMBIENT TEMPERATURE (°C) 100 4600 F15 90 Figure 15. BGA Heatsink 4600fa 15 LTM4600 APPLICATIO S I FOR ATIO Table 3. 1.5V Output DERATING CURVE Figures 9, 11 Figures 9, 11 Figures 9, 11 Figures 10, 12 Figures 10, 12 Figures 10, 12 VIN (V) 5, 12 5, 12 5, 12 5, 12 5, 12 5, 12 POWER LOSS CURVE Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 AIR FLOW (LFM) 0 200 400 0 200 400 HEATSINK None None None BGA Heatsink BGA Heatsink BGA Heatsink θJA (°C/W) 15.2 14 12 13.9 11.3 10.25 Table 4. 3.3V Output DERATING CURVE Figure 14 Figure 14 Figure 14 Figure 15 Figure 15 Figure 15 VIN (V) 12 12 12 12 12 12 POWER LOSS CURVE Figure 13 Figure 13 Figure 13 Figure 13 Figure 13 Figure 13 AIR FLOW (LFM) 0 200 400 0 200 400 HEATSINK None None None BGA Heatsink BGA Heatsink BGA Heatsink θJA (°C/W) 15.2 14.6 13.4 13.9 11.1 10.5 16 U 4600fa W U U LTM4600 APPLICATIO S I FOR ATIO Layout Checklist/Example The high integration of the LTM4600 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. • Use large PCB copper areas for high current path, including VIN, PGND and VOUT. It helps to minimize the PCB conduction loss and thermal stress • Place high frequency ceramic input and output capacitors next to the VIN, PGND and VOUT pins to minimize high frequency noise • Place a dedicated power ground layer underneath the unit • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers • Do not put via directly on pad • Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to PGND underneath the unit Figure 16 gives a good example of the recommended layout. VIN SGND CIN PGND VOUT LOAD TOP LAYER 4600 F16 Figure 16. Recommended PCB Layout U Frequency Adjustment The LTM4600 is designed to typically operate at 800kHz across most input and output conditions. The fADJ pin is typically left open or decoupled with an optional 1000pf capacitor. The switching frequency has been optimized for maintaining constant output ripple noise over the operating ranges. The switching frequency will increase up to typically 1.2MHz for 5V and 3.3V outputs to limit increase output ripple noise. The switching frequency can be adjusted lower to accommodate high duty cycle requirements like 5V to 3.3V, and 12V to 5V. There are limitations to input voltage range for the higher duty cycle designs that limit the internal inductor ripple current so that the inductor will not saturate at higher load current. Examples: LTM4600 minimum on-time = 100ns LTM4600 minimum off-time = 400ns Equations for setting frequency: ION = VIN – 0.7V/110k; for 12V input, ION = 103µA frequency = (ION/[2.4V • 10pF]) • DC; DC = duty cycle, duty cycle is (VOUT/VIN) t = tON + tOFF, tON = on-time, tOFF = off-time of the switching period; t = 1/frequency tOFF must be greater than 400ns, or t – tON > 400ns. tON = DC • t 1MHz frequency or 1µs period is chosen for 12V to 5V. tON = 0.41 • 1µs ≅ 410ns tOFF = 1µs – 410ns ≅ 590ns tON and tOFF are above the minimums with adquate guard band. Using the frequency = (ION/[2.4V • 10pF]) • DC, solve for ION = (1MHz • 2.4V • 10pF) • (1/0.41) ≅ 58µA. ION current calculated from 12V input was 103µA, so a resistor from fADJ to ground = (0.7V/15k) = 46µA. 103µA – 46µA = 57µA, sets the adequate ION current for proper frequency range for the higher duty cycle conversion of 12V to 5V. Input voltage range is limited to 9V to 16V. Higher input voltages can be used without the 15k on fADJ. The 4600fa W U U 17 LTM4600 APPLICATIO S I FOR ATIO Equations for setting frequency: ION = VIN – 0.7V/110k; for 5V input, ION = 39µA frequency = (ION/[2.4V • 10pF]) • DC; DC = duty cycle, duty cycle is (VOUT/VIN) t = tON + tOFF, tON = on-time, tOFF = off-time of the switching period; t = 1/frequency tOFF must be greater than 400ns, or t – tON > 400ns. tON = DC • t ~450kHz frequency or 2.22µs period is chosen for 5V to 3.3V. Frequency range is about 450kHz to 650kHz from 4.5V to 7V input. tON = 0.66 • 2.22µs ≅ 1.46ns 5V to 3.3V at 8A 4.5V TO 7V C3 10µF 25V C1 10µF 25V EXTVCC FCB LTM4600EV RUN/SOFT-START RUN/SS COMP SGND SVIN PGOOD PGND 4600 F18 inductor ripple current gets too high above 16V, and the 400ns minimum off-time is limited below 9V. 5V TO 3.3V AT 8A WITH fADJ = 30.1k 9V TO 16V C3 10µF 25V C1 10µF 25V EXTVCC FCB LTM4600EV RUN/SOFT-START RUN/SS COMP SGND 12V TO 5V AT 8A WITH fADJ = 15k 18 U tOFF = 2µs – 1.32ns ≅ 760ns tON and tOFF are above the minimums with adquate guard band. Using the frequency = (ION/[2.4V • 10pF]) • DC, solve for ION = (450kHz • 2.4V • 10pF) • (1/0.66) ≅ 16µA. ION current calculated from 5V input was 39µA, so a resistor from fADJ to ground = (0.7V/30.1k) = 23µA. 39µA – 23µA = 16µA, sets the adequate ION current for proper frequency range for the higher duty cycle conversion of 5V to 3.3V. Input voltage range is limited to 4.5V to 7V. Higher input voltages can be used without the 30.1k on fADJ. The inductor ripple current gets too high above 7V, and the 400ns minimum off-time is limited below 4.5V. R1 30.1k C5 100pF 3.3V AT 8A VOUT VOSET R2 22.1k 1% OPEN DRAIN C2 22µF EFFICIENCY = 93% VIN fADJ W U U + C4 330µF 6.3V C1, C3: TDK C3216X5R1E106MT C2: TAIYO YUDEN, JMK316BJ226ML C4: SANYO POS CAP, 6TPE330MIL 12V to 5V at 8A R1 15k C5 100pF 5V AT 8A VOUT VOSET SVIN PGOOD PGND 4600 F19 VIN fADJ EFFICIENCY = 93% C2 22µF + R2 13.7k 1% OPEN DRAIN C4 330µF 6.3V C1, C3: TDK C3216X5R1E106MT C2: TAIYO YUDEN, JMK316BJ226ML C4: SANYO POS CAP, 6TPE330MIL 4600fa LTM4600 APPLICATIO S I FOR ATIO 5.0 VIN to VOUT Stepdown Ratio for 12VIN to 5VOUT and 5VIN to 3.3VOUT 3.3V: fADJ = 30.1k 4.5 5V: fADJ = 15k 4.0 3.5 VOUT (V) 3.0 2.5 2.0 1.5 1.0 0.5 0 1 3 5 7 9 11 VIN (V) 3.3V AT 8A 5V AT 8A 13 15 17 4600 F20 TYPICAL APPLICATIO VIN 5V TO 20V GND + CIN (BULK) 150µF CIN (CER) 10µF 2x EXTVCC C3 100pF VOUT SVIN fADJ VOSET COMP FCB PGOOD SGND C4 OPT R1 66.5k REFER TO TABLE 1 4600 F17 Figure 17. Typical Application, 5V to 20V Input, 0.6V to 5V Output, 10A Max U VIN (MULTIPLE PINS) VOUT (MULTIPLE PINS) VOUT COUT1 + 22µF 6.3V ×3 REFER TO TABLE 2 COUT2 470µF REFER TO TABLE 2 LTM4600 RUN/SS PGND (MULTIPLE PINS) 0.6V TO 5V REFER TO STEP DOWN RATIO GRAPH GND 4600fa W U U U 19 LTM4600 TYPICAL APPLICATIO C8 10µF 25V C7 10µF 25V EXTVCC FCB RUN/SOFT-START C3 10µF 25V C1 10µF 25V EXTVCC FCB INDIVIDUAL SHARE 20 U Parallel Operation and Load Sharing 4.5V TO 20V VOUT = 0.6V • ([100k/N] + RSET)/RSET WHERE N = 2 VIN fADJ VOUT VOSET LTM4600 RUN COMP SGND SVIN PGOOD PGND 2.5V AT 20A R4 15.8k 1% 2.5V C9 22µF x3 + C10 470µF 4V VIN fADJ VOUT VOSET C4 220pF 2.5V C2 22µF x3 R1 100k + LTM4600 RUN COMP SGND SVIN PGOOD PGND 4600 TA02 C5 470µF 4V C1, C3, C7, C8: TDK C3216X5R1E106MT C2, C9: TAIYO YUDEN, JMK316BJ226ML-T501 C5, C10: SANYO POS CAP, 4TPE470MCL Current Sharing Between Two LTM4600 Modules 12 12VIN 2.5VOUT 10 20AMAX IOUT2 8 IOUT1 6 4 2 0 0 5 10 15 TOTAL LOAD 20 25 4600 TA03 4600fa LGA Package 104-Lead (15mm × 15mm) (Reference LTM DWG # 05-05-1800) 1.9042 0.0000 4.4442 6.9865 19 20 10 11 21 14 22 23 28 24 35 44 55 56 67 70 68 71 69 58 59 66 57 60 45 46 48 47 49 36 37 38 29 30 31 15 6.9421 5.7158 4.4458 3.1758 1.9058 0.6358 0.6342 3.1742 6.9888 6 16 7 17 18 2 3 4 5 6.5475 1 5.7650 2.72 – 2.92 aaa Z 15 BSC X Y 9 5.2775 8 4.4950 13 4.0075 12 2.7375 4 PAD 1 CORNER 25 2.3600 26 27 1.4675 32 1.0900 33 34 PACKAGE DESCRIPTIO 0.0000 1.2700 50 51 52 53 54 15 BSC 2.5400 61 62 63 64 65 4.4450 88 89 93 90 91 92 72 77 78 81 79 80 82 73 74 75 76 MOLD CAP SUBSTRATE 5.7150 0.27 – 0.37 99 104 100 101 102 103 83 84 85 86 87 6.9850 2.45 – 2.55 DETAIL B 0.3175 0.3175 1.2700 3.8100 6.3500 bbb Z Z 94 95 96 97 98 3.8100 6.3500 5.0800 2.5400 1.2700 2.5400 0.0000 5.0800 aaa Z SUGGESTED SOLDER PAD LAYOUT TOP VIEW 12.70 BSC 99 104 93 82 88 77 81 78 79 80 89 90 91 92 100 101 102 103 TOP VIEW DETAIL B 0.11 – 0.27 94 95 96 97 98 PADS SEE NOTES T 3 R P NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222, SPP-010 83 84 85 86 87 72 73 74 75 76 61 55 59 48 49 44 35 24 36 37 38 45 46 47 56 57 58 60 62 63 71 64 65 66 67 68 69 70 N M L K H 23 50 51 52 53 54 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER IS A MARKED FEATURE OR A NOTCHED BEVELED PAD 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 104 13.97 BSC 39 40 41 42 43 33 34 32 28 29 30 31 J G F E D C B A eee M X Y 26 27 25 22 14 21 10 20 6 7 16 17 18 19 11 15 12 13 8 SYMBOL TOLERANCE 0.15 aaa 0.10 bbb 0.15 eee 9 1 2 3 4 5 C(0.30) PAD 1 11 12 13.93 BSC 14 16 18 20 13 15 17 19 21 1 3 5 7 9 23 22 LTM4600 21 2 4 6 8 10 4600 02-18 4600fa BOTTOM VIEW U 0.3175 0.3175 39 40 41 42 43 5.7142 LTM4600 PACKAGE DESCRIPTIO PIN NAME A1 A2 A3 VIN A4 A5 VIN A6 A7 VIN A8 A9 VIN A10 A11 VIN A12 A13 VIN A14 A15 fADJ A16 A17 SVIN A18 A19 EXTVCC A20 A21 VOSET A22 A23 PIN NAME J1 PGND J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 PGOOD PIN NAME B1 VIN B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 COMP PIN NAME K1 K2 K3 K4 K5 K6 K7 PGND K8 K9 PGND K10 K11 PGND K12 K13 PGND K14 K15 PGND K16 K17 PGND K18 K19 K20 K21 K22 K23 - PIN NAME C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 VIN C11 C12 VIN C13 C14 VIN C15 C16 C17 C18 C19 C20 C21 C22 C23 PIN NAME L1 L2 PGND L3 L4 PGND L5 L6 PGND L7 L8 PGND L9 L10 PGND L11 L12 PGND L13 L14 PGND L15 L16 PGND L17 L18 PGND L19 L20 PGND L21 L22 PGND L23 - 22 U Pin Assignment Tables (Arranged by Pin Number) PIN NAME D1 VIN D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 SGND PIN NAME M1 M2 PGND M3 M4 PGND M5 M6 PGND M7 M8 PGND M9 M10 PGND M11 M12 PGND M13 M14 PGND M15 M16 PGND M17 M18 PGND M19 M20 PGND M21 M22 PGND M23 PIN NAME E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 VIN E11 E12 VIN E13 E14 VIN E15 E16 E17 E18 E19 E20 E21 E22 E23 PIN NAME N1 N2 PGND N3 N4 PGND N5 N6 PGND N7 N8 PGND N9 N10 PGND N11 N12 PGND N13 N14 PGND N15 N16 PGND N17 N18 PGND N19 N20 PGND N21 N22 PGND N23 PIN NAME F1 VIN F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 RUN/SS PIN NAME P1 P2 VOUT P3 P4 VOUT P5 P6 VOUT P7 P8 VOUT P9 P10 VOUT P11 P12 VOUT P13 P14 VOUT P15 P16 VOUT P17 P18 VOUT P19 P20 VOUT P21 P22 VOUT P23 PIN NAME G1 PGND G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 FCB PIN NAME R1 R2 VOUT R3 R4 VOUT R5 R6 VOUT R7 R8 VOUT R9 R10 VOUT R11 R12 VOUT R13 R14 VOUT R15 R16 VOUT R17 R18 VOUT R19 R20 VOUT R21 R22 VOUT R23 PIN NAME H1 H2 H3 H4 H5 H6 H7 PGND H8 H9 PGND H10 H11 PGND H12 H13 PGND H14 H15 PGND H16 H17 PGND H18 H19 H20 H21 H22 H23 PIN NAME T1 T2 VOUT T3 T4 VOUT T5 T6 VOUT T7 T8 VOUT T9 T10 VOUT T11 T12 VOUT T13 T14 VOUT T15 T16 VOUT T17 T18 VOUT T19 T20 VOUT T21 T22 VOUT T23 4600fa LTM4600 PACKAGE DESCRIPTIO PIN NAME G1 H7 H9 H11 H13 H15 H17 J1 K7 K9 K11 K13 K15 K17 L2 L4 L6 L8 L10 L12 L14 L16 L18 L20 L22 M2 M4 M6 M8 M10 M12 M14 M16 M18 M20 M22 N2 N4 N6 N8 N10 N12 N14 N16 N18 N20 N22 PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND P2 P4 P6 P8 P10 P12 P14 P16 P18 P20 P22 R2 R4 R6 R8 R10 R12 R14 R16 R18 R20 R22 T2 T4 T6 T8 T10 T12 T14 T16 T18 T20 T22 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U Pin Assignment Tables (Arranged by Pin Number) PIN NAME VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT A3 A5 A7 A9 A11 A13 B1 C10 C12 C14 D1 E10 E12 E14 F1 PIN NAME VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN A15 A17 A19 A21 B23 D23 F23 G23 J23 PIN NAME fADJ SVIN EXTVCC VOSET COMP SGND RUN/SS FCB PGOOD 4600fa 23 LTM4600 TYPICAL APPLICATIO C2 10µF 25V 4.5V AT 20V C1 10µF 25V EXTVCC FCB LTM4600 RUN COMP SGND SVIN PGOOD PGND 4600 TA04 RELATED PARTS PART NUMBER LTC2900 LTC2923 LT3825/LT3837 DESCRIPTION Quad Supply Monitor with Adjustable Reset Timer Power Supply Tracking Controller Synchronous Isolated Flyback Controllers COMMENTS Monitors Four Supplies; Adjustable Reset Timer Tracks Both Up and Down; Power Supply Sequencing No Optocoupler Required; 3.3V, 12A Output; Simple Design 24 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005 U 1.8V, 10A Regulator C5 100pF 1.8V AT 10A VOUT VOSET R1 100k C3 22µF x3 VIN fADJ + C4 470µF 4V PGOOD R2 49.9k 1% C1, C2: TDK C3216X5R1E106MT C3: TAIYO YUDEN, JMK316BJ226ML-T501 C4: SANYO POS CAP, 4TPE470MCL This product contains technology licensed from Silicon Semiconductor Corporation. ® 4600fa LT 0206 REV A • PRINTED IN USA
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