LTM4608AV

LTM4608A Low VIN, 8A DC/DC µModule with Tracking, Margining, and Frequency Synchronization FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION The LTM®4608A is a complete 8A switch mode DC/DC power supply with ±1.75% total output voltage error. Included in the package are the switching controller, power FETs, inductor and all support components. Operating over an input voltage range of 2.7V to 5.5V, the LTM4608A supports an output voltage range of 0.6V to 5V, set by a single external resistor. This high efficiency design delivers up to 8A continuous current (10A peak). Only bulk input and output capacitors are needed to complete the design. The low profile package (2.8mm) enables utilization of unused space on the back side of PC boards for high density point-of-load regulation. The 0.630mm LGA pads with 1.27mm pitch simplify PCB layout by providing standard trace routing and via placement. The high switching frequency and current mode architecture enable a very fast transient response to line and load changes without sacrificing stability. The device supports frequency synchronization, programmable multiphase and/or spread spectrum operation, output voltage tracking for supply rail sequencing and voltage margining. Fault protection features include overvoltage protection, overcurrent protection and thermal shutdown. The power module is offered in a compact and thermally enhanced 15mm × 9mm × 2.8mm surface mount LGA package. The LTM4608A is Pb-free and RoHS compliant. Complete Standalone Power Supply ±1.75% Total DC Output Error (–55°C to 125°C) 2.7V to 5.5V Input Voltage Range 8A DC, 10A Peak Output Current 0.6V Up to 5V Output Output Voltage Tracking and Margining Power Good Tracks Margining Multiphase Operation Parallel Current Sharing Onboard Frequency Synchronization Spread Spectrum Frequency Modulation Overcurrent/Thermal Shutdown Protection Current Mode Control/Fast Transient Response Selectable Burst Mode® Operation Up to 95% Efficiency Output Overvoltage Protection Small, Low Profile 9mm × 15mm × 2.8mm LGA Package (0.630mm Pads) APPLICATIONS ■ ■ ■ Telecom, Networking and Industrial Equipment Storage Systems Point of Load Regulation , LT, LTC, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. μModule is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131. TYPICAL APPLICATION 3V to 5.5V Input to 1.8V Output DC/DC μModule™ CLKIN VIN 3V TO 5.5V 10μF VOUT 1.8V 100μF 4.87k EFFICIENCY (%) CLKIN 100 95 Efficiency vs Load Current VOUT = 1.8V VIN = 3.3V VIN SVIN SW RUN LTM4608A VOUT FB ITH ITHM PGOOD VOUT 4608A TA01a 90 VIN = 5V 85 80 75 70 0 2 4 6 LOAD CURRENT (A) 8 10 4608A TA01b PLLLPF TRACK PGOOD MGN CLKOUT GND SGND 4608afa 1 LTM4608A ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW A 1 2 3 4 5 6 7 8 9 10 11 GND VOUT CNTRL SW B C D VIN E F G GND CNTRL GND VIN, SVIN ...................................................... –0.3V to 6V CLKOUT ....................................................... –0.3V to 2V PGOOD, PLLLPF, CLKIN, PHMODE, MODE . –0.3V to VIN ITH, ITHM, RUN, FB, TRACK,MGN, BSEL ..... –0.3V to VIN VOUT, SW ...................................... –0.3V to (VIN + 0.3V) Internal Operating Temperature Range (Note 2) E and I Grades........................................ –40°C to 125°C MP Grade ............................................... –55°C to 125°C Storage Temperature Range .................. –55°C to 125°C LGA PACKAGE 68-PIN (15mm × 9mm × 2.8mm) TJMAX = 125°C, θJA = 25°C/W, θJP = 7°C/W, θJC = 5 0°C/W, WEIGHT = 1.0g ORDER INFORMATION LEAD FREE FINISH LTM4608AEV#PBF LTM4608AIV#PBF TRAY LTM4608AEV#PBF LTM4608AIV#PBF PART MARKING* LTM4608AV LTM4608AV PACKAGE DESCRIPTION INTERNAL TEMPERATURE RANGE (NOTE 2) 68-Lead (15mm × 9mm × 2.8mm) LGA –40°C to 125°C 68-Lead (15mm × 9mm × 2.8mm) LGA –40°C to 125°C 68-Lead (15mm × 9mm × 2.8mm) LGA –55°C to 125°C LTM4608AMPV#PBF LTM4608AMPV#PBF LTM4608AMPV Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ ELECTRICAL CHARACTERISTICS SYMBOL VIN(DC) VOUT(DC) PARAMETER Input DC Voltage Output Voltage, Total Variation with Line and Load The ● denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 1. CONDITIONS ● MIN 2.7 TYP MAX 5.5 UNITS V CIN = 10μF × 1, COUT = 100μF Ceramic, 100μF POSCAP, RFB = 6.65k VIN = 2.7V to 5.5V, IOUT = IOUT(DC)MIN to IOUT(DC)MAX (Note 3) ● 1.472 1.464 2.05 1.85 1.49 1.49 2.2 2.0 1.508 1.516 2.35 2.15 V V V V Input Specifications VIN(UVLO) Undervoltage Lockout Threshold SVIN Rising SVIN Falling 4608afa 2 LTM4608A ELECTRICAL CHARACTERISTICS SYMBOL IQ(VIN) PARAMETER Input Supply Bias Current The ● denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 1. CONDITIONS VIN = 3.3V, No Switching, Mode = VIN VIN = 3.3V, No Switching, Mode = 0V VIN = 3.3V, VOUT = 1.5V, Switching Continuous VIN = 5V, No Switching, Mode = VIN VIN = 5V, No Switching, Mode = 0V VIN = 5V, VOUT = 1.5V, Switching Continuous Shutdown, RUN = 0, VIN = 5V MIN TYP 400 1.15 55 450 1.3 75 1 4.5 2.93 MAX UNITS μA mA mA μA mA mA μA A A IS(VIN) Input Supply Current VIN = 3.3V, VOUT = 1.5V, IOUT = 8A VIN = 5V, VOUT = 1.5V, IOUT = 8A VOUT = 1.5V VIN = 3.3V, 5.5V VIN = 2.7V VOUT = 1.5V, VIN from 2.7V to 5.5V, IOUT = 0A VOUT = 1.5V (Note 3) VIN = 3.3V, 5.5V, ILOAD = 0A to 8A VIN = 2.7V, ILOAD = 0A to 5A IOUT = 0A, COUT = 100μF X5R Ceramic, VIN = 5V, VOUT = 1.5V IOUT = 8A, VIN = 5V, VOUT = 1.5V COUT = 100μF, VOUT = 1.5V, IOUT = 0A VIN = 3.3V VIN = 5V COUT = 100μF, VOUT = 1.5V, VIN = 5V, IOUT = 1A Resistive Load, Track = VIN, Load: 0% to 50% to 0% of Full Load, COUT = 100μF Ceramic, 100μF POSCAP, VIN = 5V, VOUT = 1.5V Load: 0% to 50% to 0% of Full Load, VIN = 5V, VOUT = 1.5V, COUT = 100μF COUT = 100μF VIN = 2.7V, VOUT = 1.5V VIN = 3.3V, VOUT = 1.5V VIN = 5V, VOUT = 1.5V IOUT = 0A, VOUT = 1.5V, VIN = 2.7V to 5.5V 0.590 0.587 1.25 0.75 ● Output Specifications IOUT(DC) Output Continuous Current Range (Note 3) Line Regulation Accuracy Load Regulation Accuracy 0 0 0.1 8 5 0.25 A A %/V ΔVOUT(LINE) VOUT ΔVOUT(LOAD) VOUT VOUT(AC) fS fSYNC ΔVOUT(START) ● ● 0.3 0.3 10 1.5 0.75 0.75 % % mVP-P Output Ripple Voltage Switching Frequency SYNC Capture Range Turn-On Overshoot 1.75 2.25 MHz MHz mV mV μs mV 10 10 100 15 tSTART ΔVOUT(LS) Turn-On Time Peak Deviation for Dynamic Load Settling Time for Dynamic Load Step Output Current Limit tSETTLE IOUT(PK) 10 μs 8 11 13 0.596 0.596 90 0.2 0.602 0.606 A A A V V μs μA 1.7 1.5 V V Control Section VFB SS Delay IFB VRUN RUN Pin On/Off Threshold RUN Rising RUN Falling 1.4 1.3 Voltage at FB Pin Internal Soft-Start Delay ● 1.55 1.4 4608afa 3 LTM4608A ELECTRICAL CHARACTERISTICS SYMBOL TRACK PARAMETER Tracking Threshold (Rising) Tracking Threshold (Falling) Tracking Disable Threshold Resistor Between VOUT and FB Pins PGOOD Range Output Voltage Margining Percentage MGN = VIN, BSEL = 0V MGN = VIN, BSEL = VIN MGN = VIN, BSEL = Float MGN = 0V, BSEL = 0V MGN = 0V, BSEL = VIN MGN = 0V, BSEL = Float 4 9 14 –4 –9 –14 The ● denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. See Figure 1. CONDITIONS RUN = VIN RUN = 0V 9.95 MIN TYP 0.57 0.18 VIN – 0.5 10 ±10 5 10 15 –5 –10 –15 6 11 16 –6 –11 –16 10.05 MAX UNITS V V V kΩ % % % % % % % RFBHI ΔVPGOOD %Margining Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM4608AE is guaranteed to meet performance specifications over the 0°C to 125°C internal operating temperature range. Specifications over the full –40°C to 125°C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4608AI is guaranteed to meet specifications over the full internal operating temperature range. The LTM4608AMP is guaranteed and tested over the –55°C to 125°C temperature range. Note that the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: See output current derating curves for different VIN, VOUT and TA . 4608afa 4 LTM4608A TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load Current 100 95 EFFICIENCY (%) EFFICIENCY (%) 90 85 80 75 70 0 2 CONTINUOUS MODE 100 95 EFFICIENCY (%) 90 85 80 75 70 6 8 4608A G01 Efficiency vs Load Current CONTINUOUS MODE 100 95 90 85 80 75 70 6 8 4608A G02 Efficiency vs Load Current CONTINUOUS MODE 5VIN 1.2VOUT 5VIN 1.5VOUT 5VIN 1.8VOUT 5VIN 2.5VOUT 5VIN 3.3VOUT 4 LOAD CURRENT 3.3VIN 1.2VOUT 3.3VIN 1.5VOUT 3.3VIN 1.8VOUT 3.3VIN 2.5VOUT 0 2 4 LOAD CURRENT 2.7VIN 1.0VOUT 2.7VIN 1.5VOUT 2.7VIN 1.8VOUT 0 1 4 3 2 5 LOAD CURRENT (A) 6 7 4608A G03 Burst Mode Efficiency with 5V Input 100 90 EFFICIENCY (%) 80 70 60 50 40 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 LOAD CURRENT (A) 4608A G04 VIN to VOUT Step-Down Ratio 4.0 3.5 3.0 2.5 VOUT (V) 2.0 1.5 1.0 IOUT = 8A VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V 4.0 3.5 3.0 2.5 VOUT (V) 2.0 1.5 1.0 0.5 0 1 2 3 VIN (V) 4 0 5 6 4608A G05 VIN to VOUT Step-Down Ratio IOUT = 5A VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V VOUT = 2.5V VOUT = 3.3V VOUT = 1.5V VOUT = 2.5V VOUT = 3.3V 0.5 0 0 1 2 3 VIN (V) 4 5 6 4608A G06 Supply Current vs VIN 1.6 1.4 SUPPLY CURRENT (mA) 1.2 1 0.8 0.6 0.4 0.2 0 2.5 3 3.5 4 4.5 INPUT VOLTAGE (V) 5 5.5 4608A G07 Load Transient Response ILOAD 1A/DIV Load Transient Response VO = 1.2V PULSE-SKIPPING MODE VIN 2V/DIV VOUT 20mV/DIV AC COUPLED ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED VO = 1.2V BURST MODE 4608A G08 VIN = 5V 20μs/DIV VOUT = 3.3V, RFB = 2.21k 2A/μs STEP COUT = 100μF X5R C1 = 100pF C3 = 22pF FROM FIGURE 18 , 4608A G09 VIN = 5V 20μs/DIV VOUT = 2.5V, RFB = 3.09k 2.5A/μs STEP COUT = 100μF X5R C1 = 120pF C3 = 47pF FROM FIGURE 18 , 4608afa 5 LTM4608A TYPICAL PERFORMANCE CHARACTERISTICS Load Transient Response Load Transient Response Load Transient Response ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED ILOAD 2A/DIV VOUT 20mV/DIV AC COUPLED 4608A G10 VIN = 5V 20μs/DIV VOUT = 1.8V, RFB = 4.87k 2.5A/μs STEP COUT = 100μF X5R C1 = NONE, C3 = NONE FROM FIGURE 18 4608A G11 VIN = 5V 20μs/DIV VOUT = 1.5V, RFB = 6.65k 2.5A/μs STEP COUT = 100μF X5R C1 = NONE, C3 = NONE FROM FIGURE 18 4608A G12 VIN = 5V 20μs/DIV VOUT = 1.2V, RFB = 10k 2.5A/μs STEP COUT = 2 × 100μF C1 = 100pF C3 = NONE FROM FIGURE 18 , Start-Up 602 600 VFB vs Temperature 0 –0.1 LOAD REGULATION (%) VIN = 5.5V 598 VFB (mV) VIN = 3.3V –0.2 –0.3 –0.4 –0.5 –0.6 Load Regulation vs Current VOUT 0.5V/DIV VIN 2V/DIV 596 VIN = 2.7V 594 VIN = 5V 50μs/DIV VOUT = 1.5V COUT = 100μF NO LOAD AND 8A LOAD (DEFAULT 100μs SOFT-START) 4608A G13 592 590 –55 FC MODE VIN = 3.3V VOUT = 1.5V 0 2 4 6 LOAD CURRENT (A) 8 –25 65 35 TEMPERATURE (°C) 5 95 125 4608A G14 4608A G15 2.5V Output Current 3.0 2.5 OUTPUT VOLTAGE (V) 2.0 1.5 1.0 0.5 0 0 5 10 15 OUTPUT CURRENT (A) 20 4608A G16 Short-Circuit Protection (2.5V Short, No Load) 2V/DIV 2V/DIV VIN 5V/DIV 5V/DIV VOUT 5A/DIV 5A/DIV IOUT 5A/DIV Short-Circuit Protection (2.5V Short, 4A Load) VIN VOUT IOUT LOAD IOUT SHORT VIN = 5V VOUT = 2.5V 50μs/DIV 4608A G17 VIN = 5V VOUT = 2.5V 50μs/DIV 4608A G18 4608afa 6 LTM4608A PIN FUNCTIONS VIN (C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. VOUT (C10-C11, D10-D11, E9-E11, F9-F11, G9-G11): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. See Table 1. GND (A1-A11, B1, B9-B11, F3, F7-F8, G1-G8): Power Ground Pins for Both Input and Output Returns. SVIN (F4): Signal Input Voltage. This pin is internally connected to VIN through a lowpass filter. SGND (E1): Signal Ground Pin. Return ground path for all analog and low power circuitry. Tie a single connection to GND in the application. MODE (B5): Mode Select Input. Tying this pin high enables Burst Mode operation. Tying this pin low enables forced continuous operation. Floating this pin or tying it to VIN/2 enables pulse-skipping operation. CLKIN (B3): External Synchronization Input to Phase Detector. This pin is internally terminated to SGND with a 50k resistor. The phase locked loop will force the internal top power PMOS turn on to be synchronized with the rising edge of the CLKIN signal. Connect this pin to SVIN to enable spread spectrum modulation. During external synchronization, make sure the PLLLPF pin is not tied to VIN or GND. PLLLPF (E3): Phase Locked Loop Lowpass Filter. An internal lowpass filter is tied to this pin. In spread spectrum mode, placing a capacitor here to SGND controls the slew rate from one frequency to the next. Alternatively, floating this pin allows normal running frequency at 1.5MHz, tying this pin to SVIN forces the part to run at 1.33 times its normal frequency (2MHz), tying it to ground forces the frequency to run at 0.67 times its normal frequency (1MHz). PHMODE (B4): Phase Selector Input. This pin determines the phase relationship between the internal oscillator and CLKOUT. Tie it high for 2-phase operation, tie it low for 3-phase operation, and float or tie it to VIN/2 for 4-phase operation. MGN (B8): Margining Pin. Tie this pin to VOUT to disable margining. For margining, connect a voltage divider from VIN to GND with the center point connected to the MGN pin. Each resistor ≈ 50k. See Applications Information and Figure 18. BSEL (B7): Margining Bit Select Pin. Tying BSEL low selects ±5%, tying it high selects ±10%. Floating it or tying it to VIN/2 selects ±15%. TRACK (E5): Output Voltage Tracking Pin. Voltage tracking is enabled when the TRACK voltage is below 0.57V. If tracking is not desired, then connect the TRACK pin to SVIN. If TRACK is not tied to SVIN, then the TRACK pin’s voltage needs to be below 0.18V before the chip shuts down even though RUN is already low. Do not float this pin. A resistor divider and capacitor can be applied to the TRACK pin to increase the soft-start time of the regulator. See Applications Information. Can tie together for parallel operation and tracking. Load current needs to be present during track down. FB (E7): The Negative Input of the Error Amplifier. Internally, this pin is connected to VOUT with a 10k precision resistor. Different output voltages can be programmed with an additional resistor between FB and GND pins. In PolyPhase® operation, tie FB pins together for parallel operation. See Applications Information for details. ITH (F6): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Tie together in parallel operation. ITHM (F5): Negative Input to the Internal ITH Differential Amplifier. Tie this pin to SGND for single phase operation. For PolyPhase operation, tie the master’s ITHM to SGND while connecting all of the ITHM pins together. PolyPhase is a registered trademark of Linear Technology Corporation. 4608afa 7 LTM4608A PIN FUNCTIONS PGOOD (C7): Output Voltage Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage is not within ±10% of the regulation point. Disabled during margining. RUN (F1): Run Control Pin. A voltage above 1.5V will turn on the module. SW (C3-C5): Switching Node of the Circuit is Used for Testing Purposes. This can be connected to copper on the board for improved thermal performance. CLKOUT (F2): Output Clock Signal for PolyPhase Operation. The phase of CLKOUT is determined by the state of the PHMODE pin. TOP VIEW A 1 2 3 4 5 6 7 8 9 10 11 GND VOUT CNTRL SW B C D VIN E F G GND CNTRL GND LGA PACKAGE 68-PIN (15mm × 9mm × 2.8mm) 4608afa 8 LTM4608A SIMPLIFIED BLOCK DIAGRAM SVIN TRACK INTERNAL FILTER 10μF 10μF 10μF VIN + CIN VIN 2.7 TO 5.5V MGN BSEL M1 PGOOD MODE RUN CLKIN CLKOUT PHMODE GND ITH INTERNAL COMP PLLLPF INTERNAL FILTER ITHM SGND 10k FB RFB 6.65k M2 22μF 22pF COUT POWER CONTROL L VOUT VOUT 1.5V SW 4608A BD Figure 1. Simplified LTM4608A Block Diagram Table 1. Decoupling Requirements. TA = 25°C, Block Diagram Configuration SYMBOL CIN COUT PARAMETER External Input Capacitor Requirement (VIN = 2.7V to 5.5V, VOUT = 1.5V) CONDITIONS IOUT = 8A MIN 10 100 TYP MAX UNITS μF μF External Output Capacitor Requirement IOUT = 8A (VIN = 2.7V to 5.5V, VOUT = 1.5V) OPERATION The LTM4608A is a standalone nonisolated switch mode DC/DC power supply. It can deliver up to 8A of DC output current with few external input and output capacitors. This module provides precisely regulated output voltage programmable via one external resistor from 0.6V DC to 5.0V DC over a 2.7V to 5.5V input voltage. The typical application schematic is shown in Figure 18. The LTM4608A has an integrated constant frequency current mode regulator and built-in power MOSFET devices with fast switching speed. The typical switching frequency is 1.5MHz. For switching noise sensitive applications, it can be externally synchronized from 0.75MHz to 2.25MHz. Even spread spectrum switching can be implemented in the design to reduce noise. With current mode control and internal feedback loop compensation, the LTM4608A module has sufficient stability margins and good transient performance with a wide range of output capacitors, even with all ceramic output capacitors. 4608afa 9 LTM4608A OPERATION Current mode control provides cycle-by-cycle fast current limit and thermal shutdown in an overcurrent condition. Internal overvoltage and undervoltage comparators pull the open-drain PGOOD output low if the output feedback voltage exits a ±10% window around the regulation point. Pulling the RUN pin below 1.3V forces the controller into its shutdown state, by turning off both M1 and M2 at low load current. The TRACK pin is used for programming the output voltage ramp and voltage tracking during start-up. See Applications Information. The LTM4608A is internally compensated to be stable over all operating conditions. Table 3 provides a guideline for input and output capacitances for several operating conditions. The Linear Technology μModule Power Design Tool is provided for transient and stability analysis. The FB pin is used to program the output voltage with a single external resistor to ground. Multiphase operation can be easily employed with the synchronization and phase mode controls. Up to 12 phases can be cascaded to run simultaneously with respect to each other by programming the PHMODE pin to different levels. The LTM4608A has clock in and clock out for poly phasing multiple devices or frequency synchronization. High efficiency at light loads can be accomplished with selectable Burst Mode operation using the MODE pin. These light load features will accommodate battery operation. Efficiency graphs are provided for light load operation in the Typial Performance Characteristics. Output voltage margining is supported, and can be programed from ±5% to ±15% using the MGN and BSEL pins. The PGOOD pin is disabled during margining APPLICATIONS INFORMATION The typical LTM4608A application circuit is shown in Figure 18. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 3 for specific external capacitor requirements for a particular application. VIN to VOUT Step-Down Ratios There are restrictions in the maximum VIN to VOUT stepdown ratio that can be achieved for a given input voltage. The LTM4608A is 100% duty cycle, but the VIN to VOUT minimum drop out is still shown as a function of its load current. For 5V input, all outputs can deliver 8A. For 3.3V input, all outputs can deliver 8A, except 2.5VOUT which is limited to 6A. Output Voltage Programming The PWM controller has an internal 0.596V reference voltage. As shown in the Block Diagram, a 10k 0.5% internal feedback resistor connects VOUT and FB pins together. The output voltage will default to 0.596V with no feedback resistor. Adding a resistor RFB from FB pin to GND programs the output voltage: VOUT = 0.596 V • 10k + RFB RFB Table 2. RFB Resistor vs Output Voltage VOUT RFB 0.596V Open 1.2V 10k 1.5V 6.65k 1.8V 4.87k 2.5V 3.09k 3.3V 2.21k Input Capacitors The LTM4608A module should be connected to a low AC impedance DC source. Three 10μF ceramic capacitors are included inside the module. Additional input capacitors are only needed if a large load step is required up to the 4A level. A 47μF to 100μF surface mount aluminum electrolytic bulk capacitor can be used for more input bulk capacitance. This bulk input capacitor is only needed if the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. If low impedance power planes are used, then this 47μF capacitor is not needed. For a buck converter, the switching duty-cycle can be estimated as: 4608afa 10 LTM4608A APPLICATIONS INFORMATION D= VOUT VIN Burst Mode Operation The LTM4608A is capable of Burst Mode operation in which the power MOSFETs operate intermittently based on load demand, thus saving quiescent current. For applications where maximizing the efficiency at very light loads is a high priority, Burst Mode operation should be applied. To enable Burst Mode operation, simply tie the MODE pin to VIN. During this operation, the peak current of the inductor is set to approximately 20% of the maximum peak current value in normal operation even though the voltage at the ITH pin indicates a lower value. The voltage at the ITH pin drops when the inductor’s average current is greater than the load requirement. As the ITH voltage drops below 0.2V, the BURST comparator trips, causing the internal sleep line to go high and turn off both power MOSFETs. In sleep mode, the internal circuitry is partially turned off, reducing the quiescent current to about 450μA. The load current is now being supplied from the output capacitor. When the output voltage drops, causing ITH to rise above 0.25V, the internal sleep line goes low, and the LTM4608A resumes normal operation. The next oscillator cycle will turn on the top power MOSFET and the switching cycle repeats. Pulse-Skipping Mode Operation In applications where low output ripple and high efficiency at intermediate currents are desired, pulse-skipping mode should be used. Pulse-skipping operation allows the LTM4608A to skip cycles at low output loads, thus increasing efficiency by reducing switching loss. Floating the MODE pin or tying it to VIN/2 enables pulse-skipping operation. This allows discontinuous conduction mode (DCM) operation down to near the limit defined by the chip’s minimum on-time (about 100ns). Below this output current level, the converter will begin to skip cycles in order to maintain output regulation. Increasing the output load current slightly, above the minimum required for discontinuous conduction mode, allows constant frequency PWM. Forced Continuous Operation In applications where fixed frequency operation is more critical than low current efficiency, and where the lowest output ripple is desired, forced continuous operation should 4608afa Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: ICIN(RMS) = IOUT(MAX) η% • D • (1– D) In the above equation, η% is the estimated efficiency of the power module. The bulk capacitor can be a switcherrated electrolytic aluminum capacitor, polymer capacitor for bulk input capacitance due to high inductance traces or leads. If a low inductance plane is used to power the device, then only one 10μF ceramic is required. The three internal 10μF ceramics are typically rated for 2A of RMS ripple current, so the ripple current at the worse case for 8A maximum current is 4A or less. Output Capacitors The LTM4608A is designed for low output voltage ripple noise. The bulk output capacitors defined as COUT are chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. COUT can be a low ESR tantalum capacitor, a low ESR polymer capacitor or ceramic capacitor. The typical output capacitance range is from 47μF to 220μF. Additional output filtering may be required by the system designer, if further reduction of output ripple or dynamic transient spikes is required. Table 3 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 3A/μs transient. The table optimizes total equivalent ESR and total bulk capacitance to optimize the transient performance. Stability criteria are considered in the Table 3 matrix, and the Linear Technology μModule Power Design Tool will be provided for stability analysis. Multiphase operation will reduce effective output ripple as a function of the number of phases. Application Note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance will be more a function of stability and transient response. The Linear Technology μModule Power Design Tool will calculate the output ripple reduction as the number phases implemented increases by N times. 11 LTM4608A APPLICATIONS INFORMATION Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step TYPICAL MEASURED VALUES VALUE COUT1 V ENDORS TDK 22μF, 6.3V Murata 22μF, 16V TDK 100μF, 6.3V Murata 100μF, 6.3V VOUT (V) 1.0 1.0 1.0 1.0 1.0 1.0 1.2 1.2 1.2 1.2 1.2 1.2 1.5 1.5 1.5 1.5 1.5 1.5 1.8 1.8 CIN (CERAMIC) 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF 10μF CIN (BULK)* 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF 100μF PART NUMBER C3216X7S0J226M GRM31CR61C226KE15L C4532X5R0J107MZ GRM32ER60J107M COUT1 (CERAMIC) 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 2 22μF × 1 100μF × 1 22μF × 1 COUT2 (BULK) 150μF × 2 150μF × 2 150μF × 2 150μF × 2 150μF × 2 150μF × 2 150μF × 2 150μF × 2 150μF × 2 150μF × 2 COUT2 V ENDORS Sanyo POSCAP CIN (BULK) VENDORS Sanyo VALUE 150μF, 10V VALUE 100μF, 10V PART NUMBER 10TPD150M PART NUMBER 10CE100FH I TH None None None None None None None None None None None None None None None None None None None None C1 68pF None 68pF None 68pF None 100pF None 100pF None 100pF 47pF 100pF None 100pF None 100pF None 47pF None 120pF None 120pF None 100pF 22pF 100pF 22pF 22pF None C3 None 100pF None 100pF None 100pF None 100pF None 100pF None None None 47pF None 47pF None None None 47pF None 47pF None None None None None None None None V IN (V) 5 5 3.3 3.3 2.7 2.7 5 5 3.3 3.3 2.7 2.7 5 5 3.3 3.3 2.7 2.7 5 5 3.3 3.3 2.7 2.7 5 5 3.3 3.3 5 5 DROOP PEAK-TO- PEAK (mV) DEVIATION (mV) 13 26 17 34 13 26 17 34 13 26 17 34 16 32 20 41 16 32 20 41 16 32 16 32 18 36 20 41 16 32 20 41 18 36 20 41 22 42 21 42 21 21 22 21 28 33 30 21 38 39 43 41 44 42 42 60 60 41 74 75 RECOVERY TIME (μs) 7 8 7 10 7 8 8 10 8 10 10 8 8 12 10 12 10 12 8 12 12 12 12 14 10 10 10 10 10 12 LOAD STEP (A/μs) 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 RFB (kΩ) 14.7 14.7 14.7 14.7 14.7 14.7 10 10 10 10 10 10 6.65 6.65 6.65 6.65 6.65 6.65 4.87 4.87 4.87 4.87 4.87 4.87 3.09 3.09 3.09 3.09 2.21 2.21 1.8 10μF 100μF 100μF × 2 None 1.8 10μF 100μF 22μF × 1 150μF × 2 None 1.8 10μF 100μF 100μF × 2 None 1.8 10μF 100μF 22μF × 1 150μF × 2 None 2.5 10μF 100μF 100μF × 1 None 2.5 10μF 100μF 22μF × 1 150μF × 1 None 2.5 10μF 100μF 100μF × 1 None 2.5 10μF 100μF 22μF × 1 150μF × 1 None 3.3 10μF 100μF 100μF × 1 100pF 3.3 10μF 100μF 22μF × 1 150μF × 1 None *Bulk capacitance is optional if VIN has very low input impedance. be used. Forced continuous operation can be enabled by tying the MODE pin to GND. In this mode, inductor current is allowed to reverse during low output loads, the ITH voltage is in control of the current comparator threshold throughout, and the top MOSFET always turns on with each oscillator pulse. During start-up, forced continuous mode is disabled and inductor current is prevented from reversing until the LTM4608A’s output voltage is in regulation. Multiphase Operation For output loads that demand more than 8A of current, multiple LTM4608As can be cascaded to run out of phase to provide more output current without increasing input and output voltage ripple. The CLKIN pin allows the LTM4608A to synchronize to an external clock (between 0.75MHz and 2.25MHz) and the internal phase locked loop allows 4608afa 12 LTM4608A APPLICATIONS INFORMATION the LTM4608A to lock onto CLKIN’s phase as well. The CLKOUT signal can be connected to the CLKIN pin of the following LTM4608A stage to line up both the frequency and the phase of the entire system. Tying the PHMODE pin to SVIN, SGND or SVIN/2 (floating) generates a phase difference (between CLKIN and CLKOUT) of 180°, 120° or 90° respectively, which corresponds to a 2-phase, 3phase or 4-phase operation. A total of 12 phases can be cascaded to run simultaneously with respect to each other by programming the PHMODE pin of each LTM4608A to different levels. For a 6-phase example in Figure 2, the 2nd stage that is 120° out of phase from the 1st stage can generate a 240° (PHMODE = 0) CLKOUT signal for the 3rd stage, which then can generate a CLKOUT signal that’s 420°, or 60° (PHMODE = SVIN) for the 4th stage. With the 60° CLKIN input, the next two stages can shift 120° (PHMODE = 0) for each to generate a 300° signal for the 6th stage. Finally, the signal with a 60° phase shift 0 CLKIN CLKOUT PHMODE PHASE 1 +120 120 CLKIN CLKOUT PHMODE PHASE 3 +120 240 CLKIN CLKOUT PHMODE PHASE 5 +180 on the 6th stage (PHMODE is floating) goes back to the 1st stage. Figure 3 shows the configuration for 12-phase operation. A multiphase power supply significantly reduces the amount of ripple current in both the input and output capacitors. The RMS input ripple current is reduced by, and the effective ripple frequency is multiplied by, the number of phases used (assuming that the input voltage is greater than the number of phases used times the output voltage). The output ripple amplitude is also reduced by the number of phases used. The LTM4608A device is an inherently current mode controlled device. Parallel modules will have very good current sharing. This will balance the thermals on the design. Tie the ITH pins of each LTM4608A together to share the current evenly. To reduce ground potential noise, tie the ITHM pins of all LTM4608As together and then connect to (420) 60 CLKIN CLKOUT PHMODE PHASE 2 +120 180 CLKIN CLKOUT PHMODE PHASE 4 +120 300 CLKIN CLKOUT PHMODE PHASE 6 SVIN 4608A F02 Figure 2. 6-Phase Operation 0 CLKIN CLKOUT PHMODE PHASE 1 +90 90 CLKIN CLKOUT PHMODE PHASE 4 +90 180 CLKIN CLKOUT PHMODE PHASE 7 +90 270 CLKIN CLKOUT PHMODE PHASE 10 +120 (390) 30 CLKIN CLKOUT PHMODE PHASE 2 +90 120 CLKIN CLKOUT PHMODE PHASE 5 +90 210 CLKIN CLKOUT PHMODE PHASE 8 +90 300 CLKIN CLKOUT PHMODE PHASE 11 +120 (420) 60 CLKIN CLKOUT PHMODE PHASE 3 +90 150 CLKIN CLKOUT PHMODE PHASE 6 4608A F03 +90 240 CLKIN CLKOUT PHMODE PHASE 9 +90 330 CLKIN CLKOUT PHMODE PHASE 12 Figure 3. 12-Phase Operation 4608afa 13 LTM4608A APPLICATIONS INFORMATION the SGND at only one point. Figure 19 shows a schematic of the parallel design. The FB pins of the parallel module are tied together. With parallel operation, input and output capacitors may be reduced in part according to the operating duty cycle. Input RMS Ripple Current Cancellation Application Note 77 provides a detailed explanation of multiphase operation. The input RMS ripple current cancellation mathematical derivations are presented, and a graph is displayed representing the RMS ripple current reduction as a function of the number of interleaved phases. Figure 4 shows this graph. Spread Spectrum Operation Switching regulators can be particularly troublesome where electromagnetic interference (EMI) is concerned. Switching regulators operate on a cycle-by-cycle basis to transfer power to an output. In most cases, the frequency of operation is fixed based on the output load. This method of conversion creates large components of noise at the 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 1-PHASE 2-PHASE 3-PHASE 4-PHASE 6-PHASE frequency of operation (fundamental) and multiples of the operating frequency (harmonics). To reduce this noise, the LTM4608A can run in spread spectrum operation by tying the CLKIN pin to SVIN. In spread spectrum operation, the LTM4608A’s internal oscillator is designed to produce a clock pulse whose period is random on a cycle-by-cycle basis but fixed between 70% and 130% of the nominal frequency. This has the benefit of spreading the switching noise over a range of frequencies, thus significantly reducing the peak noise. Spread spectrum operation is disabled if CLKIN is tied to ground or if it’s driven by an external frequency synchronization signal. A capacitor value of 0.01μF must be placed from the PLLLPF pin to ground to control the slew rate of the spread spectrum frequency change. Output Voltage Tracking Output voltage tracking can be programmed externally using the TRACK pin. The output can be tracked up and down with another regulator. The master regulator’s output is divided down with an external resistor divider that is the RMS INPUT RIPPLE CURRENT DC LOAD CURRENT 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 DUTY FACTOR (VO/VIN) 4608A F04 Figure 4. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Phases 4608afa 14 LTM4608A APPLICATIONS INFORMATION same as the slave regulator’s feedback divider to implement coincident tracking. The LTM4608A uses an accurate 10k resistor internally for the top feedback resistor. Figure 5 shows an example of coincident tracking: 10k Slave = 1 + • VTRACK RFB4 V TRACK is the track ramp applied to the slave’s track pin. V TRACK has a control range of 0V to 0.596V, or the internal reference voltage. When the master’s output is divided down with the same resistor values used to set the slave’s output, this resistor divider is connected to the slave’s track pin. The slave will then coincident track with the master until it reaches its final value. The master will continue to its final value from the slave’s regulation point. Voltage tracking is disabled when V TRACK is more than 0.596V. The track pin of the master can be controlled by an external ramp or by RSR and CSR in Figure 5 referenced to VIN. The RC ramp time can be programmed using equation: t = – ln 1– 0.596V • RSR • CSR VIN MASTER OUTPUT OUTPUT VOLTAGE (V) SLAVE OUTPUT TIME 4608A F06 Figure 6. Output Voltage Coincident Tracking VIN 5V VIN SVIN TIE TO VIN FOR DISABLE AND DEFAULT 100μs SOFT-START RSR CSR SW RUN TRACK RUN PLLLPF TRACK MODE CLKIN VOUT C2 100pF RFB1 2.21k MASTER 3.3V 100μF 7A C3 22pF LTM4608A FB ITH ITHM PGOOD BSEL 3.3V PHMODE MGN APPLY A CONTROL CLKOUT GND SGND RAMP WITH RSR AND CSR TIED TO VIN WHERE t = –(ln (1 – 0.596/VIN) • RSR • CSR) OR APPLY AN EXTERNAL TRACKING RAMP CLKIN VIN SVIN MASTER 3.3V RFB3 10k RFB4 6.65k SW RUN TRACK RUN PLLLPF TRACK MODE PHMODE VOUT C1 100μF RFB2 6.65k + C4 100μF SLAVE 1.5V 8A LTM4608A FB ITH ITHM PGOOD BSEL MGN 1.5V 4608A F05 CLKOUT GND SGND Figure 5. Dual Outputs (3.3V and 1.5V) with Tracking 4608afa 15 LTM4608A APPLICATIONS INFORMATION Ratiometric tracking can be achieved by a few simple calculations and the slew rate value applied to the master’s track pin. As mentioned above, the TRACK pin has a control range from 0V to 0.596V. The master’s TRACK pin slew rate is directly equal to the master’s output slew rate in Volts/Time: MR • 10k = RFB3 SR where MR is the master’s output slew rate and SR is the slave’s output slew rate in Volts/Time. When coincident tracking is desired, then MR and SR are equal, thus RFB3 is equal the 10k. RFB4 is derived from equation: RFB4 = 0.596 V VFB VFB VTRACK + – 10k RFB2 RFB3 For example: MR = 3.3V/ms and SR = 1.5V/ms. Then RFB3 = 22.1k. Solve for RFB4 to equal to 4.87k. For applications that do not require tracking or sequencing, simply tie the TRACK pin to SVIN to let RUN control the turn on/off. Connecting TRACK to SVIN also enables the ~100μs of internal soft-start during start-up. Load current needs to be present during track down. Power Good The PGOOD pin is an open-drain pin that can be used to monitor valid output voltage regulation. This pin monitors a ±10% window around the regulation point. As shown in Figure 20, the sequencing function can be realized in a dual output application by controlling the RUN pins and the PGOOD signals from each other. The 1.5V output begins its soft starting after the PGOOD signal of 3.3V output becomes high, and 3.3V output starts its shut down after the PGOOD signal of 1.5V output becomes low. This can be applied to systems that require voltage sequencing between the core and sub-power supplies. Slope Compensation The module has already been internally compensated for all output voltages. Table 3 is provided for most application requirements. A spice model will be provided for other control loop optimization. For single module operation, connect ITHM pin to SGND. For parallel operation, tie ITHM pins together and then connect to SGND at one point. Tie ITH pins together to share currents evenly for all phases. 4.0 3.5 3.0 POWER LOSS (W) 2.5 2.0 1.5 1.0 3.3VIN 1.5VOUT 3.3VIN 2.5VOUT 0 2 4 LOAD CURRENT (A) 4608A F07 where VFB is the feedback voltage reference of the regulator and V TRACK is 0.596V. Since RFB3 is equal to the 10k top feedback resistor of the slave regulator in equal slew rate or coincident tracking, then RFB4 is equal to RFB2 with VFB = V TRACK. Therefore RFB3 = 10k and RFB4 = 6.65k in Figure 5. In ratiometric tracking, a different slew rate maybe desired for the slave regulator. RFB3 can be solved for when SR is slower than MR. Make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach it final value before the master output. 4.0 3.5 3.0 POWER LOSS (W) 2.5 2.0 1.5 1.0 0.5 0 0.5 0 8 0 2 4 5VIN 1.5VOUT 5VIN 3.3VOUT 6 8 4608A F08 6 LOAD CURRENT (A) Figure 7. 3.3VIN, 2.5V and 1.5VOUT Power Loss Figure 8. 5VIN, 3.3V and 1.5VOUT Power Loss 4608afa 16 LTM4608A APPLICATIONS INFORMATION 9 8 7 LOAD CURRENT (A) LOAD CURRENT (A) 6 5 4 3 2 1 0 40 50 400LFM 200LFM 0LFM 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F09 9 8 7 6 5 4 3 2 1 0 40 50 400LFM 200LFM 0LFM 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F10 Figure 9. No Heat Sink with 3.3VIN to 1.5VOUT 9 8 7 LOAD CURRENT (A) Figure 10. BGA Heat Sink with 3.3VIN to 1.5VOUT 9 8 7 LOAD CURRENT (A) 6 5 4 3 2 400LFM 200LFM 0LFM 40 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F12 6 5 4 3 2 1 0 40 50 400LFM 200LFM 0LFM 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F11 1 0 Figure 11. No Heat Sink with 5VIN to 1.5VOUT Figure 12. BGA Heat Sink with 5VIN to 1.5VOUT 9 8 7 LOAD CURRENT (A) 6 5 4 3 2 400LFM 200LFM 0LFM 40 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F14 9 8 7 LOAD CURRENT (A) 6 5 4 3 2 1 0 40 50 400LFM 200LFM 0LFM 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F13 1 0 Figure 13. No Heat Sink with 3.3VIN to 2.5VOUT Figure 14. BGA Heat Sink with 3.3VIN to 2.5VOUT 4608afa 17 LTM4608A APPLICATIONS INFORMATION 9 8 7 LOAD CURRENT (A) 6 5 4 3 2 1 0 40 50 400LFM 200LFM 0LFM 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F15 9 8 7 LOAD CURRENT (A) 6 5 4 3 2 1 0 40 50 400LFM 200LFM 0LFM 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4608A F16 Figure 15. No Heat Sink with 5VIN to 3.3VOUT Figure 16. BGA Heat Sink with 5VIN to 3.3VOUT Table 4. 1.5V Output DERATING CURVE Figures 9, 11 Figures 9, 11 Figures 9, 11 Figures 10, 12 Figures 10, 12 Figures 10, 12 VIN ( V) 3.3, 5 3.3, 5 3.3, 5 3.3, 5 3.3, 5 3.3, 5 POWER LOSS CURVE Figures 7, 8 Figures 7, 8 Figures 7, 8 Figures 7, 8 Figures 7, 8 Figures 7, 8 AIR FLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink θJA (°C/W) 25 21 20 23.5 22 22 Table 5. 3.3V Output DERATING CURVE Figure 15 Figure 15 Figure 15 Figure 16 Figure 16 Figure 16 VIN ( V) 5 5 5 5 5 5 POWER LOSS CURVE Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 Figure 8 AIR FLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink θJA (°C/W) 25 21 20 23.5 22 22 4608afa 18 LTM4608A APPLICATIONS INFORMATION Output Margining For a convenient system stress test on the LTM4608A’s output, the user can program the LTM4608A’s output to ±5%, ±10% or ±15% of its normal operational voltage. The margin pin with a voltage divider is driven with a small three-state gate as shown in Figure 18, for the three margin states (high, low, no margin). When the MGN pin is low, it forces negative margining in which the output voltage is below the regulation point. When MGN is high, the output voltage is forced to above the regulation point. The amount of output voltage margining is determined by the BSEL pin. When BSEL is low, it is 5%. When BSEL is high, it is 10%. When BSEL is floating, it is 15%. When margining is active, the internal output overvoltage and undervoltage comparators are disabled and PGOOD remains high. Margining is disabled by tying the MGN pin to VOUT. Thermal Considerations and Output Current Derating The power loss curves in Figures 7 and 8 can be used in coordination with the load current derating curves in Figures 9 to 16 for calculating an approximate θJA for the module with various heat sinking methods. Thermal models are derived from several temperature measurements at the bench, and thermal modeling analysis. Thermal Application Note 103 provides a detailed explanation of the analysis for the thermal models and the derating curves. Tables 4 and 5 provide a summary of the equivalent θJA for the noted conditions. These equivalent θJA parameters are correlated to the measured values and improve with air flow. The junction temperature is maintained at 125°C or below for the derating curves. Safety Considerations The LTM4608A modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. Layout Checklist/Example The high integration of LTM4608A makes the PCB board layout very simple and easy. However, to optimize its Figure 17. Recommended PCB Layout electrical and thermal performance, some layout considerations are still necessary. • Use large PCB copper areas for high current path, including VIN, GND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. • Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize high frequency noise. • Place a dedicated power ground layer underneath the unit. • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. • Do not put vias directly on the pads, unless they are capped. • Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND to GND underneath the unit. Figure 17 gives a good example of the recommended layout. GND VOUT COUT COUT GND CIN COUT VIN CIN GND 4608A F17 4608afa 19 LTM4608A APPLICATIONS INFORMATION CLKIN VIN 3V TO 5.5V CLKIN VOUT 2.5V 8A 8A AT 5V INPUT 6A AT 3.3V INPUT CIN 10μF VIN SVIN SW RUN PLLLPF TRACK MODE PHMODE MODE PHMODE LTM4608A FB ITH ITHM PGOOD BSEL MGN 50k BSEL RFB 3.09k C3 47pF VIN 100k PGOOD VIN (HIGH = 10%) (FLOAT = 15%) (LOW = 5%) 1 50k VOUT 4 5 2 U1 U1: PERICON P1745T1G126CEX 3 OR TOSHIBA 7C75Z126AFE 4608A F18 VOUT C1 220pF COUT 100μF OE AIN CLKOUT GND SGND OE AIN VOUT MGN H H L H L X H L Z MARGIN VALUE H + OF BSEL SELECTION L – OF BSEL SELECTION NO MARGIN VIN/2 Figure 18. Typical 3V to 5.5VIN, 2.5V at 8A Design VIN 3V TO 5.5V 10μF VIN SVIN SW RUN RUN PLLLPF TRACK TRACK MODE PHMODE CLKIN VOUT C4 100pF 3.32k LTM4608A FB ITH ITHM 100μF 6.3V X5R VOUT 1.5V 16A PGOOD BSEL MGN VOUT C3 100μF 6.3V X5R CLKOUT GND SGND C2 10μF VIN SVIN SW RUN PLLLPF TRACK MODE PHMODE CLKIN VOUT LTM4608A FB ITH ITHM C1 100μF 6.3V X5R PGOOD BSEL MGN VOUT CLKOUT GND SGND 4608A F19 Figure 19. Two LTM4608As in Parallel, 1.5V at 16A Design 4608afa 20 LTM4608A APPLICATIONS INFORMATION CLKIN VIN 5V D1 MMSD4148 SHDN CLKIN VOUT2 3.3V 7A VIN SVIN SW RUN PLLLPF TRACK MODE PHMODE R1 100k LTM4608A FB ITH ITHM PGOOD BSEL MGN 100k 3.3V R2 100k 3.3V 1.5V SHDN C3 22pF RFB1 2.21k VOUT C2 100pF 100μF 6.3V X5R CLKOUT GND SGND VIN D2 MMSD4148 SHDN SVIN SW RUN PLLLPF TRACK MODE PHMODE CLKIN VOUT FB RFB2 6.65k LTM4608A ITH ITHM C1 100μF 6.3V X5R + C4 100μF SANYO POSCAP 10mΩ VOUT1 1.5V 8A 100k PGOOD BSEL MGN 1.5V 4608A F20 CLKOUT GND SGND Figure 20. Dual LTM4608A Output Sequencing Application CLKIN VIN 2.7V TO 5.5V 10μF CLKIN VOUT 1.2V/8A 5A AT 2.7V INPUT VIN SVIN SW RUN PLLLPF TRACK MODE PHMODE MODE PHMODE VOUT 100pF LTM4608A FB ITH ITHM 10k C2 100μF 6.3V X5R C1 100μF 6.3V X5R PGOOD BSEL MGN PGOOD BSEL 1.2V 4608A F21 CLKOUT GND SGND Figure 21. 2.7V to 5.5VIN, 1.2VOUT Design 4608afa 21 LTM4608A 22 CLKIN CLKIN VOUT C2 100pF SVIN SW 3.3V RUN PLLLPF ITHM PGOOD BSEL MGN VOUT3 TRACK R9 4.87k MODE PHMODE CLKOUT GND SGND VOUT1 ITH R1 4.87k R8 10k LTM4608A FB C8 100pF VIN VOUT CLKIN LTM4608A ITH ITHM PGOOD BSEL MGN C4 22pF R10 2.21k FB VOUT1 3.3V 100μF 7A 6.3V X5R C3 100μF 6.3V X5R VOUT3 1.8V 8A VIN 5V VIN SVIN SW RUN PLLLPF TRACK OR RAMP CONTROL TRACK MODE PHMODE APPLICATIONS INFORMATION CLKOUT GND SGND VIN C7 220pF SVIN SW 3.3V R6 10k R7 6.65k VOUT2 RUN C1 100μF 6.3V X5R CLKIN VOUT VIN SVIN LTM4608A ITH ITHM PGOOD BSEL MGN C8 47pF R2 3.09k FB VOUT2 2.5V 8A CLKIN VOUT + LTM4608A FB ITH R8 6.65k C5 100μF 6.3V X5R VOUT4 1.5V 8A SW 3.3V RUN R4 10k PLLLPF PLLLPF TRACK MODE PHMODE ITHM PGOOD BSEL MGN CLKOUT GND SGND VOUT4 4608A F22 C9 100μF 6.3V SANYO POSCAP 10mΩ TRACK R5 3.09k MODE PHMODE CLKOUT GND SGND Figure 22. 4-Phase, Four Outputs (3.3V, 2.5V, 1.8V and 1.5V) with Tracking 4608afa LTM4608A PACKAGE DESCRIPTION LGA Package 68-Lead (15mm × 9mm × 2.82mm) (Reference LTC DWG # 05-08-1821 Rev Ø) DETAIL A 2.72 – 2.92 aaa Z G F E D C B A PAD 1 1 PAD “A1” CORNER 4 2 3 4 5 15.00 BSC 12.70 BSC SUBSTRATE MOLD CAP 6 7 0.290 – 0.350 2.200 – 2.600 DETAIL B // bbb Z Z 8 9 10 11 X 9.00 BSC aaa Z Y 0.630 ±0.025 SQ. 68x eee S X Y DETAIL B 7.620 BSC 1.27 BSC PADS SEE NOTES 3 PACKAGE TOP VIEW PACKAGE BOTTOM VIEW 3.810 2.540 1.270 0.000 1.270 2.540 3.810 DETAIL A 6.350 5.080 3.810 2.540 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE COMPONENT PIN “A1” 1.270 0.000 1.270 2.540 3.810 5.080 6.350 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 68 SYMBOL TOLERANCE aaa 0.15 bbb 0.10 eee 0.05 LTMXXXXXX μModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION LGA 68 1207 REV Ø SUGGESTED PCB LAYOUT TOP VIEW 4608afa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTM4608A PACKAGE DESCRIPTION Pin Assignment Table (Arranged by Pin Number) PIN NAME A1 A2 A3 A4 A5 A6 A7 A8 A9 GND GND GND GND GND GND GND GND GND PIN NAME B1 B2 B3 B4 B5 B6 B7 B8 B9 GND – CLKIN MODE – BSEL MGN GND PIN NAME C1 C2 C3 C5 C6 C7 C8 C9 VIN – SW SW SW – PGOOD VIN VIN PIN NAME D1 D2 D3 D4 D5 D6 D7 D8 D9 VIN – VIN VIN VIN – VIN VIN VIN PIN NAME E1 E2 E3 E4 E5 E6 E7 E8 E9 SGND – PLLLPF – TRACK – FB VIN VOUT PIN NAME F1 F2 F3 F4 F5 F6 F7 F8 F9 RUN GND SVIN ITHM ITH GND GND VOUT PIN NAME G1 G3 G4 G5 G6 G7 G8 G9 GND GND GND GND GND GND GND GND VOUT CLKOUT G2 PHMODE C4 A10 GND A11 GND B10 GND B11 GND C10 VOUT C11 VOUT D10 VOUT D11 VOUT E10 VOUT E11 VOUT F10 VOUT F11 VOUT G10 VOUT G11 VOUT RELATED PARTS PART NUMBER DESCRIPTION LTC2900 LTC2923 LTM4600HV LTM4601/ LTM4601A LTM4602 LTM4603 LTM4604A LTM4605 LTM4607 LTM8020 LTM8021 LTM8022 LTM8023 Power Supply Tracking Controller 10A DC/DC μModule 12A DC/DC μModule with PLL, Output Tracking/ Margining and Remote Sensing 6A DC/DC μModule 6A DC/DC μModule with PLL and Outpupt Tracking/Margining and Remote Sensing Low VIN 4A DC/DC μModule 5A to 12A Buck-Boost μModule 5A to 12A Buck-Boost μModule High VIN 0.2A DC/DC Step-Down μModule High VIN 0.5A DC/DC Step-Down μModule High VIN 1A DC/DC Step-Down μModule High VIN 2 A DC/DC Step-Down μModule COMMENTS Tracks Both Up and Down; Power Supply Sequencing 4.5V ≤ VIN ≤ 28V; 0.6V ≤ VOUT ≤ 5V, LGA Package Guaranteed Operation from –55°C to 125°C Ambient, LGA Package Synchronizable, PolyPhase Operation, LTM4601-1/LTM4601A-1 Version has no Remote Sensing, LGA Package, MP Version Available Pin Compatible with the LTM4600, LGA Package Synchronizable, PolyPhase Operation, LTM4603-1 Version has no Remote Sensing, Pin Compatible with the LTM4601, LGA Package 2.375V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, 9mm × 15mm × 2.3mm LGA Package 4.5V ≤ VIN ≤ 20V; 0.8V ≤ VOUT ≤ 16V, 15mm × 15mm × 2.8mm LGA Package 4.5V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 25V, 15mm × 15mm × 2.8mm LGA Package 4V ≤ VIN ≤ 36V; 1.25V ≤ VOUT ≤ 5V, 6.25mm × 6.25mm × 2.3mm LGA Package 3V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 5V, 6.25mm × 11.25mm × 2.8mm LGA Package 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V, 11.25mm × 9mm × 2.8mm LGA Package 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V, 11.25mm × 9mm × 2.8mm LGA Package Quad Supply Monitor with Adjustable Reset Timer Monitors Four Supplies; Adjustable Reset Timer LTM4600HVMP Military Plastic 10A DC/DC μModule 4608afa 24 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 1008 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2008