LTM4615EVPBF

LTM4615 Triple Output, Low Voltage DC/DC µModule Regulator FEATURES n DESCRIPTION The LTM®4615 is a complete 4A dual output switching mode DC/DC power supply plus an additional 1.5A VLDO (very low dropout) linear regulator. Included in the package are the switching controllers, power FETs, inductors, a 1.5A regulator and all support components. The dual 4A DC/DC converters operate over an input voltage range of 2.375V to 5.5V, and the VLDO operates from a 1.14V to 3.5V input. The LTM4615 supports output voltages ranging from 0.8V to 5V for the DC/DC converters, and 0.4V to 2.6V for the VLDO. The three regulator output voltages are set by a single resistor for each output. Only bulk input and output capacitors are needed to complete the design. The low profile package (2.82mm) enables utilization of unused space on the bottom of PC boards for high density point of load regulation. High switching frequency and a current mode architecture enables a very fast transient response to line and load changes without sacrificing stability. The device supports output voltage tracking for supply rail sequencing. Additional features include overvoltage protection, foldback overcurrent protection, thermal shutdown and programmable soft-start. The power module is offered in a space saving and thermally enhanced 15mm × 15mm × 2.82mm LGA package. The LTM4615 is Pb-free and RoHS compliant. Dual 4A Output Power Supply with 1.5A VLDO™ n Short-Circuit and Overtemperature Protection n Power Good Indicators Switching Regulators Section—Current Mode Control n Input Voltage Range: 2.375V to 5.5V n 4A DC Typical, 5A Peak Output Current Each n 0.8V Up to 5V Output Each, Parallelable n ±2% Total DC Output Error n Output Voltage Tracking n Up to 95% Efficiency n Programmable Soft-Start VLDO Section n VLDO, 1.14V to 3.5V Input Range n VLDO, 0.4V to 2.6V, 1.5A Output n VLDO, 40dB Supply Rejection at f SW n ±1% Total DC Output Error n Small and Very Low Profile Package: 15mm × 15mm × 2.82mm APPLICATIONS n n n n Telecom and Networking Equipment Industrial Power Systems Low Noise Applications FPGA, SERDES Power L, LT, LTC, LTM, Linear Technology, the Linear logo and μModule are registered trademarks of Linear Technology Corporation. VLDO is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 6724174. TYPICAL APPLICATION 1.2V at 4A, 1.5V at 4A and 1V at 1A DC/DC μModule® Regulator VIN 3V TO 5.5V PGOOD1 10μF 6.3V 10k VOUT1 1.2V 4A PGOOD2 10μF 6.3V 10k VOUT2 1.5V 4A VIN VOUT3 1V AT 1A 10μF 6.3V PGOOD3 10k VOUT3 4615 TA01a Efficiency vs Output Current 91 89 87 EFFICIENCY (%) 85 83 81 79 77 75 0 1 2 LOAD CURRENT (A) 4615 TA01b VIN = 3.3V 22μF 6.3V 100μF 6.3V 10k 1.2V VIN VIN1 PGOOD1 VOUT1 FB1 TRACK1 RUN/SS1 LDO_IN EN3 10μF VIN2 PGOOD2 VOUT2 LTM4615 FB2 TRACK2 RUN/SS2 LDO_OUT FB3 PGOOD3 GND1 GND3 GND2 VOUT2 1.5V VOUT1 1.2V 5.76k 100μF 6.3V 22μF 6.3V VOUT3 1V (VIN = 1.2V) 3.32k 3 4 4615f 1 LTM4615 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION (See Pin Functions, Pin Configuration Table) TOP VIEW M L K J H G F E D C B A 1 2 3 4 5 6 7 8 9 10 11 12 Switching Regulators VIN1, VIN2, PGOOD1, PGOOD2 ..................... –0.3V to 6V COMP1, COMP2, RUN/SS1, RUN/SS2 VFB1, VFB2,TRACK1, TRACK2 .......................–0.3V to VIN SW, VOUT ........................................–0.3V to (VIN + 0.3V) Very Low Dropout Regulator LDO_IN, PGOOD3 ........................................ –0.3V to 6V LDO_OUT ........................................................–0.3 to 4V (EN3, FB3) to GND3 ............... –0.3V to (LDO_IN + 0.3V) LDO_OUT Short-Circuit.................................... Indefinite Internal Operating Temperature Range (Note 2).................................................. –40°C to 125°C Junction Temperature ........................................... 125°C Storage Temperature Range................... –55°C to 125°C LGA PACKAGE 144-LEAD (15mm 15mm 2.8mm) TJMAX = 125°C, θJC-BOTTOM = 2-3°C/W, θJA = 15°C/W, θJC-TOP = 25°C/W, wt = 1.61g ORDER INFORMATION LEAD FREE FINISH LTM4615EV#PBF LTM4615IV#PBF TRAY LTM4615EV#PBF LTM4615IV#PBF PART MARKING* LTM4615V LTM4615V PACKAGE DESCRIPTION 144-Lead (15mm × 15mm × 2.8mm) LGA 144-Lead (15mm × 15mm × 2.8mm) LGA TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, LDO_IN = 1.2V unless otherwise noted. Per Typical Application Figure 12. SYMBOL VIN(DC) VOUT(DC) VOUT(DC) PARAMETER Input DC Voltage Range Output DC Voltage Range Output Voltage CIN = 22μF COUT = 100μF RFB = 5.76k, , , VIN = 2.375V to 5.5V, IOUT = 0A to 4A (Note 6) 0°C ≤ TJ ≤ 125°C IOUT = 0A CONDITIONS l l ELECTRICAL CHARACTERISTICS MIN 2.375 0.8 TYP MAX 5.5 5.0 UNITS V V Switching Regulator Section: per Channel l 1.460 1.45 1.6 1.49 1.49 2 1.12 1.512 2.3 V V V VIN(UVLO) Undervoltage Lockout Threshold 4615f 2 LTM4615 ELECTRICAL CHARACTERISTICS SYMBOL IINRUSH(VIN) IQ(VIN) PARAMETER Input Inrush Current at Start-Up Input Supply Bias Current The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, LDO_IN = 1.2V unless otherwise noted. Per Typical Application Figure 12. CONDITIONS IOUT = 0A, CIN = 22μF COUT = 100μF VOUT = 1.5V, , , VIN = 5.5V VIN = 2.375V, VOUT = 1.5V, Switching Continuous VIN = 5.5V, VOUT = 1.5V, Switching Continuous Shutdown, RUN = 0, VIN = 5V VIN = 2.375V, VOUT = 1.5V, IOUT = 4A VIN = 5.5V, VOUT = 1.5V, IOUT = 4A VIN = 5.5V, VOUT = 1.5V (Note 6) 0 ±1.0 ±1.3 12 1.25 MIN TYP 0.35 28 45 7 3.2 1.48 4 ±1.30 ±1.6 MAX UNITS A mA mA μA A A A % % mVP-P MHz 12 IS(VIN) IOUT(DC) ΔVOUT(LOAD + LINE) VOUT VOUT(AC) fs ΔVOUT(START) Input Supply Current Output Continuous Current Range Load and Line Regulation Accuracy VOUT = 1.5V, 0A to 4A (Note 6) VIN = 2.375V to 5.5V Output Ripple Voltage Output Ripple Voltage Frequency Turn-On Overshoot IOUT = 0A, COUT = 100μF VIN = 5V, VOUT = 1.5V IOUT = 4A, VIN = 5V, VOUT = 1.5V COUT = 100μF VOUT = 1.5V, RUN/SS = 10nF , , IOUT = 0A VIN = 3.3V VIN = 5V COUT = 100μF VOUT = 1.5V, IOUT = 1A Resistive , Load, TRACK = VIN and RUN/SS = Float VIN = 5V Load: 0% to 50% to 0% of Full Load, COUT = 100μF VIN = 5V, VOUT = 1.5V , Load: 0% to 50% to 0% of Full Load, VIN = 5V, VOUT = 1.5V COUT = 100μF VIN = 5V, VOUT = 1.5V , IOUT = 0A, VOUT = 1.5V l 20 20 mV mV tSTART Turn-On Time 0.5 25 10 8 l ms mV μs A 0.807 0.809 0.9 V V μA V μA mV 0.8 V kΩ % 150 3.5 Ω V mA 20 5.2 μA V V 5.02 ΔVOUT(LS) tSETTLE IOUT(PK) VFB IFB VRUN ITRACK VTRACK(OFFSET) VTRACK(RANGE) RFBHI ΔVPGOOD RPGOOD VLDO Section VLDO_IN IIN(LDO_IN) IIN(SHDN) VBOOST3 VBOOST3(UVLO) Peak Deviation for Dynamic Load Settling Time for Dynamic Load Step Output Current Limit Voltage at FB Pin 0.790 0.786 0.6 0.8 0.8 0.2 0.75 0.2 30 RUN Pin On/Off Threshold TRACK Pin Current Offset Voltage Tracking Input Range Resistor Between VOUT and FB Pins PGOOD Range PGOOD Resistance Operating Voltage Operating Current Shutdown Current BOOST3 Output Voltage Undervoltage Lockout Open-Drain Pull-Down (Note 3) IOUT = 0mA, VOUT = 1V, EN3 = 1.2V EN3 = 0V, LDO_IN = 1.5V EN3 = 1.2V l TRACK = 0.4V 0 4.96 4.99 ±7.5 90 1.14 1 0.6 4.8 5 4.3 4615f 3 LTM4615 ELECTRICAL CHARACTERISTICS SYMBOL VFB3 VLDO_OUT VDO LDO_RHI IOUT ILIM en VIH_EN3 VIL_EN3 IIN_EN3 VOL_PGOOD3 PGOOD Threshold PARAMETER FB3 Internal Reference Voltage Output Voltage Range Dropout Voltage LDO Top Feedback Resistor Output Current Output Current Limit Output Voltage Noise EN3 Input High Voltage EN3 Input Low Voltage EN3 Input Current PGOOD Low Voltage Output Threshold Relative to VFB3 IPGOOD3 = 2mA PGOOD3 High to Low PGOOD3 Low to High –14 –4 VEN3 = 1.2V (Note 5) Frequency = 10Hz to 1MHz, ILOAD = 1A 1.14V ≤ VLDO_IN ≤ 3.5V 1.14V ≤ VLDO_IN ≤ 3.5V –1 0.1 –12 –3 l l The l denotes the specifications which apply over the full internal operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, LDO_IN = 1.2V unless otherwise noted. Per Typical Application Figure 12. CONDITIONS 1mA ≤ IOUT ≤ 1.5A, 1.14V ≤ VLDO_IN ≤ 3.5V, BOOST3 = 5V, 1V ≤ VOUT ≤ 2.59V VLDO_IN = 1.5V, VFB3 = 0.38V, IOUT = 1.5A (Note 4) 4.96 1.5 2.5 300 1 0.4 1 0.4 –10 –2 l MIN 0.397 0.395 0.4 TYP 0.4 0.4 100 4.99 MAX 0.404 0.405 2.6 250 5.02 UNITS V V V mV kΩ A A μRMS V V μA V % % Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM4615E is guaranteed to meet performance specifications over the 0°C to 125°C internal operating temperature range. Specifications over the –40°C to 125°C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTM4615I is guaranteed to meet specifications over the full internal operating temperature range. Note that the maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: Minimum operating voltage required for regulation is: VIN ≥ VOUT(MIN) + VDROPOUT Note 4: Dropout voltage is the minimum input to output differential needed to maintain regulation at a specified output current. In dropout the output voltage will be equal to VIN – VDROPOUT . Note 5: The IC has overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 125°C when overtemperature is activated. Continuous overtemperature activation can impair long-term reliability. Note 6: See output current derating curves for different VIN, VOUT and TA. 4615f 4 LTM4615 TYPICAL PERFORMANCE CHARACTERISTICS Switching Regulators Efficiency vs Output Current VIN = 2.5V 100 95 90 EFFICIENCY (%) 85 80 75 70 65 0 EFFICIENCY (%) 100 95 90 85 80 75 70 65 0 VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V 1 3 OUTPUT CURRENT (A) 2 4 4615 G02 Efficiency vs Output Current VIN = 3.3V 95 90 EFFICIENCY (%) 85 80 75 70 65 Efficiency vs Output Current VIN = 5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V 1 3 OUTPUT CURRENT (A) 2 4 4615 G01 VOUT = 3.3V VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V 0 1 2 3 OUTPUT CURRENT (A) 4 4615 G03 Minimum Input Voltage at 4A Load 3.5 3.0 2.5 VOUT (V) 2.0 1.5 1.0 0.5 0 VOUT = 3.3V VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.8V Load Transient Response Load Transient Response ILOAD 2A/DIV VOUT 20mV/DIV ILOAD 2A/DIV VOUT 20mV/DIV VIN = 5V 20μs/DIV VOUT = 1.2V COUT = 100μF, 6.3V CERAMICS 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIN (V) 4615 G04 4615 G05 VIN = 5V 20μs/DIV VOUT = 1.5V COUT = 100μF, 6.3V CERAMICS 4615 G06 Load Transient Response Load Transient Response Load Transient Response ILOAD 2A/DIV VOUT 20mV/DIV ILOAD 2A/DIV ILOAD 2A/DIV VOUT 20mV/DIV VOUT 20mV/DIV 20μs/DIV VIN = 5V VOUT = 1.8V COUT = 100μF, 6.3V CERAMICS 4615 G07 VIN = 5V 20μs/DIV VOUT = 2.5V COUT = 100μF, 6.3V CERAMICS 4615 G08 VIN = 5V 20μs/DIV VOUT = 3.3V COUT = 100μF, 6.3V CERAMICS 4615 G09 4615f 5 LTM4615 TYPICAL PERFORMANCE CHARACTERISTICS Start-Up Start-Up 806 VOUT 1V/DIV VOUT 1V/DIV VFB (mV) VIN = 5V 200μs/DIV VOUT = 2.5V COUT = 100μF 4A LOAD (0.01μF SOFT-START CAPACITOR) 4615 G11 VFB vs Temperature 804 802 IIN 1A/DIV IIN 1A/DIV 800 798 VIN = 5V 200μs/DIV VOUT = 2.5V COUT = 100μF NO LOAD (0.01μF SOFT-START CAPACITOR) 4615 G10 796 794 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 125 4615 G12 Current Limit Foldback 1.6 1.4 1.2 1.0 VOUT (V) 0.8 0.6 0.4 VOUT = 1.5V VIN = 5V 0.2 VIN = 3.3V VIN = 2.5V 0 4 5 3 IIN 4A/DIV VOUT 0.5V/DIV Short-Circuit Protection 1.5V Short, No Load Short-Circuit Protection 1.5V Short, 4A Load VOUT 0.5V/DIV IIN 1A/DIV 20μs/DIV 4615 G14 100μs/DIV 4615 G15 7 6 OUTPUT CURRENT (A) 8 4615 G13 VLDO VFB3 vs Temperature 404 403 402 FB3 VOLTAGE (mV) 401 400 399 398 397 396 –50 –25 0 25 50 VBOOST3 = 5V VLDO_IN = 1.5V VLDO_OUT =1.2V 75 TEMPERATURE (°C) 100 125 4615 G16 Dropout Voltage vs Input Voltage 200 180 160 DROPOUT (mV) 140 120 100 80 60 40 20 0 1.2 1.4 1.6 1.8 2.0 2.2 –40°C 25°C 85°C 125°C 2.4 2.6 4615 G17 Ripple Rejection 60 10kHz 50 RIPPLE REJECTION (dB) 1MHz 40 100kHz 30 20 10 0 1.2 VBOOST3 = 5V VLDO_OUT =1.2V IOUT = 800mA COUT = 10μF 1.4 1.6 1.8 2.0 2.2 VLDO_IN (V) 2.4 2.6 4615 G18 VFB3 = 0.38V ILDO_OUT =1.5A 1mA 1.5A VLDO_IN (V) 4615f 6 LTM4615 TYPICAL PERFORMANCE CHARACTERISTICS Ripple Rejection 70 60 RIPPLE REJECTION (dB) 50 ILDO_OUT (A) 40 30 20 10 0 100 VBOOST3 = 5V VLDO_IN = 1.5V VLDO_OUT =1.2V IOUT = 800mA COUT = 10μF 1000 100000 1000000 1E+07 FREQUENCY (Hz) 4615 G19 Output Current Limit 5.0 4.5 4.0 DELAY (ms) 3.5 3.0 2.5 CURRENT LIMIT 2.0 1.5 1.0 1.0 1.5 2.0 THERMAL LIMIT 5.0 VLDO_OUT = 0V TA = 25°C 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 2.5 VLDO_IN (V) 3.0 3.5 4615 G20 Delay from Enable to Power Good VLDO_OUT = 0.8V RLDO_OUT = 8Ω –40°C 25°C 85°C 10000 0 1.0 1.5 2.5 2.0 VLDO_IN (V) 3.0 3.5 4615 G21 Output Load Transient Response 1.5A ILDO_OUT 2mA VLDO_IN VLDO_OUT AC 20mV/DIV 2V 1.5V IN Supply Transient Response VLDO_OUT AC 10mV/DIV VLDO_OUT = 1.5V 50μs/DIV COUT = 10μF VLDO_IN = 1.7V VBOOST3 = 5V 4615 G22 VLDO_OUT = 1.2V 10μs/DIV ILDO_OUT = 800mA COUT = 10μF VBOOST3 = 5V TA = 25°C 4615 G23 BOOST3/OUT Start-Up HI EN3 LO 5V BOOST3 1V 1.5V VLDO_OUT AC 5mV/DIV BOOST3 AC 20mV/DIV BOOST3 Ripple and Feedthrough to VLDO_OUT VLDO_OUT 0V TA = 25°C RLDO_OUT = 1Ω VLDO_IN = 1.7V 200μs/DIV 4615 G24 VLDO_OUT = 1.2V 20μs/DIV VLDO_IN = 1.5V ILDO_OUT = 1A COUT = 10μF TA = 25°C 4615 G25 4615f 7 LTM4615 PIN FUNCTIONS VIN1, VIN2 (J1-J5, K1-K5); (C1-C6, D1-D5): Power Input Pins. Apply input voltage between these pins and GND pins. Recommend placing input decoupling capacitance directly between VIN pins and GND pins. VOUT1, VOUT2 (K9-K12, L9-L12, M9-M12); (C9-C12, D9-D12, E11-E12): Power Output Pins. Apply output load between these pins and GND pins. Recommend placing output decoupling capacitance directly between these pins and GND pins. Review Table 4. GND1, GND2, (H1, H7-H12, J6-J12, K6-K8 L1, L7-L8, M1-M8); (A1-A12, B1, B7-B12, C7-C8, D6-D8, E1, E8-E10): Power Ground Pins for Both Input and Output Returns. TRACK1, TRACK2 (L3, E3): Output Voltage Tracking Pins. When the module is configured as a master output, then a soft-start capacitor is placed on the RUN/SS pin to ground to control the master ramp rate, or an external ramp can be applied to the master regulator’s track pin to control it. Slave operation is performed by putting a resistor divider from the master output to the ground, and connecting the center point of the divider to this pin on the slave regulator. If tracking is not desired, then connect the TRACK pin to VIN. Load current must be present for tracking. See the Applications Information section. FB1, FB2 (L6, E6): The Negative Input of the Switching Regulators’ Error Amplifier. Internally, these pins are connected to VOUT with a 4.99k precision resistor. Different output voltages can be programmed with an additional resistor between the FB and GND pins. Two power modules can current share when this pin is connected in parallel with the adjacent module’s FB pin. See the Applications Information section. FB3 (F6): The Negative Input of the LDO Error Amplifier. Internally the pin is connected to LDO_OUT with a 4.99k resistor. Different output voltages can be programmed with an additional resistor between the FB3 and GND pins. See the Applications Information section. COMP1, COMP2 (L5, E5): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Two power modules can current share when this pin is connected in parallel with the adjacent module’s COMP pin. Each channel has been internally compensated. See the Applications Information section. PGOOD1, PGOOD2 (L4, E4): Output Voltage Power Good Indicator. Open-drain logic output that is pulled to ground when the output voltage is not within ±7.5% of the regulation point. RUN/SS1, RUN/SS2 (L2, E2): Run Control and Soft-Start Pin. A voltage above 0.8V will turn on the module, and below 0.5V will turn off the module. This pin has a 1M resistor to VIN and a 1000pF capacitor to GND. See the Applications Information section for soft-start information. SW1, SW2 (H2-H6, B2-B6): The switching node of the circuit is used for testing purposes. This can be connected to copper on the board for improved thermal performance. LDO_IN (G1-G4): VLDO Input Power Pins. Place input capacitor close to these pins. LDO_OUT (G9-G12): VLDO Output Power Pins. Place output capacitor close to these pins. Minimum 1mA load is necessary for proper output voltage accuracy. BOOST3 (E7): Boost Supply for Driving the Internal VLDO NMOS Into Full Enhancement. The pin is use for testing the internal boost converter. The output is typically 5V. GND3 (F1-F5, F7, F9-F12, G6-G8): The power ground pins for both input and output returns for the internal VLDO. PGOOD3 (G5): VLDO Power Good Pin. EN3 (F8): VLDO Enable Pin. 4615f 8 LTM4615 SIMPLIFIED BLOCK DIAGRAM Switching Regulator Block Diagram PGOOD 4.7μF 6.3V VIN VIN 22μF 2.375V TO 5.5V 6.3V RUN/SS CSSEXT TRACK SUPPLY 4.99k 5.76k TRACK COMP RSS 1M CSS 1000pF M1 CONTROL, DRIVE POWER FETS M2 L C2 470pF R1 4.99k VOUT 4.7μF 6.3V 22μF 6.3V 3 VOUT 1.5V 4A INTERNAL COMP GND FB RFB 5.76k SW 4615 F01a VLDO Block Diagram 5V BOOST VIN 1.14V TO 3.5V LDO_IN 10μF GND3 EN3 ENABLE 4.7μF 6.3V 0.4V BOOST3 4.7μF + – GND3 CONTROL LDO_RHI 4.99k LDO_OUT 4.7μF 6.3V GND3 FB3 PGOOD3 10k 4615 F01b GND3 VOUT 1V 10μF 1.5A POWER GOOD GND3 GND RFBLDO 3.32k 1V Figure 1. Simplified LTM4615 Block Diagram of Each Switching Regulator Channel and the VLDO DECOUPLING REQUIREMENTS SYMBOL CIN COUT LDO_IN LDO_OUT PARAMETER External Input Capacitor Requirement (VIN = 2.375V to 5.5V, VOUT = 1.5V) External Output Capacitor Requirement (VIN = 2.375V to 5.5V, VOUT = 1.5V) LDO Input Capacitance LDO Output Capacitance TA = 25°C. Use Figure 1 configuration for each channel. MIN 22 66 4.7 10 100 10 TYP MAX UNITS μF μF μF μF CONDITIONS IOUT = 4A IOUT = 4A IOUT = 1A IOUT = 1A 4615f 9 LTM4615 OPERATION LTM4615 POWER MODULE DESCRIPTION Dual Switching Regulator Section The LTM4615 is a standalone dual nonisolated switching mode DC/DC power supply with an additional onboard 1.5A VLDO. It can deliver up to 4A of DC output current for each channel with few external input and output capacitors. This module provides two precisely regulated output voltages programmable via one external resistor for each channel from 0.8V DC to 5V DC over a 2.375V to 5.5V input voltage. The VLDO is an independent 1.5A linear regulator that can be powered from either switching converter. The typical application schematic is shown in Figure 12. The LTM4615 has two integrated constant frequency current mode regulators, with built-in power MOSFETs with fast switching speed. The typical switching frequency is 1.25MHz. With current mode control and internal feedback loop compensation, these switching regulators have sufficient stability margins and good transient performance under a wide range of operating conditions, and with a wide range of output capacitors, even all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit. Besides, current limiting is provided in an overcurrent condition with thermal shutdown. In addition, internal overvoltage and undervoltage comparators pull the opendrain PGOOD outputs low if the particular output feedback voltage exits a ±7.5% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET, M1, is turned off and bottom FET, M2, is turned on and held on until the overvoltage condition clears, or current limit is exceeded. Pulling each specific RUN pin below 0.8V forces the specific regulator controller into its shutdown state, turning off both M1 and M2 for each power stage. At low load current, each regulator works in continuous current mode by default to achieve minimum output voltage ripple. The TRACK/SS pins are used for power supply tracking and soft-start programming for each specific regulator. See the Applications Information section. The LTM4615 is internally compensated to be stable over the operating conditions. Table 4 provides a guideline for input and output capacitance for several operating conditions. The Linear Technology μModule Power Design Tool will be provided for transient and stability analysis. The FB pins are used to program the specific output voltage with a single resistor to ground. VLDO Section The VLDO (very low dropout) linear regulator operates from a 1.14V to 3.5V input. The VLDO uses an internal NMOS transistor as the pass device in a source-follower configuration. The BOOST3 pin is the output of an internal boost converter that supplies the higher supply drive to the pass device for low dropout enhancement. The internal boost converter operates on very low current, thus optimizing high efficiency for the VLDO in close to dropout operation. An undervoltage lockout comparator on the LDO ensures that the boost voltage is greater than 4.2V before enabling the LDO, otherwise the LDO is disabled. The LDO provides a high accuracy output capable of supply 1.5A of output current with a typical drop out of 100mV. A single ceramic 10μF capacitor is all that is required for output capacitor bypassing. A low reference voltage allows the VLDO to have lower output voltages than the commonly available LDO. The device also includes current limit and thermal overload protection. The NMOS follower architecture has fast transient response without the traditional high drive currents in dropout. The VLDO includes a soft-start feature to prevent excessive current on the input during start-up. When the VLDO is enabled, the soft-start circuitry gradually increases the 0.4V reference voltage over a period of approximately 200μs. 4615f 10 LTM4615 APPLICATIONS INFORMATION Dual Switching Regulator The typical LTM4615 application circuit is shown in Figure 12. External component selection is primarily determined by the maximum load current and output voltage. Refer to Table 4 for specific external capacitor requirements for a particular application. VIN to VOUT Step-Down Ratios There are restrictions in the maximum VIN and VOUT stepdown ratio than can be achieved for a given input voltage on the two switching regulators. The LTM4615 is 100% duty cycle, but the VIN to VOUT minimum dropout will be a function the load current. A typical 0.5V minimum is sufficient. Output Voltage Programming Each regulator channel has an internal 0.8V reference voltage. As shown in the block diagram, a 4.99k internal feedback resistor connects the VOUT and FB pins together. The output voltage will default to 0.8V with no feedback resistor. Adding a resistor RFB from the FB pin to GND programs the output voltage: VOUT = 0.8 V • 4.99k + RFB RFB 1.2V 10k 1.5V 5.76k 1.8V 3.92k 2.5V 2.37k 3.3V 1.62k For a buck converter, the switching duty cycle can be estimated as: D= VOUT VIN Without considering the inductor current ripple, the RMS current of the input capacitor can be estimated as: ICIN(RMS) = IOUT(MAX ) η% • D • 1– D ( ) In the above equation, η% is the estimated efficiency of the power module. The bulk capacitor can be a switcherrated electrolytic aluminum OS-CON capacitor for bulk input capacitance due to high inductance traces or leads. If a low inductance plane is used to power the device, then no input capacitance is required. The internal 4.7μF ceramics on each channel input are typically rated for 1A of RMS ripple current up to 85°C operation. The worse-case ripple current for the 4A maximum current is 2A or less. An additional 10μF or 22μF ceramic capacitor can be used to supplement the internal capacitor with an additional 1A to 2A ripple current rating. Output Capacitors The LTM4615 switchers are designed for low output voltage ripple on each channel. The bulk output capacitors are chosen with low enough effective series resistance (ESR) to meet the output voltage ripple and transient requirements. The output capacitors can be a low ESR tantalum capacitor, low ESR polymer capacitor or ceramic capacitor. The typical output capacitance range is 66μF to 100μF . Additional output filtering may be required by the system designer, if further reduction of output ripple or dynamic transient spike is required. Table 4 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 2A/μs transient. The table optimizes total equivalent ESR and total bulk capacitance to maximize transient performance. Table 1. FB Resistor Table vs Various Output Voltages VOUT FB 0.8V Open Input Capacitors The LTM4615 module should be connected to a low AC impedance DC source. One 4.7μF ceramic capacitor is included inside the module for each regulator channel. Additional input capacitors are needed if a large load step is required up to the full 4A level and for RMS ripple current requirements. A 47μF bulk capacitor can be used for more input bulk capacitance. This 47μF capacitor is only needed if the input source impedance is compromised by long inductive leads or traces. 4615f 11 LTM4615 APPLICATIONS INFORMATION Fault Conditions: Current Limit and Overcurrent Foldback The LTM4615 has current mode control, which inherently limits the cycle-by-cycle inductor current not only in steady-state operation, but also in transient. Along with foldback current limiting in the event of an overload condition, the LTM4615 has overtemperature shutdown protection that inhibits switching operation around 150°C for each channel. Run Enable and Soft-Start The RUN/SS pins provide a dual function of enable and soft-start control for each channel. The RUN/SS pins are used to control turn on of the LTM4615. While each enable pin is below 0.5V, the LTM4615 will be in a low quiescent current state. At least a 0.8V level applied to the enable pins will turn on the LTM4615 regulators. This pin can be used to sequence the regulator channels. The soft-start control is provided by a 1M pull-up resistor (RSS) and a 1000pF capacitor (CSS) as drawn in the block diagram for each channel. An external capacitor can be applied to the RUN/SS pin to increase the soft-start time. A typical value is 0.01μF The approximate equation for soft-start: . ⎛ VIN ⎞ tSOFTSTART = In ⎜ • RSS • CSS ⎝ VIN – 1.8 V ⎟ ⎠ VIN 3V TO 5.5V C1 PGOOD1 10μF 6.3V R3 10k SLAVE 1.2V 4A C10 22μF 6.3V C3 22μF 6.3V C9 22μF 6.3V C4 22μF 6.3V RFB1 10k 1.5V C2 10μF PGOOD2 6.3V R4 10k MASTER 1.5V 4A VIN OR A CONTROL RAMP 1V LOW NOISE AT 1A C11 10μF 6.3V RFB2 5.76k C5 22μF 6.3V C13 CSSEXT 4615 F02 where RSS and CSS are shown in the block diagram of Figure 1, and the 1.8V is soft-start upper range. The soft-start function can also be used to control the output ramp-up time, so that another regulator can be easily tracked to it. Output Voltage Tracking Output voltage tracking can be programmed externally using the TRACK pins. Either output can be tracked up or down with another regulator. The master regulator’s output is divided down with an external resistor divider that is the same as the slave regulator’s feedback divider to implement coincident tracking. The LTM4615 uses a very accurate 4.99k resistor for the internal top feedback resistor. Figure 2 shows an example of coincident tracking. Equations: ⎛ ⎞ RFB1 TRACK1 = ⎜ • Master ⎝ 4.99k + RFB1⎟ ⎠ ⎛ 4.99k ⎞ • TRACK1 Slave = ⎜ 1+ RFB1 ⎟ ⎝ ⎠ RTB 4.99k L1 0.2μH* 1.2V C12 10μF RTA 10k VIN1 VIN2 PGOOD2 PGOOD1 VOUT1 VOUT2 FB2 FB1 COMP2 COMP1 TRACK2 TRACK1 LTM4615 RUN/SS1 RUN/SS2 LDO_IN LDO_OUT EN3 FB3 BOOST3 PGOOD3 GND1 GND3 GND2 C6 22μF 6.3V C7 22μF 6.3V C8 22μF 6.3V PGOOD3 R6 10k 1V LOW NOISE R5 3.32k *FAIR-RITE 0805 2508056007Y6 OPTIONAL FILTER Figure 2. Dual Outputs (1.5V and 1.2V) with Tracking 4615f 12 LTM4615 APPLICATIONS INFORMATION TRACK1 is the track ramp applied to the slave’s track pin. TRACK1 applies the track reference for the slave output up to the point of the programmed value at which TRACK1 proceeds beyond the 0.8V reference value. The TRACK1 pin must go beyond the 0.8V to ensure the slave output has reached its final value. Ratiometric tracking can be achieved by a few simple calculations and the slew rate value applied to the master’s TRACK pin. As mentioned above, the TRACK pin has a control range from 0V to 0.8V. The control ramp slew rate applied to the master’s TRACK pin is directly equal to the master’s output slew rate in Volts/Time. The equation: MR • 4.99k = RTB SR where MR is the master’s output slew rate and SR is the slave’s output slew rate in Volts/Time. When coincident tracking is desired, then MR and SR are equal, thus RTB is equal to 4.99k. RTA is derived from equation: RTA = 0.8 V V VFB V + FB – TRACK 4.99k RFB RTB Figure 3 shows the output voltage tracking waveform for coincident tracking. In ratiometric tracking, a different slew rate maybe desired for the slave regulator. RTB can be solved for when SR is slower than MR. Make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach it final value before the master output. For example, MR = 2.5V/ms and SR = 1.8V/1ms. Then RTB = 6.98k. Solve for RTA to equal to 3.24k. The master output must be greater than the slave output for the tracking to work. Output load current must be present for tracking to operate properly during power-down. Power Good PGOOD1 and PGOOD2 are open-drain pins that can be used to monitor valid output voltage regulation. These pins monitor a ±7.5% window around the regulation point. COMP Pin This pin is the external compensation pin. The module has already been internally compensated for all output voltages. Table 4 is provided for most application requirements. The Linear Technology μModule Power Design Tool will be provided for other control loop optimization. The COMP pins must be tied together in parallel operation. Parallel Switching Regulator Operation The LTM4615 switching regulators are inherently current mode control. Paralleling will have very good current sharing. This will balance the thermals on the design. Figure 13 shows a schematic of a parallel design. The voltage feedback equation changes with the variable N as channels are paralleled. The equation: SLAVE OUTPUT where VFB is the feedback voltage reference of the regulator, and VTRACK is 0.8V. Since RTB is equal to the 4.99k top feedback resistor of the slave regulator in equal slew rate or coincident tracking, then RTA is equal to RFB with VFB = VTRACK. Therefore RTB = 4.99k and RTA = 10k in Figure 2. MASTER OUTPUT OUTPUT VOLTAGE (V) VOUT 4.99k + RFB N = 0.8 V • RFB N is the number of paralleled channels. TIME 4615 F03 Figure 3. Output Voltage Coincident Tracking 4615f 13 LTM4615 APPLICATIONS INFORMATION VLDO SECTION Adjustable Output Voltage The output voltage is set by the ratio of two resistors. A 4.99k resistor is built onboard the module from LDO_OUT to FB3. An additional resistor (RFBLDO)is required from FB3 to GND3 to set the output voltage over a range of 0.4V to 2.6V. Minimum output current of 1mA is required for full output voltage range. The equation: VOUT = 0.4V • 4.99k + RFBLDO RFBLDO Short-Circuit/Thermal Protection The VLDO has built-in short-circuit current limiting of ~3A as well as overtemperature protection. During shortcircuit conditions the device is in control to 3A, and as the internal temperature rises to approximately 150°C, then the internal boost and LDO are shut down until the internal temperature drops back to 140°C. The device will cycle in and out of this mode with no latchup or damage. Long term over stress in this condition can degrade the device over time. Reverse Current Protection The VLDO features reverse current protection to limit current draw from any supplementary power source at the output. Figure 4 shows the reverse output current limit for constant input and output cases. Note: Positive input current represents current flowing into the LDO_IN pin. With LDO_OUT held at or below the output regulation voltage and LDO_IN varied, input current flow will follow Figure 4 curves. Input reverse current ramps up to 16μA as the LDO_IN approaches LDO_OUT. Reverse input current will spike up as LDO_IN approaches with in 30mV of LDO_OUT as reverse current protection circuitry is disabled and normal operation resumes. As LDO_IN transitions above LDO_OUT the reverse current transitions into short circuit current as long as LDO_OUT is held below the regulation voltage. 30 20 IIN CURRENT (μA) 10 0 –10 –20 –30 IN CURRENT LIMIT ABOVE 1.45V 10μF value. The X7R and X5R dielectrics are more stable with DC bias and temperature, thus more preferred. Power Good Operation The VLDO includes an open-drain power good (PGOOD3) pin with hysteresis. If the VLDO is in shutdown or under UVLO conditions (BOOST3 < 4.2V), then PGOOD3 is low impedance to ground. PGOOD3 becomes high impedance when the VLDO output voltage rises to 93% of its regulated voltage. PGOOD3 stays high impedance until the output voltage falls to 91% of its regulated voltage. A pull-up resistor can be inserted between the PGOOD3 pin and a positive logic supply such as the VLDO output or VIN. LDO_IN should be at least 1.14V or greater for power good to operate properly. Output Capacitance and Transient Response The VLDO is designed to be stable with a wide range of ceramic output capacitors. The ESR of the output capacitors affects stability, especially smaller value capacitors. An output capacitor of 10μF or greater with an ESR of 0.05Ω or less is recommended to ensure stability. Larger value capacitors can be used to reduce the transient deviations under load changes. Bypass capacitors that are used at the load device can also increase the effective output capacitance. High ESR tantalum or electrolytic bulk capacitance can be used, but a ceramic capacitor must be used in parallel at the output. Extra consideration should be given to the use of ceramic capacitors related to dielectrics, temperature and DC bias effects on the capacitor. The VLDO requires a minimum 0 0.3 0.9 0.6 1.2 INPUT VOLTAGE (V) 1.5 1.8 4615 F04 Figure 4. Reverse Current Limit for VLDO 4615f 14 LTM4615 TYPICAL APPLICATIONS Thermal Considerations and Output Current Derating The power loss curves in Figures 5 and 6 can be used in coordination with the load current derating curves in Figures 7 to10 for calculating an approximate θJA thermal resistance for the LTM4615 with various heat sinking and airflow conditions. Both of the LTM4615 outputs are at full 4A load current, and the power loss curves in Figures 5 and 6 are combined power losses plotted for both output voltages up to 4A each. The VLDO regulator is set to have a power dissipation of a 0.5W since it is generally used with dropout voltages of 0.5V or less. For example: 1.2V to 1V, 1.5V to 1V, 1.5V to 1.2V and 1.8V to 1.5V. Other drop voltages can be supported at VLDO maximum load, but further thermal analysis will be required for the VLDO. The 4A output voltages are 1.2V and 3.3V. These voltages are chosen to include the lower and higher output voltage ranges for correlating the thermal resistance. Thermal models are derived from several temperature measurements in a controlled temperature chamber along with thermal modeling analysis. The junction temperatures are monitored while ambient temperature is increased with and without airflow. The junctions are maintained at ~120°C while lowering output current or power while increasing ambient temperature. The 120°C is chosen to allow for a 5°C margin window relative to the maximum 125°C. The decreased output current will decrease the internal module loss as ambient temperature is increased. The 2.5 VIN = 5V 2.5 POWER LOSS (W) 2.0 1.5 1.0 0.5 0 0 1 2 LOAD CURRENT (A) 4615 F05 power loss curves in Figures 5 and 6 show this amount of power loss as a function of load current that is specified for both channels. The monitored junction temperature of 120°C minus the ambient operating temperature specifies how much module temperature rise can be allowed. As an example in Figure 7 the load current is derated to 3A for each channel with 0LFM at ~90°C and the power loss for both channels at 5V to 1.2V at 3A output are ~1.4W, then include the VDLO power loss of 0.5W to equal 1.9W. If the 90°C ambient temperature is subtracted from the 120°C maximum junction temperature, then the difference of 30°C divided 1.9W equals a 15.7°C/W thermal resistance. Table 2 specifies a 15°C/W value which is very close. Table 2 and Table 3 provide equivalent thermal resistances for 1.2V and 3.3V outputs with and without air flow and heat sinking. The combined power loss for the two 4A outputs plus the VLDO power loss can be summed together and multiplied by the thermal resistance values in Tables 2 and 3 for module temperature rise under the specified conditions. The printed circuit board is a 1.6mm thick four layer board with two ounce copper for the two outer layers and 1 ounce copper for the two inner layers. The PCB dimensions are 95mm × 76mm. The BGA heat sinks are listed below Table 3. The data sheet lists the θJP (Junction to pin) and θJC (Junction to case) thermal resistances under the Pin Configuration diagram. 3.0 VIN = 5V 2.0 POWER LOSS (W) 1.5 1.0 0.5 0 3 4 0 1 2 3 LOAD CURRENT (A) 4 4615 F06 Figure 5. 1.2V Power Loss Figure 6. 3.3V Power Loss 4615f 15 LTM4615 APPLICATIONS INFORMATION 4.5 4.0 3.5 LOAD CURRENT (A) LOAD CURRENT (A) 3.0 2.5 2.0 1.5 1.0 0.5 0 40 0LFM NO HEATSINK 200LFM NO HEATSINK 400LFM NO HEATSINK 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4615 F07 VIN = 5V 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 VIN = 5V 0LFM HEATSINK 200LFM HEATSINK 400LFM HEATSINK 40 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4615 F08 Figure 7. 1.2V No Heat Sink 4.5 4.0 3.5 LOAD CURRENT (A) LOAD CURRENT (A) 3.0 2.5 2.0 1.5 1.0 0.5 0 40 0LFM NO HEATSINK 200LFM NO HEATSINK 400LFM NO HEATSINK 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4615 F09 Figure 8. 1.2V Heat Sink 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 40 0LFM HEATSINK 200LFM HEATSINK 400LFM HEATSINK 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) 4615 F10 VIN = 5V VIN = 5V Figure 9. 3.3V No Heat Sink Figure 10. 3.3V Heat Sink 4615f 16 LTM4615 APPLICATIONS INFORMATION Table 2. 1.2V Output DERATING CURVE Figure 7 Figure 7 Figure 7 Figure 8 Figure 8 Figure 8 VIN (V) 5 5 5 5 5 5 POWER LOSS CURVE Figure 5 Figure 5 Figure 5 Figure 5 Figure 5 Figure 5 AIRFLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink θJA (°C/W) 15 12 10 14 9 8 Table 3. 3.3V Output DERATING CURVE Figure 9 Figure 9 Figure 9 Figure 10 Figure 10 Figure 10 VIN (V) 5 5 5 5 5 5 POWER LOSS CURVE Figure 6 Figure 6 Figure 6 Figure 6 Figure 6 Figure 6 AIRFLOW (LFM) 0 200 400 0 200 400 HEAT SINK None None None BGA Heat Sink BGA Heat Sink BGA Heat Sink θJA (°C/W) 15 12 10 14 9 8 HEAT SINK MANUFACTURER Aavid PART NUMBER 375424b00034G WEBSITE www.aavid.com 4615f 17 LTM4615 APPLICATIONS INFORMATION Safety Considerations The LTM4615 modules do not provide isolation from VIN to VOUT. There is no internal fuse. If required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. Layout Checklist/Example The high integration of LTM4615 makes the PCB board layout very simple and easy. However, to optimize its electrical and thermal performance, some layout considerations are still necessary. • Use large PCB copper areas for high current path, including VIN, GND and VOUT. It helps to minimize the PCB conduction loss and thermal stress. • Place high frequency ceramic input and output capacitors next to the VIN, GND and VOUT pins to minimize high frequency noise. • Place a dedicated power ground layer underneath the unit. • To minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between the top layer and other power layers. • Do not put via directly on pads unless the via is capped. Figure 11 gives a good example of the recommended layout. GND1 CONTROL CIN1 GND1 M L VIN1 SW1 GND1 K J VOUT1 COUT1 COUT2 V OUT1 GND1 H G F E D C B COUT4 COUT5 VOUT2 COUT3 LDO_OUT GND3 C LD0_IN IN2 GND3 GND2 CONTROL VIN2 GND2 CIN3 A 1 2 3 4 5 6 SW2 7 8 9 10 11 12 GND2 4615 F11 GND2 GND2 Figure 11. Recommended PCB Layout 4615f 18 LTM4615 APPLICATIONS INFORMATION VIN 3V TO 5.5V CIN1 PGOOD1 10μF 6.3V R3 10k VOUT1 1.2V 4A 100μF 6.3V 22μF 6.3V COUT1 22μF 6.3V 1.2V C12 10μF VIN L1 0.2μH* CIN2 10μF PGOOD2 6.3V R4 10k VOUT2 1.5V 4A COUT2 100μF 6.3V RFB1 10k VIN2 VIN1 PGOOD1 PGOOD2 VOUT1 VOUT2 FB1 FB2 COMP1 COMP2 TRACK1 TRACK2 LTM4615 RUN/SS2 RUN/SS1 LDO_OUT LDO_IN FB3 EN3 PGOOD3 BOOST3 GND1 GND3 GND2 VOUT3 1V LOW NOISE AT 1A C11 10μF 6.3V VIN RFB2 5.76k 22μF 6.3V 22μF 6.3V PGOOD3 R6 10k VOUT3 R5 3.32k *FAIR-RITE 0805 2508056007Y6 IF MORE FILTERING REQUIRED 4615 F12 Figure 12. Typical 3V to 5.5VIN, 1.5V and 1.2V at 4A and 1V at 1A Design Table 4. Output Voltage Response vs Component Matrix (Refer to Figure 12) 0A to 2.5A Load Step Typical Measured Values COUT1 AND COUT2 CERAMIC VENDORS TDK Murata TDK Murata VALUE 22μF 6.3V 22μF 16V 100μF 6.3V 100μF 6.3V PART NUMBER C3216X7SOJ226M GRM31CR61C226KE15L C4532X5R0J107MZ GRM32ER60J107M COUT1 AND COUT2 BULK VENDORS Sanyo POSCAP Sanyo POSCAP CIN BULK VENDORS Sanyo POSCAP VIN (V) 5 5 3.3 3.3 5 5 3.3 3.3 5 5 3.3 5 5 3.3 5 VALUE 150μF 10V 220μF 4V VALUE 100μF 10V PART NUMBER 10TPD150M 4TPE220MF PART NUMBER 10CE100FH RFB (kΩ) 10 10 10 10 5.76 5.76 5.76 5.76 3.92 3.92 3.92 2.37 2.37 2.37 1.62 VOUT CIN CIN COUT1 AND COUT2 COUT1 AND COUT2 (V) (CER) EACH (POSCAP) EACH (CERAMIC) (BULK)* 1.2 100μF None 10μF ×2 100μF 22μF ×2 , 1.2 100μF 220μF 10μF ×2 22μF ×1 1.2 100μF None 10μF ×2 100μF 22μF ×2 , 1.2 100μF 220μF 10μF ×2 22μF ×1 1.5 100μF None 10μF ×2 100μF 22μF ×2 , 1.5 100μF 220μF 10μF ×2 22μF ×1 1.5 100μF None 10μF ×2 100μF 22μF ×2 , 1.5 100μF 220μF 10μF ×2 22μF ×1 1.8 100μF None 10μF ×2 100μF 22μF ×2 , 1.8 100μF 220μF 10μF ×2 22μF ×1 1.8 100μF 220μF 10μF ×2 22μF ×1 None None 2.5 10μF ×2 22μF ×1 2.5 100μF 150μF 10μF ×2 22μF ×1 2.5 100μF 150μF 10μF ×2 22μF ×1 3.3 100μF 150μF 10μF ×2 22μF ×1 *Bulk capacitance is optional if VIN has very low input impedance. ITH None None None None None None None None None None None None None None None DROOP PEAK-TO-PEAK RECOVERY LOAD STEP (mV) DEVIATION TIME (μs) (A/μs) 33 68 11 2.5 25 50 9 2.5 33 68 8 2.5 25 50 10 2.5 30 60 11 2.5 28 60 11 2.5 30 60 10 2.5 27 56 10 2.5 34 68 12 2.5 30 60 12 2.5 30 60 12 2.5 50 90 10 2.5 33 60 10 2.5 50 95 12 2.5 50 90 12 2.5 4615f 19 LTM4615 APPLICATIONS INFORMATION VIN 3V TO 5.5V C1 10μF PGOOD1 6.3V R3 10k FB2 1.2V COMP2 VIN RUN/SS2 VIN1 PGOOD1 VOUT1 FB1 COMP1 TRACK1 RUN/SS1 LDO_IN EN3 BOOST3 GND1 C2 10μF 6.3V VIN2 PGOOD2 VOUT2 FB2 COMP2 TRACK2 RUN/SS2 LDO_OUT FB3 PGOOD3 GND3 PGOOD1 FB2 COMP2 VIN VOUT3 1V LOW NOISE AT 1A C11 10μF 6.3V C5 100μF 6.3V C6 100μF 6.3V VOUT2 1.2V 8A L1* 0.2μH 1.2V R1 4.99k C12 10μF LTM4615 PGOOD3 R6 10k 1V LOW NOISE GND2 R5 3.32k C13 0.01μF *FAIR-RITE 0805 2508056007Y6 IF MORE FILTERING REQUIRED 4615 F13 Figure 13. LTM4615 Parallel 1.2V at 8A Design, 1V at 1A Design 4615f 20 LTM4615 APPLICATIONS INFORMATION VIN 5V C1 10μF PGOOD1 6.3V R3 10k VOUT1 2.5V 4A C3 22μF 6.3V C9 22μF 6.3V C4 22μF 6.3V RFB1 2.37k SLAVE RTB 4.99k C1 10μF 6.3V PGOOD2 R4 10k MASTER C6 22μF 6.3V VOUT2 3.3V 4A RFB2 1.62k 3.3V 2.5V RTA C12 2.37k 10μF VIN2 VIN1 PGOOD1 PGOOD2 VOUT1 VOUT2 FB1 FB2 COMP1 COMP2 TRACK1 TRACK2 LTM4615 RUN/SS1 RUN/SS2 LDO_IN LDO_OUT EN3 FB3 BOOST3 PGOOD3 GND1 GND3 GND2 VIN OR A CONTROL RAMP VOUT3 1.8V AT 1A R5 1.43k PGOOD3 R6 10k 1.8V C5 C11 22μF 10μF 6.3V 6.3V 4615 F14 Figure 14. 3.3V and 2.5V at 4A with Output Voltage Tracking Design, 1.8V at 1A 4615f 21 LGA Package 144-Lead (15mm × 15mm × 2.82mm) (Reference LTC DWG # 05-08-1816 Rev A) DETAIL A X Y M L K J H 15 BSC MOLD CAP SUBSTRATE 13.97 BSC G F E D C B A PADS SEE NOTES 12 11 3 DETAIL B 1.9050 3.1750 4.4450 5.7150 6.9850 0.630 ±0.025 SQ. 143x eee S X Y 10 9 8 7 6 5 4 3 2 1 DIA 0.630 PAD 1 2.72 – 2.92 0.12 – 0.28 13.97 BSC 3x, C (0.22 x45°) LTM4615 PACKAGE DESCRIPTION aaa Z PACKAGE TOP VIEW bbb Z 4 Z 6.9850 5.7150 4.4450 3.1750 1.9050 6.9850 5.7150 4.4450 DETAIL A 3.1750 1.9050 0.6350 0.0000 0.6350 22 0.27 – 0.37 2.45 – 2.55 DETAIL B 1.27 BSC aaa Z 15 BSC PAD 1 CORNER PACKAGE BOTTOM VIEW NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222, SPP-010 LTMXXXXXX mModule COMPONENT PIN “A1” 0.6350 0.0000 0.6350 1.9050 3.1750 4.4450 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 5.7150 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 144 SYMBOL TOLERANCE 0.10 aaa 0.10 bbb eee 0.05 TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION LGA 144 0308 REV A 6.9850 SUGGESTED PCB LAYOUT TOP VIEW 4615f LTM4615 PACKAGE DESCRIPTION LTM4615 Component LGA Pinout PIN ID A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 PIN ID G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 FUNCTION GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 GND2 FUNCTION LDO_IN LDO_IN LDO_IN LDO_IN PGOOD3 GND3 GND3 GND3 LDO_OUT LDO_OUT LDO_OUT LDO_OUT PIN ID B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 PIN ID H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 FUNCTION GND2 SW2 SW2 SW2 SW2 SW2 GND2 GND2 GND2 GND2 GND2 GND2 FUNCTION GND1 SW1 SW1 SW1 SW1 SW1 GND1 GND1 GND1 GND1 GND1 GND1 PIN ID C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 PIN ID J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 FUNCTION VIN2 VIN2 VIN2 VIN2 VIN2 VIN2 GND2 GND2 VOUT2 VOUT2 VOUT2 VOUT2 FUNCTION VIN1 VIN1 VIN1 VIN1 VIN1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 PIN ID D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 PIN ID K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 FUNCTION VIN2 VIN2 VIN2 VIN2 VIN2 GND2 GND2 GND2 VOUT2 VOUT2 VOUT2 VOUT2 FUNCTION VIN1 VIN1 VIN1 VIN1 VIN1 GND1 GND1 GND1 VOUT1 VOUT1 VOUT1 VOUT1 PIN ID E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 PIN ID L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 FUNCTION GND2 RUN/SS2 TRACK2 PGOOD2 COMP2 FB2 BOOST3 GND2 GND2 GND2 VOUT2 VOUT2 FUNCTION GND1 RUN/SS1 TRACK1 PGOOD1 COMP1 FB1 GND1 GND1 VOUT1 VOUT1 VOUT1 VOUT1 PIN ID F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 PIN ID M1 M2 M3 M4 M5 M6 M7 M8 M9 M10 M11 M12 FUNCTION GND3 GND3 GND3 GND3 GND3 FB3 GND3 EN3 GND3 GND3 GND3 GND3 FUNCTION GND1 GND1 GND1 GND1 GND1 GND1 GND1 GND1 VOUT1 VOUT1 VOUT1 VOUT1 4615f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTM4615 PACKAGE PHOTOGRAPH RELATED PARTS PART NUMBER LTM4600HV LTM4600HVMP DESCRIPTION 10A DC/DC μModule Military Plastic 10A DC/DC μModule COMMENTS 4.5V ≤ VIN ≤ 28V, 0.6V ≤ VOUT ≤ 5V, LGA Package Guaranteed Operation from –55°C to 125°C Ambient, LGA Package LTM4601/LTM4601A 12A DC/DC μModule with PLL, Output Tracking/Margining Synchronizable PolyPhase® Operation, LTM4601-1/LTM4601A-1 Version Has No Remote Sensing, LGA Package and Remote Sensing LTM4602 LTM4603 LTM4604A LTM4605 LTM4607 LTM4608A LTM4614 LTM4616 LTM8020 LTM8021 LTM8022 LTM8023 6A DC/DC μModule 6A DC/DC μModule with PLL and Output Tracking/ Margining and Remote Sensing Low VIN 4A DC/DC μModule 5A to 12A Buck-Boost μModule 5A to 12A Buck-Boost μModule Low VIN 8A DC/DC Step-Down μModule Dual 4A Low VIN DC/DC μModule Dual 8A Low VIN DC/DC μModule High VIN 0.2A DC/DC Step-Down μModule High VIN 0.5A DC/DC Step-Down μModule High VIN 1A DC/DC Step-Down μModule High VIN 2A DC/DC Step-Down μModule Pin Compatible with the LTM4600, LGA Package Synchronizable, PolyPhase Operation, LTM4603-1 Version Has No Remote Sensing, Pin Compatible with the LTM4601, LGA Package 2.375V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, 9mm × 15mm × 2.3mm LGA Package 4.5V ≤ VIN ≤ 20V, 0.8V ≤ VOUT ≤ 16V, 15mm × 15mm × 2.8mm LGA Package 4.5V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 25V, 15mm × 15mm × 2.8mm LGA Package 2.7V ≤ VIN ≤ 5.5V, 0.6V ≤ VOUT ≤ 5V, 9mm × 15mm × 2.8mm LGA Package 2.375V ≤ VIN ≤ 5.5V, 0.8V ≤ VOUT ≤ 5V, 15mm × 15mm × 2.8mm Current Share Input or Output, Similar to LTM4608, 15mm × 15mm × 2.8mm 4V ≤ VIN ≤ 36V, 1.25V ≤ VOUT ≤ 5V, 6.25mm × 6.25mm × 2.3mm LGA Package 3V ≤ VIN ≤ 36V, 0.4V ≤ VOUT ≤ 5V, 6.25mm × 11.25mm × 2.8mm LGA Package 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 11.25mm × 9mm × 2.8mm LGA Package 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 11.25mm × 9mm × 2.8mm LGA Package PolyPhase is a registered trademark of Linear Technology Corporation. 4615f 24 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0709 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2009