LTM8033MPV-PBF

FEATURES n n n n n n n n n n n LTM8033 Ultralow Noise EMC 36VIN, 3A DC/DC µModule Regulator DESCRIPTION The LTM®8033 is an electromagnetic compatible (EMC) 36V, 3A DC/DC μModule® buck converter designed to meet the radiated emissions requirements of EN55022. Conducted emission requirements can be met by adding standard filter components. Included in the package are the switching controller, power switches, inductor, filters and all support components. Operating over an input voltage range of 3.6V to 36V, the LTM8033 supports an output voltage range of 0.8V to 24V, and a switching frequency range of 200kHz to 2.4MHz, each set by a single resistor. Only the bulk input and output filter capacitors are needed to finish the design. The LTM8033 is packaged in a thermally enhanced, compact (11.25mm × 15mm × 4.32mm) overmolded land grid array (LGA) package suitable for automated assembly by standard surface mount equipment. L, LT, LTC, LTM, Linear Technology, the Linear logo, μModule and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Complete Step-Down Switch Mode Power Supply Wide Input Voltage Range: 3.6V to 36V 3A Output Current 0.8V to 24V Output Voltage EN55022 Class B Compliant Current Share Multiple LTM8033 Regulators for More Than 3A Output Selectable Switching Frequency: 200kHz to 2.4MHz Current Mode Control (e4) RoHS Compliant Package with Gold Pad Finish Programmable Soft-Start Compact Package (11.25mm × 15mm × 4.32mm) Surface Mount LGA APPLICATIONS n n n n n Automotive Battery Regulation Power for Portable Products Distributed Supply Regulation Industrial Supplies Wall Transformer Regulation TYPICAL APPLICATION Ultralow Noise 12V/3A DC/DC μModule Regulator 80 LTM8033 VIN* 20V TO 36V 2.2μF VIN RUN/SS FIN 1μF SHARE VOUT AUX BIAS PGOOD 47μF RT SYNC GND ADJ 41.2k 34.8k VOUT 12V 3A 70 60 50 40 30 20 10 0 30 226.2 422.4 618.6 814.8 1010 324.3 520.5 716.7 912.9 128.1 FREQUENCY (MHz) 8033 TA01a 8033 TA01b EMI Performance f = 850kHz * RUNNING VOLTAGE RANGE. PLEASE REFER TO THE APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS. 8033f 1 LTM8033 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW GND SYNC 8 ADJ PGOOD 7 SHARE RT 6 BANK 2 5 GND 4 3 BANK 1 2 VOUT 1 A B C D E F G H J K L VIN BIAS AUX BANK 4 RUN/SS BANK 3 FIN VIN, FIN, RUN/SS Voltage ........................................36V ADJ, RT, SHARE Voltage ............................................6V VOUT, AUX ................................................................25V PGOOD, SYNC ..........................................................30V BIAS .........................................................................25V Maximum Junction Temperature (Note 2) .......... 125°C Solder Temperature ............................................. 245°C LGA PACKAGE 76-LEAD (15mm 11.25mm 4.32mm) TJMAX = 125°C, θJA = 15.4°C/W, θJCbottom = 5.2°C/W, θJB = 9.8°C/W, θJCtop = 16.7°C/W θ VALUES DERIVED FROM A 4 LAYER 6.35cm × 6.35cm PCB WEIGHT = 2.2g ORDER INFORMATION LEAD FREE FINISH LTM8033EV#PBF LTM8033IV#PBF LTM8033MPV#PBF TRAY LTM8033EV#PBF LTM8033IV#PBF LTM8033MPV#PBF PART MARKING* 8033V 8033V 8033V PACKAGE DESCRIPTION 76-Lead (15mm × 11.25mm × 4.32mm) LGA 76-Lead (15mm × 11.25mm × 4.32mm) LGA 76-Lead (15mm × 11.25mm × 4.32mm) LGA TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear.com/packaging/ ELECTRICAL CHARACTERISTICS PARAMETER Minimum Input Voltage Output DC Voltage Output DC Current Quiescent Current into VIN CONDITIONS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN/SS = 12V unless otherwise noted (Note 2). MIN l TYP 0.8 24 MAX 3.6 UNITS V V V 0 < IOUT < 3A, RADJ Open, VIN = 24V 0 < IOUT < 3A, RADJ = 16.5k, VIN = 32V VIN = 24V RUN/SS = 0V Not Switching BIAS = 0V, Not Switching RUN/SS = 0V Not Switching BIAS = 0V, Not Switching 5.5V < VIN < 36V 0A < IOUT < 3A, VIN = 24V 0 3 0.01 30 100 0.01 75 0 0.3 0.4 1 60 150 0.5 120 5 A μA μA μA μA μA μA % % 8033f Quiescent Current into BIAS Line Regulation Load Regulation 2 LTM8033 ELECTRICAL CHARACTERISTICS PARAMETER Output RMS Voltage Ripple Switching Frequency Voltage at ADJ Pin Current Out of ADJ Pin Minimum BIAS Voltage for Proper Operation RUN/SS Pin Current RUN/SS Input High Voltage RUN/SS Input Low Voltage PGOOD Threshold (at ADJ) PGOOD Leakage Current PGOOD Sink Current SYNC Input Low Threshold SYNC Input High Threshold SYNC Bias Current 500kHz Narrowband Conducted Emissions 1MHz Narrowband Conducted Emissions 3MHz Narrowband Conducted Emissions Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTM8033E is guaranteed to meet performance specifications from 0°C to 125°C internal. Specifications over the full –40°C to 125°C internal operating temperature range are assured by design, characterization and correlation with statistical process controls. The VOUT Rising PGOOD = 30V, RUN/SS = 0V PGOOD = 0.4V fSYNC = 550kHz fSYNC = 550kHz SYNC = 0V 24VIN, 3.3VOUT, IOUT = 3A, 5μH LISN 0.1 89 69 51 200 0.5 0.7 730 0.1 735 1 RUN/SS = 2.5V 2.5 0.2 ADJ = 1V, VOUT = 0V CONDITIONS VIN = 24V, 0A < IOUT < 3A RT = 45.3k l The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.VIN = 12V, RUN/SS = 12V unless otherwise noted (Note 2). MIN TYP 5 780 775 790 2 2 5 2.8 10 805 MAX UNITS mV kHz mV μA V μA V V mV μA μA V V μA dBμV dBμV dBμV LTM8033I is guaranteed to meet specifications over the full –40°C to 125°C internal operating temperature range. The LTM8033MP is guaranteed to meet specifications over the full –55°C to 125°C internal operating temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. TYPICAL PERFORMANCE CHARACTERISTICS 2.5VOUT Efficiency 95 90 85 EFFICIENCY (%) 80 75 70 65 60 55 50 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 36VIN 24VIN 5VIN 12VIN EFFICIENCY (%) 90 85 80 75 70 65 60 55 50 0 500 TA = 25°C, unless otherwise noted. 5VOUT Efficiency 95 3.3VOUT Efficiency 5.5VIN 12VIN 90 85 EFFICIENCY (%) 36VIN 24VIN 80 75 70 65 60 55 50 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 12VIN 36VIN 24VIN 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 8033 G01 8033 G02 8033 G03 8033f 3 LTM8033 TYPICAL PERFORMANCE CHARACTERISTICS 8VOUT Efficiency 95 90 85 EFFICIENCY (%) 80 75 70 65 60 55 50 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 12VIN 95 90 85 36VIN 24VIN EFFICIENCY (%) EFFICIENCY (%) 80 75 70 65 60 55 50 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 24VIN 36VIN TA = 25°C, unless otherwise noted. 12VOUT Efficiency 95 90 85 80 75 70 65 60 55 50 18VOUT Efficiency 36VIN 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 8033 G04 8033 G05 8033 G06 Bias Current vs Load Current, 2.5VOUT 50 45 40 BIAS CURRENT (mA) BIAS CURRENT (mA) 35 30 25 20 15 10 5 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 12VIN 24VIN 36VIN 80 70 Bias Current vs Load Current, 3.3VOUT 40 35 BIAS CURRENT (mA) 30 Bias Current vs Load Current, 5VOUT 60 50 40 30 20 10 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 12VIN 24VIN 36VIN 5VIN 5VIN 12VIN 25 20 15 10 5 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 24VIN 36VIN 8033 G07 8033 G08 8033 G09 Bias Current vs Load Current, 8VOUT 90 80 70 BIAS CURRENT (mA) BIAS CURRENT (mA) 60 50 40 30 20 10 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 24VIN 36VIN 12VIN 80 70 Bias Current vs Load Current, 12VOUT 90 80 70 BIAS CURRENT (mA) 60 50 40 30 20 10 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 Bias Current vs Load Current, 18VOUT 60 50 40 30 20 10 0 36VIN 24VIN 36VIN 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 8033 G10 8033 G11 8033 G12 8033f 4 LTM8033 TYPICAL PERFORMANCE CHARACTERISTICS Input Current vs Input Voltage Output Shorted 1000 900 800 INPUT CURRENT (mA) 700 600 500 400 300 200 100 0 0 10 20 30 INPUT VOLTAGE (V) 40 8033 G13 TA = 25°C, unless otherwise noted. Input Current vs Output Current 3.3VOUT 2500 Input Current vs Output Current 2.5VOUT 2500 2000 INPUT CURRENT (mA) INPUT CURRENT (mA) 2000 1500 5VIN 1000 12VIN 500 24VIN 36VIN 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 1500 5.5VIN 1000 12VIN 24VIN 36VIN 500 0 0 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 8033 G14 8033 G15 Input Current vs Output Current 5VOUT 1600 1400 INPUT CURRENT (mA) INPUT CURRENT (mA) 2500 Input Current vs Output Current 8VOUT 1800 1600 2000 INPUT CURRENT (mA) 1400 1200 1000 800 600 400 36VIN 0 200 0 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 Input Current vs Output Current 12VOUT 1200 1000 12VIN 800 600 400 36VIN 200 0 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 24VIN 1500 12VIN 1000 24VIN 500 24VIN 36VIN 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 8033 G16 8033 G17 8033 G18 Input Current vs Output Current 18VOUT 1800 1600 1400 INPUT CURRENT (mA) INPUT VOLTAGE (V) 1200 1000 800 600 400 200 0 0 500 1000 1500 2000 2500 OUTPUT CURRENT (mA) 3000 36VIN 40 35 30 25 20 15 10 5 0 Minimum Required Input Voltage vs Output Voltage, IOUT = 3A 4.4 4.2 INPUT VOLTAGE (V) 4.0 3.8 3.6 3.4 3.2 3.0 Minimum Required Input Voltage vs Load Current, 2.5VOUT TO START, WITH RUN = VIN TO RUN OR SS CONTROLLED START 0 5 10 OUTPUT VOLTAGE (V) 15 8033 G20 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 8033 G19 8033 G21 8033f 5 LTM8033 TYPICAL PERFORMANCE CHARACTERISTICS Minimum Required Input Voltage vs Load Current, 3.3VOUT 6.0 5.5 INPUT VOLTAGE (V) INPUT VOLTAGE (V) 5.0 4.5 4.0 TO RUN 3.5 3.0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 TO START, WITH RUN = VIN 8.0 7.5 7.0 INPUT VOLTAGE (V) 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 8.0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 TO RUN OR RUN/SS CONTROLLED START TO START, WITH RUN = VIN 10.0 TO START, WITH RUN = VIN 9.5 TO RUN OR RUN/SS CONTROLLED START TA = 25°C, unless otherwise noted. Minimum Required Input Voltage vs Load Current, 8VOUT 10.5 Minimum Required Input Voltage vs Load Current, 5VOUT RUN/SS CONTROLLED START 9.0 8.5 8033 G22 8033 G23 8033 G24 Minimum Required Input Voltage vs Load Current, 12VOUT 20 19 INPUT VOLTAGE (V) INPUT VOLTAGE (V) 18 17 TO RUN OR START 16 15 14 13 12 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 30 28 26 24 22 20 18 16 14 12 Minimum Required Input Voltage vs Load Current, 18VOUT 80 70 60 TO START, WITH RUN = VIN 50 dBμV/m 3000 40 30 TO RUN 20 RUN/SS CONTROLLED START 10 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 0 Radiated Emissions, 36VIN, 24VOUT at 1.5A Load 30 226.2 422.4 618.6 814.8 1010 324.3 520.5 716.7 912.9 128.1 FREQUENCY (MHz) 8033 G27 8033 G25 8033 G26 Radiated Emissions, 36VIN, 1.2VOUT at 3A Load 80 70 60 50 dBμV/m 40 30 20 10 0 30 226.2 422.4 618.6 814.8 1010 324.3 520.5 716.7 912.9 128.1 FREQUENCY (MHz) 8033 G28 Temperature Rise vs Load Current, 2.5VOUT 40 35 TEMPERATURE RISE (°C) 30 25 20 15 10 5 12VIN 0 0 500 1000 1500 2000 2500 3000 3500 LOAD CURRENT (mA) 8033 G29 Temperature Rise vs Load Current, 3.3VOUT 40 35 TEMPERATURE RISE (°C) 30 25 20 15 12VIN 10 5 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 24VIN 36VIN 36VIN 5VIN 24VIN 8033 G30 8033f 6 LTM8033 TYPICAL PERFORMANCE CHARACTERISTICS Temperature Rise vs Load Current, 5VOUT 45 40 50 TEMPERATURE RISE (°C) TEMPERATURE RISE (°C) 35 30 25 20 15 10 5 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 24VIN 12VIN 36VIN 40 30 36VIN 20 10 24VIN 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 12VIN 60 TA = 25°C, unless otherwise noted. Temperature Rise vs Load Current, 8VOUT 8033 G31 8033 G32 Temperature Rise vs Load Current, 12VOUT 70 60 TEMPERATURE RISE (°C) TEMPERATURE RISE (°C) 50 40 30 20 10 0 0 500 1000 1500 2000 2500 LOAD CURRENT (mA) 3000 70 60 50 Temperature Rise vs Load Current, 18VOUT 36VIN 40 30 20 10 0 0 500 1000 1500 LOAD CURRENT (mA) 2000 8033 G34 36VIN 24VIN 8033 G33 8033f 7 LTM8033 PIN FUNCTIONS VOUT (Bank 1): Power Output Pins. Apply the output filter capacitor and the output load between these pins and GND pins. GND (A8, Bank 2): Tie these GND pins to a local ground plane below the LTM8033 and the circuit components. Return the feedback divider (RADJ) to this net. FIN (Bank 3): Filtered Input. This is the node after the input EMI filter. Apply the capacitor recommended by Table 1. Additional capacitance may be applied if there is a need to modify the behavior of the integrated EMI filter; otherwise, leave these pins unconnected. See the Applications Information section for more details. VIN (Bank 4): The VIN pin supplies current to the LTM8033’s internal regulator and to the internal power switch. This pin must be locally bypassed with an external, low ESR capacitor; see Table 1 for recommended values. Ensure that VIN + BIAS is less than 56V. SHARE (Pin A6): Tie this to the SHARE pin of another LTM8033 when paralleling the outputs. Otherwise, do not connect. ADJ (Pin A7): The LTM8033 regulates its ADJ pin to 0.79V. Connect the adjust resistor from this pin to ground. The value of RADJ is given by the equation RADJ = 394.21/(VOUT – 0.79), where RADJ is in kΩ. RT (Pin B6): The RT pin is used to program the switching frequency of the LTM8033 by connecting a resistor from this pin to ground. The Applications Information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. Minimize capacitance at this pin. SYNC (Pin B8): This is the external clock synchronization input. Ground this pin for low ripple Burst Mode® operation at low output loads. Tie to a stable voltage source greater than 0.7V to disable Burst Mode operation. Do not leave this pin floating. Tie to a clock source for synchronization. Clock edges should have rise and fall times faster than 1μs. See the Synchronization section in the Applications Information section. PGOOD (Pin B7): The PGOOD pin is the open-collector output of an internal comparator. PGOOD remains low until the ADJ pin is greater than 90% of the final regulation voltage. PGOOD output is valid when VIN is above 3.6V and RUN/SS is high. If this function is not used, leave this pin floating. AUX (Pin G3): Low Current Voltage Source for BIAS. In many designs, the BIAS pin is simply connected to VOUT. The AUX pin is internally connected to VOUT and is placed adjacent to the BIAS pin to ease printed circuit board routing. Although this pin is internally connected to VOUT, it is not intended to deliver a high current, so do not connect this pin to the load. If this pin is not tied to BIAS, leave it floating. BIAS (Pin G4): The BIAS pin connects to the internal power bus. Connect to a power source greater than 2.8V and less than 25V. If the output is greater than 2.8V, connect this pin there. If the output voltage is less, connect this to a voltage source between 2.8V and 25V but ensure that VIN + BIAS is less than 56V. RUN/SS (Pin G8): Pull the RUN/SS pin below 0.2V to shut down the LTM8033. Tie to 2.5V or more for normal operation. If the shutdown feature is not used, tie this pin to the VIN pin. RUN/SS also provides a soft-start function; see the Applications Information section. 8033f 8 LTM8033 BLOCK DIAGRAM VIN EMI FILTER 8.2μH VOUT 15pF 1μF 499k AUX FIN BIAS RUN/SS SHARE CURRENT MODE CONTROLLER SYNC GND RT PGOOD ADJ 8033 BD 8033f 9 LTM8033 OPERATION The LTM8033 is a standalone nonisolated step-down switching DC/DC power supply that can deliver up to 3A of output current. It is an EMC product; its radiated emissions are so quiet that it can pass the stringent requirements of EN55022 class B as a stand alone product. This μModule provides a precisely regulated output voltage programmable via one external resistor from 0.8V to 25V. The input voltage range is 3.6V to 36V. Given that the LTM8033 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. As shown in the Block Diagram, the LTM8033 contains an EMI filter, current mode controller, power switching element, power inductor, power Schottky diode and a modest amount of input and output capacitance. The LTM8033 is a fixed frequency PWM regulator. The switching frequency is set by simply connecting the appropriate resistor value from the RT pin to GND. An internal regulator provides power to the control circuitry. The bias regulator normally draws power from the VIN pin, but if the BIAS pin is connected to an external voltage higher than 2.8V, bias power will be drawn from the external source (typically the regulated output voltage). This improves efficiency. The RUN/SS pin is used to place the LTM8033 in shutdown, disconnecting the output and reducing the input current to less than 1μA. To further optimize efficiency, the LTM8033 automatically switches to Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50μA in a typical application. The oscillator reduces the LTM8033’s operating frequency when the voltage at the ADJ pin is low. This frequency foldback helps to control the output current during startup and overload. The LTM8033 contains a power good comparator which trips when the ADJ pin is at roughly 90% of its regulated value. The PGOOD output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the PGOOD pin high. Power good is valid when the LTM8033 is enabled and VIN is above 3.6V. The LTM8033 is equipped with a thermal shutdown that will inhibit power switching at high junction temperatures. The activation threshold of this function, however, is above 125°C to avoid interfering with normal operation. Thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. 8033f 10 LTM8033 APPLICATIONS INFORMATION For most applications, the design process is straight forward, summarized as follows: • Look at Table 1 and find the row that has the desired input range and output voltage. • Apply the recommended CIN, CFIN, COUT, RADJ and RT values. • Connect BIAS as indicated. As the integrated input EMI filter may ring in response to an application of a step input voltage, a bulk capacitance may be applied between FIN and GND. See the Hot-Plugging Safely section for details. While these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Bear in mind that the maximum output current is limited by junction temperature, the relationship between the input and output voltage magnitude and polarity and other factors. Please refer to the graphs in the Typical Performance Characteristics section for guidance. The maximum frequency (and attendant RT value) at which the LTM8033 should be allowed to switch is given in Table 1 in the fMAX column, while the recommended frequency (and RT value) for optimal efficiency over the given input condition is given in the fOPTIMAL column. There are additional conditions that must be satisfied if the synchronization function is used. Please refer to the Synchronization section for details. Note: An input bulk capacitance is required at either VIN or FIN. Refer to the Typical Performance Characteristics section for load conditions. Capacitor Selection Considerations The CIN, CFIN and COUT capacitor values in Table 1 are the minimum recommended values for the associated operating conditions. Applying capacitor values below those indicated in Table 1 is not recommended, and may result in undesirable operation. Using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. Again, it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental conditions. Ceramic capacitors are small, robust and have very low ESR. However, not all ceramic capacitors are suitable. X5R and X7R types are stable over temperature and applied voltage and give dependable service. Other types, including Y5V and Z5U have very large temperature and voltage coefficients of capacitance. In an application circuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. Ceramic capacitors are also piezoelectric. In Burst Mode operation, the LTM8033’s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. Since the LTM8033 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet to a casual ear. If this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. It may also be a parallel combination of a ceramic capacitor and a low cost electrolytic capacitor. A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LTM8033. A ceramic input capacitor combined with trace or cable inductance forms a high Q (under damped) tank circuit. If the LTM8033 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the device’s rating. This situation can be easily avoided; see the Hot-Plugging Safely section. 8033f 11 LTM8033 APPLICATIONS INFORMATION Table 1. Recommended Component Values and Configuration (TA = 25°C) VIN 3.6V to 36V 3.6V to 36V 3.6V to 36V 3.6V to 36V 3.6V to 36V 4.1V to 36V 5.3V to 36V 7.5V to 36V 10.5V to 36V 20V to 36V 25.5V to 36V 32.5V to 36V 3.6V to 15V 3.6V to 15V 3.6V to 15V 3.6V to 15V 3.6V to 15V 4.1V to 15V 5.3V to 15V 7.5V to 15V 10.5V to 15V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 9V to 24V 10.5V to 24V 20V to 24V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V 18V to 36V VOUT 0.8V 1V 1.2V 1.5V 1.8V 2.5V 3.3V 5V 8V 12V 18V 24V 0.8V 1V 1.2V 1.5V 1.8V 2.5V 3.3V 5V 8V 0.8V 1V 1.2V 1.5V 1.8V 2.5V 3.3V 5V 8V 12V 0.8V 1V 1.2V 1.5V 1.8V 2.5V 3.3V 5V 8V CIN 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 4.7μF 50V, 1206 , 2.2μF 50V, 1206 , 2.2μF 50V, 1206 , 1μF 50V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 16V, 1206 , 4.7μF 16V, 1206 , 4.7μF 16V, 1206 , 2.2μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 2.2μF 25V, 1206 , 2.2μF 25V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 2.2μF 50V, 1206 , CFIN 10μF 50V, 1210 , 10μF 50V, 1210 , 10μF 50V, 1210 , 10μF 50V, 1210 , 10μF 50V, 1210 , 10μF 50V, 1210 , 10μF 50V, 1210 , 4.7μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , Open Open 10μF 16V, 1210 , 10μF 16V, 1210 , 10μF 16V, 1210 , 10μF 16V, 1210 , 10μF 16V, 1210 , 10μF 16V, 1210 , 10μF 16V, 1210 , 4.7μF 50V, 1206 , Open COUT 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 3 × 100μF 6.3V, 1210 , 100μF 6.3V, 1210 , 100μF 6.3V, 1210 , 47μF 16V, 1210 , 47μF 16V, 1210 , 22μF 25V, 1812 , 22μF 25V, 1812 , 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 4 × 100μF 6.3V, 1210 , 3 x 100μF 6.3V, 1210 , 100μF 6.3V, 1210 , 100μF 6.3V, 1210 , 47μF 16V, 1210 , BIAS 2.8V to 25V 2.8V to 25V 2.8V to 25V 2.8V to 25V 2.8V to 25V 2.8V to 25V AUX AUX AUX AUX AUX 2.8V to 20V VIN VIN VIN VIN VIN VIN AUX AUX AUX VIN VIN VIN VIN VIN VIN AUX AUX AUX AUX 2.8V to 25V 2.8V to 25V 2.8V to 25V 2.8V to 25V 2.8V to 25V 2.8V to 25V AUX AUX AUX RADJ 30M 953k 549k 383k 226k 154k 93.1k 54.9k 34.8k 22.6k 16.5k 30M 953k 549k 383k 226k 154k 93.1k 54.9k 30M 953k 549k 383k 226k 154k 93.1k 54.9k 34.8k 30M 953k 549k 383k 226k 154k 93.1k 54.9k fOPTIMAL RT(OPTIMAL) 230kHz 255kHz 270kHz 285kHz 345kHz 425kHz 500kHz 700kHz 850kHz 1.1MHz 1.2MHz 230kHz 255kHz 270kHz 285kHz 345kHz 425kHz 500kHz 700kHz 270kHz 295kHz 310kHz 330kHz 345kHz 425kHz 500kHz 700kHz 850kHz 230kHz 255kHz 270kHz 285kHz 345kHz 425kHz 500kHz 700kHz 182k 174k 162k 154k 147k 118k 93.1k 76.8k 52.3k 41.2k 29.4k 25.5k 182k 174k 162k 154k 147k 118k 93.1k 76.8k 52.3k 154k 147k 140k 133k 124k 118k 93.1k 76.8k 52.3k 41.2k 182k 174k 162k 154k 147k 118k 93.1k 76.8k 52.3k fMAX 250kHz 285kHz 315kHz 360kHz 420kHz 540kHz 675kHz 950kHz 2.3MHz 2.4MHz 2.4MHz 575kHz 660kHz 760kHz 840kHz 1.0MHz 1.3MHz 1.6MHz 2.4MHz 2.4MHz 360kHz 410kHz 475kHz 550kHz 620kHz 800kHz 1.0MHz 1.4MHz 2.2MHz 2.3MHz 250kHz 285kHz 315kHz 360kHz 420kHz 540kHz 675kHz 950kHz RT(MIN) 169k 147k 130k 113k 95.3k 71.5k 54.9k 36.5k 9.09k 8.25k 8.25k 66.5k 56.2k 47.5k 42.2k 34.0k 23.7k 17.8k 8.25k 8.25k 113k 97.6k 82.5k 69.8k 60.4k 44.2k 34.0k 21.5k 9.76k 9.09k 169k 147k 130k 113k 95.3k 71.5k 54.9k 36.5k 1.87M 240kHz 1.45MHz 20.5k 1.87M 240kHz 4.7μF 25V, 1206 4 × 100μF 6.3V, 1210 , , 4.7μF 25V, 1206 4 × 100μF 6.3V, 1210 , , 4.7μF 25V, 1206 4 × 100μF 6.3V, 1210 , , 4.7μF 25V, 1206 4 × 100μF 6.3V, 1210 , , 4.7μF 25V, 1206 3 × 100μF 6.3V, 1210 , , 4.7μF 25V, 1206 2 × 100μF 6.3V, 1210 , , 4.7μF 25V, 1206 , 4.7μF 25V, 1206 , 1μF 25V, 1206 , 1μF 25V, 1206 , 100μF 6.3V, 1210 , 100μF 6.3V, 1210 , 47μF 16V, 1210 , 47μF 16V, 1210 , 1.87M 285kHz 2.2μF 50V, 1206 4 × 100μF 6.3V, 1210 , , 2.2μF 50V, 1206 4 × 100μF 6.3V, 1210 , , 2.2μF 50V, 1206 4 × 100μF 6.3V, 1210 , , 2.2μF 50V, 1206 4 × 100μF 6.3V, 1210 , , 2.2μF 50V, 1206 3 × 100μF 6.3V, 1210 , , 2.2μF 50V, 1206 2 × 100μF 6.3V, 1210 , , 2.2μF 50V, 1206 , 1μF 50V, 1206 , 1μF 50V, 1206 , 100μF 6.3V, 1210 , 47μF 10V, 1210 , 47μF 16V, 1210 , 1.87M 240kHz 1.45MHz 20.5k Note: A bulk capacitor is required. Do not allow VIN + BIAS above 56V. 8033f 12 LTM8033 APPLICATIONS INFORMATION Frequency Selection The LTM8033 uses a constant frequency PWM architecture that can be programmed to switch from 200kHz to 2.4MHz by using a resistor tied from the RT pin to ground. Table 2 provides a list of RT resistor values and their resulting frequencies. Table 2. Switching Frequency vs RT Value SWITCHING FREQUENCY (MHz) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.2 1.4 1.6 1.8 2 2.2 2.4 RT VALUE (kΩ) 215 137 100 76.8 63.4 52.3 44.2 38.3 34 25.5 21.5 17.8 14.7 12.1 9.76 8.25 BIAS Pin Considerations The BIAS pin is used to provide drive power for the internal power switching stage and operate other internal circuitry. For proper operation, it must be powered by at least 2.8V. If the output voltage is programmed to 2.8V or higher, BIAS may be simply tied to VOUT. If VOUT is less than 2.8V, BIAS can be tied to VIN or some other voltage source. If the BIAS pin voltage is too high, the efficiency of the LTM8033 may suffer. The optimum BIAS voltage is dependent upon many factors, such as load current, input voltage, output voltage and switching frequency, but 4V to 5V works well in many applications. In all cases, ensure that the maximum voltage at the BIAS pin is less than 25V and that the sum of VIN and BIAS is less than 56V. If BIAS power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the pin. Load Sharing Two or more LTM8033 may be paralleled to produce higher currents. To do this, tie the VIN, ADJ, VOUT and SHARE pins of all the paralleled LTM8033 together. To ensure that paralleled modules start up together, the RUN/SS pins may be tied together as well. If the RUN/SS pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. Current sharing can be improved by synchronizing the LTM8033s. An example of two LTM8033 configured for load sharing is given in the Typical Applications section. Burst Mode Operation To enhance efficiency at light loads, the LTM8033 automatically switches to Burst Mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode operation, the LTM8033 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. In addition, VIN and BIAS quiescent currents are reduced to typically 20μA and 50μA respectively during the sleep time. As the load current decreases towards a Operating Frequency Trade-Offs It is recommended that the user apply the optimal RT value given in Table 1 for the input and output operating condition. System level or other considerations, however, may necessitate another operating frequency. While the LTM8033 is flexible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. A frequency that is too high can reduce efficiency, generate excessive heat or even damage the LTM8033 if the output is overloaded or short-circuited. A frequency that is too low can result in a final design that has too much output ripple or too large of an output capacitor. 8033f 13 LTM8033 APPLICATIONS INFORMATION no-load condition, the percentage of time that the LTM8033 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher efficiency. Burst Mode operation is enabled by tying SYNC to GND. To disable Burst Mode operation, tie SYNC to a stable voltage above 0.7V. Do not leave the SYNC pin floating. Minimum Input Voltage The LTM8033 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. In addition, the input voltage required to turn on is higher than that required to run, and depends upon BIAS power whether RUN/SS is used. If BIAS is available before VOUT ramps up, the minimum VIN voltage to start may be reduced. As shown in the Typical Performance Characteristics section, the minimum input voltage to run a 3.3V output at light load is only about 3.6V, but, if RUN/SS is pulled up to VIN, it takes 5.6VIN to start. If the LTM8033 is enabled with the RUN/SS pin, the minimum voltage to start at light loads is lower, about 4.2V. Similar curves detailing this behavior of the LTM8033 for other outputs are also included in the Typical Performance Characteristics section. Soft-Start The RUN/SS pin can be used to soft-start the LTM8033, reducing the maximum input current during start-up. The RUN/SS pin is driven through an external RC filter to create a voltage ramp at this pin. Figure 2 shows the start-up and shutdown waveforms with the soft-start circuit. By choosing an appropriate RC time constant, the peak startup current can be reduced to the current that is required to regulate the output, with no overshoot. Choose the value of the resistor so that it can supply at least 20μA when the RUN/SS pin reaches 2.5V. Frequency Foldback The LTM8033 is equipped with frequency foldback which acts to reduce the thermal and energy stress on the internal power elements during a short-circuit or output overload condition. If the LTM8033 detects that the output has fallen out of regulation, the switching frequency is reduced as a function of how far the output is below the target voltage. This in turn limits the amount of energy that can be delivered to the load under fault. During the start-up time, frequency foldback is also active to limit the energy delivered to the potentially large output capacitance of the load. RUN 15k RUN/SS 0.22μF GND INTERNAL INDUCTOR CURRENT 1A/DIV VRUN/SS 2V/DIV VOUT 2V/DIV 2ms/DIV 8033 F02 Figure 2. To Soft-Start the LTM8033, Add a Resistor and Capacitor to the RUN/SS Pin 8033f 14 LTM8033 APPLICATIONS INFORMATION Synchronization The internal oscillator of the LTM8033 can be synchronized by applying an external 250kHz to 2MHz clock to the SYNC pin. Do not leave this pin floating. Ground the SYNC pin if the synchronization function is not used. When synchronizing the LTM8033, select an RT resistor value that corresponds to an operating frequency 20% lower than the intended synchronization frequency (see the Frequency Selection section). In addition to synchronization, the SYNC pin controls Burst Mode behavior. If the SYNC pin is driven by an external clock, or pulled up above 0.7V, the LTM8033 will not enter Burst Mode operation, but will instead skip pulses to maintain regulation instead. Shorted Input Protection Care needs to be taken in systems where the output will be held high when the input to the LTM8033 is absent. This may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode OR-ed with the LTM8033’s output. If the VIN pin is allowed to float and the RUN/SS pin is held high (either by a logic signal or because it is tied to VIN), then the LTM8033’s internal circuitry will pull its quiescent current through its internal power switch. This is fine if your system can tolerate a few milliamps in this state. If you ground the RUN/SS pin, the SW pin current will drop to essentially zero. However, if the VIN pin is grounded while the output is held high, then parasitic diodes inside the LTM8033 can pull large currents from the output through the VIN pin. Figure 3 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. LTM8033 VIN VIN RUN/SS VOUT AUX BIAS VOUT SHARE RT SYNC GND ADJ 8033 F03 Figure 3. The Input Diode Prevents a Shorted Input from Discharging a Backup Battery Tied to the Output. It Also Protects the Circuit from a Reversed Input. The LTM8033 Runs Only When the Input is Present 8033f 15 LTM8033 APPLICATIONS INFORMATION PCB Layout Most of the headaches associated with PCB layout have been alleviated or even eliminated by the high level of integration of the LTM8033. The LTM8033 is nevertheless a switching power supply, and care must be taken to minimize EMI and ensure proper operation. Even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. See Figure 4 for a suggested layout. Ensure that the grounding and heat sinking are acceptable. A few rules to keep in mind are: 1. Place the RADJ and RT resistors as close as possible to their respective pins. 2. Place the CIN and CFIN capacitors as close as possible to the VIN, FIN and GND connections of the LTM8033. A haphazardly placed CFIN capacitor may impair EMI performance. 3. Place the COUT capacitors as close as possible to the VOUT and GND connection of the LTM8033. PG SYNC GND RUN/SS FIN 4. Place the CIN, CFIN and COUT capacitors such that their ground currents flow directly adjacent or underneath the LTM8033. 5. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8033. 6. Use vias to connect the GND copper area to the board’s internal ground planes. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. Pay attention to the location and density of the thermal vias in Figure 4. The LTM8033 can benefit from the heat sinking afforded by vias that connect to internal GND planes at these locations, due to their proximity to internal power handling components. The optimum number of thermal vias depends upon the printed circuit board design. For example, a board might use very small via holes. It should employ more thermal vias than a board that uses larger holes. RADJ RT SHARE GND BIAS AUX LTM8033 CFIN COUT VOUT THERMAL VIAS TO GND GND CIN VIN Figure 4. Layout Showing Suggested External Components, GND Plane and Thermal Vias 8033f 16 LTM8033 APPLICATIONS INFORMATION Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8033. However, these capacitors can cause problems if the LTM8033 is plugged into a live supply (see Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8033 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8033’s rating and damaging the part. A similar phenomenon can occur inside the LTM8032 module, at the output of the integrated EMI filter (FIN), with the same potential of damaging the part. If the input supply is poorly controlled or the user will be plugging the LTM8033 into an energized supply, the input network should be designed to prevent this overshoot. This can be accomplished by installing a small resistor in series to VIN, but the most popular method of controlling input voltage overshoot is adding an electrolytic bulk capacitor to the VIN or FIN net. This capacitor’s relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it can be a large component in the circuit. Electromagnetic Compliance The LTM8033 was evaluated by an independent nationally recognized test lab and found to be compliant with EN 55022 class B: 2006 by a wide margin. Sample graphs of the LTM8033’s radiated EMC performance are given in the Typical Performance Characteristics section, while further data, operating conditions and test set-up are detailed in the electromagnetic compatibility test report, available on the Linear Technology website. Conducted emissions requirements may be met by adding an appropriate input power line filter. The proper implementation of this filter depends upon the system operating and performance conditions as a whole, of which the LTM8033 is typically only a component, so conducted emissions are not addressed at this level. Thermal Considerations The LTM8033 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. The amount of current derating is dependent upon the input voltage, output power and ambient temperature. The temperature rise curves given in the Typical Performance Characteristics section can be used as a guide. These curves were generated by an LTM8033 mounted to a 40cm2 4-layer FR4 printed circuit board. Boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions. The thermal resistance numbers listed in the Pin Configuration are based on modeling the μModule package mounted on a test board specified per JESD51-9 “Test Boards for Area Array Surface Mount Package Thermal Measurements.” The thermal coefficients provided in this page are based on JESD 51-12 “Guidelines for Reporting and Using Electronic Package Thermal Information.” For increased accuracy and fidelity to the actual application, many designers use FEA to predict thermal performance. To that end, the Pin Configuration typically gives four thermal coefficients: • θJA – Thermal resistance from junction to ambient. • θJCBOTTOM – Thermal resistance from junction to the bottom of the product case. • θJCTOP – Thermal resistance from junction to top of the product case. • θJB – Thermal resistance from junction to the printed circuit board. 8033f 17 LTM8033 APPLICATIONS INFORMATION While the meaning of each of these coefficients may seem to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in JESD 51-12, and are quoted or paraphrased in the following: • θJA is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as “still air” although natural convection causes the air to move. This value is determined with the part mounted to a JESD 51-9 defined test board, which does not reflect an actual application or viable operating condition. • θJCBOTTOM is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. In the typical μModule, the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may be useful for comparing packages but the test conditions don’t generally match the user’s application. • θJCTOP is determined with nearly all of the component power dissipation flowing through the top of the package. As the electrical connections of the typical μModule are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCBOTTOM, this value may be useful for comparing packages but the test conditions don’t generally match the user’s application. • θJB is the junction-to-board thermal resistance where almost all of the heat flows through the bottom of the μModule and into the board, and is really the sum of the θJCBOTTOM and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. The board temperature is measured a specified distance from the package, using a two sided, two layer board. This board is described in JESD 51-9. The most appropriate way to use the coefficients is when running a detailed thermal analysis, such as FEA, which considers all of the thermal resistances simultaneously. None of them can be individually used to accurately predict the thermal performance of the product, so it would be inappropriate to attempt to use any one coefficient to correlate to the junction temperature versus load graphs given in the LTM8033 data sheet. A graphical representation of these thermal resistances is given in Figure 5. The blue resistances are contained within the μModule, and the green are outside. The die temperature of the LTM8033 must be lower than the maximum rating of 125°C, so care should be taken in the layout of the circuit to ensure good heat sinking of the LTM8033. The bulk of the heat flow out of the LTM8033 is through the bottom of the module and the LGA pads into the printed circuit board. Consequently a poor printed circuit board design can cause excessive heating, JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD) JUNCTION-TO-CASE (TOP) RESISTANCE CASE (TOP)-TO-AMBIENT RESISTANCE JUNCTION JUNCTION-TO-BOARD RESISTANCE JUNCTION-TO-CASE CASE (BOTTOM)-TO-BOARD (BOTTOM) RESISTANCE RESISTANCE BOARD-TO-AMBIENT RESISTANCE At 8033 F05 μMODULE REGULATOR Figure 5 8033f 18 LTM8033 APPLICATIONS INFORMATION resulting in impaired performance or reliability. Please refer to the PCB Layout section for printed circuit board design suggestions. The LTM8033 is equipped with a thermal shutdown that will inhibit power switching at high junction temperatures. The activation threshold of this function, however, is above 125°C to avoid interfering with normal operation. Thus, it follows that prolonged or repetitive operation under a condition in which the thermal shutdown activates necessarily means that the internal components are subjected to temperatures above the 125°C rating for prolonged or repetitive intervals, which may damage or impair the reliability of the device. Finally, be aware that at high ambient temperatures the internal Schottky diode will have significant leakage current (see the Typical Performance Characteristics section) increasing the quiescent current of the LTM8033. TYPICAL APPLICATIONS 0.8V Step-Down Converter VIN 3.6V TO 15V 4.7μF LTM8033 VOUT 0.8V 400μF 3A VIN BIAS VOUT AUX RUN/SS FIN 10μF SHARE RT SYNC GND ADJ 182k 8033 TA02 PGOOD 30M f = 230kHz 1.8V Step-Down Converter VIN 3.6V TO 36V 4.7μF 2.8V TO 25V VIN BIAS RUN/SS FIN 10μF SHARE RT SYNC GND ADJ 147k 8033 TA03 LTM8033 VOUT AUX VOUT 1.8V 400μF 3A PGOOD 383k f = 285kHz NOTE: DO NOT ALLOW VIN + BIAS TO BE GREATER THAN 56V. 8033f 19 LTM8033 TYPICAL APPLICATIONS 2.5V Step-Down Converter VIN* 4.1V TO 36V 4.7μF 2.8V to 25V LTM8033 VOUT 2.5V 300μF 3A VIN SHARE BIAS RUN/SS FIN 10μF RT SYNC GND ADJ 118k 8033 TA04 VOUT AUX PGOOD 226k f = 345kHz NOTE: DO NOT ALLOW VIN + BIAS TO BE GREATER THAN 56V. * RUNNING VOLTAGE RANGE. PLEASE REFER TO THE APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS. 5V Step-Down Converter VIN 7.5V TO 36VDC VIN SHARE RUN/SS FIN 4.7μF 4.7μF 76.8k RT SYNC GND ADJ LTM8033 VOUT AUX BIAS PGOOD VOUT 5V 100μF 3A 8033 TA05 93.1k f = 500kHz 8V Step-Down Converter LTM8033 VIN* 11V TO 36V 4.7μF VIN SHARE RUN/SS FIN 1μF RT SYNC GND ADJ 52.3k 54.9k VOUT AUX BIAS PGOOD 47μF VOUT 8V 3A f = 700kHz 8033 TA06 * RUNNING VOLTAGE RANGE. PLEASE REFER TO THE APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS. 8033f 20 LTM8033 TYPICAL APPLICATIONS Current Sharing Two LTM8033 Parts VIN* 4.8V TO 36V 10μF RUN/SS SHARE 4.7μF RT SYNC GND ADJ BIAS PGOOD LTM8033 VOUT 2.5V 5.8A VIN FIN VOUT AUX 137k 113k 2.8V to 25V OPTIONAL SYNCHRONIZATION CLOCK VIN FIN RUN/SS SHARE 4.7μF 10μF RT SYNC GND ADJ LTM8033 VOUT AUX BIAS PGOOD 300μF 137k 8033 TA07 * RUNNING VOLTAGE RANGE. PLEASE REFER TO THE APPLICATIONS INFORMATION SECTION FOR START-UP DETAILS. NOTE: SYNCHRONIZE THE TWO MODULES TO AVOID BEAT FREQUENCIES, IF NECESSARY. OTHERWISE, TIE EACH SYNC TO GND. 8033f 21 LTM8033 PACKAGE DESCRIPTION Pin Assignment Table (Arranged by Pin Number) PIN A1 A2 A3 A4 A5 A6 A7 A8 PIN G1 G2 G3 G4 G5 G6 G7 G8 NAME VOUT VOUT VOUT GND GND SHARE ADJ GND NAME GND GND AUX BIAS GND GND GND RUN J8 FIN K8 FIN L8 FIN H5 H6 GND GND J5 J6 GND GND K5 K6 GND GND L5 L6 GND GND PIN B1 B2 B3 B4 B5 B6 B7 B8 PIN NAME VOUT VOUT VOUT GND GND RT PGOOD SYNC NAME PIN C1 C2 C3 C4 C5 C6 C7 C8 PIN J1 J2 J3 NAME VOUT VOUT VOUT GND GND GND GND GND NAME VIN VIN VIN PIN D1 D2 D3 D4 D5 D6 D7 D8 PIN K1 K2 K3 NAME VOUT VOUT VOUT GND GND GND GND GND NAME VIN VIN VIN PIN E1 E2 E3 E4 E5 E6 E7 E8 PIN L1 L2 L3 NAME GND GND GND GND GND GND GND GND NAME VIN VIN VIN PIN F1 F2 F3 F4 F5 F6 F7 F8 NAME GND GND GND GND GND GND GND GND PACKAGE PHOTOGRAPH 8033f 22 LGA Package 76-Lead (15mm × 11.25mm × 4.32mm) (Reference LTC DWG # 05-08-1560 Rev Ø) DETAIL A 4.22 – 4.42 aaa Z 8 A B C D E 7 6 5 4 3 2 1 PAD 1 PAD “A1” CORNER 4 15.00 BSC MOLD CAP SUBSTRATE 0.270 – 0.370 3.95 – 4.05 DETAIL B bbb Z Z 12.70 BSC F G H J K L PACKAGE DESCRIPTION X Y DETAIL B 8.89 BSC 11.25 BSC 1.27 BSC PADS SEE NOTES 3 aaa Z PACKAGE TOP VIEW 0.635 ±0.025 75SQ eee S X Y 0.635 ±0.025 75SQ eee S X Y PACKAGE BOTTOM VIEW 4.445 3.175 1.905 0.635 0.635 1.905 3.175 4.445 DETAIL C DETAIL A DETAIL C 6.350 5.080 3.810 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3 4 LAND DESIGNATION PER JESD MO-222 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 76 COMPONENT PIN “A1” 2.540 1.270 0.000 1.270 LTMXXXXXX μModule 2.540 3.810 TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION LGA 76 0809 REV Ø 5.080 6.350 SYMBOL TOLERANCE aaa 0.15 bbb 0.10 eee 0.05 LTM8033 23 8033f SUGGESTED PCB LAYOUT TOP VIEW LTM8033 TYPICAL APPLICATION 3.3V Step-Down Converter VIN 5.5V TO 36VDC LTM8033 VOUT 3.3V 100μF 3A VIN SHARE RUN/SS FIN 4.7μF 10μF 93.1k f = 425kHz RT SYNC GND ADJ 8033 TA08 VOUT AUX BIAS PGOOD 154k RELATED PARTS PART NUMBER LTM8031 LTM8032 DESCRIPTION Ultralow Noise EMC 1A μModule Regulator Ultralow Noise EMC 2A μModule Regulator COMMENTS EN55022 Class B Compliant, 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V EN55022 Class B Compliant, 3.6V ≤ VIN ≤ 36V; 0.8V ≤ VOUT ≤ 10V 8033f 24 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0710 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010