HSDL-3208-S25

HSDL-3208 Ultra Small Profile Package IrDA® Data Compliant Low Power 115.2 kbit/s Infrared Transceiver Data Sheet Description Features The HSDL-3208 is an ultra-small low cost infrared transceiver module that provides the interface between logic and infrared (IR) signals for through air, serial, half-duplex IR data link. The module is compliant to IrDA Physical Layer Specifications version 1.4 Low Power from 9.6 kbit/s to 115.2 kbit/s with extended link distance. It is IEC 825-Class 1 eye safe and able to switch to Low Tx Power Mode when programming sequence is applied to both SD and TXD inputs. • Fully compliant to IrDA 1.4 low power specification from 9.6 kbit/s to 115.2 kbit/s • Miniature package – Height: 1.60 mm – Width: 7.00 mm – Depth: 2.80 mm • Miniature package (with shield) – Height: 1.80 mm – Width: 7.40 mm – Depth: 2.90 mm • Guaranteed temperature performance, -25 to +70°C – Critical parameters are guaranteed over temperature and supply voltage • Low power consumption – Low shutdown current (1 nA typical) – Complete shutdown of TXD, RXD, and PIN diode • Withstands >100 mVp-p power supply ripple typically • Excellent EMI performance without shield • VCC supply 2.4 to 3.6 volts • LED stuck-high protection • Designed to accommodate light loss with cosmetic windows • IEC 825-class 1 eye safe • Lead-free and RoHS compliant The HSDL-3208 can be shut down completely to achieve very low power consumption. In the shutdown mode, the PIN diode will be inactive and thus producing very little photocurrent even under very bright ambient light. Such features are ideal for battery operated handheld products. VCC CX2 Applications SD (5) RXD (4) CX1 RECEIVER VCC (6) HSDL-3208 GND (7) • IRFM • Mobile telecom – Cellular phones – Pagers – Smart phones • Data communication – PDAs – Portable printers • Digital imaging – Digital cameras – Photo-imaging printers TXD (3) LED C (2) VCC TRANSMITTER R1 LED A (1) 7 Figure 1. Functional block diagram of HSDL-3208. 6 5 4 3 2 1 Figure 2. Rear view diagram with pinout. Application Support Information technical understanding associated with HSDL-3208 infrared transceiver module. You can contact them through your local Lite-On sales representatives for additional details. The Application Engineering group in Lite-On Technology is available to assist you with the Order Information Part Number Packaging Type Package Quantity HSDL-3208-021 025 Tape and Reel Front View 2500 Marking Information The unit is marked with ‘YWL’ on the back of the PCB for front option without shield. Y = year W = work week L = lot information I/O Pins Configuration Table Pin Symbol Description I/O Type Notes 1 LED A LED Anode Input 1 2 LED C LED Cathode 3 TXD Transmit Data Input, Active High 3 4 RXD Receive Data Output, Active Low 4 5 SD/Mode Shutdown Input, Active High 5 6 VCC Supply Voltage Supply Voltage 6 7 GND Ground Ground 7 2 Notes: 1. This pin can be connected directly to VCC (i.e. without series resistor) at less than 3 V. 2. Leave this pin unconnected. 3. This pin is used to transmit serial data when SD pin is low. Do not float the pin. This pin has an internal 500 kΩ pulldown with a typical input capacitance of 2 pF. 4. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull down resistor is required. It is in tri-state mode when the transceiver is in shutdown mode. This pin tristates with a weak 500 kΩ pullup resistor. 5. The transceiver is in shutdown mode if this pin is high. Do not float the pin. 6. Regulated, 2.4 to 3.6 volts. 7. Connect to system ground. Recommended Application Circuit Components Component Recommended Value Notes R1 30 Ω ± 5%, 0.25 Watt for 2.4 25 ns, set TXD input to logic High, wait ts ≥ 25 ns (from 50% of TXD rising edge until 50% of SD falling edge). 3. Then set SD/Mode to logic Low. The High to Low negative edge transition will determine the TX Power Mode. 4. After waiting for tH ≥ 100 ns, set the TXD input to logic Low. 5. SD input pulse width for mode selection should be > 50 ns. 3 CAUTIONS: The BiCMOS inherent to the design of this component increases the component’s susceptibility to damage from the electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Absolute Maximum Ratings For implementations where case to ambient thermal resistance is ≤ _50°C/W. Parameter Symbol Min. Max. Units Storage Temperature TS -40 +100 °C Operating Temperature TA -25 +85 °C LED Anode Voltage VLEDA 0 6.5 V Supply Voltage VCC 0 6.5 V Input Voltage: TXD, SD/Mode VI 0 6.5 V Output Voltage: RXD VO 0 6.5 V DC LED Transmit Current ILED (DC) 50 mA Peak LED Transmit Current ILED (PK) 250 mA Notes 10 Note: 10. ≤ 20% duty cycle, ≤ 90 μs pulse width. Recommended Operating Conditions Parameter Symbol Min. Operating Temperature TA Supply Voltage Max. Units -25 70 °C VCC 2.4 3.6 V Logic Input Voltage Logic High for TXD, SD/Mode Logic Low VIH 2/3 VCC VCC V VIL 0 1/3 VCC V Receiver Input Irradiance Logic High EIH 0.0081 500 mW/cm2 For in-band signals ≤ 115.2kbit/s[11] Logic Low EIL 1 μW/cm2 For in-band signals[11] LED (Logic High) Current Pulse Amplitude Receiver Data Rate ILEDA Typ. 50 9.6 Conditions mA 115.2 kbit/s Note: 11. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 ≤ λp ≤ 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4. 4 Electrical & Optical Specifications Specifications (Min. & Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C with VCC set to 3.0 V unless otherwise noted. Parameter Symbol Min. Typ. Max. Units Conditions Viewing Angle 2θ 30 Peak Sensitivity Wavelength λp RXD Output Voltage Logic High VOH VCC-0.2 VCC V IOH = -200 μA, EI ≤ 1 μW/cm2 Logic Low VOL 0 0.4 V IOL = 200 μA, EI ≥ 8.1 μW/cm2 RXD Pulse Width (SIR) tPW (SIR) 1 4.0 μs θ ≤ 15°, CL =12 pF RXD Rise and Fall Times tr, tf 50 ns CL =12 pF Receiver Latency Time tL 70 μs Receiver Wake Up Time tW 90 μs Receiver ° 880 nm Transmitter High Power IEH 4 8 mW/sr ILEDA = 50 mA, θ ≤ 15°, VTXD ≥ VIH T = 25°C Low Power IEH 2.4 4.8 mW/sr ILEDA = 30 mA, θ ≤ 15°, VTXD ≥ VIH T = 70°C, VCC = 2.4 V Viewing Angle 2θ 30 Peak Wavelength λp 875 nm Spectral Line Half Width Δλ 35 nm TXD Input Current High IH 0.02 10 μA VI ≥ VIH Low IL -0.02 10 μA 0 ≤ VI _≤ VIL On IVLED 50 mA VI (TXD) ≥ VIH, VI (SD) ≤ VIL Shutdown IVLED 20 100 nA VI (SD) ≥ VIH tPW (SIR) 1.5 1.6 1.8 μs tPW (TXD) = 1.6 μs at 115.2 kbit/s 25 100 μs 600 ns tpw (TXD) = 1.6 μs Radiant Intensity LED Current Optical Pulse Width (SIR) Maximum Optical PW tPW(max.) TXD Rise and Fall Time (Optical) LED Anode on State Voltage LED Anode Current -10 60 tr, tf ° High Power VON(LEDA) 1.7 1.8 V ILEDA = 50 mA, VI(TXD) ≥ VIH Low Power VON(LEDA) 2.1 2.25 V ILEDA = 30 mA, VI(TXD) ≥ VIH T = 70°C, VCC = 2.4 V Low Power ILEDA 32 42 mA max. current measured at VLED = 4.3 V and R = 33 Ω Shutdown ICC1 0.001 1 μA VSD ≥ VCC -0.5, TA = 25°C Idle ICC2 100 200 μA VI (TXD) ≤ VIL, EI = 0 Active Receiver ICC3 0.8 3.1 mA VCC = 3.6 V, VI(TXD)≤ 1/3 VCC[12] Transceiver Supply Current Notes: 12. Typical value is at EI = 10 mW/cm2, maximum value is at EI = 500 mW/cm2. 5 tpw tpw VOH LED ON 90% 90% 50% 50% 10% VOL 10% LED OFF tf tr tr Figure 5. RXD output waveform. Figure 6. LED optical waveform. TXD SD RX LIGHT LED RXD tpw (MAX.) tRW Figure 7. TXD "stuck on" protection waveform. Figure 8. Receiver wakeup time waveform. SD TXD TX LIGHT tTW Figure 9. TXD wakeup time waveform. 19 90.0E-3 17 15 13 11 7 45.0E-3 80.0E-3 70.0E-3 60.0E-3 50.0E-3 9 65.0E-3 85.0E-3 AVE. TXD ILED_A (A) Figure 10. LOP vs. ILED. 6 AVE. TXD ILED_A vs. AVE. TXD VLED_A, TEMPERATURE = 25°C 100.0E-3 AVE. TXD ILED_A (A) AVE. RADIANT INTENSITY (mW/Sr) AVE. TXD RADIANT INTENSITY vs. AVE. TXD ILED_A, TEMPERATURE = 25°C 21 105.0E-3 40.0E-3 1.44 1.46 1.48 1.50 1.52 1.54 1.56 1.58 1.60 AVE. TXD VLED_A (V) Figure 11. VLED vs. ILED. tf HSDL-3208 (Unshielded) Package Dimensions 0.80 2.80 MOUNTING CENTER 3.50 7.00 ± 0.10 1.60 ± 0.10 0.80 0.95 5.10 R 1.10 0.95 R 1.10 2.80 1.60 0.80 LED A LED C TXD 0.95 (6X) 0.34 (5X) RXD SD VCC GND 0.60 (7X) 0.40 (2X) Figure 12. Package outline dimensions. (Unit: mm, Tolerance: ± 0.2 mm) 7 HSDL-3208 (Unshielded) Tape and Reel Dimensions HSDL-3208 (Unshielded) Tape and Reel Dimensions 4.0 ± 0.1 UNIT: mm 1.75 ± 0.1 + 0.1 ∅ 1.5 0 2.0 ± 0.1 POLARITY PIN 7: GND 7.5 ± 0.1 16.0 ± 0.2 7.35 ± 0.1 PIN 1: LED A 2.93 ± 0.1 0.3 ± 0.05 4.0 ± 0.1 1.78 ± 0.1 PROGRESSIVE DIRECTION EMPTY PARTS MOUNTED LEADER (400 mm MIN.) (40 mm MIN.) EMPTY (40 mm MIN.) OPTION # "B" "C" QUANTITY 021 178 60 2500 UNIT: mm DETAIL A 2.0 ± 0.5 B C ∅ 13.0 ± 0.5 R 1.0 LABEL 21 ± 0.8 DETAIL A 2 16.4 + 0 2.0 ± 0.5 Figure 13. Tape and reel dimensions. 8 HSDL-3208 (Shielded) Package Dimensions 1. Unless otherwise stated, dimension tolerance: ± 0.2 mm. 2. Castellation length, mentioned below, is the minimum value i.e., 0.6 mm. The specification is: 0.63 ± 0.03 mm. 3.7 MOUNTING CENTER 0.99 7.40 ± 0.10 +0.03 7.00 –0.00 1.80 ± 0.05 0.8 2.5 2.0 0.95 0.95 5.1 COPLANARITY = –0.1 mm to 0.0 mm R1.1 EMITTER RECEIVER 0.95 2.9 0.6 1.6 1 2 3 4 5 6 7 0.2 6.96 0.64 +0.02 0.15 –0.01 Figure 14a. Package outline dimensions. 9 0.95 0.6 0.63 ± 0.03 1.97 HSDL-3208 (Shielded) Tape Dimensions Po 2.0 ± 0.10 P2 Do B T E B-B SECTION 5°(MAX.) F W Bo A A B P1 8 ± 0.10 Ko D1 Ao 3°(MAX.) A-A SECTION UNIT: mm SYMBOL SPEC SYMBOL SPEC Ao Bo Ko Po P1 P2 T 3.15 ± 0.10 7.70 ± 0.10 1.95 ± 0.10 4.00 ± 0.10 8.00 ± 0.10 2.35 ± 0.10 0.30 ± 0.10 E F Do D1 W 10Po 1.75 ± 0.10 7.50 ± 0.10 1.55 ± 0.05 1.50 ± 0.10 16.00 ± 0.30 40.00 ± 0.20 +0.5 16 –0 +0.5 n 13.1 –0 62.3 +0.1 –0.1 +0.1 2.6 –0.1 PS Figure 15. Tape dimensions. 10 Moisture Proof Packaging Baking Conditions All HSDL-3208 options are shipped in moisture proof package. Once opened, moisture absorption begins. If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. This part is compliant to JEDEC Level 4. 3. Package Temp. Time In reels 60°C ≥ 48 hours In bulk 100°C ≥ 4 hours 125°C ≥ 2 hours 150°C ≥ 1 hour UNITS IN A SEALED MOISTURE-PROOF PACKAGE Baking should only be done once. Recommended Storage Conditions PACKAGE IS OPENED (UNSEALED) ENVIRONMENT LESS THAN 30°C, AND LESS THAN 60% RH YES NO BAKING IS NECESSARY YES NO Figure 16. Baking conditions chart. 11 10°C to 30°C Relative Humidity below 60% RH Time from Unsealing to Soldering After removal bag, the After removalfrom fromthethe bag, parts should be soldered within the parts should be soldered three days if stored at the recomwithin 168 hours if stored at mended storage conditions. the recom-mended storage conditions. PACKAGE IS OPENED LESS THAN 168 HOURS PERFORM RECOMMENDED BAKING CONDITIONS Storage Temperature NO Recommended Reflow Profile MAX. 260°C T – TEMPERATURE – (°C) 255 R3 R4 230 220 200 R2 180 60 sec. MAX. ABOVE 220°C 160 R1 120 R5 80 25 0 50 100 150 200 250 300 t-TIME (SECONDS) P1 HEAT UP P2 SOLDER PASTE DRY P3 SOLDER REFLOW P4 COOL DOWN Figure 17. Reflow graph. Process Zone Symbol ΔT Maximum ΔT/Δtime Heat Up P1, R1 25°C to 160°C 4°C/s Solder Paste Dry P2, R2 160°C to 200°C 0.5°C/s Solder Reflow P3, R3 200°C to 255°C (260°C at 10 seconds max.) 4°C/s P3, R4 255°C to 200°C –6°C/s P4, R5 200°C to 25°C –6°C/s Cool Down The reflow profile is a straightline representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different ΔT/Δtime temperature change rates. The ΔT/Δtime rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3208 castellation I/O pins are heated to a temperature of 160°C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4°C per second to allow for even heating of both the PC board and HSDL-3208 castellation I/O pins. 12 Process zone P2 should be of sufficient time duration (60 to 120 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 200°C (392°F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 255°C (491°F) for optimum results. The dwell time above the liquidus point of solder should be between 20 and 60 seconds. It usually takes about 20 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 60 seconds, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 200°C (392°F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25°C (77°F) should not exceed 6°C per second maximum. This limitation is necessary to allow the PC board and HSDL-3208 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL3208 transceiver. HSDL-3208 (Unshielded) 1.0 Solder Pad, Mask and Metal Stencil Aperture METAL STENCIL FOR SOLDER PASTE PRINTING STENCIL APERTURE LAND PATTERN SOLDER MASK PCBA Figure 18. Stencil and PCBA. 1.1 Recommended Land Pattern CL MOUNTING CENTER 0.10 0.775 1.75 FIDUCIAL 0.60 0.95 1.9 UNIT: mm Figure 19. Stencil and PCBA. 13 2.85 1.2 Recommended Metal Solder Stencil Aperture It is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern. 1.3 Adjacent Land Keepout and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. It is recommended that two fiducial crosses be placed at mid-length of the pads for unit alignment. APERTURES AS PER LAND DIMENSIONS t w l Figure 20. Solder stencil aperture. Aperture size(mm) Stencil thickness, t (mm) length, l width, w 0.152 mm 2.60 ± 0.05 0.55 ± 0.05 0.127 mm 3.00 ± 0.05 0.55 ± 0.05 7.2 0.2 2.6 SOLDER MASK Note: Wet/Liquid PhotoImageable solder resist/mask is recommended. UNITS: mm Figure 21. Adjacent land keepout and solder mask areas. 14 3.0 Appendix A : SMT Assembly Application Note HSDL-3208 (Shielded) 2.0 Solder Pad, Mask and Metal Stencil Aperture METAL STENCIL FOR SOLDER PASTE PRINTING STENCIL APERTURE LAND PATTERN SOLDER MASK PCBA Figure 22. Stencil and PCBA. 2.1 Recommended Land Pattern CL SHIELD SOLDER PAD 1.35 1.25 2.05 0.20 MOUNTING CENTER 0.925 1.45 FIDUCIAL 0.60 0.95 1.9 UNIT: mm Figure 23. Land Pattern. 15 2.85 2.2 Recommended Metal Solder Stencil Aperture It is recommended that only a 0.152 mm (0.006 inches) or a 0.127 mm (0.005 inches) thick stencil be used for solder paste printing. This is to ensure adequate printed solder paste volume and no shorting. See the table below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. Aperture opening for shield pad is 2.7 mm x 1.25 mm as per land pattern. 2.3 Adjacent Land Keepout and Solder Mask Areas Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. The minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2 mm. It is recommended that two fiducial crosses be placed at mid-length of the pads for unit alignment. APERTURES AS PER LAND DIMENSIONS t w l Figure 24. Solder stencil aperture. Aperture size(mm) Stencil thickness, t (mm) length, l width, w 0.152 mm 1.45 ± 0.05 0.55 ± 0.05 0.127 mm 1.45 ± 0.05 0.55 ± 0.05 8.2 0.2 2.6 3.0 Solder mask Units: mm Note: Wet/Liquid PhotoImageable solder resist/mask is recommended. 16 Figure 25. Adjacent land keepout and solder mask areas. Appendix B: PCB Layout Suggestion The HSDL-3208 is a shieldless part and hence does not contain a shield trace, unlike the other transceivers. The following PCB layout guidelines should be followed to obtain a good PSRR and EM immunity, resulting in good electrical performance. Things to note: 1. The AGND pin should be connected to the ground plane. ground connected board layers. Refer to the diagram below for an example of a 4-layer board. The area underneath the module at the second layer, and 3 cm in all directions around the module, is defined as the critical ground plane zone. The ground plane should be maximized in this zone. Refer to application note AN1114 or the Lite-On IrDA Data Link Design Guide for details. The layout below is based on a 2-layer PCB. 2. C1 and C2 are optional supply filter capacitors; they may be left out if a clean power supply is used. TOP LAYER CONNECT THE METAL SHIELD AND MODULE GROUND PIN TO BOTTOM GROUND LAYER. 3. VLED can be connected to either unfiltered or unregulated power supply. If VLED and VCC share the same power supply and C1 is used, the connection should be before the current limiting resistor R2. In a noisy environment, including capacitor C2 can enhance supply rejection. C1 is generally a ceramic capacitor of low inductance providing a wide frequency response while C2 is a tantalum capacitor of big volume and fast frequency response. The use of a tantalum capacitor is more critical on the VLED line, which carries a high current. 4. Preferably a multi-layered board should be used to provide sufficient ground plane. Use the layer underneath and near the transceiver module as VCC, and sandwich that layer between LAYER 2 CRITICAL GROUND PLANE ZONE. DO NOT CONNECT DIRECTLY TO THE MODULE GROUND PIN. LAYER 3 KEEP DATA BUS AWAY FROM CRITICAL GROUND PLANE ZONE. BOTTOM LAYER (GND) Top View Figure 26. PCB layout suggestion. 17 Bottom View Appendix C : General Application Guide for the HSDL-3208 Infrared IrDA® Compliant 115.2 kb/s Transceiver Description The HSDL-3208 is an ultra-small low-cost infrared transceiver module that provides the interface between logic and infrared (IR) signals for through air, serial, half-duplex IR data link. The device is designed to address the mobile computing market such as PDAs, as well as small embedded mobile products such as digital cameras and cellular phones. It is fully compliant to IrDA 1.4 low power specification from 9.6 kb/s to 115.2 kb/s, and supports HPSIR and TV Remote modes. The design of the HSDL-3208 also includes the following unique features: Interface to Recommended I/O Chips The HSDL-3208’s TXD data input is buffered to allow for CMOS drive levels. No peaking circuit or capacitor is required. Data rate from 9.6 kb/s up to 115.2 kb/s is available at the RXD pin. • Low passive component count • Shutdown mode for low power consumption requirement The diagram below shows how the IR port fits into the mobile phone platform and PDA platform. Selection of Resistor R1 Resistor R1 should be selected to provide the appropriate peak pulse LED current over different ranges of VCC as shown in the table below. Recommended R1 VCC Intensity Minimum Peak Pulse LED Current 30 Ω 3.3 V 9 mW/Sr 50 mA SPEAKER AUDIO INTERFACE DSP CORE MICROPHONE ASIC CONTROLLER RF INTERFACE TRANSCEIVER MOD/ DE-MODULATOR IR MICROCONTROLLER USER INTERFACE HSDL-3208 Figure 27. IR layout in mobile phone platform. 18 LCD PANEL RAM IR HSDL-3208 CPU FOR EMBEDDED APPLICATION ROM PCMCIA CONTROLLER TOUCH PANEL RS232C DRIVER Figure 28. IR layout in PDA platform. The link distance testing is done using typical HSDL-3208 units with National Semiconductor’s PC87109 3V Super I/O Controller and SMC’s FDC37C669 and FDC37N769 Super I/O controllers. An 115.2 kb/s datarate IR link distance of up to 40 cm has been demonstrated. 19 COM PORT Appendix D: Window Designs for HSDL-3208 Optical port dimensions for HSDL-3208: To ensure IrDA compliance, some constraints on the height and width of the window exist. The minimum dimensions ensure that the IrDA cone angles are met without vignetting. The maximum dimensions minimize the effects of stray light. The minimum size corresponds to a cone angle of 30° and the maximum size corresponds to a cone angle of 60°. In the figure below, X is the width of the window, Y is the height of the window and Z is the distance OPAQUE MATERIAL from the HSDL-3208 to the back of the window. The distance from the center of the LED lens to the center of the photodiode lens, K, is 5.1 mm. The equations for computing the window dimensions are as follows: comparable, Z' replaces Z in the above equation. Z' is defined as Z' = Z + t/n where ‘t’ is the thickness of the window and ‘n’ is the refractive index of the window material. X = K + 2*(Z + D)*tanA Y = 2*(Z + D)*tanA The above equations assume that the thickness of the window is negligible compared to the distance of the module from the back of the window (Z). If they are The depth of the LED image inside the HSDL-3208, D, is 3.17 mm. ‘A’ is the required half angle for viewing. For IrDA compliance, the minimum is 150 and the maximum is 300. Assuming the thickness of the window to be negligible, the equations result in the following tables and graphs: IR TRANSPARENT WINDOW Y X IR TRANSPARENT WINDOW K Z A D Figure 29. Window design diagram. 20 OPAQUE MATERIAL Aperture Width (x, mm) Aperture Height (y, mm) (z) mm 0 1 Max. 8.76 9.92 Min. 6.80 7.33 Max. 3.66 4.82 Min. 1.70 2.33 2 3 4 5 11.07 12.22 13.38 14.53 7.87 8.41 8.94 9.48 5.97 7.12 8.28 9.43 2.77 3.31 3.84 4.38 6 7 8 9 15.69 16.84 18.00 19.15 10.01 10.55 11.09 11.62 10.59 11.74 12.90 14.05 4.91 5.45 5.99 6.52 APERTURE WIDTH (X) vs. MODULE DEPTH APERTURE HEIGHT (Y) vs. MODULE DEPTH 25 16 APERTURE HEIGHT (Y) – mm APERTURE WIDTH (X) – mm Module Depth 20 15 10 X MAX. X MIN. 5 0 0 1 2 3 4 5 6 7 8 9 MODULE DEPTH (Z) – mm Figure 30. Aperture width (X) vs. module depth. 21 14 12 10 8 6 4 Y MAX. Y MIN. 2 0 0 1 2 3 4 5 6 7 8 9 MODULE DEPTH (Z) – mm Figure 31. Aperture height (Y) vs. module depth. Window Material Almost any plastic material will work as a window material. Polycarbonate is recommended. The surface finish of the plastic should be smooth, without any texture. An IR filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. Light loss should be measured at 875 nm. The recommended plastic materials for use as a cosmetic window are available from General Electric Plastics. Shape of the Window From an optics standpoint, the window should be flat. This ensures that the window will not alter either the radiation pattern of the LED, or the receive pattern of the photodiode. If the window must be curved for mechanical or industrial design reasons, place the same curve on the back side of the window that has an identical radius as the front side. While this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. The amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. Once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. The following drawings show the effects of a curved window on the radiation pattern. In all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. Recommended Plastic Materials: Material Number Light Transmission Haze Refractive Index Lexan 141L Lexan 920A Lexan 940A 88% 85% 85% 1% 1% 1% 1.586 1.586 1.586 Note: 920A and 940A are more flame retardant than 141L. Recommended Dye: Violet #21051 (IR transmissant above 625 nm). Flat Window (First Choice) Figure 32. Shape of windows. 22 Curved Front and Back (Second Choice) Curved Front, Flat Back (Do Not Use)