LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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MSL: Level 1
APPROVAL SHEET
PRODUCT NAME
LITE-ON PART NO.
CUSTOMER NAME
CUSTOMER PART NO.
ISSUED DATE
ISSUED DEPARTMENT:
ISSUED BY:
PHOTO-COUPLER IGBT GATE DRIVER
LTV-155E
LG PDP
EAV62035601
22 October 2012
PRODUCT DEVELOPMENT (PD)
MARK LIN / WALLACE HSU (PD ENGINEER)
REVIEWED BY:
DIO TZENG (PD PRINCIPAL ENGINEER)
APPROVED BY:
KEVIN LIN (PD MANAGER)
__________________________
QUALITY ASSURANCE:
JEFFREY SU (DQE MANAGER)
__________________________
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Table of contents
1.0
2.0
3.0
4.0
5.0
6.0
Cover
Table of contents
Type document revision history
Datasheet & application notes & IR-Reflow profile
Package assembly specifications
Package inspection
6.1 X-ray
6.2 Top view & bottom view (Lead co-planarity spec)
6.3 Chip dimensions
7.0 Product qualification report
(Reliability report, ESD, Latch up test)
8.0 Packing specification
9.0 QC flow
9.1 Assembly QC flow
9.2 FAB QC flow
9.3 Abnormal Lot checking flow in final test
9.4 Testing QC flow
10.0 Manufacturing control plan
11.0 Electrical characteristics
11.1 Actual measured value of product electrical characters
11.2 Actual measured value of important electrical characteristics
by operation temperature
11.3 Actual measured value of important electrical characteristics by
voltage
12.0 Actual measurement value of each exterior part
13.0 Mean time to failure
14.0 Delaminating evaluation
15.0 CTQ actual measurement results in QC flow
16.0 SDS/SGS
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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3.0 Type Document Revision History
Rev.
Date
Initiator
Description of Change
A
B
22 October 2012
4 December 2012
11 January 2013
Wallace Hsu
Wallace Hsu
Dio Tzeng
Original
To update safety approval, MSL and Pb free information
Cover page revised, Abnormal Lot management, Lead
Co-planarity, Fab QC Flow, Delaminating Evaluation, REEL
and internal and external packing material, MSDS / SGS
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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4.0 Datasheet & Application Notes & IR-Reflow Profile
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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LTV-155E
Plasma Display Panel (PDP)
Industrial Inverter
MOS FET/ IGBT Gate Driver
Description
The LTV-155E optocoupler is ideally
Features
suited for driving power IGBTs and MOSFETs
•
0.6A maximum peak output current
used in plasma display panel. It contains an
•
2.5mA maximum supply current (ICC)
AlGaAs
an
•
Wide operating range: 10 to 30 Volts (VCC)
integrated circuit with a power output stage.
•
Rail to rail output voltage
The Optocoupler operational parameters are
•
Guaranteed performance over temperature
-40oC ~ +100oC.
•
Threshold input current: IFLH = 7.5mA (max)
•
Common mode transient immunity: ±20kV/µs
LED
optically
coupled
to
guaranteed over the temperature range from
o
o
-40 C ~ +100 C.
(min)
Functional Diagram
•
Isolation voltage: 3750 Vrms (min)
•
Fast switching speed, 200ns max propagation
delay
•
MSL 1 Level
•
Safety approval
UL/ cUL 1577, Cert. No.E113898.
3750 Vrms/1 min
6
5
4
VDE DIN EN60747-5-5, Cert. No. 40015248
VIORM = 560 Vpeak
1. Anode
3. Cathode
4. GND
5. Vo (Output)
6. Vcc
SHIELD
1
3
Application
•
Plasma Display Panel .
•
IGBT/MOSFET gate drive
•
Industrial Inverter
•
Induction heating
•
Uninterruptible power supply (UPS)
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4,
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Package Dimensions
SOP-5 Package (LTV-155E)
Date Code *1
Factory Code *2.
Rank *3
Notes :
1. All Dimensions in Millimeters
2. Mold flash per side is 0.15mm
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
Page : 2
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Taping Dimensions
LTV-155E-TP1
LTV-155E-TP
Description
Symbol
Dimensions in millimeters ( inches )
Tape wide
Pitch of sprocket holes
W
P0
Distance of compartment
F
P2
12±0.3 (0.47)
4±0.1 (0.15)
5.5±0.1 (0.217)
2±0.1 (0.079)
Distance of compartment to
compartment
P1
8±0.1 (0.315)
Quantity Per Reel
Package Type
LTV-155E
Quantities(pcs)
3000
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Parameter
Symbol
Min
Max
Units
Storage Temperature
TST
-55
125
o
Operating Temperature
TA
-40
100
o
Isolation Voltage
VISO
3750
Supply Voltage
VCC
0
C
C
VRMS
35
V
260
°C
IF(AVG)
25
mA
VR
5
V
IF(TRAN)
1
A
tr(IN) /tf(IN)
500
ns
PI
45
mW
IOH(PEAK)
0.6
A
IOL(PEAK)
0.6
A
VO
35
V
PO
250
mW
PT
295
mW
Lead Solder Temperature
Note
Input
Average Forward Input Current
Reverse Input Voltage
Peak Transient Input Current
( 5V
IFLH
－
2.6
7.5
mA
Threshold Input Voltage
High to Low
VCC=15V, VO < 5V
VFHL
0.8
－
－
V
V6-5=2V
IOPH1
－
-0.5
-0.2
V6-5=10V
IOPH2
－
－
-0.4
V5-4=2V
IOPL1
0.2
0.5
－
V5-4=10V
IOPL2
0.4
－
－
9
9.55
－
9
Output
High level output current (1)
Vcc=15V,
IF=10mA,
3, 5,
15
A
Low level output current (1)
Vcc=15V,
IF=0mA,
4, 6,
16
High level output voltage
VCC=10V. IF = 10mA,
IO = -100mA
VOH
Low level output voltage
VCC=10V, IF = 0mA,
IO = 100mA
VOL
－
0.3
1
2, 18
High Level Supply Current
VCC=10 to 20V
IF = 10mA, VO=Open
ICCH
－
1.5
3.0
7, 8,
19
Low Level Supply Current
VCC=10 to 20V
IF = 0mA, VO=Open
1, 17
V
mA
ICCL
－
1.5
7, 8,
20
3.0
All Typical values at TA = 25°C, unless otherwise specified.
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Switching Specifications
Parameter
Test Condition
Min
Typ
Max
L→H
Ta=25 oC
IF=0→10mA
TPLH
－
115
170
H→L
Ta=25 oC
IF=10→0mA
TPHL
－
110
170
IF=0→10mA
TPLH
50
115
200
IF=10→0mA
TPHL
50
110
200
IF=0→10mA
|tPHL- tPLH|
－
5
50
IF=0→10mA
Tr
－
30
－
IF=10→0mA
Tf
－
15
－
|CMH|
-20
－
－
Propagation
Delay Time
L→H
H→L
Switching
Dispersion
Symbol
Time
VCC=20V
IF= 10mA
Rg= 30 Ω,
Cg= 1 nF,
f= 250 kHz,
Duty= 50%
Units
Fig
10,
11,
12,
13,
14,
21
ns
Output Rise Time (90 to
10%)
Output Fall Time (90 to
10%)
Common Mode Transient
Immunity at HIGH Level
Output
IF=10mA,VCM=1000V,
o
TA=25 C, VCC=20V
Common Mode Transient
Immunity at LOW Level
Output
VF=0V,VCM=1000V,
o
TA=25 C, VCC=20V
－
21
kV/µs
|CML|
20
－
22
－
Specified over recommended operating conditions (TA = -40 to 100°C, IF= 10 to 15mA, VF(OFF) = -3.0 to 0.8 V,
VCC = 10 to 30 V) unless otherwise specified.
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Isolation Characteristics
Parameter
Test Condition
Symbol
Min
Typ
Max
Units
Note
－
－
V
2, 3
2
Withstand Insulation Test
Voltage
RH ≤ 40-60%,
t = 1min, TA = 25oC
VISO
3750
Input-Output Resistance
VI-O = 500V DC
RI-O
－
10
12
－
Ω
Input-Output Capacitance
f = 1MHz, TA = 25 C
CI-O
－
0.92
－
pF
o
Specified over recommended operating conditions (TA = -40 to 100°C, IF= 10 to 15mA, VF(OFF) = -3.0 to 0.8 V,
VCC = 10 to 30 V) unless otherwise specified.
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Typical Performance Curves
IF=10mA
Iout=-100mA
VCC=10V
VEE=0V
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-40
-20
0
20
40
60
80
0.6
VOL-OUTPUT LOW VOLTAGE-V
(VOH-VCC)-HIGH OUTPUT
VOLTAGE DROP-V
0
-0.1
0.5
0.4
0.3
VF(off)=0V
Iout=100mA
VCC=10V
VEE=0V
0.2
0.1
0
100
-40
-20
0
℃
TA-TEMPERATURE-℃
0
-0.5
f=200Hz
DUTY CYCLE=0.2%
IF=10mA
VCC=15V
VEE=0V
-1.5
-2
-40
-20
0
20
40
60
80
1.5
1
100
0
-40
-20
0
(V5-4) - Output Low Voltage DropV
(V6-5) - Output High Voltage DropV
4
2
100℃
℃
f=200Hz
DUTY CYCLE=0.2%
IF=10mA
VCC=15V
VEE=0V
0
-3
-2.5
-2
-1.5
-1
-0.5
0
IOH - Output High Current-A
Figure 5 : Output High Voltage drop vs. High Current
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
20
40
60
80
100
Figure 4: Output Low Current vs. Temperature
8
6
100
℃
TA- TEMPERATURE-℃
12
10
80
0.5
Figure 3: Output High Current vs. Temperature
25℃
℃
60
f=200Hz
DUTY CYCLE=99.8%
IF=0mA
VCC=15V
VEE=0V
TA- TEMPERATURE-℃
℃
-40℃
℃
40
Figure 2: Output Low Voltage vs. Temperature
IOL- OUTPUT LOW CURRENT-A
IOH- OUTPUT HIGH CURRENT-A
Figure 1: Output High Voltage drop vs. Temperature
-1
20
TA-TEMPERATURE-℃
12
f=200Hz
DUTY CYCLE=99.8%
IF=0mA
VCC=15V
VEE=0V
10
8
100℃
℃
25℃
℃ -40℃
℃
6
4
2
0
0
0.5
1
1.5
2
IOL - Ouput Low Current-A
Figure 6 : Output High Voltage drop vs. Low Current
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Typical Performance Curves
1.7
ICC-SUPPLY CURRENT-mA
ICC-SUPPLY CURRENT-mA
2
1.8
1.6
IF=10mA for ICCH
VF=0V for ICCL
VEE=0V
1.65
1.4
1.2
1
0.8
IF=10mA for ICCH
VF=0V for ICCL
VCC=20V
VEE=0V
0.6
0.4
0.2
1.6
1.55
ICCH
ICCL
ICCH
ICCL
1.5
0
-40
-20
0
20
40
60
℃
TA-TEMPERATURE-℃
80
100
15
20
25
30
VCC-V
Figure 7 : Supply Current vs. Temperature
Figure 8 : Supply Current vs. Supply Voltage
IFLH-LOW HIGH CURRENT
THRESHOLD-mA
4
3.5
3
2.5
2
1.5
1
VCC=15V
VEE=0V
0.5
0
-40
-20
0
20
40
60
80
100
TA-TEMPERATURE-℃
Figure 9 : Low to High Threshold Current vs. Temperature
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
Page : 10
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Typical Performance Curves
150
140
130
160
IF=10mA
TA=25℃
℃
f=250kHz
Rg=30Ω, Cg=1nF
DUTY CYCLE=50%
TP-PROPAGATION DELAY-ns
TP-PROPAGATION DELAY-ns
160
IF=10mA
VCC=20V
Rg=30Ω, Cg=1nF
DUTY CYCLE=50%
f=250kHz
150
140
130
120
120
110
110
100
100
TPLH
TPHL
90
TPLH
TPHL
90
80
80
15
20
25
-40
30
-20
VCC-V
TP-PROPAGATION DELAY-ns
160
VCC=20V
℃
TA=25℃
f=250kHz
Rg=30Ω, Cg=1nF
DUTY CYCLE=50%
150
140
130
120
110
100
TPLH
TPHL
90
80
6
8
10
12
14
IF-FORWARD CURRENT-mA
160
TP- PROPAGATION DELAY- ns
80
100
IF=10mA
VCC=20V
Rg=30Ω
DUTY CYCLE=50%
f=250kHz
150
140
130
120
110
100
16
Figure 12 : Propagation vs. Forward Current
160
20
40
60
TA-TEMPERATURE-℃
Figure 11 : Propagation vs. Temperature
TP- PROPAGATION DELAY- nS
Figure 10 : Propagation vs. Supply Voltage
0
TPLH
TPHL
90
80
0
10
20
30
40
Cg- SERIES CAPACITANCE- nF
50
Figure 13 : Propagation vs. Load Capacitance
IF=10mA
VCC=20V
Cg=1nF
DUTY CYCLE=50%
f=250kHz
150
140
130
120
110
100
TPLH
TPHL
90
80
10
20
30
40
Rg - SERIES LOAD RESISTANCE- Ω
50
Figure 14 : Propagation vs. Load Resistance
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
Page : 11
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Test Circuit
1
6
1
6
V6-5
0.1uF
5
IF
A
5
IOPH
0.1uF
V CC
3
3
4
Figure 15：IOPH test circuit
6
0.1uF
V CC
V 5-4
4
1
IOPL
A
Figure 16：IOPL test circuit
1
VO
V
IF
VF
6
0.1uF
IO
5
VOL
5
VCC
VCC
V
IO
3
3
4
Figure 18：VOL test circuit
Figure 17：VOH test circuit
1
6
IF
4
I CCH
A
1
6
0.1uF
5
3
0.1uF
5
VCC
4
Figure 19：ICCH test circuit
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
I CCL
A
3
VCC
4
Figure 20：ICCL test circuit
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Test Circuit
1
6
0.1uF
VO
IF
VOH
90%
50%
10%
VOL
Cg = 1 nF
5
3
tf
tr
Rg = 30£[
VCC
VO
4
tpHL
tpLH
Figure 21：tpLH, tpHL, tr, tf, |tpHL-tpLH| test circuit
IF
1
6
90%
0.1uF
SW
A
VO
VCM
B
5
10%
V CC
tr
3
VCM
£[
-
tf
SW A: I F =10mA
4
+
1000V
VO
1V
SW B: I F =0mA
CM H =
800V
tf(us)
CM L =
800V
tr(us)
16V
Figure 22：CMR test circuit with split resistors network and waveforms
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
Page : 13
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Temperature Profile of Soldering Reflow
(1) IR Reflow soldering (JEDEC-STD-020C compliant)
One time soldering reflow is recommended within the condition of temperature and time
profile shown below.
Profile item
Conditions
Preheat
- Temperature Min (TSmin)
- Temperature Max (TSmax)
- Time (min to max) (ts)
150˚C
200˚C
90±30 sec
Soldering zone
- Temperature (TL)
- Time (tL)
Peak Temperature (TP)
217˚C
60 sec
260˚C
Ramp-up rate
Ramp-down rate
3˚C / sec max.
3~6˚C / sec
20 sec
TP 260 C
Temperature ( C)
Ramp-up
TL 217 C
Tsmax 200 C
Ramp-down
60 sec
Tsmin
150 C
tL (Soldering)
25 C
60 ~ 120 sec
ts (Preheat)
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
35~70 sec
Time (sec)
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Temperature Profile of Soldering Reflow
(2) Wave soldering (JEDEC22A111 compliant)
One time soldering is recommended within the condition of temperature.
Temperature: 260+0/-5˚C
Time: 10 sec.
Preheat temperature:25 to 140˚C
Preheat time: 30 to 80 sec.
(3) Hand soldering by soldering iron
Allow single lead soldering in every single process. One time soldering is recommended.
Temperature: 380+0/-5˚C
Time: 3 sec max.
Part No. :LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
Page :
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Application Information
Recommended Application Circuit
The recommended application circuit shown in Figure 23 which is a typical gate drive application is using
the LTV-155E. The following describes about driving IGBT. However, it is also suitable to MOSFET.
Designer will need to tune the VCC supply voltage, depend on the IGBT or MOSFET gate threshold
requirements (Recommended VCC = 15V for IGBT and 12V for MOSFET).
The supply bypass capacitors (0.1 µF) provide the large transient current necessary during a switching
transition. Since the transient nature of the charging currents, a low current power supply (3.0mA) power
supply will be enough to power the device. The split resistors (in the ratio of 1.5:1) across the LED will
provide a high CMR response by providing a balanced resistance network across the LED.
The gate resistor Rg serves to limit gate charge current and controls the IGBT collector voltage rise and
fall times.
In PC board design, care should be taken to avoid routing the IGBT collector or emitter traces close to
the LTV-155E input as this can result in unwanted coupling of transient signals into LTV-155E and
degrade performance.
R
1
V CC
6
ANODE
0.1uF
+
CATHODE
3
SHIELD
R
VO
5
Rg
V EE =5V
+V
+
-
GND 4
CC
=15V
+HVDC
+V
-
CE
Q1
3-HVDC
AC
Q2
+V
-
CE
-HVDC
Figure 23 : Recommended application circuit with split LED drive
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Application Information
Rail-to-Rail Output
LTV-155E uses a power PMOS to deliver the large current and pull it to VCC to achieve rail-to-rail output
voltage as shown in Figure 24. This ensures that the IGBT’s gate voltage is driven to the optimum
intended level with no power loss across IGBT even when an unstable power supply is used.
6
5
4
1. Anode
3. Cathode
4. GND
5. Vo (Output)
6. Vcc
SHIELD
1
3
Figure 24 : LTV-155E with PMOS and NMOS output stage for rail-to-rail output voltage
LED Drive Considerations for High CMR Performance
CMR with the LED On (CMRH)
A high CMR LED drive circuit must keep the LED on (short A) during common mod transients. This is
achieved by overdriving the LED current beyond the input threshold so that it is not pulled below the
threshold during a transient. A minimum LED current of 10mA provides adequate margin over the
maximum IFLH of 7.5mA to achieve 20 kV/µs CMR
CMR with the LED off (CMRL)
A high CMR LED drive circuit must keep the LED off (short B, VF≦ VF(OFF)) during common mode
transients. For example during a –dVcm/dt transient in Figure 25, the current flowing through CLEDP,
the LED will remain off and no common mode failure will occur. Figure 25 is like the recommended
application circuit (Figure 23), dose achieve ultra high CMR performance by shunting the LED in the off
state.
IF
1
6
I LN
CLA
0.1uF
SW
A
B
5
I LN
3
VCC
4
CLC
+
VO
VCM
Ω
-
Figure 25 : Recommended high-CMR drive circuit for the LTV-155E
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
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LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
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Application Information
Dead time and Propagation Delay Specification
The LTV-155E includes a Propagation Delay Difference (PDD) specification intended to help designers
minimize “dead time” in their power inverter designs. Dead time is the time period during which both the
high and low side power transistors (Q1 and Q2 in Figure 23) are off. Any overlap in Q1 and Q2
conduction will result in large currents fl owing through the power devices between the high and low
voltage motor rails.
To minimize dead time in a given design, the turn on of LED2 should be delayed (relative to the turn off
of LED1) so that under worst-case conditions, transistor Q1 has just turned off when transistor Q2 turns
on, as shown in Figure 26. The amount of delay necessary to achieve this condition is equal to the
maximum value of the propagation delay difference specification, PDDMAX, which is specified to be 100
ns over the operating temperature range of 40° C to 100° C.
Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead
time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time
is equivalent to the difference between the maximum and minimum propagation delay difference
specifications as shown in Figure 27. The maximum dead time for the LTV-155E is 200 ns (= 100 ns (-100 ns)) over an operating temperature range of -40° C to 100C.
Note that the propagation delays used to calculate PDD and dead time are taken at equal temperatures
and test conditions since the Photocouplers under consideration are typically mounted in close proximity
to each other and are switching identical IGBTs.
I LED1
VOUT1
I LED1
VOUT1
Q1 ON
Q1 ON
Q1 OFF
Q1 OFF
Q2 ON
Q2 ON
VOUT2
VOUT2
Q2 OFF
Q2 OFF
I LED2
I LED2
tpHL MIN
tpLH MIN
tpHL MAX
*PDD MAX
tpLH MIN
PDD MAX
tpHL MAX
tpLH MAX
MAXIMUM DEAD TIME
=PDD MAX - PDD MIN
*MAXIMUM DEAD TIME
= (tPHL MAX - tPHL) + (tPHL MAX - tPHL MIN)
= (tPHL MAX - tPHL) - (tPHL MIN - tPHL MAX)
Figure 26 : Minimum LED skew for zero dead time
Figure 27 : Waveforms for dead time
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE : FOR PDD CALCULATIONS THE PROPAGATION DELAYS ARE TAKEN AT THE SAME
TEMPERATURE AND TEST CONDITION.
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
Page : 18
of 19
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
Property of LITE-ON Only
Notice
1)
Maximum pulse width = 10us, maximum duty cycle = 0.2%.
2)
Device is considered a two terminal device: pins 1, 3 are shorted together and pins 4, 5, 6 are
shorted together.
3)
According to UL1577, each optocoupler is tested by applying an insulation test voltage ≥ 3750
Vrms for 1 second (leakage detection current limit, II-O ≤ 10 uA).
4)
Common mode transient immunity in high stage is the maximum tolerable negative dVcm/dt on
the trailing edge of the common mode impulse signal, Vcm, to assure that the output will remain
high.
5)
Common mode transient immunity in low stage is the maximum tolerable positive dVcm/dt on the
leading edge of the common mode impulse signal, Vcm, to assure that the output will remain low.
Part No. : LTV-155E (TP/TP1)(Rev.-D, Jan 24, 2013)
BNS-OD-C131/A4
Page : 19
of 19
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
Property of LITE-ON Only
5.0 Package Assembly Specifications
5
3
1
1.
2.
3.
4.
5.
6.
7.
2
6
4
7
Black epoxy resin
Semitransparent epoxy resin
Transparent silicone resin
Gold wire
Emitter
Detector
Lead frame
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
Property of LITE-ON Only
6.0 Package inspection
6.1 X-ray
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
Property of LITE-ON Only
6.2 Top view & Bottom view & Side view
Top view
Side view
Bottom view
*. Lead Co-planarity: 0.10 mm Max. (Reference JEDEC-MO-155)
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
Property of LITE-ON Only
6.3 Chip dimensions (Top view by real measured)
Emitter
Detector
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
Property of LITE-ON Only
7.0 Product Qualification Report
(Reliability Report, ESD)
LI TE-O N TEC H N O LO G Y C O RP O R ATI O N
Property of LITE-ON Only
Reliability Test Report
Qualification
Lite-on electronics (Thailand) Co., Ltd
Package:
Part Number:
Products Type:
Test Purpose:
Test Period:
Page:
MFP / Potocouplers
LTV-155E
High Speed IGBT/MOSFET Gate Driver.
New design IGBT of MFP qualification.
23-April ~ 25-June-2012
1/3
Test Item as require:
Test title
Sample
size
Test Condition
Result
Pre-conditioning test
315
125°C=24Hrs, 85°C 85%RH=168Hrs
and IR Reflow 260°C Peak=3Cycles
315
Temp Cycling Test
45
Ta= -40~125°C, Dwell time = 15 min per Zone, 1000Cycles
45
High temp High Humidity Bias test
45
High Temp Operation Life
45
High Temp Reverse Bias Test
Autoclave
High temp storage
Low temp storage
45
45
45
45
Ta=85°C, 85%RH, IF=16mA, Vin= 5V, IO=20mA, Vcc=
30V, 1000Hrs.
Ta=110°C, If=16mA, Vin= 5V, IO=20mA, Vcc= 30V,
1000Hrs.
Ta=110°C, VCE = 30V, 1000Hrs.
Temp=121°C, 100%RH and 15Psi, 96Hrs.
Temp= 150°C, 1000Hrs.
Temp= -55°C, 1000Hrs.
20
Temp=121°C, 100%RH and 15Psi, 96Hrs.
Remark
45
45
45
45
45
45
Non-Preconditioning test
Autoclave
20
Spec limit of product.
Parameter
Measurement condition
Symbol
Input Forward Voltage
Reverse Leakage Current
High Level Output Current
Low Level Output Current
High Level Output Voltage
Low Level Output Voltage
High Level Supply Current
Low Level Supply Current
Threshold Input Current Low to High
Threshold Input Voltage High to Low
IF= 10 mA
VR= 5V
Vo=(VCC-4V)
Vo=(VEE+2V)
Io= -100mA, IF= 10mA
Io=100mA
IF=10 to 16 mA
IF=-3 to 0.8 V
IO=0mA, Vo>5V
IO=0mA, Vo100mA
VCC
3
PASS
VOLTAGE TEST
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