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L74VHC1GT09

L74VHC1GT09

  • 厂商:

    LRC(乐山无线电)

  • 封装:

  • 描述:

    L74VHC1GT09 - 2-Input AND Gate with Open Drain Output with LSTTL-Compatible Inputs - Leshan Radio Co...

  • 详情介绍
  • 数据手册
  • 价格&库存
L74VHC1GT09 数据手册
LESHAN RADIO COMPANY, LTD. 2-Input AND Gate with Open Drain Output with LSTTL–Compatible Inputs L74VHC1GT09 The L74VHC1GT09 is an advanced high speed CMOS 2–input AND gate with open drain output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including an open drain output which provides the ability to set output switching level. This allows the L74VHC1GT09 to be used to interface 5 V circuits to circuits of any voltage between V CC and 7 V using an external resistor and power supply. The device input is compatible with TTL–type input thresholds and the output has a full 5.0 V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power supply. The L74VHC1GT09 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the L74VHC1GT09 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, hot insertion, etc. • High Speed: t PD = 4.3 ns (Typ) at V CC = 5 V • Low Internal Power Dissipation: I CC = 2 mA (Max) at T A = 25°C • Power Down Protection Provided on Inputs • Pin and Function Compatible with Other Standard Logic Families • Chip Complexity: FETs = 62; Equivalent Gates = 16 MARKING DIAGRAMS 5 4 1 2 3 VXd SC–88A/SOT–353/SC–70 DF SUFFIX Pin 1 d = Date Code 5 4 Figure 1. Pinout (Top View) 1 2 3 VXd Figure 2. Logic Symbol Pin 1 d = Date Code TSOP–5/SOT–23/SC–59 DT SUFFIX PIN ASSIGNMENT 1 2 3 4 5 IN B IN A GND OUT Y V CC A L L H H FUNCTION TABLE Inputs B L H L H Output Y L L L Z ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. 1/6 LESHAN RADIO COMPANY, LTD. L74VHC1GT09 MAXIMUM RATINGS Symbol V CC V IN V OUT I IK I OK I OUT I CC PD θ JA TL TJ T stg V ESD Parameter DC Supply Voltage DC Input Voltage DC Output Voltage Input Diode Current Output Diode Current V OUT < GND; V OUT > V CC DC Output Current, per Pin DC Supply Current, V CC and GND Power dissipation in still air SC–88A, TSOP–5 Thermal resistance SC–88A, TSOP–5 Lead Temperature, 1 mm from Case for 10 s Junction Temperature Under Bias Storage temperature ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Value – 0.5 to + 7.0 – 0.5 to +7.0 – 0.5 to +7.0 –20 +20 + 25 +50 200 333 260 + 150 –65 to +150 >2000 > 200 N/A Unit V V V mA mA mA mA mW °C/W °C °C °C V I LATCH–UP Latch–Up Performance Above V CC and Below GND at 125°C (Note 5) ± 500 mA 1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 2. Tested to EIA/JESD22–A114–A 3. Tested to EIA/JESD22–A115–A 4. Tested to JESD22–C101–A 5. Tested to EIA/JESD78 RECOMMENDED OPERATING CONDITIONS Symbol Parameter V CC DC Supply Voltage V IN DC Input Voltage V OUT DC Output Voltage TA Operating Temperature Range t r ,t f Input Rise and Fall Time V CC = 3.3 ± 0.3 V V CC = 5.0 ± 0.5 V Min 2.0 0.0 0.0 – 55 0 0 Max 5.5 5.5 7.0 + 125 100 20 Unit V V V °C ns/V DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature °C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 NORMALIZED FAILURE RATE 1 1 10 100 1000 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature 2/6 LESHAN RADIO COMPANY, LTD. L74VHC1GT09 DC ELECTRICAL CHARACTERISTICS V Symbol V IH Parameter Minimum High–Level Input Voltage Test Conditions CC T A = 25°C Min 1.4 2.0 2.0 0.53 0.8 0.8 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 ±0.1 2.0 0.25 T A < 85°C –55°C
L74VHC1GT09
物料型号: - L74VHC1GT09

器件简介: L74VHC1GT09是一款高速CMOS 2输入与门,具有开漏输出。它采用硅门CMOS技术制造,实现了类似双极肖特基TTL的高速操作,同时保持CMOS的低功耗特性。内部电路由三个阶段组成,包括一个开漏输出,提供设置输出开关电平的能力。这允许L74VHC1GT09用于将5V电路与任何电压在VCC和7V之间的电路进行接口,使用外部电阻和电源。

引脚分配: - 1:INB(输入B) - 2:INA(输入A) - 3:GND(地) - 4:OUTY(输出Y) - 5:Vcc(电源)

参数特性: - 最大直流供电电压:-0.5到+7.0V - 最大直流输入电压:-0.5到+7.0V - 最大直流输出电压:-0.5到+7.0V - 输入二极管电流:-20mA - 输出二极管电流:+20mA - 每引脚直流输出电流:+25mA - 直流供电电流:+50mA - 静态功耗:2mA(最大值) - 电源关闭保护:提供输入保护

功能详解: - 高速:典型值tPD为4.3ns(在5V供电下) - 低内部功耗:典型值Icc为2mA(在25°C下) - 与其他标准逻辑系列引脚和功能兼容 - 芯片复杂性:62个FETs,相当于16个门

应用信息: - 可用于将5V电路与3V电路进行接口 - 输入结构提供高达7V的电压保护 - 输出结构在Voc=0V时提供保护 - 有助于防止由于供电电压-输入/输出电压不匹配、电池备份、热插入等原因造成的设备损坏

封装信息: - SC-88A/SOT-353/SC-70 - TSOP-5/SOT-23/SC-59
L74VHC1GT09 价格&库存

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