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L74VHC1GT50

L74VHC1GT50

  • 厂商:

    LRC(乐山无线电)

  • 封装:

  • 描述:

    L74VHC1GT50 - Noninverting Buffer / CMOS Logic Level Shifter - Leshan Radio Company

  • 详情介绍
  • 数据手册
  • 价格&库存
L74VHC1GT50 数据手册
LESHAN RADIO COMPANY, LTD. Noninverting Buffer / CMOS Logic Level Shifter with LSTTL–Compatible Inputs L74VHC1GT50 The L74VHC1GT50 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The device input is compatible with TTL–type input thresholds and the output has a full 5 V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power supply. The L74VHC1GT50 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This allows the L74VHC1GT50 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch, battery backup, hot insertion, etc. • High Speed: t PD = 3.5 ns (Typ) at V CC = 5 V • Low Power Dissipation: I CC = 2 mA (Max) at T A = 25°C • TTL–Compatible Inputs: V IL = 0.8 V; V IH = 2.0 V • CMOS–Compatible Outputs: V OH > 0.8 V CC ; V OL < 0.1 V CC @Load 5 4 1 2 3 • Power Down Protection Provided on Inputs and Outputs • Balanced Propagation Delays • Pin and Function Compatible with Other Standard Logic Families • Chip Complexity: FETs = 104; Equivalent Gates = 26 MARKING DIAGRAMS VLd SC–70/SC–88A/SOT–353 DF SUFFIX Pin 1 d = Date Code 5 4 Figure 1. Pinout (Top View) 1 2 3 VLd Figure 2. Logic Symbol Pin 1 d = Date Code SOT–23/TSOP–5/SC–59 DT SUFFIX PIN ASSIGNMENT 1 2 3 4 5 NC IN A GND OUT Y V CC FUNCTION TABLE Inputs A L H Output Y L H ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. 1/6 LESHAN RADIO COMPANY, LTD. L74VHC1GT50 MAXIMUM RATINGS Value Unit – 0.5 to + 7.0 V – 0.5 to +7.0 V V CC=0 – 0.5 to +7.0 V High or Low State –0.5 to V cc + 0.5 I IK Input Diode Current –20 mA I OK Output Diode Current V OUT < GND; V OUT > V CC +20 mA I OUT DC Output Current, per Pin + 25 mA I CC DC Supply Current, V CC and GND +50 mA PD Power dissipation in still air SC–88A, TSOP–5 200 mW θ JA Thermal resistance SC–88A, TSOP–5 333 °C/W TL Lead Temperature, 1 mm from Case for 10 s 260 °C TJ Junction Temperature Under Bias + 150 °C T stg Storage temperature –65 to +150 °C V ESD ESD Withstand Voltage Human Body Model (Note 2) >2000 V Machine Model (Note 3) > 200 Charged Device Model (Note 4) N/A I LATCH–UP Latch–Up Performance Above V CC and Below GND at 125°C (Note 5) ± 500 mA 1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 2. Tested to EIA/JESD22–A114–A 3. Tested to EIA/JESD22–A115–A 4. Tested to JESD22–C101–A 5. Tested to EIA/JESD78 DC Supply Voltage DC Input Voltage DC Output Voltage RECOMMENDED OPERATING CONDITIONS Symbol Parameter V CC DC Supply Voltage V IN V OUT TA t r ,t f DC Input Voltage DC Output Voltage Operating Temperature Range Input Rise and Fall Time V CC = 0 High Low State V CC = 3.3 ± 0.3 V V CC = 5.0 ± 0.5 V Symbol V CC V IN V OUT Parameter Min 3.0 0.0 0.0 0.0 – 55 0 0 Max 5.5 5.5 5.5 V CC + 125 100 20 Unit V V V °C ns/V TIME TO 0.1% BOND FAILURES Junction Temperature °C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 NORMALIZED FAILURE RATE DEVICE JUNCTION TEMPERATURE VERSUS 1 1 10 100 1000 TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature 2/6 LESHAN RADIO COMPANY, LTD. L74VHC1GT50 DC ELECTRICAL CHARACTERISTICS V CC Symbol V IH Parameter Minimum High–Level Input Voltage Test Conditions (V) 3.0 4.5 5.5 V IL Maximum Low–Level Input Voltage 3.0 4.5 5.5 V OH Minimum High–Level Output Voltage V IN = V IH or V IL V IN = V IH or V IL I OH = – 50 µA V IN = V IH or V IL I OH = –4 mA I OH = –8 mA V IN = V IH or V IL I OL = 50 µA V IN = V IH or V IL I OL = 4 mA I OL = 8 mA V IN = 5.5 V or GND V IN = V CC or GND Input: V IN = 3.4 V V OUT = 5.5 V 3.0 4.5 3.0 4.5 3.0 4.5 3.0 4.5 0 to5.5 5.5 5.5 0.0 2.9 4.4 2.58 3.94 0.0 0.0 0.1 0.1 0.36 0.36 ±0.1 2.0 1.35 0.5 3.0 4.5 0.53 0.8 0.8 2.9 4.4 2.48 3.80 0.1 0.1 0.44 0.44 ±1.0 20 1.50 5.0 0.53 0.8 0.8 2.9 4.4 2.34 3.66 V 0.1 0.1 0.52 0.52 ±1.0 40 1.65 10 0.53 0.8 0.8 V T A = 25°C T A < 85°C –55°C
L74VHC1GT50
物料型号: - L74VHC1GT50

器件简介: - L74VHC1GT50是一款采用硅门CMOS技术制造的单门非反相缓冲器。它实现了类似双极肖特基TTL的高速操作,同时保持CMOS的低功耗特性。内部电路由三个阶段组成,包括一个提供高噪声免疫和稳定输出的缓冲输出。

引脚分配: - SC-70/SC-88A/SOT-353封装: - 1脚:日期代码 - 2脚:输入A - 3脚:NC(无连接) - 4脚:地(GND) - 5脚:输出Y(OUT) - 6脚:供电(VCC) - SOT-23/TSOP-5/SC-59封装: - 1脚:输入A - 2脚:NC(无连接) - 3脚:地(GND) - 4脚:输出Y(OUT) - 5脚:供电(VCC)

参数特性: - 高速:典型值tPD为3.5ns(在5V供电下) - 低功耗:最大Icc为2mA(在25°C时) - TTL兼容输入:VIL=0.8V,VIH=2.0V - 输入和输出均提供上电保护 - 平衡的传播延迟

功能详解: - L74VHC1GT50输入结构在7V电压下提供保护,使其能够用于5V电路与3V电路之间的接口。输出结构在Voc=0V时也提供保护,有助于防止因供电电压与输入/输出电压不匹配、电池备份、热插拔等原因造成的设备损坏。

应用信息: - 该器件可作为逻辑电平转换器,从3.0V CMOS逻辑转换到5.0V CMOS逻辑,或从1.8V CMOS逻辑转换到3.0V CMOS逻辑,同时在高电压电源下工作。

封装信息: - 提供SC-70/SC-88A/SOT-353和SOT-23/TSOP-5/SC-59两种封装类型。 - 封装尺寸和焊盘图案在文档中有详细描述。
L74VHC1GT50 价格&库存

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