LS7083N

UL ® LSI/CSI LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 RBIAS V DD (+V ) V SS (-V ) A 1 2 3 4 LS7083N LS7084N (631) 271-0400 FAX (631) 271-0405 April 2009 A3800 QUADRATURE CLOCK CONVERTER FEATURES: • x1 and x4 mode selection • Up to 16MHz output clock frequency • Programmable output clock pulse width • On-chip filtering of inputs for optical or magnetic encoder applications. • TTL and CMOS compatible I/Os • +3V to +12V operation (VDD - VSS) • LS7083N, LS7084N (DIP); LS7083N-S, LS7084N-S (SOIC) - See Figure 1 Applications: • Interface incremental encoders to Up / Down Counters (See Figure 6A and Figure 6B) • Interface rotary encoders to Digital Potentiometers (See Figure 7) DESCRIPTION: The LS7083N and LS7084N are CMOS quadrature clock converters. Quadrature clocks derived from optical or magnetic encoders, when applied to the A and B inputs of the LS7083N or LS7084N, are converted to strings of Up Clocks and Down Clocks ( LS7083N) or to a Clock and an Up/Down direction control ( LS7084N). These outputs can be interfaced directly with standard Up/Down counters for direction and position sensing of the encoder. INPUT/OUTPUT DESCRIPTION: RBIAS (Pin 1) Input for external component connection. A resistor connected between this input and VSS adjusts the output clock pulse width (Tow). For proper operation, the output clock pulse width must be less than or equal to the A, B pulse separation (TOW ≤ TPS). VDD (Pin 2) Supply Voltage positive terminal. VSS (Pin 3) Supply Voltage negative terminal. A (Pin 4) Quadrature Clock Input A. This input has a filter circuit to validate input logic level and eliminate encoder dither. B (Pin 5) Quadrature Clock Input B. This input has a filter circuit identical to input A. Mode (Pin 6) Mode is a 3-state input to select resolutions x1, x2 or x4. The selected resolution multiplies the input quadrature clock rate by 1, 2 and 4, respectively, in producing the outputs UPCK / DNCK and CLK (see Figure 2). The Mode input logic levels selects resolutions as follows: Logic 0 = x1 Float = x2 Logic 1 = x4 PIN ASSIGNMENT - TOP VIEW LSI LS7083N LSI 8 7 6 5 UPCK DNCK MODE B RBIAS V DD (+V ) V SS (-V ) A 1 2 3 4 8 7 6 5 CLK UP/DN MODE B FIGURE 1 LS7083N - DNCK (Pin 7) In LS7083N, this is the DOWN Clock Output. This output consists of low-going pulses generated when A input lags the B input. LS7084N - UP/DN (Pin 7) In LS7084N, this is the count direction indication output. When A input leads the B input, the UP/DN output goes high indicating that the count direction is UP. When A input lags the B input, UP/DN output goes low, indicating that the count direction is DOWN. LS7083N - UPCK (Pin 8) In L S7083N , this is the UP Clock output. This output consists of low-going pulses generated when A input leads the B input. LS7084N - CLK (Pin 8) In LS7084N, this is the combined UP Clock and DOWN Clock output. The count direction at any instant is indicated by the UP/DN output (Pin 7). NOTE: For the LS7084N, the timing of CLK and UP/DN requires that the counter interfacing with LS7084N counts on the rising edge of the CLK pulses. LS7084N 7083N/84N-042109-1 ABSOLUTE MAXIMUM RATINGS: PARAMETER SYMBOL DC Supply Voltage VDD - VSS Voltage at any input VIN Operating temperature TA Storage temperature TSTG DC ELECTRICAL CHARACTERISTICS: (All voltages referenced to VSS, TA = 0°C to 70°C.) PARAMETER Supply voltage Supply current SYMBOL VDD IDD VALUE 16.0 VSS - 0.3 to VDD + 0.3 0 to +70 -55 to +150 UNITS V V °C °C MIN 3.0 - MAX 12.0 10.0 UNITS V µA CONDITION VDD = 12V, All input frequencies = 0Hz RBIAS = 2MΩ VDD = 3V VDD = 5V VDD = 12V VDD = 3V VDD = 5V VDD = 12V VDD = 3V VDD = 5V VDD = 12V VDD = 3V VDD = 5V VDD = 12V MODE Logic Low A, B Logic Low VIL VIL VDD - 0.5 2.0 3.0 6.6 1.3 1.9 2.9 0.83 1.1 1.6 0.5VDD 0.7 1.0 2.8 - V V V V V V V V mA mA mA mA mA mA MODE Logic High A, B Logic High VIH VIH ALL OUTPUTS: Sink Current VOL = 0.4V Source Current VOH = VDD - 0.5V TRANSIENT CHARACTERISTICS: (TA = 0°C to 70°C) PARAMETER A, B inputs: Validation Delay A, B inputs: Pulse Width A to B or B to A Phase Delay A, B frequency Input to Output Delay IOL IOH SYMBOL TvD MIN TVD + TOW TOW - MAX 250 170 71 Infinite Infinite 1 2TPW 280 220 120 UNITS ns ns ns ns ns Hz ns ns ns CONDITION VDD = 3V VDD = 5V VDD = 12V VDD = 3V VDD = 5V VDD = 12V Includes input validation delay See Fig. 4 & 5 TPW TPS fA, B TDS Output Clock Pulse Width TOW 50 - ns 7083N/84N-040609-2 FORWARD A TPW TPS TPS TDS 2 4 TOW 2 2 4 1 4 2 2 1 4 2 REVERSE B UPCLK (7083N) DNCLK (7083N) CLK (7084N) UP/DN (7084N) 4 4 1 1 4 4 2 2 NOTE: Output clocks labeled 1, 2 and 4 have the following interpretations. 1. Generated in x1, x2 and x4 modes. 2. Generated in x2 and x4 modes only. 3. Generated in x4 mode only. FIGURE 2. LS7083N / LS7084N INPUT / OUTPUT TIMING RBIAS 1 CURRENT MIRROR A 4 FILTER DUAL ONE-SHOT x4 CLOCK CLOCK AND DIRECTION DECODE x2 CLOCK x1 CLOCK UP/DN MUX 7 DNCK or UP/DN 8 UPCK or CLK B 5 FILTER DUAL ONE-SHOT MODE V DD VSS 6 2 3 +V -V FIGURE 3. LS7083N/LS7084N BLOCK DIAGRAM The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use. 7083N/84N-121206-3 2000 1500 1250 1000 V DD = 3V V DD = 5V 35 30 V DD = 3V V DD = 5V V DD = 9V OUTPUT CLOCK PULSE WIDTH, Tow, ns 25 OUTPUT CLOCK PULSE WIDTH, Tow, µs 20 V DD = 9V 15 V DD = 12V 10 V DD = 12V 750 500 250 5 100 200 300 400 500 2 Figure 4. Tow vs RBIAS, k 4 6 8 Figure 5. Tow vs RBIAS, M 10 12 SPDT (On - Off - On) +V +V 6 MODE ENCODER A CLOCK B CLOCK 4 5 1 A B 2 V DD UPCK LS7083N DNCK V SS 3 8 5 +V 6 V DD CK-UP 40193 CK-DN V SS 8 +V 6 MODE A CLOCK ENCODER B CLOCK 4 5 1 A B VDD UPCK LS7084N DNCK V SS 3 Vss 8 7 10 8 15 CK 4516 UP/DN 2 16 V DD 7 4 RBIAS RBIAS RB RB FIGURE 6A. TYPICAL APPLICATION FOR LS7083N in x4 MODE FIGURE 6B*. TYPICAL APPLICATION FOR LS7084N in x2 MODE *See NOTE at bottom right of Page 1 +5V DIGITAL POTENTIOMETER 1 CLK V DD 8 2 3 4 U/D A1 GND AD5220 CS 7 B1 W1 A1 10k 10k 1M 1 RBIAS CLK U/D MODE B 8 7 6 5 ROTARY ENCODER B 2 VDD 3 V SS B1 6 W1 5 A GND 10k 4A LS7084N 0.01uF 10k 0.01uF Part Number: RE11CT-V1Y12-EF2CS 7083N/84N-042109-4 FIGURE 7. Rotary Encoder Control of Digital Potentiometer