MRF157

SEMICONDUCTOR TECHNICAL DATA Order this document by MRF157/D The RF Power MOS Line Power Field Effect Transistor N–Channel Enhancement Mode Designed primarily for linear large–signal output stages to 80 MHz. • Specified 50 Volts, 30 MHz Characteristics Output Power = 600 Watts Power Gain = 21 dB (Typ) Efficiency = 45% (Typ) MRF157 600 W, to 80 MHz MOS LINEAR RF POWER FET D G S CASE 368–03, STYLE 2 MAXIMUM RATINGS Rating Drain–Source Voltage Drain–Gate Voltage Gate–Source Voltage Drain Current — Continuous Total Device Dissipation @ TC = 25°C Derate above 25°C Storage Temperature Range Operating Junction Temperature Symbol VDSS VDGO VGS ID PD Tstg TJ Value 125 125 ±40 60 1350 7.7 –65 to +150 200 Unit Vdc Vdc Vdc Adc Watts W/°C °C °C THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction to Case Symbol RθJC Max 0.13 Unit °C/W NOTE — CAUTION — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. REV 1 1 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain–Source Breakdown Voltage (VGS = 0, ID = 100 mA) Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) Gate–Body Leakage Current (VGS = 20 V, VDS = 0) V(BR)DSS IDSS IGSS 125 — — — — — — 20 5.0 Vdc mAdc µAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) Drain–Source On–Voltage (VGS = 10 V, ID = 40 A) Forward Transconductance (VDS = 10 V, ID = 20 A) VGS(th) VDS(on) gfs 1.0 1.0 16 3.0 3.0 24 5.0 5.0 — Vdc Vdc mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 50 V, VGS = 0 V, f = 1.0 MHz) Output Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Reverse Transfer Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Ciss Coss Crss — — — 1800 750 75 — — — pF pF pF FUNCTIONAL TESTS Common Source Amplifier Power Gain (VDD = 50 V, Pout = 600 W, IDQ = 800 mA, f = 30 MHz) Drain Efficiency (VDD = 50 V, Pout = 600 W, f = 30 MHz, IDQ = 800 mA) Intermodulation Distortion (VDD = 50 V, Pout = 600 W(PEP), f1 = 30 MHz, f2 = 30.001 MHz, IDQ = 800 mA) Gps h IMD(d3) 15 40 — 21 45 –25 — — — dB % dB 0-6 V + - R1 C5 C6 R2 L1 C7 C9 D.U.T. C14 L2 C15 C16 C17 C18 L3 C19 C20 C21 + + 50 V - C4 RF INPUT C10 C11 C12 C13 RF OUTPUT C1 C2 C3 T1 C1, C3, C8 — Arco 469 C2 — 330 pF C4 — 680 pF C5, C19, C20 — 0.47 µF, RMC Type 2225C C6, C7, C14, C15, C16 — 0.1 µF C9, C10, C11 — 470 pF C12 — 1000 pF C13 — Two Unencapsulated 1000 pF Mica, in Series C17, C18 — 0.039 µF C21 — 10 µF/100 V Electrolytic L1 — 2 Turns #16 AWG, 1/2″ ID, 3/8″ Long L2, L3 — Ferrite Beads, Fair–Rite Products Corp. #2673000801 C8 R1, R2 — 10 Ohms/2W Carbon T1 — RF Transformer, 1:25 Impedance Ratio. See M/A-COM T1 — Application Note AN749, Figure 4 for details. T1 — Ferrite Material: 2 Each, Fair–Rite Products T1 — Corp. #2667540001 All capacitors ATC type 100/200 chips or equivalent unless otherwise noted. Figure 1. 30 MHz Test Circuit REV 1 2 30 Pout , OUTPUT POWER (WATTS) 25 POWER GAIN (dB) 20 15 10 5 0 1 VDD = 50 V IDQ = 800 mA Pout = 600 W 800 600 400 200 0 800 600 400 200 2 5 10 20 f, FREQUENCY (MHz) 50 100 0 0 0 4 VDS = 50 V 40 V 30 MHz 16 80 50 100 16 A 8A 4A 1A 75 100 80 MHz 8 IDQ = 800 mA VDS = 50 V 12 40 V 40 Pin, INPUT POWER (WATTS) Figure 2. Power Gain versus Frequency Figure 3. Output Power versus Input Power 100 TC = 25°C 5000 2000 C, CAPACITANCE (pF) 1000 500 200 100 VGS = 0 V f = 1 MHz 1 2 Crss Ciss Coss ID , DRAIN CURRENT (AMPS) 10 1 2 20 VDS, DRAIN-SOURCE VOLTAGE (VOLTS) 200 50 5 10 20 VDS, DRAIN-SOURCE VOLTAGE (VOLTS) Figure 4. DC Safe Operating Area 1.04 1.03 1.02 1.01 1 0.99 0.98 0.97 0.96 0.95 0.94 0.93 0.92 0.91 0.9 -25 Figure 5. Capacitance versus Drain Voltage 40 IDS, DRAIN CURRENT (AMPS) TYPICAL DEVICE SHOWN VDS = 10 V VGS(th) = 3.5 V gfs = 24 mhos VGS, GATE-SOURCE VOLTAGE (NORMALIZED) ID = 20 A 30 20 10 0.4 A 0 25 50 TC, CASE TEMPERATURE (°C) 0 0 2 4 6 VGS, GATE-SOURCE VOLTAGE (VOLTS) 8 Figure 6. Gate Voltage versus Drain Current Figure 7. Gate–Source Voltage versus Case Temperature REV 1 3 4 VDD = 60 V IDQ = 2 x 800 mA f = 30 MHz t1 = 1 ms (See Fig. 9) t2 = 10 ms (See Fig. 9) r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1 0.5 0.2 0.1 0.05 D = 0.5 0.2 0.1 0.05 0.02 Pout , POWER OUTPUT (kW) 3 2 RθJC(t) = r(t) RθJC RθJC = 0.13°C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RθJC(t) P(pk) t2 DUTY CYCLE, D = t1/t2 t1 1 0.02 0.01 10-2 0 SINGLE PULSE 10-1 1 10 0 20 40 60 80 100 102 103 104 Pin, POWER INPUT (WATTS) PULSE WIDTH, t (ms) Figure 8. Output Power versus Input Power Under Pulse Conditions (2 x MRF157) Note: Pulse data for this graph was taken in a push–pull circuit similar Note: to the one shown. However, the output matching network was Note: modified for the higher level of peak power. Figure 9. Thermal Response versus Pulse Width f = 100 MHz 60 30 15 7.5 4.0 2.0 Zo = 10 Ω Zin VDD = 50 V IDQ = 800 mA Pout = 600 W Note: To determine ZOL*, use formula (VCC – Vsat)2 2 Po = ZOL* Figure 10. Series Equivalent Impedance REV 1 4 C13 D2 R1 R10 C3 R12 C7 R14 22pF T1 BIAS 36-50 V + R4 10 12 11 13 D1 C1 2 7 R3 3 6 4 5 R8 R7 C9 L2 C8 T2 R13 D.U.T. L1 L2 R15 C12 C14 D.U.T . L3 + 50 V OUTPUT C10 C11 R5 R2 R6 D3 R11 C4 C2 R9 C1 — 1000 pF Ceramic Disc Capacitor C2, C3, C4 — 0.1 µF Ceramic Disc Capacitor C5 — 0.01 µF Ceramic Chip Capacitor C6, C12 — 0.1 µF Ceramic Chip Capacitor C7, C8 — Two 2200 pF Ceramic Chip Capacitors in Parallel C7, C8 — Each C9 — 820 pF Ceramic Chip Capacitor C10, C11 — 1000 pF Ceramic Chip Capacitor C13 — 0.47 µF Ceramic Chip Capacitor or Two Smaller C13 —Values in Parallel C14 — Unencapsulated Mica, 500 V. Two 1000 pF Units C14 — in Series, Mounted Under T2 D1 — 1N5357A or Equivalent D2, D3 — 1N4148 or Equivalent. IC1 — MC1723 (723) Voltage Regulator L1, L2 — 15 ηH, Connecting Wires to R14 and R15, L1, L2 — 2.5 cm Each #20 AWG L3 — 10 µH, 10 Turns #12 AWG Enameled Wire on L3 — Fair–Rite Products Corp. Ferrite Toroid #5961000401 or Equivalent R1, R2 — 1.0K Single Turn Trimpots R3 — 10K Single Turn Trimpot R4 — 470 Ohms, 2.0 Watts R5 — 10 Ohms R6, R12, R13 — 2.0K Ohms R7 — 10K Ohms R8 — Exact Value Depends on Thermistor R9 used R8 — (Typically 5.0–10K) R9 — Thermistor, Keystone RL1009–5820–97–D1 or R9 — Equivalent R10, R11 — 100 Ohms, 1.0W Carbon R14, R15 — EMC Technology Model 5308 or KDI R14, R15 — Pyrofilm PPR 870–150–3 Power Resistors, R14, R15 — 25 Ohms T1, T2 — 9:1 and 1:9 Impedance Ratio RF Transformers Unless otherwise noted, all resistors are 1/2 watt metal film type. All chip capacitors except C13 are ATC type 100/200B or Dielectric Laboratories type C17. Figure 11. 2.0 to 50 MHz, 1.0 kW Wideband Amplifier RF POWER MOSFET CONSIDERATIONS MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between the terminals. The metal oxide gate structure determines the capacitors from gate–to–drain (Cgd), and gate–to– source (Cgs). The PN junction formed during the fabrication of the TMOS® FET results in a junction capacitance from drain–to–source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the interterminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case the numbers are lower. However, neither method represents the actual operating conditions in RF applications. LINEARITY AND GAIN CHARACTERISTICS In addition to the typical IMD and power gain data presented, Figure 5 may give the designer additional information on the capabilities of this device. The graph represents the small signal unity current gain frequency at a given drain current level. This is equivalent to fT for bipolar transistors. Since this test is performed at a fast sweep speed, heating of the device does not occur. Thus, in normal use, the higher temperatures may degrade these characteristics to some extent. DRAIN CHARACTERISTICS One figure of merit for a FET is its static resistance in the full–on condition. This on–resistance, VDS(on), occurs in the linear region of the output characteristic and is specified under specific test conditions for gate–source voltage and drain current. For MOSFETs, VDS(on) has a positive temperature coefficient and constitutes an important design consideration at high temperatures, because it contributes to the power dissipation within the device. GATE CHARACTERISTICS The gate of the TMOS FET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The input resistance is very high — on the order of 109 ohms — resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage slightly in excess of the gate–to–source threshold voltage, VGS(th). Cgd GATE Cgs DRAIN Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd Cds SOURCE REV 1 5 Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination — The gates of these devices are essentially capacitors. Circuits that leave the gate open–circuited or floating should be avoided. These conditions can result in turn–on of the devices due to voltage build–up on the input capacitor due to leakage currents or pickup. Gate Protection — These devices do not have an internal monolithic zener diode from gate–to–source. The addition of an internal zener diode may result in detrimental effects on the reliability of a power MOSFET. If gate protection is required, an external zener diode is recommended. IMPEDANCE CHARACTERISTICS Device input and output impedances are normally obtained by measuring their conjugates in an optimized narrow band test circuit. These test circuits are designed and constructed for a number of frequency points depending on the frequency coverage of characterization. For low frequencies the circuits consist of standard LC matching networks including variable capacitors for peak tuning. At increasing power levels the output impedance decreases, resulting in higher RF currents in the matching network. This makes the practicality of output impedance measurements in the manner described questionable at power levels higher than 200–300 W for devices operated at 50 V and 150–200 W for devices operated at 28 V. The physical sizes and values required for the components to withstand the RF currents increase to a point where physical construction of the output matching network gets difficult if not impossible. For this reason the output impedances are not given for high power devices such as the MRF154 and MRF157. However, formulas like (VDS – Vsat)2 for a single ended design 2Pout 2((VDS – Vsat)2) for a push–pull design can be used to or Pout obtain reasonably close approximations to actual values. MOUNTING OF HIGH POWER RF POWER TRANSISTORS The package of this device is designed for conduction cooling. It is extremely important to minimize the thermal resistance between the device flange and the heat dissipator. If a copper heatsink is not used, a copper head spreader is strongly recommended between the device mounting surfaces and the main heatsink. It should be at least 1/4″ thick and extend at least one inch from the flange edges. A thin layer of thermal compound in all interfaces is, of course, essential. The recommended torque on the 4–40 mounting screws should be in the area of 4–5 lbs.–inch, and spring type lock washers along with flat washers are recommended. For die temperature calculations, the ∆ temperature from a corner mounting screw area to the bottom center of the flange is approximately 5°C and 10°C under normal operating conditions (dissipation 150 W and 300 W respectively). The main heat dissipator must be sufficiently large and have low Rθ for moderate air velocity, unless liquid cooling is employed. CIRCUIT CONSIDERATIONS At high power levels (500 W and up), the circuit layout becomes critical due to the low impedance levels and high RF currents associated with the output matching. Some of the components, such as capacitors and inductors must also withstand these currents. The component losses are directly proportional to the operating frequency. The manufacturers specifications on capacitor ratings should be consulted on these aspects prior to design. Push–pull circuits are less critical in general, since the ground referenced RF loops are practically eliminated, and the impedance levels are higher for a given power output. High power broadband transformers are also easier to design than comparable LC matching networks. EQUIVALENT TRANSISTOR PARAMETER TERMINOLOGY Collector . . . . . . . . . . . . . . . . . Drain Emitter . . . . . . . . . . . . . . . . . Source Base . . . . . . . . . . . . . . . . . Gate V(BR)CES . . . . . . . . . . . . . . . . . V(BR)DSS VCBO . . . . . . . . . . . . . . . . . VDGO IC . . . . . . . . . . . . . . . . . . . . . . ID ICES . . . . . . . . . . . . . . . . . IDSS IEBO . . . . . . . . . . . . . . . . . IGSS VBE(on) . . . . . . . . . . . . . . . . . VGS(th) VCE(sat) . . . . . . . . . . . . . . . . . VDS(on) Cib . . . . . . . . . . . . . . . . . Ciss Cob . . . . . . . . . . . . . . . . . Coss hfe . . . . . . . . . . . . . . . . . gfs VCE(sat) . . . . . . . . . . . . . . . . . . RCE(sat) = RDS(on) = IC VDS(on) ID REV 1 6 PACKAGE DIMENSIONS –A– U 1 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E H J K N Q U V INCHES MIN MAX 1.490 1.510 0.990 1.010 0.330 0.365 0.490 0.510 0.195 0.205 0.045 0.055 0.004 0.006 0.425 0.500 0.890 0.910 0.120 0.130 1.250 BSC 0.750 BSC MILLIMETERS MIN MAX 37.85 38.35 25.15 25.65 8.38 9.27 12.45 12.95 4.95 5.21 1.14 1.39 0.10 0.15 10.80 12.70 22.87 23.11 3.05 3.30 31.75 BSC 19.05 BSC –B– V 3 N 2 Q 4 PL 0.25 (0.010) D N C –T– SEATING PLANE M TA M B M H E J STYLE 2: PIN 1. DRAIN 2. GATE 3. SOURCE CASE 368–03 ISSUE C Specifications subject to change without notice. n North America: Tel. (800) 366-2266, Fax (800) 618-8883 n Asia/Pacific: Tel.+81-44-844-8296, Fax +81-44-844-8298 n Europe: Tel. +44 (1344) 869 595, Fax+44 (1344) 300 020 Visit www.macom.com for additional data sheets and product information. REV 1 7