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Cover 88EM8010/88EM8011 Power Factor Correction Controller Datasheet Customer Use Only Doc. No. MV-S104861-01, Rev. – September 30, 2009 Marvell. Moving Forward Faster Document Classification: Proprietary 88EM8010/88EM8011 Datasheet For further information about Marvell® products, see the Marvell website: http://www.marvell.com Disclaimer No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express written permission of Marvell. Marvell retains the right to make changes to this document at any time, without notice. Marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the implied warranties of merchantability or fitness for any particular purpose. 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No. MV-S104861-01 Rev. – Page 2 Document Classification: Proprietary Copyright © 2009 Marvell September 30, 2009, 2.00 88EM8010/88EM8011 Power Factor Correction Controller Datasheet PRODUCT OVERVIEW The Marvell® 88EM8010/88EM8011 device is a high performance Power Factor Correction (PFC) Controller for boost applications. The device is used for universal PFC front-end boost converters in system or standalone products. Both devices work at fixed frequencies. 88EM8010 at 60kHz while 88EM8011 at 120kHz. Marvell advanced mixed signal technology ensures low Total Harmonic Distortion (THD). The IC operates under average Continuous Conduction Mode (CCM). The 88EM8010/88EM8011 PFC controller improves the steady state and transient performance through Marvell's innovative Digital Signal Processing (DSP) solution. The proprietary adaptive over-current protection has the ability to ensure almost constant power constraint and provides safety provisions including open loop and over voltage protection protocols. The internal voltage loop compensation and current loop control guarantees system stability and thus reduces the external component count and costs. The 8-pin SOIC package further facilitates the application design process, saving board space. The resultant simple system design and minimum cost makes 88EM8010/88EM8011 the ideal choice for PFC controllers. General Features Patented DSP control with adaptive loop coefficient Continuous Conduction Mode (CCM) operation Average current mode control Adaptive control loop achieves high power factor for a wide range of voltage and load conditions Adaptive over current protection for universal voltage Fixed frequency of operation High power factor and low harmonic distortion for a wide range of load conditions Up to 2A driver capability Minimal external components required Under voltage lockout (UVLO) Over voltage protection (OVP) Thermal shutdown Input line frequency range from 45Hz to 65Hz Applications Universal front-end PFC boost controller AC/DC adaptors and battery chargers Electronic Ballasts front-end with PFC Figure 1: PFC Boost Circuit Diagram L Bridge Retifier C IN PFC DR2 iL Rgate Q1 C O2 VO ut Load AC IN R cs Ra Rb SW R sen ISNS SGND R S1 Rc VDD CVDD VIN VDD 88EM8010/ 8011 PGND FB R S2 Copyright © 2009 Marvell September 30, 2009, 2.00 Document Classification: Proprietary Doc. No. MV-S104861-01 Rev. – Page 3 88EM8010/88EM8011 Datasheet THIS PAGE INTENTIONALLY LEFT BLANK Doc. No. MV-S104861-01 Rev. – Page 4 Document Classification: Proprietary Copyright © 2009 Marvell September 30, 2009, 2.00 Table of Contents Table of Contents Table of Contents ....................................................................................................................................... 5 List of Figures............................................................................................................................................. 7 List of Tables .............................................................................................................................................. 9 1 1.1 1.2 Signal Description ....................................................................................................................... 11 Pin Configurations ...........................................................................................................................................11 Pin Descriptions ..............................................................................................................................................11 2 2.1 2.2 2.3 Electrical Specifications ............................................................................................................. 13 Absolute Maximum Ratings ...........................................................................................................................13 Recommended Operating Conditions .............................................................................................................14 Electrical Characteristics ................................................................................................................................15 3 3.1 3.2 Functional Description................................................................................................................ 19 Overview .........................................................................................................................................................19 Signal Process and Functions.........................................................................................................................20 4 4.1 4.2 4.3 4.4 Functional Characteristics ......................................................................................................... 21 VDD Characteristics ........................................................................................................................................21 VFB Characteristics for Over Voltage Protection .............................................................................................23 Switching Frequency Characteristics ..............................................................................................................25 Over Current Threshold Characteristics..........................................................................................................26 5 5.1 5.2 5.3 Design and Applications Information ........................................................................................ 27 Input Voltage Resistor Divider on VIN Pin.......................................................................................................27 Voltage Loop & Output Voltage Feedback on FB Pin .....................................................................................30 Current Sensing and Over Current Protection ................................................................................................31 5.3.1 Current Sensing through ISNS Pin ...................................................................................................31 5.3.2 Over Current Limitation.....................................................................................................................33 SW Pin to MOSFET Gate ...............................................................................................................................33 VDD, Signal Ground (SGND) and Power Ground (PGND) .............................................................................34 Boost PFC Schematics ...................................................................................................................................35 5.4 5.5 5.6 6 6.1 Mechanical Drawings .................................................................................................................. 37 Mechanical Drawings ......................................................................................................................................37 7 7.1 7.2 Part Order Numbering/Package Marking .................................................................................. 39 Part Order Numbering ..................................................................................................................................39 Package Markings...........................................................................................................................................40 Copyright © 2009 Marvell September 30, 2009, 2.00 Document Classification: Proprietary Doc. No. MV-S104861-01 Rev. – Page 5 88EM8010/88EM8011 Datasheet G Revision History .......................................................................................................................... 41 Doc. No. MV-S104861-01 Rev. – Page 6 Document Classification: Proprietary Copyright © 2009 Marvell September 30, 2009, 2.00 List of Figures List of Figures Figure 1: PFC Boost Circuit Diagram ................................................................................................................3 1 Signal Description ........................................................................................................................... 11 Figure 2: SOIC-8 Pin Diagram (Top View).......................................................................................................11 2 3 Electrical Specifications ................................................................................................................. 13 Functional Description.................................................................................................................... 19 Figure 3: Top Level Block Diagram..................................................................................................................19 4 Functional Characteristics.............................................................................................................. 21 Figure 4: Figure 5a: Figure 5b: Figure 6a: Figure 6b: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: IDD Quiescent (IDD_QST) vs. VDD ...................................................................................................21 IDD vs. VDD (VDD_ON) ........................................................................................................................21 IDD vs. VDD (VDD_ON), VFB Enable...................................................................................................21 IDD Sleep (IDD_OP) vs. Temperature...............................................................................................22 IDD Operation (IDD_OP) vs. Temperature ........................................................................................22 VDD On/Off vs. Temperature ...........................................................................................................22 IDD vs. VFB (OVP) .............................................................................................................................23 VFB_OVP vs. Temperature ..............................................................................................................23 VFB_OVP Hysteresis vs. Temperature ............................................................................................23 VFB_OVP_LATCH vs. Temperature ................................................................................................23 Normal Regulation Reference (VFB_REG) vs. Temperature ...........................................................24 IDD vs. VFB (Enable) .......................................................................................................................24 VFB_EN (Enable) vs. Temperature ..................................................................................................24 VFB_EN Hysteresis vs. Temperature ...............................................................................................24 Switching Frequency vs. Temperature .............................................................................................25 Over Current (VIOVER) vs. Input Voltage VIN Peak Value).............................................................26 Over Current (VIOVER) vs. Temperature .........................................................................................26 5 Design and Applications Information ............................................................................................ 27 Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26: Figure 27: Internal Block for Zero-cross Detection, Brown-out Protection .........................................................28 Peak Detecting Signal for Predictive Sinusoidal AC Voltage............................................................29 Input Voltage Resistor Divider Layout Guidelines ............................................................................30 Output Voltage Resistor Divider .......................................................................................................31 Current Sensing Circuit.....................................................................................................................31 SW Pin Layout Guidelines ................................................................................................................33 VDD Decoupling Capacitor and Ground Layout Guidelines .............................................................34 64W/450V Front-End Boost PFC Schematic ....................................................................................35 300W/380V Front-End Boost PFC Schematic ..................................................................................36 6 Mechanical Drawings ...................................................................................................................... 37 Figure 28: 8-Pin SOIC Mechanical Drawing ......................................................................................................37 Copyright © 2009 Marvell September 30, 2009, 2.00 Document Classification: Proprietary Doc. No. MV-S104861-01 Rev. – Page 7 88EM8010/88EM8011 Datasheet 7 Part Order Numbering/Package Marking....................................................................................... 39 Figure 29: Figure 30: 88EM8010/88EM8011 Sample Ordering Part Number ....................................................................39 Package Marking and Pin 1 Location ...............................................................................................40 G Revision History ............................................................................................................................... 41 Doc. No. MV-S104861-01 Rev. – Page 8 Document Classification: Proprietary Copyright © 2009 Marvell September 30, 2009, 2.00 List of Tables List of Tables 1 Signal Description ............................................................................................................................ 11 Table 1: Table 2: Pin Descriptions ................................................................................................................................11 Pin Descriptions ................................................................................................................................12 2 Electrical Specifications .................................................................................................................. 13 Table 3: Table 4: Table 5: Absolute Maximum Ratings ..............................................................................................................13 Recommended Operating Conditions...............................................................................................14 Electrical Characteristics ..................................................................................................................15 3 4 5 Functional Description..................................................................................................................... 19 Functional Characteristics............................................................................................................... 21 Design and Applications Information ............................................................................................. 27 Table 6: Table 7: Current Sensing Resistor Selection ..................................................................................................32 Current Sensing Resistor Selection Reference ................................................................................32 6 7 G Mechanical Drawings ....................................................................................................................... 37 Part Order Numbering/Package Marking........................................................................................ 39 Table 8: 88EM8010/88EM8011 Part Order Options .......................................................................................39 Revision History ............................................................................................................................... 41 Table 9: Revision History ................................................................................................................................41 Copyright © 2009 Marvell September 30, 2009, 2.00 Document Classification: Proprietary Doc. No. MV-S104861-01 Rev. – Page 9 88EM8010/88EM8011 Datasheet THIS PAGE INTENTIONALLY LEFT BLANK Doc. No. MV-S104861-01 Rev. – Page 10 Document Classification: Proprietary Copyright © 2009 Marvell September 30, 2009, 2.00 Signal Description Pin Configurations 1 1.1 Signal Description Pin Configurations Figure 2: SOIC-8 Pin Diagram (Top View) PGND 1 8 SW SGND 2 7 VDD ISNS 3 6 NC VIN 4 5 FB/EN 1.2 Pin Descriptions Table 1: Pi n # 1 2 3 4 5 6 7 8 Pin Descriptions P in N a m e PGND SGND ISNS VIN FB/EN NC VDD SW P in Ty p e Ground Ground Input Input Input NC Supply Output Pin Description Power Ground Signal Ground Current Sense Voltage Input Feedback/Enable/Shutdown No Connect IC Supply Voltage Switch Copyright © 2009 Marvell September 30, 2009, 2.00 Document Classification: Proprietary Doc. No. MV-S104861-01 Rev. – Page 11 88EM8010/88EM8011 Datasheet Table 2: Pi n # 1 Pin Descriptions P in N a m e PGND D e sc r ip ti o n Power Ground Connected to the source of the primary MOSFET. The PCB trace from the power ground to the source of the MOSFET must be kept as short as possible. To avoid any switching noise interruption on signal processing, PGND and SGND remain separate inside the IC. Signal Ground Must be connected to the power ground with Kelvin sensing connection, so that SGND has dedicated trace and connections and provides noiseless environment for the signal processing. Current Sense Sense resistor varies for different loads. Pin used for current shaping and for over current protection. Please refer to Section 5, Design and Applications Information, on page 27. Voltage Input • Connects to resistive divider at input AC line “phase” to GND. Voltage applied is a half rectified sine wave scaled down by the input resistive divider. • Voltage input pin is a high impedance input pin. An impedance of 2M (typical) is recommended to be designed from the input AC “phase” to GND in order to reduce the standby power. Higher impedance is preferred with the right PCB design on this pin signal. • Voltage is compared with a threshold reference (VVIN_BR) to detect the zero-cross location of the input sine wave and synthesize (regenerate) the input sine wave. This sine wave is used to generate the current reference. • Brown-out protection1 function is also provided by this pin. A resistor devider with a 100:1 ratio from the highside resistor to the lowside resistor is corresponding to the “brown-out protection” input voltage as 50V (RMS). Increasing that raio will increase the “brown-out voltage”. Please refer to footnote1 for further explaination. Feedback The output voltage is scaled to 2.5V with 100% rated value. Transition from soft start to normal regulation at 87.5% rated VFB. Over voltage shutdown SW gate signal at 107% rated VFB and recover once below VFB_OVP. There is another threshold (VFB_OVP_LATCH) as 3.77V on the FB pin. When FB Voltage reaches VFB_OVP_LATCH, SW signal is shutdown and latched until another VDD power on reset. EN: Enable/Shutdown • At VFB>VFB_EN (Table 5) IC is enabled. • Pulling this pin to VFB < VFB_SHDN (Table 5) disables the chip back to sleep mode Note: A 200k resistor inside IL between FB pin to SGND. This should be included in the calculation for the design of the output voltage feedback resistor devider. No Connect Float this pin. IC Supply Voltage Nominal voltage is 12V (typical) and the Under Voltage Lockout (UVLO) for VDD