MAS9011A1BD08

DA9011.001 28 Jan 2004 MAS9011 This is preliminary information on a new product under development. Micro Analog Systems Oy reserves the right to make any changes without notice. Solar Cell System Manager • Power On Indicator • Low Battery Indicator • Battery Overcharging Protection DESCRIPTION The solar cell system manager is an analog circuit, which monitors the supply voltage of a batterypowered system containing solar cells. The solar manager uses three output signals to indicate the state of the system. Power On (PO) indicates whether the supply voltage is high enough to run the system. Low Battery (LB) is used to signal the situation where the battery is low. The third signal, SOL, is used for battery charging control. It indicates when the battery is full and the charging process should be stopped. FEATURES • • • Power On Indicator Low Battery Indicator Battery Overcharging Protection APPLICATIONS • Solar Cell Powered Watch BLOCK DIAGRAM VDD PO LB MAS9011 SOL GND 1 (9) DA9011.001 28 Jan 2004 PAD LAYOUT 670 µm GND VDD SOL MAS 9011 PO LB DIE size = 0.67 mm x 1.43 mm PAD size = 80 x 80 µm Note: Make sure that VDD is the first pad to be bonded. Pick-and-place and all component assembly are recommended to be performed in ESD protected area. Note: If the die is to be placed on metal plane, the metal plane should be connected to VDD or left floating. This because the substrate of the die is internally connected to VDD. Note: Coordinates are pad center points where origin has been located in bottom-left corner of the silicon die. Pad Identification Power Supply Ground Power Supply Voltage Full Battery Output Power On Output Low Battery Output Name GND VDD SOL PO LB X-coordinate 174 µm 334 µm 495 µm 211 µm 462 µm Y-coordinate 1208 µm 1210 µm 1221 µm 221 µm 221 µm 1434 µm 2 (9) DA9011.001 28 Jan 2004 FUNCTIONAL DESCRIPTION The solar manager generates three signals: PO (Power On), LB (Low Battery) and SOL (Full Battery). These signals are produced by three comparators which have hysteresis build in. Each comparator compares supply voltage (VDD) to internal switching levels (see Electrical Characteristics on next page). The current consumption of the comparators is very low. The electrical parameters are described more detailed in the Electrical Characteristics chapter. PO signal can be used to stop the whole system whenever the power supply level has dropped low enough. When power supply voltage is too low, the PO goes high to give signal to watch microcontroller to go power down. LB signal indicates that the battery is low but not empty. LB goes high when power supply level is too low. SOL is used for battery charging control of the solar watch. When power supply voltage goes high enough, the internal PMOS switch between VDD and SOL pins is switched on to shunt the solar cell charging current and to prevent battery overcharging. In operation without an external Schottky diode between the pins SOL and GND, the voltage at pin SOL is clamped to about 700 mV below GND by a diode-connected PNP transistor. MAS9011 does not have any control pin. After the power supply is connected the device is ready to be used. 3 (9) DA9011.001 28 Jan 2004 ABSOLUTE MAXIMUM RATINGS All voltages with respect to ground. Parameter Supply Voltage Voltage range for all pins Operating temperature Storage Temperature Symbol VDD TA TS Conditions Min -0.3 -0.3 -40 -50 Max 6.0 VDD+0.3 +85 +125 Unit V V o C o C ELECTRICAL CHARACTERISTICS TA = -40°C to +85°C, typical values at TA = +27°C, unless otherwise specified. Parameter Supply voltage Current consumption PO switching level PO hysteresis PO output voltage LB switching level LB hysteresis LB output voltage SOL switching level SOL hysteresis SOL output current SOL leakage current LB on level – PO off level Symbol VDD IQ VPO VPO(H) VPO(OUT) VLB VLB(H) VLB(OUT) VSOL VSOL(H) ISOL Conditions Min 1.00 Typ 100 Max 3.00 300 Unit V nA V mV Switching On Switching Off VDD = 1.05 V, IPO = -1.0 mA Switching On Switching Off VDD = 1.15 V, ILB = 50 µA VDD = 1.30 V, ILB = -50 µA Switching On Switching Off VDD = 1.4 V, VSOL = 0 V VDD = 1.7 V -50 0.95 1.15 1.10 50 0.06 1.19 1.22 30 0.20 1.55 1.48 70 TBD +50 90 V V mV V V mV nA nA mV 4 (9) DA9011.001 28 Jan 2004 TYPICAL APPLICATION 4.7 µF Solar cells VDD PO LB Watch MCU Display / Stepper Motors 1.5 V + – MAS9011 SOL GND Figure 1. Typical application circuit of MAS9011 5 (9) DA9011.001 28 Jan 2004 MAS9011 SAMPLES IN SBDIL 20 PACKAGE VDD 1 GND 2 NC 3 NC 4 NC 5 NC 6 NC 7 NC 8 NC 9 NC 10 9011Av YYWW XXXXX.X 20 SOL 19 NC 18 NC 17 NC 16 NC 15 NC 14 NC 13 NC 12 LB 11 PO Top Marking Definitions: YYWW = Year Week XXXXX.X = Lot Number v = Sample Version Number SBDIL 20 PIN DESCRIPTION Pin Name VDD GND NC PO LB NC SOL Pin 1 2 3, 4, 5, 6, 7, 8, 9, 10 11 12 13, 14, 15, 16, 17, 18, 19 20 Type P G Positive Power Supply Power Supply Ground Function DO DO Power On Output Low Battery Output AO Full Battery Output NC = Not Connected, P = Power, G = Ground, DO = Digital Output, AO = Analog Output MAS9011 IN TSOT-5 PACKAGE Top View GND 5 11A1 1 2 3 LB 3 4 PO 4 XXXX 2 1 Bottom View PO GND 5 Bottom Marking Definitions: ZXXXX.Y = Lot Number (Example: Lot 12345.1 marking 2345) SOL VDD LB VDD SOL TSOT-5 PIN DESCRIPTION Pin Name SOL VDD LB PO GND Pin 1 2 3 4 5 Type AO P DO DO G Full Battery Output Positive Power Supply Low Battery Output Power On Output Power Supply Ground Function NC = Not Connected, P = Power, G = Ground, DO = Digital Output, AO = Analog Output 6 (9) DA9011.001 28 Jan 2004 PACKAGE (TSOT-5) OUTLINE GAUGE PLANE b C L e L2 L C L E C L E1 e1 D C L c 1) PACKAGE OUTLINE DIMENSIONS INCLUSIVE OF METAL BURR & SOLDER PLATING A A2 2) PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH 3) ALL SPECIFICATIONS COMPLY TO JEDEC MO193 4) Q REFERS TO ALL PACKAGE DRAFT ANGLES A1 Symbol A A1 A2 b c D E E1 e e1 L L2 Q Min -0.01 0.84 0.30 0.12 Nom -0.05 0.87 -0.127 2.90BSC 2.80BSC 1.60BSC 0.95BSC 1.90BSC 0.40 0.25BSC 10° Max 1.00 0.10 0.90 0.45 0.20 Unit mm mm mm mm mm mm mm mm mm mm mm mm 0.30 4° 0.50 12° 7 (9) DA9011.001 28 Jan 2004 SOLDERING INFORMATION ◆ For Lead-Free TSOT-5 Resistance to Soldering Heat Maximum Temperature Maximum Number of Reflow Cycles Reflow profile Seating Plane Co-planarity Lead Finish According to RSH test IEC 68-2-58/20 260°C 3 Thermal profile parameters stated in JESD22-A113 should not be exceeded. http://www.jedec.org max 0.08 mm Solder plate 7.62 - 25.4 µm, material Matte Tin TAPE & REEL SPECIFICATIONS (TSOT-5) W3 W2 Feeding Direction A D C N 8 mm W1 B 4 mm Other Dimensions according to EIA-481 Standard 3000 Components on Each Reel Dimension A B C D N W1 (measured at hub) W2 (measured at hub) W3 (includes flange distortion at outer edge) Trailer Leader Min 1.5 12.80 20.2 50 8.4 7.9 160 390, of which minimum 160 mm of empty carrier tape sealed with cover tape Max 178 13.50 9.9 14.4 10.9 Unit mm mm mm mm mm mm mm mm mm mm 8 (9) DA9011.001 28 Jan 2004 ORDERING INFORMATION Product Code MAS9011A1TC05 MAS9011A1GB0 6 MAS9011A1BD08 Product Solar Cell System Manager Solar Cell System Manager Solar Cell System Manager Package Bare die, thickness 400 µm TSOT-5 lead-free SBDIL 20 Comments Die Tray Tape and Reel Samples In Tube LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O. Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com 9 (9)