MAS9079A3TC00

DA9079.003 19 May, 2005 MAS9079 AM Receiver IC • Tri Band Receiver IC • High Sensitivity • Very Low Power Consumption • Wide Supply Voltage Range • Power Down Control • Control for AGC On • High Selectivity by Crystal Filter • Fast Startup Feature DESCRIPTION The MAS9079 AM-Receiver chip is a highly sensitive, simple to use AM receiver specially intended to receive time signals in the frequency range from 40 kHz to 100 kHz. Only a few external components are required for time signal receiving. The circuit has preamplifier, wide range automatic gain control, demodulator and output comparator built in. The output signal can be processed directly by an additional digital circuitry to extract the data from the received signal. The control for AGC (automatic gain control) can be used to switch AGC on or off if necessary. MAS9079 supports tri band operation by switching between three crystal filters and two additional antenna tuning capacitors. MAS9079 has asymmetric input and different internal compensation capacitor options for compensating shunt capacitances of different crystals (See ordering information on page 9). FEATURES • • • • • • • • • • Tri Band Receiver IC Highly Sensitive AM Receiver, 0.4 µVRMS typ. Wide Supply Voltage Range from 1.1 V to 5 V Very Low Power Consumption Power Down Control Fast Startup Only a Few External Components Necessary Control for AGC On Wide Frequency Range from 40 kHz to 100 kHz High Selectivity by Quartz Crystal Filter APPLICATIONS • Multi Band Time Signal Receiver WWVB (USA), JJY (Japan), DCF77 (Germany), MSF (UK), HGB (Switzerland) and BPC (China) BLOCK DIAGRAM QO3 RFI1 RFI2 RFI3 AGC Amplifier Demodulator & Comparator OUT QO2 QO1 QI AON Power Supply/Biasing VDD VSS PDN1 PDN2 AGC DEC 1 (9) DA9079.003 19 May, 2005 PAD LAYOUT MAS9079Ax, x=1..4 VDD QO2 QO1 QO3 QI AGC PDN2 OUT RFI1 RFI3 PDN1 AON DEC VSS RFI2 1620 µm DIE size = 1.62 x 1.89 mm; round PAD ∅ 80 µm Note: Because the substrate of the die is internally connected to VDD, the die has to be connected to VDD or left floating. Please make sure that VDD is the first pad to be bonded. Pick-and-place and all component assembly are recommended to be performed in ESD protected area. Note: Coordinates are pad center points where origin has been located in bottom-left corner of the silicon die. Pad Identification Power Supply Voltage Quartz Filter Output for Crystal 2 Quartz Filter Output for Crystal 1 Quartz Filter Output for Crystal 3 Quartz Filter Input for Crystals AGC Capacitor Power Down/Frequency Selection Input 2 Receiver Output Demodulator Capacitor AGC On Control Power Down/Frequency Selection Input 1 Receiver Input 3 (for Antenna Capacitor 3) Receiver Input Receiver Input 2 (for Antenna Capacitor 2) Power Supply Ground Name VDD QO2 QO1 QO3 QI AGC PDN2 OUT DEC AON PDN1 RFI3 RFI1 RFI2 VSS X-coordinate 174 µm 174 µm 174 µm 174 µm 174 µm 174 µm 174 µm 175 µm 1442 µm 1442 µm 1442 µm 1442 µm 1442 µm 1442 µm 1442 µm Y-coordinate 1657 µm 1452 µm 1248 µm 1043 µm 839 µm 634 µm 429 µm 225 µm 240 µm 444 µm 649 µm 853 µm 1058 µm 1467 µm 1671 µm Note 1892 µm 3 1 2 3 Notes: 1) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated) - the output is a current source/sink with |IOUT| > 5 µA - at power down the output is pulled to VSS (pull down switch) 2) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working) - Internal pull-up with current < 1 µA which is switched off at power down 3) PDN1 = VDD and PDN2 = VDD means receiver off - Fast start-up is triggered when the receiver is after power down controlled to power up 2 (9) DA9079.003 19 May, 2005 FREQUENCY SELECTION The frequency selection and power down control is accomplished via two digital control pins PDN1 and PDN2. The control logic is presented in table 1. Table 1 Frequency selection and power down control PDN2 RFI2 Switch RFI3 Switch PDN1 High High Low Low High Low High Low Open Open Closed Closed Open Open Open Closed Selected Crystal Output QO1 QO2 QO3 Description Power down Frequency 1 Frequency 2, RFI2 capacitor connected in parallel with antenna Frequency 3, RFI2 and RFI3 capacitors connected in parallel with antenna The internal antenna tuning capacitor switches (RFI2, RFI3) and crystal filter output switches (QO1, QO2, QO3) are controlled according table 1. See switches in block diagram on page 1. If frequency 1 is selected the RFI2 and RFI3 switches are open and only crystal output QO1 is active. Antenna frequency is determined by antenna inductor LANT (see Typical Application on page 5), antenna capacitor CANT1 and parasitic capacitances related to antenna inputs RFI1, RFI2 and RFI3 (see Antenna Tuning Considerations below). Frequency 1 is the highest frequency of the three selected frequencies. If frequency 2 is selected then RFI2 switch is closed to connect CANT2 in parallel with ferrite antenna and tune it to frequency 2. Then only crystal output QO2 is active. Frequency 2 is the medium frequency of the three selected frequencies. If frequency 3 is selected both RFI2 and RFI3 switches are closed to connect both CANT2 and CANT3 capacitors in parallel with ferrite antenna and tune it to frequency 3. Then only crystal QO3 is active. Frequency 3 is the lowest frequency of the three selected frequencies. It is recommended to switch the device to power down for 50ms before switching to another frequency. This guarantees fast startup in switching to another frequency. The 50ms power down period is used to discharge AGC capacitor and to initialize fast startup conditions. 3 (9) DA9079.003 19 May, 2005 ANTENNA TUNING CONSIDERATIONS The ferrite bar antenna having inductance LANT and parasitic coil capacitance CCOIL is tuned to three reception frequencies f1, f2 and f3 by parallel capacitors CANT1, CANT2 and CANT3. The receiver input stage and internal antenna capacitor switches have capacitances CRFI1, COFF2, COFF3 which affect the resonance frequencies. COFF2 and COFF3 are switch capacitances when switches are open. When switches are closed these capacitances are shorted by on resistance of the switches and they are effectively eliminated. Following relationships can be written into three tuning frequencies. Frequency f1 (highest frequency): CTOT1=CCOIL+CANT1+CRFI1+COFF2+COFF3=CCOIL+CANT1+6.5pF+24pF+75pF3=CCOIL+CANT1+105.5pF, 1 f1 = 2π L ANT ⋅ CTOT 1 Frequency f2 (middle frequency): CTOT2=CCOIL+CANT1+CANT2+CRFI1+COFF3=CCOIL+CANT1+CANT2+ 6.5pF+75pF3=CCOIL+CANT1+CANT2+ 81.5pF, 1 f2 = 2π L ANT ⋅ CTOT 2 Frequency f3 (lowest frequency): CTOT3=CCOIL+CANT1+ CANT2+ CANT3+CRFI1=CCOIL+CANT1+ CANT2+ CANT3+6.5pF, 1 f3 = 2π L ANT ⋅ CTOT 3 4 (9) DA9079.003 19 May, 2005 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature Symbol VDD-VSS VIN PMAX TOP TST Conditions Min -0.3 VSS-0.3 -40 -55 Max 6 VDD+0.3 100 +85 +150 Unit V V mW o C o C ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 1.4V, Temperature = 25°C Parameter Operating Voltage Current Consumption Symbol VDD IDD Conditions VDD=1.4 V, Vin=0.4 µVrms VDD=1.4 V, Vin=20 mVrms VDD=3.6 V, Vin=0.4 µVrms VDD=3.6 V, Vin=20 mVrms Min 1.10 Typ 64 37 67 40 Max 5 Unit V µA 31 27 40 Stand-By Current Input Frequency Range Minimum Input Voltage Maximum Input Voltage RFI1 Pin Input Resistance RFI1 Pin Input Capacitance RFI2 Switch On Resistance RFI2 Switch Off Capacitance RFI3 Switch On Resistance RFI3 Switch Off Capacitance Input Levels |lIN| 5 µA - at power down the output is pulled to VSS (pull down switch) 3) PDN1 = VDD and PDN2 = VDD means receiver off - Fast start-up is triggered when the receiver is after power down controlled to power up 4) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working) - Internal pull-up with current < 1 µA which is switched off at power down 8 (9) DA9079.003 19 May, 2005 ORDERING INFORMATION Product Code MAS9079A1TC00 MAS9079A2TC00 MAS9079A3TC00 MAS9079A4TC00 Product Tri Band AM-Receiver IC with Asymmetric Input Tri Band AM-Receiver IC with Asymmetric Input Tri Band AM-Receiver IC with Asymmetric Input Tri Band AM-Receiver IC with Asymmetric Input Description EWS-tested wafer, Thickness 400 µm. EWS-tested wafer, Thickness 400 µm. EWS-tested wafer, Thickness 400 µm. EWS-tested wafer, Thickness 400 µm. Capacitance Option CC = 0.75 pF CC = 0.875 pF CC = 1.25 pF CC = 1.5 pF Contact Micro Analog Systems Oy for other wafer thickness options. LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O. Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. 9 (9)