MAS9178A1TB00.01

DA9178.001 10 Dec, 2003 MAS9178 AM Receiver IC • • • • • • • DESCRIPTION The MAS9178 AM-Receiver chip is a highly sensitive, simple to use AM receiver specially intended to receive time signals in the frequency range from 40 kHz to 100 kHz. Only a few external components are required for time signal receiver. The circuit has preamplifier, wide range automatic gain control, demodulator and output comparator built in. The output signal can be processed directly by an additional digital circuitry to extract the data from the received signal. The control for AGC (automatic gain control) can be used to switch AGC on or off if necessary. Unlike MAS1016A and MAS1016B, MAS9178 does not require AGC control procedure in WWVB and JJY systems. MAS9178A1 has differential input and internal 0.875 pF compensation capacitor for crystal shunt capacitance compensation. MAS9178A5 requires external compensation capacitor for crystal shunt capacitance compensation. It can be used with crystals that do not match with fixed 0.875 pF compensation capacitance of MAS9178A1. High Sensitivity Very Low Power Consumption Wide Supply Voltage Range Power Down Control Control for AGC On High Selectivity by Crystal Filter Fast Startup Feature FEATURES • • • • • • • • • Highly Sensitive AM Receiver, 0.4 µVRMS typ. Wide Supply Voltage Range from 1.1 V to 3.6 V Very Low Power Consumption Power Down Control Fast Startup Only a Few External Components Necessary Control for AGC On Wide Frequency Range from 40 kHz to 100 kHz High Selectivity by Quartz Crystal Filter APPLICATIONS • • Time Signal Receiver WWVB (USA), JJY (Japan), DCF77 (Germany) and MSF (UK) Receiver for ASK Modulated Data Signals BLOCK DIAGRAM QOP RFP AGC Amplifier RFM Demodulator & Comparator OUT QI QOM AON Power Supply/Biasing VDD VSS PDN AGC DEC 1 (8) DA9178.001 10 Dec, 2003 PAD LAYOUT 1906 µm VSS RFM RFP PDN AON DEC 9178 A1 1778 µm VDD QOP QI QOM AGC OUT DIE size = 1.91 x 1.78 mm; PAD size = 100 x 100 µm except for VSS PAD size 104 x 112 µm Note: Because the substrate of the die is internally connected to VDD, the die has to be connected to VDD or left floating. Please make sure that VDD is the first pad to be bonded. Pick-and-place and all component assembly are recommended to be performed in ESD protected area. Note: Coordinates are pad center points where origin has been located in the center of VDD pad Pad Identification Power Supply Voltage Quartz Filter Output for Crystal Quartz Filter Input for Crystal and External Compensation Capacitor Quartz Filter Output for External Compensation Capacitor AGC Capacitor Receiver Output Demodulator Capacitor AGC On Control Power Down Input Positive Receiver Input Negative Receiver Input Power Supply Ground Name VDD QOP QI QOM AGC OUT DEC AON PDN RFP RFM VSS X-coordinate 0 µm 306 µm 549 µm 866 µm 1146 µm 1389 µm 1389 µm 1146 µm 829 µm 586 µm 269 µm 16 µm Y-coordinate 0 µm 19 µm 19 µm 19 µm 19 µm 19 µm 1428 µm 1428 µm 1428 µm 1428 µm 1428 µm 1407 µm 1 2 3 Note Notes: 1) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated) - the output is a current source/sink with |IOUT| > 5 µA - at power down the output is pulled to VSS (pull down switch) 2) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working) - Internal pull-up with current < 1 µA which is switched off at power down 3) PDN = VSS means receiver on; PDN = VDD means receiver off - Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up (PDN=VSS) i.e. at the falling edge of PDN signal. 2 (8) DA9178.001 10 Dec, 2003 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature Symbol VDD-VSS VIN PMAX TOP TST Conditions Min -0.3 VSS-0.3 -20 -40 Max 5.0 VDD+0.3 100 70 120 Unit V V mW o C o C ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 1.4V, Temperature = 25°C Parameter Operating Voltage Current Consumption Stand-By Current Input Frequency Range Minimum Input Voltage Maximum Input Voltage Input Levels |lIN| 5 µA - at power down the output is pulled to VSS (pull down switch) 3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working) - Internal pull-up with current < 1 µA which is switched off at power down 4) PDN = VSS means receiver on; PDN = VDD means receiver off - Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up (PDN=VSS) i.e. at the falling edge of PDN signal. 7 (8) DA9178.001 10 Dec, 2003 SAMPLE INFORMATION Product Code MAS9178A1TB00.01 MAS9178A5TB00.01 MAS9178A1TC00.01 MAS9178A5TC00.01 Product AM-Receiver IC with Differential Input AM-Receiver IC with Differential Input AM-Receiver IC with Differential Input AM-Receiver IC with Differential Input Description EWS-tested wafer, Thickness 480 µm. EWS-tested wafer, Thickness 480 µm. EWS-tested wafer, Thickness 400 µm. EWS-tested wafer, Thickness 400 µm. Capacitance Option CC = 0.875 pF External Compensation Capacitor CC = 0.875 pF External Compensation Capacitor LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O. Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. 8 (8)