MAS9181B

DA9181.006 13 October, 1999 MAS9181B/C OCTAL 8-BIT TRIMMER IC · Eight discrete DACs 2 · I C-bus slave receiver · Voltage output DESCRIPTION The MAS9181 comprises eight digital to analog converters (DACs) each controlled by a two-wire I2C bus. The DACs are individually programmed using an 8bit word to select an output from one of 256 voltage steps. The maximum output voltage of all DACs is set by Vmax and the resolution is Vmax/256. At power-on all outputs are set to their lowest value. The I2C-bus slave receiver has 3 programmable address pins (2 for MAS9181 CS). FEATURES · Rail to rail output stages · Octal 8-bit DACs on a single monolithic chip · Power supply range from +5 V to +12 V · -20°C to +85°C temperature range · 16-pin PDIL and SO package · Power-up reset APPLICATION · Trimmer replacement · AGC/AFT or TVs and VCRs · Graphic equalizers · High resolution monitors BLOCK DIAGRAM SDA SCL A0 A1 A2 I C Bus Slave Receiver 2 8-BIT DAC DAC7 8-BIT DAC DAC6 DAC5 8-BIT DAC 8-BIT DAC 8-BIT DAC 8-BIT DAC DAC4 DAC3 DAC2 DAC1 Vmax Reference Voltage Generator 8-BIT DAC 8-BIT DAC DAC0 VDD GND 1 DA9181.006 13 October, 1999 PIN CONFIGURATION PDIP 16 VDD 1 Vmax 2 SDA 3 SCL 4 A0 5 A1 6 A2 7 GND 8 MAS9181BN 16 DAC7 15 DAC6 14 DAC5 13 DAC4 12 DAC3 11 DAC2 10 DAC1 9 DAC0 SO16 MAS9181CS VDD Vmax SDA SCL NC A0 A1 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 DAC7 DAC6 DAC5 DAC4 DAC3 DAC2 DAC1 DAC0 PIN DESCRIPTION Pin name *1 VDD Vmax SDA SCL A0 A1 A2 GND DAC0 DAC1 DAC2 DAC3 DAC4 DAC5 DAC6 DAC7 *1 MAS9181BN (PDIP16) *2 MAS9181CS (SO16) Pin no. *2 1 2 3 4 6 7 NC 8 9 10 11 12 13 14 15 16 I/O Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P I I/O I I I I G O O O O O O O O Positive supply voltage Control input for DAC maximum output voltage I2C bus serial data input/output I2C bus serial data clock Programmable address bits for I2C bus slave receiver Programmable address bits for I2C bus slave receiver Programmable address bits for I2C bus slave receiver Ground Analog voltage output Analog voltage output Analog voltage output Analog voltage output Analog voltage output Analog voltage output Analog voltage output Analog voltage output 2 DA9181.006 13 October, 1999 ABSOLUTE MAXIMUM RATINGS (conditions) Parameter Supply Voltage Supply current I2C-bus line voltage Input voltage Output voltage Maximum current on any pin total power dissipation Operating ambient temperature range Storage temperature range Symbol VDD IDD V(3),V(4) Vin Vo Imax Ptot Tamb Tstg Conditions Min -0.5 -10 -0.5 -0.5 -0.5 Max 18 40 5.9 VDD+0.5 VDD+0.5 10 500 Unit V mA V V V mA mW o -20 -65 +85 +150 C C o RECOMMEDED OPERATION CONDITIONS (All voltages are with respect to GND; Tamb = +25 C; VDD = 12V unless otherwise specified) o Parameter Supply Voltage Supply current Total power dissipation Symbol VDD IDD Ptot Conditions Min 4.5 Typ 12 3.0 40 Max 13.2 5.0 60 Unit V mA mW No loads, Vmax=VDD=12V, All data=00OCT No loads, Vmax=VDD=12V, All data=00OCT ELECTRICAL CHARACTERISTICS Inputs SDA, SCL input (pins 3, 4) (All voltages are with respect to GND; Tamb = -20 C to 85 C; VDD = 5V to 12V unless otherwise specified) o o Parameter Input voltage range Input low voltage Input high voltage Input leakage current Power-up reset Symbol VI VIL VIH IIL Conditions Min -0.5 Typ Max 5.5 1.0 Unit V V V 3.0 Vin = 0V or VDD -1 3.5 +1 µA V 3 DA9181.006 13 October, 1999 ELECTRICAL CHARACTERISTICS Address Input (pins 5, 6, 7) (All voltages are with respect to GND; Tamb = -20 C to 85 C; VDD = 5V to 12V unless otherwise specified) o o Parameter Input voltage range Input low voltage Input high voltage Input current low Input current high Symbol VI VIL VIH IIL IIH Conditions Min 0 Typ Max VDD 1.0 Unit V V V 3.0 -10 -15 1 µA µA Vmax Control Input for DAC maximum output voltage (pin 2) (All voltages are with respect to GND; Tamb = -20 C to 85 C; VDD = 5V to 12V unless otherwise specified) o o Parameter Pin 2 current Outputs Symbol I2 Conditions Min Typ 7 Max 10 Unit µA (All voltages are with respect to GND; Tamb = -20 C to 85 C; VDD = 5V to 12V unless otherwise specified) o o Parameter DAC output (pin 9 to 16) Output voltage range Output impedance DAC output drive range Output capacitive load SDA Output (pin 3) Symbol Vo Conditions Io = +/- 100 µA Io = +/- 500 µA Min 0.1 0.2 Typ Max VDD-0.1 VDD-0.2 Unit V V Ω Zo Io Co data = 7F Upper side saturation voltage= 0.2v Low side saturation voltage = 0.2v -1 30 1 2 mA nF (All voltages are with respect to GND; Tamb = -20 C to 85 C; VDD = 5V to 12V unless otherwise specified) o o Parameter Output voltage low Linearity Parameter Differential nonlinearity Integral nonlinearity Zero code error1 Power supply rejection1 Symbol VOL Conditions I3 = 3.0 mA o o Min Typ Max 0.4 Unit V (All voltages are with respect to GND; Tamb = -20 C to 85 C; VDD = 5V to 12V unless otherwise specified) Symbol DNL INL ZCE PSRR TCo Conditions Io = 0 (without load) Vmax = VDD-1.0 Io = 0 (without load) Vmax = VDD-1.0 data = 00 Min -1 -1.5 Typ Max 1 1.5 Unit LSB LSB mV mV/V µV/oC 10 30 5 Zero code temperature coefficient1 -200 200 Note 1: Guaranteed by design but not production tested 4 DA9181.006 13 October, 1999 FUNCTIONS I2C - bus The MAS9181 I2C-bus interface is a receiver- only slave. Data is accepted from the I2C - bus in the following format. S 0 1 0 0 A2 A1 A0 0 Address byte A I3 I2 I1 I0 SD SC SB SA Instruction byte A D7 D6 D5 D4 D3 D2 D1 D0 First data byte A P S P A Start condition Stop condition Acknowledgement A2, A1, A0 I3, I2, I1, I0 SD, SC, SB, SA D7, D6, D5, D4, D3, D2, D2, D1, D0 programmable address bits instruction bits sub-address bits data bits I2C - bus timing Bit Transfer on the I C-bus 2 SDA SCL Data line stable (data valid) Change of data allowed Complete Data Transfer SDA SCL S Start condition 1-7 8 9 1-7 8 9 1-7 8 9 P Address R/W Ack Data Ack Data Ack Stop condition 5 DA9181.006 13 October, 1999 FUNCTIONS Address Byte Valid addresses are 40, 42, 44, 46, 48, 4A, 4C, 4E(hex), depending on the programming of bits A2, A1 and A0. With these addresses, up to eight MAS9181 ICs can be operated independently from one I2C-bus. No other addresses are acknowledged by the MAS9181. The Instruction and data bytes Valid instructions from 00 to 0F and F0 to FF (hex); MAS9181 will not respond to other instruction value, but will still generate an acknowledgement. Instructions 00 to0F cause auto-incrementing of the sub-address (bits SD to SA) when more than one data byte is sent within one transmission. With auto-incrementing, the first data byte is written into the DAC addessed by bits SD to SA and then the sub-address is automatically incremented by one position for the next databyte in the series. AutoI2C - bus Input SCL (pin 4) and input/output SDA (pin 3) conform to I2C-bus specifications. Pins 3 and 4 are protected against voltage pulses by internal zener diodes Input Vmax Input Vmax (pin 2) provides a means of comprising the output voltage swing of the DACs. The maximum DAC output voltage is restricted to approximately Vmax while the 8-bit resolution is maintained, therefore giving a finer voltage resolution of smaller output swings. connected to the ground plane and therefore the normal bus line voltage shall not exceed 5.5V. incrementing does not occur with instructions F0 to FF. The DAC addressed by the sub-address will always receive the data if more than one data byte is sent. Valid sub-addresses (bits SD to SA) are 0 to 7 (hex) relating numerically to DAC0 to DAC7. When the autoincrementing function is used, the sub-address will sequence through all possible values (0 to F, 0 to F, etc.). While the sub-address is between 8 and F no DAC outputs change. address inputs A0, A1 and A2 are programmed by connection to GND for An = 0 or to VDD for An = 1. If the inputs are left floating, An = 1 will result. For MAS9181CS, A2 is always 1. 6 DA9181.006 13 October, 1999 APPLICATION INFORMATION +12v VDD 100nF +5v GND DAC7 DAC6 DAC5 DAC4 DAC3 DAC2 16 15 14 13 12 11 10 9 7 A2 A1 A0 SCL SDA DAC1 DAC0 M icro Controller 5k 5k 6 C lock 5 4 3 +12v 100nF Data MAS9181 7 DA9181.006 13 October, 1999 PACKAGE OUTLINES 16 LEAD PDIP OUTLINE (300 MIL BODY) 6.10 7.11 1.52 18.93 21.33 2.93 4.95 5.33 MAX 0-0.13 RAD. 7.39 7.59 0.10 0.30 7.62 BSC 0.254 5.5 5-7° SEATING PLANE 0.36 0.56 1.15 1.77 2.54 BSC 0.63 TYPICAL 1 PIN 16 LEAD SO OUTLINE (300 MIL BODY) 0.33 x 45° 5° TYP. 5°TYP 0.25 RAD. MIN. 0.94 1.12 1.27 5° TYP. TYP. 0.36 0.48 2.36 2.64 10.11 10.49 10.01 10.64 PIN 1 SEATING PLANE 5° TYP. 5° TYP. . 0 .8 6 T Y P ALL MEASUREMENTS IN mm 8 DA9181.006 13 October, 1999 ORDERING INFORMATION Product Code MAS9181BN MAS9181CS Product OCTAL 8-BIT TRIMMER-IC OCTAL 8-BIT TRIMMER-IC Package 16 Pin PDIP 0.3" 16 Pin SO 0.3" 2 Address Pins Comments LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O. Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. 9