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78M6613_12

78M6613_12

  • 厂商:

    MAXIM(美信)

  • 封装:

  • 描述:

    78M6613_12 - Single-Phase AC Power Measurement IC - Maxim Integrated Products

  • 数据手册
  • 价格&库存
78M6613_12 数据手册
19-5348; Rev 2; 1/12 78M6613 Single-Phase AC Power Measurement IC DATA SHEET DS_6613_018 DESCRIPTION The Teridian™ 78M6613 is a highly integrated IC for simplified implementation of single-phase AC power measurement into power supplies, smart appliances, and other applications with embedded AC load monitoring and control. It is packaged in a small, 5mm x 5mm, 32-pin QFN package for optimal space savings. At the measurement interface, the device provides four analog inputs for interfacing to voltage and current sensors. Voltages from the sensors are fed to our Single Converter Technology® that uses a 22-bit delta-sigma ADC, independent 32-bit compute engine (CE), digital temperature compensation, and precision voltage references to provide better than 0.5% power measurement accuracy over a wide 2000:1 dynamic range. The integrated MPU core and 32 KB of flash memory provides a flexible means of configuration, post-processing, data formatting, and interfacing to any host processor through the UART interface and/or DIO pins. Complete application firmware is available and can be preloaded into the IC during manufacturing test. Alternatively, a complete array of ICE, development tools, and programming libraries are available to allow customization for each application. LIVE NEUT Earth Ground Isolated Supply FEATURES • < 0.5% Wh Accuracy Over Wide 2000:1 Current Range and Over Temperature • Voltage Reference < 40ppm/°C • Four Sensor Inputs—V3P3A Referenced • 22-Bit Delta-Sigma ADC with Independent 32-Bit Compute Engine (CE) • 8-Bit MPU (80515), One Clock Cycle per Instruction with 2KB MPU XRAM • 32KB Flash with Security • Integrated In-Circuit Emulator (ICE) Interface for MPU Debug • 32kHz Time Base with Hardware Watchdog Timer • UART Interface and Up to 10 GeneralPurpose 5V Tolerant I/O Pins • Packaged in a RoHS-Compliant (6/6) Lead(Pb)-Free, 32-Pin QFN (5mm x 5mm) • Complete Application Firmware Provides: o True RMS Calculations for Current, Voltage, Line Frequency, Real Power, Reactive Power, Apparent Power, and Power Factor o Accumulated Watt-Hours, Kilowatt-Hours o Intelligent Switch Control at Zero Crossings o Digital Temperature Compensation o Phase Compensation (±15°) o Quick Calibration Routines o 46–64Hz Line Frequency Range with Same Calibration CONVERTER A0 A1 A2 A3 V3P3 GND TERIDIAN 78M6613 2KB RAM 32KB FLASH 32-bit COMPUTE ENGINE 80515 MPU TIMERS REGULATOR DIO, PULSE DIO 4-8 DIO 14-17, 19 VOLTAGE REF VREF TEMP SENSOR OSC/PLL XIN XOUT SERIAL PORT TX RX ICE ICE_E V3P3 GND 32 kHz Teridian is a trademark and Single Converter Technology is a registered trademark of Maxim Integrated Products, Inc. Rev 2 1 78M6613 Data Sheet DS_6613_018 Table of Contents 1 Hardware Description.................................................................................................................... 5 1.1 Hardware Overview ................................................................................................................ 5 1.2 Analog Front End (AFE) .......................................................................................................... 6 1.2.1 Input Multiplexer.......................................................................................................... 6 1.2.2 A/D Converter (ADC) .................................................................................................. 6 1.2.3 FIR Filter ..................................................................................................................... 6 1.2.4 Voltage References ..................................................................................................... 6 1.2.5 Temperature Sensor ................................................................................................... 7 1.2.6 Functional Description ................................................................................................. 7 1.3 Digital Computation Engine (CE) ............................................................................................ 8 1.4 80515 MPU Core .................................................................................................................... 8 1.4.1 UART .......................................................................................................................... 8 1.4.2 Timers and Counters ................................................................................................... 9 1.5 On-Chip Resources................................................................................................................. 9 1.5.1 Oscillator ..................................................................................................................... 9 1.5.2 PLL and Internal Clocks .............................................................................................. 9 1.5.3 Temperature Sensor ................................................................................................... 9 1.5.4 Flash Memory ............................................................................................................. 9 1.5.5 Digital I/O .................................................................................................................. 10 1.5.6 Hardware Watchdog Timer........................................................................................ 10 1.5.7 Program Security ...................................................................................................... 10 1.5.8 Test Ports.................................................................................................................. 10 Functional Description ................................................................................................................ 11 2.1 Theory of Operation .............................................................................................................. 11 2.2 Reset Behavior ..................................................................................................................... 12 2.3 Data Flow ............................................................................................................................. 12 2.4 CE/MPU Communication ...................................................................................................... 13 Application Information .............................................................................................................. 14 3.1 Connection of Sensors (CT, Resistive Shunt)........................................................................ 14 3.2 Temperature Measurement ................................................................................................... 15 3.3 Temperature Compensation.................................................................................................. 15 3.4 Connecting 5V Devices......................................................................................................... 16 3.5 UART (TX/RX) ...................................................................................................................... 16 3.6 Reset Function and Reset Pin Connections........................................................................... 16 3.7 Connecting the Emulator Port Pins ....................................................................................... 18 3.8 Crystal Oscillator................................................................................................................... 19 3.9 Flash Programming .............................................................................................................. 19 3.10 MPU Firmware Library .......................................................................................................... 19 3.11 Measurement Calibration ...................................................................................................... 19 Electrical Specifications ............................................................................................................. 20 4.1 Absolute Maximum Ratings .................................................................................................. 20 4.2 Recommended External Components ................................................................................... 21 4.3 Recommended Operating Conditions.................................................................................... 21 4.4 Performance Specifications .................................................................................................. 21 4.4.1 Input Logic Levels ..................................................................................................... 21 4.4.2 Output Logic Levels .................................................................................................. 21 4.4.3 Supply Current .......................................................................................................... 22 4.4.4 Crystal Oscillator ....................................................................................................... 22 4.4.5 VREF ........................................................................................................................ 22 4.4.6 ADC Converter, V3P3 Referenced ............................................................................ 23 4.4.7 Temperature Sensor ................................................................................................. 23 2 3 4 2 Rev 2 DS_6613_018 78M6613 Data Sheet 4.5 Timing Specifications............................................................................................................ 24 4.5.1 RAM and Flash Memory ............................................................................................ 24 4.5.2 RESET ...................................................................................................................... 24 4.5.3 Typical Performance Data ......................................................................................... 25 5 Packaging .................................................................................................................................... 26 5.1 Pinout ................................................................................................................................... 26 5.2 Package Outline (QFN 32) .................................................................................................... 27 5.3 Recommended PCB Land Pattern for the QFN-32 Package ................................................. 28 Pin Descriptions .......................................................................................................................... 29 6.1 Power/Ground Pins ............................................................................................................... 29 6.2 Analog Pins .......................................................................................................................... 29 6.3 Digital Pins ........................................................................................................................... 30 I/O Equivalent Circuits ................................................................................................................ 31 Ordering Information................................................................................................................... 32 Contact Information .................................................................................................................... 32 6 7 8 9 Revision History .................................................................................................................................. 33 Figures Figure 1: IC Functional Block Diagram .................................................................................................... 4 Figure 2: AFE Block Diagram .................................................................................................................. 7 Figure 3: Connecting an External Load to DIO Pins ............................................................................... 10 Figure 4: Voltage. Current, Momentary and Accumulated Energy .......................................................... 11 Figure 5: MPU/CE Data Flow ................................................................................................................ 12 Figure 6: MPU/CE Communication ........................................................................................................ 13 Figure 7: Resistive Voltage Divider........................................................................................................ 14 Figure 8: Resistive Current Shunt .......................................................................................................... 14 Figure 9: Current Transformer ............................................................................................................... 14 Figure 10: Connections for the RX Pin ................................................................................................... 16 Figure 11: 78M6613 External Reset Behavior........................................................................................ 17 Figure 12: MAX810S Connections to the 78M6613 ................................................................................ 17 Figure 13: Reset Generator Based On TL431 Shunt Regulator .............................................................. 18 Figure 14: External Components for the Emulator Interface .................................................................. 18 Figure 15: Wh Accuracy, 10 mA to 20 A at 120 V/60 Hz and Room Temperature Using a 4 mΩ Current Shunt ....................................................................................................................... 25 Figure 16: Typical Measurement Accuracy over Temperature Relative to 25°C..................................... 25 Figure 17: 32-Pin QFN Pinout ............................................................................................................... 26 Figure 18: Package Outline (QFN 32).................................................................................................... 27 Figure 19: Recommended PCB Land Pattern Dimensions ..................................................................... 28 Figure 20: I/O Equivalent Circuits .......................................................................................................... 31 Table Table 1: Inputs Selected in Regular and Alternate Multiplexer Cycles...................................................... 6 Rev 2 3 78M6613 Data Sheet VREF ∆Σ ADC CONVERTER VBIAS MUX VBIAS V3P3 + TEMP VREF FIR DS_6613_018 V3P3A GNDA V3P3D GNDD A0 A1 A2 A3 MUX CROSS MUX CTRL CK32 VREF XIN XOUT CKTEST OSC (32KHz) RTCLK (32KHz) MCK PLL CK32 32KHz DIV ADC VOLT REG CKADC 4.9152MHz 4.9152MHz CK_2X CK_GEN CKFIR 4.9152MHz MUX_SYNC CKCE 1 µs 78M6613 Data Sheet Max Typ Min 3.3V Supply Voltage (V3P3D/V3P3A) 0.0V Time V3P3 RESET Figure 11: 78M6613 External Reset Behavior The RESET signal can be generated in a number of different ways. For example, a voltage supervisory device such as Maxim’s MAX810S can be used to implement the reset/supply voltage supervisory function as shown in Figure 12. V3P3 MAX810S Vcc RST GND RESET 78M6613 GND Figure 12: MAX810S Connections to the 78M6613 Rev 2 17 78M6613 Data Sheet DS_6613_018 An alternate solution using discrete components can be used. Figure 13 shows an implementation using a shunt regulator and two transistors. Figure 13: Reset Generator Based On TL431 Shunt Regulator As long as V3P3 is below the 2.79V threshold set by the voltage divider of R1 and R2, U1 will not conduct current, the base of Q2 will be at the same potential as its emitter, so Q1 will be turned off. With no current flowing in the collector of Q2, the base of Q1 will be low, Q1 will be turned off, and RESET will track V3P3. When the V3P3 rises above 2.79V, the TL431 starts to conduct, the base of Q2 is be pulled low, turning on Q2. This drives the base of Q1 high, turning Q1 on and pulling RESET low. The inherent turn-on and turn-off delays of the TL4313 provide the ~1µs delay required to ensure proper resetting of the 78M6613. 3.7 Connecting the Emulator Port Pins It is important to bring out the ICE_E pin to the programming interface in order to create a way for reprogramming parts that have the Flash SECURE bit (SFR 0xB2[6]) set. Providing access to ICE_E ensures that the part can be reset between erase and program cycles, which will enable programming devices to reprogram the part. The reset required is implemented with a watchdog timer reset (i.e. the hardware WDT must be enabled). V3P3 62 Ω 62 Ω 78M6613 ICE_E E_RST E_RXTX E_TCLK 62 Ω 1000pF 300 Ω Figure 14: External Components for the Emulator Interface 18 Rev 2 DS_6613_018 78M6613 Data Sheet 3.8 Crystal Oscillator The oscillator of the 78M6613 drives a standard 32.768 kHz watch crystal. The oscillator has been designed specifically to handle these crystals and is compatible with their high impedance and limited power handling capability. Good layouts will have XIN and XOUT shielded from each other. Since the oscillator is self-biasing, an external resistor must not be connected across the crystal. 3.9 Flash Programming Operational or test code can be programmed into the Flash memory using either an in-circuit emulator or the Flash Programmer Module (TFP-2) available from Maxim. The Flash programming procedure uses the E_RST, E_RXTX, and E_TCLK pins. 3.10 MPU Firmware Library Any application-specific MPU functions mentioned above are available from Maxim as a standard ANSI C library and as ANSI “C” source code. The code is pre-programmed in Demonstration and Evaluation Kits for the 78M6613 IC and can be pre-programmed into engineering IC samples for system evaluation. The application code allows for quick and efficient evaluation of the IC without having to write firmware or having to purchase an in-circuit emulator (ICE). A Software Licensing Agreement (SLA) can be signed to receive either the source Flash HEX file for use in a production environment or (partial) source code and SDK documentation for modification. 3.11 Measurement Calibration Once the 78M6613 Power and Energy Measurement device has been installed in a measurement system, it is typically calibrated for tolerances of the current sensors, voltage dividers and signal conditioning components. The device can be calibrated using a single gain and a single phase adjustment factors accessible to the CE. The gain adjustment is used to compensate for tolerances of components used for signal conditioning, especially the resistive components. Phase adjustment is provided to compensate for phase shifts introduced by certain types of current sensors. Due to the flexibility of the MPU firmware, any calibration method, such as calibration based on energy, or current and voltage can be implemented. It is also possible to implement segment-wise calibration (depending on current range). Maxim software supports a “quick cal” method. Rev 2 19 78M6613 Data Sheet DS_6613_018 4 4.1 Electrical Specifications Absolute Maximum Ratings -0.5 V to 4.6 V -0.5 V to +0.5 V -10 mA to +10 mA, -0.5 V to V3P3+0.5 V -10 mA to +10 mA -0.5 V to V3P3+0.5 V -10 mA to +10 mA -0.5 V to 3.0 V -10 mA to +10 mA, -0.5 to 6 V -15 mA to +15 mA, -0.5 V to V3P3D+0.5 V -0.5 V to V3P3D+0.5 V +140 °C +125 °C -45 °C to +165 °C +250 °C ±4 kV Supplies and Ground Pins: V3P3 GNDD, GNDA Analog Output Pins: VREF Analog Input Pins: A0, A1, A2, A3 XIN, XOUT All Other Pins: Configured as Digital Inputs Configured as Digital Outputs All other pins Operating junction temperature (peak, 100 ms) Operating junction temperature (continuous) Storage temperature Soldering temperature (10 second duration) ESD stress on all pins Stresses beyond Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND. 20 Rev 2 DS_6613_018 78M6613 Data Sheet 4.2 C1 Recommended External Components From V3P3A V3P3D XIN XIN XOUT To GNDA GNDD XOUT GND GND Function Bypass capacitor for 3.3V supply. Bypass capacitor for V3P3D. 32.768 kHz crystal – electrically similar to ECS .327-12.5-17X or Vishay XT26T, load capacitance 12.5 pF. Load capacitor for crystal (exact value depends on crystal specifications and parasitic capacitance of board). Value ≥0.1±10% ≥0.1±10% 32.768 27±10% 27±10% Unit µF µF kHz pF pF Name CSYS XTAL CXS † CXL † † Depending on trace capacitance, higher or lower values for CXS and CXL must be used. Capacitance from XIN to GND and XOUT to GND (combining pin, trace and crystal capacitance) should be 35 pF to 37 pF. 4.3 Recommended Operating Conditions Condition Normal Operation Min 3.0 -40 Typ 3.3 Max 3.6 +85 Unit V ºC Parameter 3.3V Supply Voltage (V3P3) Operating Temperature 4.4 4.4.1 Performance Specifications Input Logic Levels Condition Min 2 0.8 VIN=0V, ICE_E=1 10 10 -1 10 -1 100 100 1 100 1 T yp Max Unit V V µA µA µA µA µA Parameter Digital high-level input voltage, VIH Digital low-level input voltage, VIL Input pull-up current, IIL E_RXTX, E_RST, CKTEST Other digital inputs Input pull down current, IIH ICE_E Other digital inputs 0 VIN=V3P3 0 4.4.2 Output Logic Levels Condition ILOAD = 1 mA ILOAD = 15 mA ILOAD = 1 mA ILOAD = 15 mA Min V3P3 –0.4 V3P31 0.6 0 0.4 0.8 1 Parameter Digital high-level output voltage VOH T yp Max Unit V V V V Digital low-level output voltage VOL 1 Guaranteed by design; not production tested. Rev 2 21 78M6613 Data Sheet DS_6613_018 4.4.3 Supply Current Condition Normal Operation, V3P3=3.3V, ICE Disabled Same conditions as above Normal Operation as above, except write Flash at maximum rate, ADC & CE Disabled Min T yp 8.1 Max 10.3 Unit mA mA/ MHz 10 mA Parameter V3P3A + V3P3D current V3P3A + V3P3D current vs. MPU clock frequency V3P3A + V3PD current, Write Flash 0.5 9.1 4.4.4 Crystal Oscillator Condition Crystal connected 3 5 5 Min Typ Max 1 Unit µW pF pF pF Parameter Maximum Output Power to Crystal XIN to XOUT Capacitance Capacitance to GND XIN XOUT 4.4.5 VREF Condition Ta = 22ºC VREF_CAL =1, ILOAD = 10 µA, -10 µA Min 1.193 Typ 1.195 Max 1.197 50 2.5 Unit V mV kΩ V µV/ºC 2 µV/°C ppm/ year +40 1 Unless otherwise specified, VREF_DIS=0 Parameter VREF output voltage, VNOM(25) VREF chop step VREF output impedance VNOM definition * VNOM (T ) = VREF (22) + (T − 22)TC1 + (T − 22) 2 TC 2 124.4 - 2.435*TRIMT -0.265 + 0.00106*TRIMT ±25 Ta = -40ºC to +85ºC -401 VREF temperature coefficients TC1 TC2 VREF aging VREF(T) deviation from VNOM(T) VREF (T ) − VNOM (T ) 10 6 VNOM 62 * ppm/º C This relationship describes the nominal behavior of VREF at different temperatures. 22 Rev 2 DS_6613_018 78M6613 Data Sheet 4.4.6 ADC Converter, V3P3 Referenced Condition Min -250 Vin = 200 mV peak, 65 Hz, on A0 -101 101 μV/V Typ Max 250 Unit mV peak VREF_DIS=0, LSB values do not include the 9-bit left shift at CE input. Parameter Recommended Input Range (Vin-V3P3A) Voltage to Current Crosstalk: 10 6 *Vcrosstalk cos(∠Vin − ∠Vcrosstalk ) Vcrosstalk = largest Vin measurement on A1 or A3 THD (First 10 harmonics) 250 mV-pk 20 mV-pk Input Impedance Temperature coefficient of Input Impedance LSB size Digital Full Scale ADC Gain Error vs %Power Supply Variation 10 6 ∆Nout PK 357 nV / VIN 100 ∆V 3P3 A / 3.3 Input Offset (Vin-V3P3A) Vin=65 Hz, 64 kpts FFT, BlackmanHarris window Vin=65 Hz Vin=65 Hz FIR_LEN=0 FIR_LEN=1 FIR_LEN=0 FIR_LEN=1 Vin=200 mV pk, 65 Hz V3P3=3.0V, 3.6V -75 -90 40 1.7 357 151 +884736 +2097152 50 -10 10 90 dB dB kΩ Ω/°C nV/LSB LSB ppm/% mV 4.4.7 Temperature Sensor Condition FIR_LEN=0 FIR_LEN=1 FIR_LEN=0 FIR_LEN=1 TA = -40ºC to +85ºC Tn = 25°C -10 1 Parameter Nominal Sensitivity (Sn) Nominal (Nn) † Min Typ -669 -1585 +429301 +1017558 Max Unit LSB/ºC LSB Temperature Error  ( N (T ) − N n )  ERR = T −  + Tn    Sn   † 1 +101 ºC Nn is measured at Tn during calibration and is stored in MPU or CE for use in temperature calculations. Guaranteed by design; not production tested. Rev 2 23 78M6613 Data Sheet DS_6613_018 4.5 4.5.1 Timing Specifications RAM and Flash Memory Condition CKMPU = 4.9152 MHz CKMPU = 1.25 MHz CKMPU = 614 kHz -40 °C to +85 °C 25 °C 85 °C Min 5 2 1 20,000 100 10 2 Typ Max Unit Cycles Cycles Cycles Cycles Years Years Cycles Parameter CE DRAM wait states Flash write cycles Flash data retention Flash data retention Flash byte writes between page or mass erase operations 4.5.2 RESET Condition Min 5 T yp Max 1 Unit µs µs Parameter Reset pulse fall time Reset pulse width 24 Rev 2 DS_6613_018 78M6613 Data Sheet 4.5.3 Typical Performance Data Wh Accuracy (%) 0.5 0.4 0.3 0.2 0.1 Accuracy (%) 0 -0.1 -0.2 -0.3 -0.4 -0.5 0.01 0.1 1 10 Wh Accuracy (%) Current (A) Figure 15: Wh Accuracy, 10 mA to 20 A at 120 V/60 Hz and Room Temperature Using a 4 mΩ Current Shunt Relative Accuracy over Temperature 40 Accuracy [PPM/°C] 30 20 10 0 -10 -20 -30 -60 -40 -20 0 20 40 60 80 100 Temperature [°C] Figure 16: Typical Measurement Accuracy over Temperature Relative to 25°C Rev 2 25 78M6613 Data Sheet DS_6613_018 5 5.1 Packaging Pinout V3P3A GNDA RESET DIO8 DIO7 DIO6 CKTEST 32 31 30 29 28 27 26 25 A1 1 A3 2 A2 3 A0 4 VREF 5 XIN 6 TEST 7 XOUT 8 9 10 11 12 13 14 15 16 N/C E_TCLK TMUXOUT E_RXTX E_RST TX V3P3D DIO5 RX 24 ICE_E 23 GNDD 22 DIO4 21 DIO19 20 DIO16 19 DIO15 18 DIO14 17 DIO17 Figure 17: 32-Pin QFN Pinout 26 Rev 2 DS_6613_018 78M6613 Data Sheet 5.2 Package Outline (QFN 32) 5 2.5 0.85 NOM./ 0.9MAX. 0.00 / 0.005 0.20 REF. 1 2 3 2.5 5 SEATING PLANE TOP VIEW 0.35 / 0.45 SIDE VIEW 3.0 / 3.2 0.18 / 0.3 1.5 / 1.6 CHAMFERED 0.30 1 2 3 3.0 / 3.2 1.5 / 1.6 0.2 MIN. 0.35 / 0.45 0.5 0.5 NOTE: Controlling BOTTOM VIEW dimensions are in mm. Figure 18: Package Outline (QFN 32) Rev 2 27 78M6613 Data Sheet DS_6613_018 5.3 Recommended PCB Land Pattern for the QFN-32 Package x y e d AG x y e d A G Symbol e x y d A G Description Lead pitch Min T yp 0.50 mm 0.28 mm 0.69 mm Max 0.28 mm See Note 1 3.93 mm 3.00 mm 3.78 mm Note 1: Do not place unmasked vias in region denoted by dimension “d”. Note 2: Soldering of bottom internal pad not required for proper operation of either commercial or industrial temperature rated versions. Figure 19: Recommended PCB Land Pattern Dimensions 28 Rev 2 DS_6613_018 78M6613 Data Sheet 6 6.1 Pin Descriptions Power/Ground Pins Type P P Circuit – – Description These pins should be connected directly to the ground plane. A 3.3V power supply should be connected to these pins. Name GNDA GNDD V3P3A V3P3D 6.2 Analog Pins Type I Circuit 5 Description Sense Inputs: These pins are voltage inputs to the internal A/D converter. Typically, they are connected to either the outputs of current sensors or the outputs of resistor dividers (voltage sensors). Unused pins must be connected to V3P3. O 8 Voltage Reference for the ADC. This pin is left unconnected. Never use as an external reference. Crystal Inputs. A 32 kHz crystal should be connected across these pins. Typically, a 27 pF capacitor is also connected from each pin to GND. It is important to minimize the capacitance between these pins. See the crystal manufacturer datasheet for details. Name A0, A1, A2, A3 VREF XIN XOUT I 7 Pin types: P = Power, O = Output, I = Input, I/O = Input/Output The circuit number denotes the equivalent circuit, as specified under “I/O Equivalent Circuits”. Rev 2 29 78M6613 Data Sheet DS_6613_018 6.3 Digital Pins Type Circuit Description Name DIO4 DIO5 DIO6 DIO7 DIO8 DIO14 DIO15 DIO16 DIO17 DIO19 E_RXTX, E_RST E_TCLK I/O 3, 4 DIO pins. If unused, these pins must be configured as DIOs and set to outputs by the firmware. I/O O 1, 4 4 Emulator port pins (when ICE_E pulled high) . ICE enable. When zero, E_RST, E_TCLK, and E_RXTX are disabled. For production units, this pin should be pulled to GND to disable the emulator port. This pin should be brought out to the programming interface in order to create a way for reprogramming parts that have the SECURE bit set. Clock PLL output. Digital output test multiplexer. This input pin resets the chip into a known state. For normal operation, this pin should be pulled low. To force the device into reset state, it should be pulled high. Refer to Section 3.6 for RESET pin connections, use, and relevant external circuitry. UART input. If unused, this pin must be terminated to V3P3 or GND. UART output. Enables Production Test. Must be grounded in normal operation. ICE_E I 2 CKTEST TMUXOUT RESET RX TX TEST O O I I O I 4 4 3 3 4 7 Pin types: P = Power, O = Output, I = Input, I/O = Input/Output The circuit number denotes the equivalent circuit, as specified on the following page. 30 Rev 2 DS_6613_018 78M6613 Data Sheet 7 I/O Equivalent Circuits V3P3 V3P3 110K CMOS Input GND Digital Input Pin GND CMOS Input 110K GND Digital Input Pin GND V3P3 V3P3 Digital Input Pin CMOS Input Digital Input Equivalent Circuit Type 1: Standard Digital Input or pin configured as DIO Input with Internal Pull-Up V3P3 V3P3 Digital Input Type 2: Pin configured as DIO Input with Internal Pull-Down Digital Input Type 3: Standard Digital Input or pin configured as DIO Input V3P3 V3P3 CMOS Output GND GND Digital Output Pin Analog Input Pin GND To MUX Comparator Input Pin GND To Comparator Digital Output Equivalent Circuit Type 4: Standard Digital Output or pin configured as DIO Output Analog Input Equivalent Circuit Type 5: ADC Input Comparator Input Equivalent Circuit Type 6: Comparator Input V3P3 Oscillator Pin GND To Oscillator from internal reference GND VREF Pin Oscillator Equivalent Circuit Type 7: Oscillator I/O VREF Equivalent Circuit Type 8: VREF Figure 20: I/O Equivalent Circuits Rev 2 31 78M6613 Data Sheet DS_6613_018 8 Ordering Information Part Package 32-pin QFN (Lead(Pb)-Free) Option Bulk 78M6613 Tape & Reel *Programmed, Bulk *Programmed, Tape & Reel *Contact the factory for more information on programmed part options. Ordering Number 78M6613-IM/F 78M6613-IMR/F 78M6613-IM/F/P 78M6613-IMR/F/P IC Marking 78M6613-IM 9 Contact Information For more information about Maxim products or to check the availability of the 78M6613, contact technical support at www.maxim-ic.com/support. 32 Rev 2 DS_6613_018 78M6613 Data Sheet Revision History REVISION NUMBER 1.0 1.1 2 REVISION DATE 11/10 3/11 1/12 First publication. In Section 6.3, corrected the description of the RESET pin. Added Maxim logo. DESCRIPTION PAGES CHANGED  30 1 Rev 2 33 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. M a x im I n t e g r a t e d P r o d uc t s , 1 2 0 S a n G a b r ie l D r iv e , S un n y v a le , C A 9 4 0 8 6 4 0 8 - 7 3 7 - 7 6 0 0  2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products.
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