19-2839; Rev 0; 4/03
Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
General Description
The MAX1153/MAX1154 are stand-alone, 10-channel (8 external, 2 internal) 10-bit system monitor ADCs with internal reference. A programmable single-ended/differential mux accepts voltage and remote-diode temperature-sensor inputs. These devices independently monitor the input channels without microprocessor interaction and generate an interrupt when any variable exceeds user-defined limits. The MAX1153/MAX1154 configure both high and low limits, as well as the number of fault cycles allowed, before generating an interrupt. These ADCs can also perform recursive data averaging for noise reduction. Programmable wait intervals between conversion sequences allow the selection of the sample rate. At the maximum sampling rate of 94ksps (auto mode, single channel enabled), the MAX1153 consumes only 5mW (1.7mA at 3V). AutoShutdownTM reduces supply current to 190µA at 2ksps and to less than 8µA at 50sps. Stand-alone operation, combined with ease of use in a small package (16-pin TSSOP), makes the MAX1153/ MAX1154 ideal for multichannel system-monitoring applications. Low power consumption also makes these devices a good fit for hand-held and battery-powered applications.
Features
o Monitor 10 Signals Without Processor Intervention o Eight External Channels Programmable as Temperature or Voltage Monitors o Intelligent Circuitry for Reliable Autonomous Measurement Programmable Digital Averaging Filter Programmable Fault Counter o Precision Measurements 10-Bit Resolution ±0.5 LSB INL, ±0.5 LSB DNL ±0.75°C Temperature Accuracy (typ) o Flexible Automatic Channel Scan Sequencer with Programmable Intervals Programmable Inputs: Single Ended/Differential, Voltage/Temperature Programmable Wait State o Internal 2.5V/4.096V Reference (MAX1153/MAX1154) o Remote Temperature Sensing Up to 10m (Differential Mode) o Single 3V or 5V Supply Operation o Small 16-Pin TSSOP Package
MAX1153/MAX1154
Applications
System Supervision Remote Telecom Networks Server Farms Remote Data Loggers
PART MAX1153AEUE* MAX1153BEUE MAX1154AEUE* MAX1154BEUE
Ordering Information
TEMP RANGE -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C PIN-PACKAGE 16 TSSOP 16 TSSOP 16 TSSOP 16 TSSOP
*Future product—contact factory for availability.
Selector Guide
PART MAX1153AEUE* MAX1153BEUE MAX1154AEUE* MAX1154BEUE INL (LSB) ±0.5 ±0.5 ±0.5 ±0.5 TEMP ERROR (°C) ±1.0 ±3.0 ±1.0 ±2.5 SUPPLY VOLTAGE (V) 2.7 to 3.6 2.7 to 3.6 4.5 to 5.5 4.5 to 5.5
AIN1 2 AIN2 3 AIN3 4 AIN4 5 AIN5 6 AIN6 7
Pin Configuration
TOP VIEW
AIN0 1 16 CS 15 SCLK 14 DIN
MAX1153 MAX1154
13 VDD 12 GND 11 DOUT 10 INT 9 REF
*Future product—contact factory for availability.
Typical Application Circuit appears at end of data sheet. AutoShutdown is a trademark of Maxim Integrated Products, Inc.
AIN7 8
TSSOP 1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
ABSOLUTE MAXIMUM RATINGS
VDD to GND .............................................................-0.3V to +6V Analog Inputs to GND (AIN0–AIN7, REF) ... -0.3V to (VDD + 0.3V) Digital Inputs to GND (DIN, SCLK, CS) .... -0.3V to (VDD + 0.3V) Digital Outputs to GND (DOUT, INT) ........ -0.3V to (VDD + 0.3V) Digital Outputs Sink Current ............................................. 25mA Maximum Current into Any Pin .......................................... 50mA Continuous Power Dissipation (TA = +70°C) 16-Pin TSSOP (derate 8.7mW/°C above +70°C) .........696mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX1153), VDD = +4.5V to +5.5V (MAX1154), VREF = +2.5V (MAX1153), VREF = +4.096V (MAX1154), fSCLK = 10MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER DC ACCURACY Resolution Integral Nonlinearity (Note 1) Differential Nonlinearity Offset Error Gain Error (Note 2) Offset Error Tempco Gain and Temperature Coefficient Channel-to-Channel Offset Matching VDD Monitor Accuracy Internal reference External reference Internal reference External reference Internal reference ±5 ±2 ±30 ±0.1 ±2.5 RES INL DNL Grade A Grade B No missing codes overtemperature 10 ±0.5 ±0.5 ±0.5 ±1.0 ±1.0 2.0 Bits LSB LSB LSB LSB %FSR ppm/°C ppm/°C LSB % SYMBOL CONDITIONS MIN TYP MAX UNITS
DYNAMIC ACCURACY (10kHz sine-wave input, 2.5VP-P (MAX1153), 4.096VP-P (MAX1154), 64ksps, fSCLK = 10MHz, bipolar input mode) Signal-to-Noise Plus Distortion Total Harmonic Distortion Spurious-Free Dynamic Range Full-Power Bandwidth Full Linear Bandwidth CONVERSION RATE Voltage measurement, all ref modes Conversion Time (Note 3) Single-Channel Throughput Power-Up Time ANALOG INPUT (AIN0–AIN7) Input Voltage Range (Note 5) Common-Mode Range Unipolar, single-ended, or differential inputs Bipolar, differential inputs Differentially configured inputs 0 -VREF / 2 0 VREF +VREF / 2 VDD V V tPU tCONV Temp-sensor ref modes 01, 10 Temp-sensor ref mode 00 Manual trigger, voltage measurement Internal reference (Note 4) 70 40 45 10.6 46 73 11.7 50.7 80 ksps µs µs SINAD THD SFDR -3dB point S / (N + D) > 68dB Up to the 5th harmonic 70 -76 72 1 100 dB dB dB MHz kHz
2
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1153), VDD = +4.5V to +5.5V (MAX1154), VREF = +2.5V (MAX1153), VREF = +4.096V (MAX1154), fSCLK = 10MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER Common-Mode Rejection Input Leakage Current Input Capacitance TEMPERATURE MEASUREMENTS Grade A MAX1153 MAX1154 Internal Sensor Measurement Error (Note 7) Grade B MAX1153 Grade B MAX1154 Differential External Sensor Measurement Error (Note 8) Single ended TA = -20°C to +85°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C TA = -40°C to +85°C TA = +25°C ±0.5 ±0.75 ±0.3 ±1.2 ±0.7 ±1.2 ±0.7 ±2 ±1 ±5 ±2 0.1 0.5 0.5 Low High PSR Differentially configured inputs and internal sensor Single-ended configured, external sensor INTERNAL REFERENCE REF Output Voltage REF Temperature Coefficient REF Output Resistance REF Output Noise REF Power-Supply Rejection EXTERNAL REFERENCE REF Input Voltage Range REF Input Current VREF IREF VREF = +2.5V; fSAMPLE = 94ksps VREF = +2.5V; fSAMPLE = 0 1.0 15 VDD + 0.05 40 ±1 V µA MAX1153 MAX1154 MAX1153 MAX1154 VREF TCREF MAX1153 MAX1154 Grade A Grade B 2.456 2.456 2.500 4.096 8 30 7 200 160 -70 -70 -50 -50 2.544 4.168 V ppm/°C kΩ µVRMS dB V µA 4 66 0.3 0.1 °C/LSB µA °C °C ±2.5 ±3.0 °C ±1.0 ±1.5 SYMBOL CONDITIONS Differentially configured inputs, VCM = 0 to VDD On-/off- leakage, VIN = 0 or VDD (Note 6) MIN TYP 90 ±0.1 18 ±1 MAX UNITS dB µA pF
MAX1153/MAX1154
Temperature Measurement Noise Temperature Resolution External Sensor Bias Current
Differentially configured inputs and internal sensor Single-ended configured, external sensor
Power-Supply Rejection
°C/V
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1153), VDD = +4.5V to +5.5V (MAX1154), VREF = +2.5V (MAX1153), VREF = +4.096V (MAX1154), fSCLK = 10MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER DIGITAL INPUTS (SCLK, DIN, CS) Input Voltage Low Input Voltage High Input Hysteresis Input Leakage Current Input Capacitance DIGITAL OUTPUTS (INT, DOUT) Output Voltage Low Output Voltage High Tri-State Leakage Current Tri-State Output Capacitance POWER REQUIREMENTS Positive Supply Voltage VDD MAX1153 MAX1154 MAX1153 internal reference (Note 9) MAX1153 internal reference (Note 10) MAX1153 internal reference (Note 10) Supply Current IDD MAX1154 internal reference (Note 9) MAX1154 internal reference (Note 10) MAX1154 internal reference (Note 10) Both internal reference, mode 01 (Note 11) Full Power-Down Supply Current Power-Supply Rejection Ratio ISHDN PSRR Full power-down state MAX1153 MAX1154 8 480 860 ±0.4 ±1.6 2.7 2.7 3.6 5.5 3.3 2.9 2.2 5.0 4.0 3.0 µA nA µA mA V VOL VOH IL COUT ISINK = 8mA, DOUT ISINK = 2mA, INT ISOURCE = 8mA, DOUT ISOURCE = 2mA, INT CS = VDD CS = VDD 5 VDD + 0.5 VDD + 0.5 ±10 0.5 0.5 V V µA pF VIL VIH VHYST IIN CIN VIN = 0 or VDD 2 VDD + 0.7 200 ±10 VDD + 0.3 V V mV µA pF SYMBOL CONDITIONS MIN TYP MAX UNITS
Analog inputs at full scale (Note 12)
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
TIMING CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX1153), VDD = +4.5V to +5.5V (MAX1154), TA = TMIN to TMAX, unless otherwise noted.) (Figures 1, 2, and 4)
PARAMETER SCLK Clock Period SCLK Pulse Width High Time SCLK Pulse Width Low Time DIN to SCLK Setup Time DIN to SCLK Hold Time CS Fall to SCLK Rise Setup SCLK Rise to CS Rise Hold SCLK Fall to DOUT Valid CS Rise to DOUT Disable CS Fall to DOUT Enable CS Pulse Width High SYMBOL tCP tCH tCL tDS tDH tCSS tCSH tDOV tDOD tDOE tCSW CL = 30pF CL = 30pF CL = 30pF 50 CONDITIONS MIN 100 45 45 25 0 25 50 50 40 40 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns ns
MAX1153/MAX1154
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain and offset errors have been calibrated. Note 2: Offset nulled. Note 3: In reference mode 00, the reference system powers up for each temperature measurement. In reference mode 01, the reference system powers up once per sequence of channels scanned. If a sample wait UPPER?
NO
YES
NO
RESET FAULT COUNTER
IS AVG DATA < LOWER?
NO
IS FAULT CNT > FAULT REG?
NO
YES
SET ALARM REGISTER
Figure 4. Alarm Flowchart 12 ______________________________________________________________________________________
Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
VDD VDD
T 8-TO-1 DIFFERENTIAL MUX
CHOLDP ADC CHOLDN 8-TO-1 DIFFERENTIAL MUX H
T
CHOLD ADC
H
T T H TEMP VAZ DIFFERENTIAL INPUT EQUIVALENT INPUT CIRCUIT T H TEMP VAZ SINGLE-ENDED INPUT EQUIVALENT INPUT CIRCUIT T H
Figure 5. Single-Ended/Differential Input Equivalent Input Circuit
In differential mode, the T/H samples the difference between two analog inputs, eliminating common-mode DC offsets and noise. See the I nput Configuration Register section and Tables 5 and 6 for more details on configuring the analog inputs. Unipolar/Bipolar When performing differential conversions, the input configuration register (Tables 5 and 6) also selects between unipolar and bipolar operation. Unipolar mode sets the differential input range from 0 to VREF. A negative differential analog input in unipolar mode causes the digital output code to be zero. Selecting bipolar mode sets the differential input range to ±VREF/2. The digital output code is straight binary in unipolar mode and two ’ s complement in bipolar mode (see the Transfer Function section). In single-ended mode, the MAX1153/MAX1154 always operate in unipolar mode. The analog inputs are internally referenced to GND with a full-scale input range from 0 to VREF.
Digital Interface
The MAX1153/MAX1154 digital interface consists of five signals: C S , SCLK, DIN, DOUT, and INT. C S , SCLK, DIN, and DOUT comprise an SPI™-compatible serial interface (see the Serial Digital Interface section). INT is an independent output that provides an indication that an alarm has occurred in the system (see the INT Interrupt Output section).
Serial Digital Interface
The MAX1153/MAX1154 feature a serial interface compatible with SPI, QSPI™, and MICROWIRE™ devices. For SPI/QSPI, ensure that the CPU serial interface runs in master mode so it generates the serial clock signal. Select a serial clock frequency of 10MHz or less, and set clock polarity (CPOL) and phase (CPHA) in the µP control registers to the same value, one or zero. The MAX1153/MAX1154 support operation with SCLK idling high or low, and thus operate with CPOL = CPHA = 0 or CPOL = CPHA = 1.
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ______________________________________________________________________________________ 13
Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
CS tCSW tCSS tCH tCSH
tCL
tCP
SCLK tDS tDH DIN tDOV tDOE DOUT tDOD
Figure 6. Detailed Serial Interface Timing Diagram
Clock pulses on SCLK shift data into DIN on the rising edge of the SCLK and out of DOUT on the falling edge of SCLK. Data transfers require a logic low on CS. A high-to-low transition of CS marks the beginning of a data transfer. A logic high on CS at any time resets the serial interface. See Figure 6 and the Timing Characteristics table for detailed serial-interface timing information.
Output Data Format
Output data from the MAX1153/MAX1154 is clocked onto DOUT on the falling edge of SCLK. Single-ended and unipolar differential measurements are output in straight binary MSB first, with two 8-bytes-per-conversion result, with 2 sub-bits and the last 4 bits padded with zeros. For temperature and bipolar differential voltage measurements, the output is two’s complement binary in the same 2-byte format. The MSB of the output data from a read command transitions at DOUT after the falling edge of the 8th SCLK clock pulse following the CS high-to-low transition. Table 2 shows the number of bytes to be read from DOUT for a given read command.
Input Data Format
Serial communications always begin with an 8-bit command word, serially loaded from DIN. A high-to-low transition on CS initiates the data input operation. The command word and the subsequent data bytes (for write operations) are clocked from DIN into the MAX1153/MAX1154 on the rising edges of SCLK. The first rising edge on SCLK, after CS goes low, clocks in the MSB of the command word (see the C ommand Word section). The next seven rising edges on SCLK complete the loading of the command word into the internal command register. After the 8-bit command word is entered, transfer 0 to 20 bytes of data, depending on the command. Table 2 shows the number of data bytes for each command.
Command Word
The command word (Table 1) controls all serial communications and configuration of the MAX1153/ MAX1154, providing access to the 44 on-chip registers. The first 4 MSBs of the command word specify the command (Table 2), while the last 4 bits provide address information. The first rising edge on SCLK, after CS goes low, transfers the command word MSB into DIN. The next seven rising edges on SCLK shift the remaining 7 bits into the internal command register (see the S erial Digital Interface section).
Table 1. Command Word
B7 (MSB) Command B3 B6 Command B2 B5 Command B1 B4 Command B0 B3 Address B3 B2 Address B2 B1 Address B1 B0 (LSB) Address B0
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
Table 2. Command Description
COMMAND WORD 0000#### 0001xxxx 0010#### 0011#### 0100#### 0101xxxx 0110xxxx 0111xxxx 1000#### 1001xxxx 1010#### 1011xxxx 1100#### 1101xxxx 1110xxxx 1111xxxx DATA BYTES AFTER COMMAND WORD COMMAND DESCRIPTION BYTES TO BYTES FROM DIN DOUT 0 0 0 0 0 0 N/A 0 0 0 2 20 5 5 N/A N/A 0 3 2 20 5 5 N/A 0 0 0 0 0 0 0 N/A N/A Manually Trigged Conversion Read Alarm Register Read Current Data Register for Selected Channel Read Current Data Register for All Channels Read Configuration Register for Selected Channel Read Global Configuration Registers Reserved Reset Clear Alarm/Fault for Selected Channels Clear Alarm/Fault for All Channels Write Current Data Register for Selected Channel Write Current Data Registers for All Channels Write Configuration Registers for Selected Channel Write Global Configuration Registers Reserved Reserved
MAX1153/MAX1154
#### = Channel address code, see Table 3. xxxx = These bits are ignored for this command.
Table 3. Channel Address
ADDRESS IN COMMAND 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 INPUT Internal temperature VDD AIN0 AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 Reserved Reserved Reserved Reserved Reserved Reserved
Manually Triggered Conversion (Command Code = 0000)
Before beginning a manual conversion, ensure the scan mode bit in the setup register is zero, because a logic 1 disables manual conversions. The address bits in a Manually Triggered Conversion command select the input channel for conversion (see Table 3). When performing a differential conversion, use the even channel address (AIN0, AIN2, AIN4, AIN6); the command is ignored if odd channel addresses (AIN1, AIN3, AIN5, AIN7) are used for a differential conversion. After issuing a Manually Triggered Conversion command, bring CS high to begin the conversion. To obtain a correct conversion result, CS must remain high for a period longer than the reference power-up time (if in power-down mode) plus the conversion time for the selected channel-configured conversion type (voltage or temperature). The conversion’s result can then be read at DOUT by issuing a Read Current Data Register for Selected Channel command, addressing the converted channel. See Table 3 for channel addresses.
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
Read Alarm Register (Command Code 0001)
The Read Alarm Register command, 0001, outputs the current status of the alarm register (see Table 11). The address bits in this command are ignored. The alarm register is 24 bits long and outputs in 3 bytes. Table 12 illustrates the encoding of the alarm register. After receiving an interrupt, read the alarm register to determine the source of the interrupt (see the Alarm Register section).
Read Current Data Register for All Channels (Command Code 0011)
The Read Current Data Registers for All Channels command, 0011, outputs the data in the current data registers of all 10 channels, starting with the internal temperature sensor, then the VDD monitor, followed by AIN0 to AIN7. The address bits following this command are ignored. It takes 20 bytes to read all of the 10 channels’ current data registers.
Read Current Data Register for Selected Channel (Command Code 0010)
The Read Current Data Register for Selected Channel command, 0010, outputs the data in the current data register of the selected channel. The address bits following this command select the input channel to be read (see Table 3). The current data register is a 10-bit register. It takes 2 bytes to read its value. See the Output Data Format and Current Data Registers sections for more details. See Table 3 for channel addresses. Also, see Figure 7.
Read Configuration Register for Selected Channel (Command Code 0100)
The Read Configuration Register for Selected Channel command, 0100, outputs the configuration data of the channel selected by the address bits (see Table 3). The first register that shifts out is the upper threshold register (2 bytes), followed by the lower threshold register (2 bytes), ending with the channel configuration register (1 byte), all MSB first. It takes 5 bytes to read all three registers. See the Channel Registers section for more details.
CS
SCLK
DIN
C3
C2 C1 C0
A3
A2
A1 A0
DOUT
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Figure 7. Serial Register Read Timing
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
Read Global Configuration Register (Command Code 0101)
The Read Global Configuration Register command, 0101, outputs the global configuration registers. The address bits following this command are ignored. When the MAX1153/MAX1154 receive a Read Global Configuration Register command, they output 5 bytes of data: 2 bytes from the channel enable register, 2 bytes from the input configuration register, and 1 byte from the setup register, all MSB first. See the Global Configuration Registers section for more details.
Clear Alarm Register for All Channels (Command Code 1001)
The Clear Alarm Register for All Channels command, 1001, clears the entire alarm register and resets the fault counters for the internal TEMP sensor, the VDD monitor, and the AIN0–AIN7 channels. The address bits in the command are ignored. See the Alarm Register section for more details.
MAX1153/MAX1154
Write Current Data Register for Selected Channel (Command Code 1010)
The Write Current Data Register for Selected Channel command, 1010, writes to the addressed channel’s current data register. This command sets an initial condition when using the averaging filter option (see the Averaging section). This command can also be used for testing the thresholds, fault counters, and alarm functions (see Figure 8). See Table 3 for channel addresses.
RESET (Command Code 0111)
The RESET command, 0111, resets the device. This command returns the MAX1153/MAX1154 to their power-on reset state, placing the device into shutdown mode. The address bits in the command are ignored. See the Power-Up/Reset Defaults Summary section for more details.
Clear Channel Alarm for Selected Channel (Command Code 1000)
The Clear Channel Alarm command, 1000, clears the alarm bits in the alarm register and resets the fault counter for the addressed channel. See the A larm Register section for more details. See Table 3 for channel addresses.
Write Current Data Register for All Channels (Command Code 1011)
The Write Current Data Register for All Channels command, 1011, writes to the current data registers of all channels sequentially, starting with the internal temperature sensor, then the VDD monitor, followed by channels AIN0 to AIN7. The address bits are ignored. Use this command for testing and setting initial conditions when using the averaging filter option (see the Averaging section).
CS
SCLK
DIN
C3 C2 C1 C0
A3
A2
A1
A0
D11 D10 D9
D8
D7
D6
D5
D4
D3 D2 D1
D0
DOUT
Figure 8. Serial Register Write Timing
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
Write-Selected Channel Configuration Registers (Command Code 1100)
The Write-Selected Channel Configuration Register command, 1100, writes to the three channel configuration registers for the addressed channel (see Table 3). The first register to be written is the upper threshold (2 bytes), followed by the lower threshold (2 bytes), ending with the channel configuration register (1 byte), all MSB first. Writing to the configuration registers resets the alarm register bits and the fault counters for the addressed channel. See the Channel Registers section for more details.
Channel-Enable Register
The channel-enable register (Table 4) controls which channels are converted while in automatic scan mode. The register contents are ignored for manual conversion commands. Each input channel has a corresponding bit in the channel-enable register. A logic high enables the corresponding analog input channel for conversion, while a logic low disables it. In differential configuration, the bits for odd channels are ignored. At power-up and after a RESET command, the register contents default to 111111111111b (all channels enabled).
Write Global Configuration Registers (Command Code 1101)
The Write Global Configuration Registers command, 1101, writes to three registers: the channel-enable register (2 bytes), the input configuration register (2 bytes), and the setup register (1 byte). The command address bits are ignored. See the G lobal Configuration Registers section for more details.
Input Configuration Register
The input configuration register (Table 5) stores the configuration code for each channel as a 3-bit per channel-pair code (see Table 6), selecting from five input signal configurations: single-ended unipolar voltage, single-ended temperature, differential unipolar voltage, differential bipolar voltage, and differential temperature. Table 5 shows the input configuration register format, and Table 6 shows the 3-bit encoding for channel configuration. At power-up and after a RESET command, the register contents defaults to 000000000000b (all inputs single ended).
Global Configuration Registers
The global configuration registers consist of the channel-enable register, the input configuration register, and the setup register. These registers hold configuration data common to all channels.
Table 4. Channel-Enable Register Format
B11 (MSB) TEMP B10 VDD B9 AIN0 B8 AIN1 B7 AIN2 B6 AIN3 B5 AIN4 B4 AIN5 B3 AIN6 B2 AIN7 B1 Res B0 (LSB) Res
Table 5. Input Configuration Register Format
B11 (MSB) B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 (LSB)
AIN0 and AIN1 configuration
AIN2 and AIN3 configuration
AIN4 and AIN5 configuration
AIN6 and AIN7 configuration
Table 6. Channel Configuration Coding (3 Bits/Channel Pair)
CODE 000 001 010 011 100 101 110 111 AIN0, AIN2, AIN4, AIN6 CONFIGURATION Single-ended input (power-up state) Single-ended input Single-ended, external temperature sensor input Single-ended, external temperature sensor input Differential unipolar encoded, positive input Differential bipolar encoded, positive input Differential external temperature sensor, positive input Reserved AIN1, AIN3, AIN5, AIN7 CONFIGURATION Single-ended input (power-up state) Single-ended, external temperature sensor input Single-ended input Single-ended, external temperature sensor input Differential unipolar encoded, negative input Differential bipolar encoded, negative input Differential external temperature sensor, negative input Reserved
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
Setup Register
The 8-bit setup register (Table 7) holds configuration data common to all input channels. At power-up and after a RESET command, this register defaults to 00000000b. Setup Register: Sample Wait Bits (B7, B6, B5) These 3 bits in the setup register (Table 8) set the wait time between conversion scans. The following are examples of how the MAX1153/MAX1154 begin a sample sequence (see the S etup Register: Reference Selection Bits (B1/B0) section). Operating in reference mode 00 (external reference for voltage conversions, internal reference for temperature conversions): 1) Convert the first-enabled channel. If this channel is a temperature measurement, power up the internal reference (this takes 20µs for each enabled temperature measurement in reference mode 00). 2) Sequence to the next-enabled channel until all channels have been converted. 3) Wait the sample wait period. 4) Repeat the procedure. Operating in reference mode 01 (internal reference for all conversions, can be powered down between scans): 1) Power up the internal reference, if powered down (this takes 40µs). 2) Convert the first-enabled channel, starting with the internal temperature sensor, if enabled. 3) Sequence to the next-enabled channel until all enabled channels have been converted. 4) Wait the sample wait time, and enter internal reference power-down mode if this period is greater than 80µs. 5) Repeat the above steps. Operating in reference mode 10 (internal reference for all conversions, continuously powered up): 1) Convert the first-enabled channel. 2) Sequence to the next-enabled channel until all enabled channels have been converted. 3) Wait the sample wait time. 4) Repeat the procedure. Use the sample wait feature to reduce supply current when measuring slow-changing analog signals. This power savings occurs when reference mode 00 or 01 is used in combination with wait times longer than 80µs. With reference mode 10 or wait times of less than 80µs, the internal reference system remains powered up, minimizing any power savings. See the Computing Data Throughput section. Table 8 shows the B7, B6, B5 wait time encoding. Setup Register: Interrupt Control (B4, B3) Bits B3 and B4 in the setup register configure INT and how it responds to an alarm event (see the A larm Register section). Table 9 shows the available INT options.
MAX1153/MAX1154
Table 7. Setup Register Format
B7 (MSB) B6 Sample wait bits B5 B4 Interrupt active B3 Interrupt polarity B2 Scan mode B1 Reference source B1 B0 (LSB) Reference source B2
Table 8. Wait Time Encoding
B7, B6, B5 000 001 010 011 100 101 110 111 WAIT TIME (ms) 0 0.080 0.395 1.310 4.970 19.600 78.200 312.000
Table 9. Interrupt Control
BIT FUNCTION Output driver type Output polarity BIT STATE 1 B4 0 1 0 INT OPERATION Driven high or low at all times High-Z when inactive, driven (high or low) when active Active high, inactive = low or high -Z Active low, inactive = high or high -Z
B3
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
Setup Register: Scan Mode Bit (B2) The scan mode bit selects between automatic scanning and manual conversion mode. When set (B2 = 1), the MAX1153/MAX1154 enter automatic scanning mode and convert every enabled channel starting with the internal temperature sensor, followed by the VDD monitor, then sequencing through AIN0 to AIN7. After converting all the enabled channels, the MAX1153/MAX1154 enter a wait state set by the sample wait bits in the setup register. After completing the sample wait time, the scan cycle repeats. When B2 = 0, the MAX1153/MAX1154 are in manual mode and convert only the selected channel after receiving a Manually Triggered Conversion command (see the Manually Triggered Conversion (Command Code 0000) section). Whether in automatic scanning mode or manual mode, a Read Current Data Register for Selected Channel command outputs the last-completed conversion result for the addressed channel at DOUT. Setup Register: Reference Selection Bits (B1, B0) The MAX1153/MAX1154 can be used with an internal or external reference. Select between internal and external reference modes through bits B1 and B0 of the setup register (see Table 10).
Alarm Register
The alarm register (Table 11) holds the current alarm status for all of the monitored signals. This 24-bit register can only be read and cleared. The alarm register has 2 bits for each external input channel, 2 for the onboard temperature sensor, and 2 for the VDD monitor (see Table 12). At power-up, these bits are logic low, indicating no alarms at any input. When any bit in the alarm register is set, INT becomes active and remains active until all alarm bits are cleared. After a fault counter exceeds the set threshold, the alarm register bits for that particular channel are updated to indicate an alarm. To clear the interrupt, reset the active alarm bit with the Clear Alarm Register command, Clear Channel Alarm command, a RESET command, or by writing a new configuration to the faulting channel. The alarm register defaults to 000000 hex. Table 11 illustrates how the alarm register stores the information on which channel a fault has occurred. The alarm code for each bit pair is shown in Table 12.
Table 10. Reference Selection
B1 B0 REFERENCE MODE Voltage measurements use external reference, while temperature measurements use the internal reference. A 20µs reference startup delay is added prior to each temperature measurement in this mode. This is the default mode after power-up and after a software RESET. All measurements use the internal reference. A 40µs reference startup delay is added prior to starting the scanning of enabled channels, allowing the internal reference to stabilize. Note: For sample wait times less than 80µs, the reference is continuously powered when in automatic scan mode. All measurements use the internal reference. By selecting this mode, the reference is powered up immediately when CS goes high after writing this configuration. Once the reference system is powered up, no further delay is added. Reserved.
Channel Registers
Each channel (internal temperature sensor, VDD monitor, and AIN0 to AIN7) has registers to hold the conversion result (current data register) and channel-specific configuration data. The channel-specific configuration registers include: the upper threshold register, the lower threshold register, and the channel configuration register. In differential mode, only the registers for the even channel of the differential input pair are used. The channel-specific configuration registers for the odd channel of a differential channel pair are ignored.
0
0
0
1
Table 12. Alarm Register Coding (2 Bits/Channel)
CODE 00 01 10 00 DESCRIPTION No alarm (power-up state) Input is below lower threshold Input is above upper threshold Reserved
1
0
1
1
Table 11. Alarm Register Format
B23/B22 TEMP B21/B20 VDD B19/B18 AIN0 B17/B16 AIN1 B15/B14 AIN2 B13/B12 AIN3 B11/B10 AIN4 B9/B8 AIN5 B7/B6 AIN6 B5/B4 AIN7 B3/B2 Res B1/B0 Res
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
Table 13. Channel Configuration Register Format
B7 (MSB) Fault B3 B6 Fault B2 B5 Fault B1 B4 Fault B0 B3 Ave B3 B2 Ave B2 B1 Ave B1 B0 (LSB) Ave B0
MAX1153/MAX1154
Table 14. Conversion Average Encoding
CODE 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 N 1, no averaging 2 4 8 16 32 64 128 256 512 1024 2048 Reserved Reserved Reserved Reserved
normal range defined by the thresholds, the fault counter resets. If the next counter finds the input signal outside the opposite threshold, rather than the previous one, the fault counter also resets. The fault counter increments only when counting consecutive faults exceeding the same threshold (Figure 4).
Averaging
The averaging calculated by the data-acquisition algorithm of the MAX1153/MAX1154 improves the input signal-to-noise ratio (SNR) by reducing the signal bandwidth digitally. The formula below describes the filter implemented in the MAX1153/MAX1154: current value = [(N - 1) / N] x past value + [(present value) / N] where N = number of samples indicated in Table 14. The averaging bits (B3–B0) in the channel configuration register can set the N factor to any value in Table 14. The output of the filter-running algorithm is continuously available in the current data register. The starting value used by the algorithm is the initial state of the current data register. The current data register is reset to midscale (800 hex) at power-up or after a RESET command, but it can be loaded with a more appropriate initial value to improve the filter settling time. At power-up or after a RESET command, the B3–B0 bits of the channel configuration register are set to 0 hex, corresponding to a number of averaged N = 1, no averaging. See Table 13 and the W rite-Selected Channel Configuration Registers section for programming details. See Table 14 for N encoding. As in all digital filters, truncation can be a cause of significant errors. In the MAX1153/MAX1154, 24 bits of precision are maintained in the digital averaging functions, maintaining a worst-case truncation error of well below an LSB. The worst-case truncation error in the MAX1153/MAX1154 is given by the following: worst - case truncation error = N -1 LSBs 16384
Channel Configuration Register
Each channel has a channel configuration register (Table 13) defining the number of consecutive faults to be detected before setting the alarm bits and generating an interrupt, as well as controlling the digital averaging function. At power-up and after a RESET command, the register defaults to 00 hex (no averaging, alarm on first fault).
Fault Bits
The value stored in the fault bits (B7–B4) in the channel configuration register sets the number of faults that must occur for that channel before generating an interrupt. Encoding of the fault bits is straight binary with values 0 to 15. A fault occurs in a channel when the value in its current data register is outside the range defined by the channel’s upper and lower threshold registers. For example, if the number of faults set by the fault bits is N, an interrupt is generated when the number of consecutive faults (see following note) reach (N + 1). The fault bits default to 0 hex at power-up. Note: Consecutive faults are those happening in consecutive conversion scans for the same channel. If a fault occurs and the next scan finds the input within the
where N = number of conversions averaged. Therefore, the worst truncation error when averaging 256 samples is 0.01557 LSBs.
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
Upper Threshold Register
A conversion result greater than the value stored in the upper threshold register results in a fault, increasing the internal fault counter by one. When the fault count exceeds the value stored in fault bits B7–B4 of the channel configuration register, the channel’s alarm bits in the alarm register are set, resulting in an interrupt on INT. The upper threshold register data format must be the same as the input channel. When the input channel is configured for single-ended or differential unipolar voltage measurements, data stored in the upper threshold register is interpreted as straight binary. For input channels configured for temperature measurements or as differential bipolar voltage inputs, the upper threshold register data is interpreted as two’s complement. Load the register with 3FF hex to disable upper threshold faults in unipolar mode, and 1FF hex in temperature or bipolar mode. The power-up/reset default is FFF hex. See the Command Word section on how to read/write to the upper threshold registers. channel are updated to indicate an alarm. When any bit in the alarm register is set, the INT output becomes active, and stays active until all alarm bits are cleared. See the Alarm Register section for more information.
Servicing Interrupts at INT
After detecting an interrupt on INT, the µC’s interrupt routine should first read the alarm register to find the source of the alarm and reset the alarm bits by using any of the methods described in the Alarm Register section. Then it can continue with any other action required by the application to react to the alarm. Note: Multiple alarm conditions can be present. The INT remains active until all alarm conditions have been cleared.
Performing Conversions
At power-up or after a RESET command, the MAX1153/MAX1154 default to shutdown mode with all channels enabled, set for single-ended voltage measurements, and with the scan mode set to manual. Start a conversion by issuing a manually triggered conversion command with the address bits of the channel selected (see the Manual Conversion section for more details) or by setting automatic scan mode. To place the MAX1153/MAX1154 in automatic scan mode, set the scan mode bit B2 in the setup register to logic 1. In automatic scan mode, the MAX1153/MAX1154 convert all enabled channels starting with the internal temperature sensor, followed by the VDD monitor, then by AIN0 to AIN7. As the scan sequence progresses, the analog inputs are converted and the resulting values are stored for each channel into its current data register. Once the scan cycle completes, the MAX1153/ MAX1154 wait a period determined by the sample wait bits (B7, B6, B5) in the setup register and then repeat the scan cycle. After configuring the MAX1153/MAX1154 with automatic scan mode enabled, the devices do not require any intervention from the system µC until an alarm is triggered. All conversion and monitoring functions can continue running indefinitely.
Lower Threshold Register
Conversion results lower than the value stored in the lower threshold register increment the internal fault counter. Considerations about channel configuration register fault bits B7–B4, INT interrupts, and data format are the same as for the upper threshold register. Set the register to 000 hex to disable lower threshold faults in unipolar mode, or to 200 hex in temperature or bipolar mode. The power-up/reset default is 000 hex. See the Command Word section on how to read/write to the lower threshold registers.
Current Data Registers
The current data register holds the last conversion result or the digitally averaged result, when enabled (see the Averaging section). The current data registers default to 800 hex at power-up/reset and can be read from and written to through the serial interface. See the Command Word section on how to read/write to the current data registers.
INT Interrupt Output
INT provides an indication that an alarm has occurred in the system. It can be programmed (see Table 9) to operate as a push-pull digital output or as an opendrain output (requiring either a pullup or a pulldown resistor) for wired-OR interrupt lines. Bits B3 and B4 in the setup register configure INT and determine its response to an alarm event. When an internal fault counter exceeds the threshold stored in the fault bits (B7–B4) of the corresponding channel configuration register, the alarm bits for that particular
22
Manual Conversion
In manual mode (scan mode bit in the setup register set to zero, the default after power-up/reset), the MAX1153/MAX1154 convert individual channels with the Manually Triggered Conversion command. Assuming that, either by power-up/RESET defaults or by previous initialization, the channel to be addressed is both enabled and configured for the type of signal to be acquired (voltage/temperature, single ended/differential, or unipolar/bipolar), carry out the following steps to
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
execute a manual conversion. See Figure 9 for manual conversion timing: 1) Disable autoscan (set up register scan mode bit to zero), if necessary. 2) Pull CS low. 3) Initiate a conversion by issuing a Manually Triggered Conversion command (0000, followed by the address bits of the channel to be converted). 4) Pull CS high to start the conversion. 5) Maintain a logic high on CS to allow for reference power-up (if the reference mode requires it) and conversion time. 6) Pull CS low. 7) Issue a Read Current Data Register for SelectedChannel command (0010, followed by the same address of the channel in the Manually Triggered Conversion command).
Monitoring VDD
This internal acquisition channel samples and converts the supply voltage, VDD. VDD value can be calculated from the digitized data with the following equation: V VDD = 2 x (current _ data _ register _ content) x REF 1024 The reference voltage must be larger than 1/2VDD for the operation to work properly. VDD monitoring requires 10.6µs (typ) per measurement.
MAX1153/MAX1154
Temperature Measurement
The MAX1153/MAX1154 perform temperature measurement by measuring the voltage across a diode-connected transistor at two different current levels. The following equation illustrates the algorithm used for temperature calculations: q k temperature = (VHIGH − VLOW) x IHigh n x ln ILOW
Voltage Measurements
Every voltage measurement (internal VDD or external input channel) requires 10.6µs to complete. If the internal reference needs to power up (reference mode = 01), an additional 40µs is required every time the MAX1153/MAX1154 come out of automatic shutdown mode after a sample wait period greater than 80µs.
tPU+CONV
CS
SCLK
DIN
C3
C2
C1 C0
A3 A2 A1
A0
C3
C2
C1 C0
A3
A2 A1
A0
DOUT
Figure 9. Manual Conversion Timing Without Reading Data ______________________________________________________________________________________ 23
Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
where: VHIGH = sensor-diode voltage with high current flowing (IHIGH) VLOW = sensor-diode voltage with low current flowing (ILOW) q = charge of electron = 1.602 ✕ 10-19 coulombs k = Boltzman constant = 1.38 ✕ 10-23 J/K n = ideality factor (slightly greater than 1) The temperature measurement process is fully automated in the MAX1153/MAX1154. All steps are sequenced and executed by the MAX1153/MAX1154 each time an input channel (or an input channel pair) configured for temperature measurement is scanned. The resulting 10-bit, two’s complement number represents the sensor temperature in degrees Celsius, with 1 LSB = +0.5°C. The MAX1153/MAX1154 support both single-ended and differential temperature measurements. the reference mode, and starts the automatic scan mode. See the Write Global Configuration Registers Command section, Table 2, and Tables 5–10. Immediately after the global configuration register is loaded, the MAX1153/MAX1154 begin to update the current data registers. Acquire conversion data from the MAX1153/MAX1154 by issuing a command to read a specific channel with the Read Current Data Register for Selected Channel command. Read all current data register at once with the Read Current Data Registers for All Channels command. For more complex applications, the monitoring and interrupt generation features of the MAX1153/MAX1154 require a second step of initialization. Each enabled channel to be monitored requires configuration using a Write Configuration Register for Selected Channel command. Each command is a 5-byte write that sets the upper and lower fault thresholds, the number of faults for an alarm before an interrupt is generated, and an average algorithm parameter if the application requires input signal filtering. Applications can read the current data registers and respond to interrupts signaled by the INT output (see the Servicing Interrupts at INT section). All the MAX1153/MAX1154 registers can be verified by reading back written data, including the configuration registers. This feature is useful for development and testing (see Table 2).
Applications Information
Setting Up the MAX1153/MAX1154 Subsystem
The MAX1153/MAX1154 are autonomous subsystems, requiring only initialization to scan, convert, and monitor the voltage signals or the temperature sensors connected to their input channels. For simple applications, using any number of the input channels and any combination of voltage/temperature and unipolar/differential, with no interrupt generation required, use the following intitialization procedure: • Issue a Write Global Configuration Registers command. This is a single, 5-byte write operation that configures the input channels, enables the channels to be used, sets the sample wait time between scans, configures the interrupt output INT, selects
Power-Up/Reset Defaults Summary
Setup Register Power-Up/Reset Defaults At initial power-up or after a RESET command, the setup register resets to 00 hex. Consequently, the MAX1153/MAX1154 are configured as follows: • Sample wait time is 0µs. • INT output is open drain and outputs an active-low signal to signify an alarm.
Table 15. Power-Up/Reset Defaults Summary
REGISTER Setup Channel enable Input configuration Alarm register Channel configuration Upper threshold Lower threshold Current data registers BIT RANGE B0 to B7 B0 to B11 B0 to B11 B0 to B23 B0 to B7 B0 to B9 B0 to B9 B0 to B9 POWER-UP/RESET STATE All 0s All 1s All 0s All 0s All 0s All 1s All 0s 200hex COMMENT See Setup Register Power-Up/Reset Defaults All channels (int/ext) enabled All single-ended voltage inputs No alarms set Faults = 0, no averaging All upper thresholds max range All lower thresholds min range Set at midrange
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
• • Manual conversion mode External reference for voltage measurements ple wait period (if sample wait time > 80µs), and no power-up time in reference mode 10. The sampling period is calculated as follows: tsw = (tpu) + (Nv)tconv[volt] + (Nt)tconv[temp] + twait where: tsw = all channels scan sampling period tpu = reference power-up time tconv[volt] = voltage-configured channel conversion time Nv = number of voltage-configured channels tconv[temp] = temperature-configured channel conversion time Nt = number of temperature-configured channels twait = sample wait time The terms in the previous equation are determined as shown by the number of enabled channels, the input channel configuration (voltage vs. temperature), the sample wait time, and the reference mode. The following calculation shows a numeric example: tsw = 40µs + 8 x 10.6µs + 2 x 46µs + 395µs = 611.8µs 40µs is the time required for the reference to powerup (reference mode = 00) every time the MAX1153/MAX1154 come out of automatic shutdown mode after a sample wait period. • 8 x 10.6µs is the time required for seven channels configured for voltage measurement and the VDD monitor. • 2 x 46µs is the time required for temperature measurement (46µs for each temperature measurement (internal or external)). • 395µs is the sample wait time, set by bits B5, B6, B7 of the setup register (see Tables 7 and 8). The MAX1153/MAX1154 use an internal clock for all conversions. The serial interface clock does not affect conversion time. Performing eight single-ended remote channels temperature measurements, an internal temperature measurement, and an internal VDD measurement with a sample wait time of zero results in an average conversion rate of 24ksps or 2.4ksps per channel. Performing eight single-ended voltage measurements, an internal temperature measurement, and an internal VDD measurement with sample wait time of zero results in an average conversion rate of 70ksps or 7ksps per channel. •
MAX1153/MAX1154
Channel Enable Register Power-Up/Reset Defaults At power-on or after a RESET command, the channel enable register resets to FF hex, enabling all channels: the internal temperature sensor, the VDD monitor, and AIN0–AIN7. Input Configuration Register Power-Up/Reset Defaults At power-on or after a RESET command, the input configuration register resets to 00 hex, configuring AIN0–AIN7 for single-ended voltage measurement. Alarm Register Power-Up/Reset Defaults At power-on or after a RESET command, the alarm register is reset to 000000 hex, indicating that no alarm condition exists. Current Data Register Power-Up/Reset Defaults At power-on or after a RESET command, each channel’s current data register is reset to 800 hex. Upper Threshold Register Power-Up/Reset Defaults At power-on or after a RESET command, each channel's upper threshold register is reset to FFF hex. This state effectively disables the upper threshold. Lower Threshold Register Power-Up/Reset Defaults At power-on or after a RESET command, each channel's lower threshold register is reset to 000 hex. This state effectively disables the lower threshold. Channel Configuration Register Power-Up/Reset Defaults At power-on or after a RESET command, each channel's configuration register is reset to 000 hex, which configures the fault bits to cause an alarm to occur on the first overrange or underrange condition and disables averaging.
Computing Data Throughput
The MAX1153/MAX1154 throughput rate depends on the number of enabled channels, their configuration (temperature or voltage), and the reference mode. Voltage measurements require 10.6µs (typ) to complete, and temperature measurements require 46µs. Channel pairs configured for differential measurements count as only one for throughput computation. The reference system takes 20µs to power up in reference mode 00 prior to each temperature measurement, 40µs to power up in reference mode 01 after each sam-
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
Automatic Reference Shutdown
The MAX1153/MAX1154 enter an automatic shutdown mode when in reference mode 00 or when the sample wait is greater than 80µs in reference mode 01. Using either of these reference modes and a sample wait period as long as the application allows results in the lowest power consumption. Single-Ended Temperature Measurement Connect the anode of a diode-connected transistor to the input channel and the cathode to ground. Choose ground connections for sensors away from high-current return paths to avoid the introduction of errors caused by voltage drops in the board/system ground, which is the main drawback for single-ended measurements. Practical options for better accuracy are the use of a star-configured subsystem ground or a signal ground plane; to isolate the anode sensor connection trace away from board and system noise sources; or to shield it with ground lines and ground planes (when available) to prevent accuracy degradation in the temperature measurements caused by magnetic/electric noise induction. Configure the MAX1153/MAX1154 input used for singleended temperature measurement in the input configuration register (see Tables 9 and 10) and enable the analog input in the channel-enable register (see Table 4).
Temperature Measurement
The MAX1153/MAX1154 support both single-ended and differential temperature measurements. The design decision between the two types of measurements depends on the desired level of accuracy and on type and/or number of temperature sensors. The superior common-mode rejection and lower noise of the differential mode reduces measurement errors and provides higher accuracy, while single-ended measurements require a lower number of connections, resulting in a simpler implementation and a higher number of monitored points for each MAX1153/MAX1154. Differential Temperature Measurement Connect the anode of a diode-connected transistor to the even input channel and the cathode to the odd input channel of an input pair configured for differential temperature measurement (AIN0/AIN1, AIN2/AIN3, AIN4/AIN5, or AIN6/AIN7). Run the two sensor connection lines parallel to each other with minimum spacing. This improves temperature measurement accuracy by minimizing the differential noise between the two lines, since they have equal exposure to most sources of noise. For further improved noise rejection, shield the two sensor connections by running them between ground planes, when available. Configure the MAX1153/MAX1154 inputs for differential temperature measurement in the input configuration register (see Tables 9 and 10) and enable the even channel number in the channel enable register (see Table 4).
Remote Temperature Sensor Selection
Temperature-sensing accuracy depends on having a good-quality, diode-connected, small-signal transistor as a sensor. Accuracy has been experimentally verified for 2N3904-type devices. The transistor must be a small-signal type with low base resistance. Tight specifications for forward current gain (+50 to +150, for example) indicate that the manufacturer has good process controls and that the devices have consistent VBE characteristics. CPU on-board sensors and other ICs’ on-board temperature-sensing devices can also be used (see Table 16 for recommended devices).
OUTPUT CODE 11....111 11....110 11....101 FS = VREF ZS = 0 00....011 00....010 00....001 00....000 0 0 1 2 3 INPUT VOLTAGE (LSB) FS = 3/2 LSB FS 1 LSB = VREF 1024 FULL-SCALE TRANSITION
Table 16. Remote Sensor Transistor Manufacturers
MANUFACTURER Central Semiconductor (USA) Fairchild Semiconductors (USA) Motorola (USA) Rohm Semiconductor (Japan) Siemens (Germany) Zetex (England) Diodes Inc. MODEL NUMBER CMPT3904 MMBT3904 MMBT3904 SST3904 SMB3904 FMMT3904CT-ND MMBT3904
Figure 10. Unipolar Transfer Function, Full Scale (FS) = VREF
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
OUTPUT CODE 011....111 011....110 V FS = REF 2 ZS = 0 -V -FS = REF 2 V 1 LSB = REF 1024 OUTPUT CODE 011....111 011....110
000....010 000....001 000....000 111....111 111....110 111....101 100....001 100....000
000....010 000....001 000....000 111....111 111....110 111....101 100....001 100....000
-FS
0 INPUT VOLTAGE (LSB)
+FS - 1 LSB
-256°C
0 TEMPERATURE °C
+255.5°C
Figure 11. Bipolar Transfer Function, Full Scale (±FS) = ±VREF/2
Figure 12. Temperature Transfer Function
Transfer Function
Figure 10 shows the nominal transfer function for single-ended or differential unipolar configured inputs, Figure 11 illustrates the transfer function for differential bipolar conversions, and Figure 12 shows temperature conversions. Code transitions occur halfway between successive-integer LSB values. Output coding is binary, with 1 LSB = 2.44mV (MAX1153) or 4mV (MAX1154) for unipolar and bipolar operation, and 1 LSB = +0.5°C (MAX1153/MAX1154) for temperature measurements. For unipolar operation, the 0 code level transition is at [1/2(VREF / 1024)]. The FFF hex level transition is at [1022.5(VREF / 1024)]. 1 LSB = VREF / 1024.
Definitions
Integral Nonlinearity
Integral nonlinearity is the deviation of the values on the actual transfer function from a straight line. This straight line can be either a best-straight-line fit or a line drawn between the end points of the transfer function, once offset and gain errors have been corrected. The static linearity parameters for the MAX1153/MAX1154 are measured using the end-point-fit method. INL is specified as the maximum deviation in LSBs.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an actual step width and the ideal value of 1 LSB. A DNL error specification of less than 1 LSB guarantees no missing codes and a monotonic transfer function.
Layout, Grounding, and Bypassing
For best performance, use PC boards. Do not use wirewrap boards. Board layout should ensure that digital and analog signal lines are separated from each other. Do not run analog and digital (especially clock) signals parallel to one another or run digital lines underneath the MAX1153/MAX1154 package. High-frequency noise in the V DD power supply can affect the MAX1153/MAX1154 performance. Bypass the VDD supply with a 0.1µF capacitor from VDD to GND close to the VDD pin. Minimize capacitor lead lengths for best supply-noise rejection. If the power supply is very noisy, connect a 10Ω resistor in series with the supply to improve power-supply filtering.
Offset Error
The offset error is the difference between the ideal and the actual analog input value at the first transition of the ADC, usually from digital code 0 to code 1 for straight binary output. For the MAX1153/MAX1154, the transition between code 0 and code 1 should occur at an input voltage of 1/2 LSB, or 1.22mV for the MAX1153 and 2mV for the MAX1154.
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor MAX1153/MAX1154
Gain Error
The gain error is the difference between the ideal and actual value of the analog input difference between the first and last transitions of the ADC output. The first transition is from digital code 0 to code 1, and the last from code (2N-2) to code (2N-1), where N = number of ADC bits for straight binary output code. For the MAX1153/MAX1154, the ideal difference in the input voltage between code transitions 0 to 1 and code transitions 1022 to 1023 is 1022 x LSB. For the MAX1153, this is 2.5V - 2 x LSB = 2.495117, and for the MAX1154, this is 4.096V - 2 x LSB = 4.088. Gain error is a DC specification, usually normalized to the FS ideal analog value and given in percent of FSR or ppm.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the fundamental input frequency’s RMS amplitude to the RMS equivalent of all other ADC output signals: SINAD (dB) = 20 x log (SignalRMS / NoiseRMS) There are other noise sources besides quantization noise, including thermal noise, reference noise, clock jitter, etc. Therefore, SINAD is calculated by taking the ratio of the full-scale signal to the RMS noise, which includes all spectral components minus the fundamental and the first five harmonics.
Total Harmonic Distortion (THD)
Total harmonic distortion (THD) is the ratio of the RMS sum of the first five harmonics of the input signal to the fundamental itself. This is expressed as: THD = 20 x log
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital samples, signal-to-noise ratio (SNR) is the ratio of the full-scale analog input (RMS value) to the RMS quantization error (residual error). The ideal theoretical minimum analog-to-digital noise is caused by quantization error only, results directly from the ADC’s resolution (N bits), and can be calculated with the following equation: SNR = (6.02 x N + 1.76)dB There are other noise sources besides quantization noise, including thermal noise, reference noise, clock jitter, etc. Therefore, SNR is calculated by taking the ratio of the RMS signal to the RMS noise, which includes all spectral components minus the fundamental, the first five harmonics, and the DC offset.
(V22
+ V32 + V42 + V52) V1
where V 1 is the fundamental RMS value, and V 2 through V5 are the RMS values of the 2nd- through 5thorder harmonics, respectively.
Power-Supply Rejection
Power-supply rejection is the ratio between the change in the ADC full-scale output to the change in powersupply voltage when the power-supply voltage is varied from its nominal value. It is specified in V/V or µV/V.
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Stand-Alone, 10-Channel, 10-Bit System Monitors with Internal Temperature Sensor and VDD Monitor
Typical Operating Circuit
MAX1153/MAX1154
POWER SUPPLY +V -5V +5V +3V
µC
VDD
VREF REFERENCE GLOBAL REGISTERS TEMP SENSOR INT SPI INTERFACE
AIN0 AIN1 48V AIN2 AIN3 AIN4 AIN5 AIN6 AIN7 GND CHANNEL REGISTERS MUX ADC DIGITAL BLOCK
SPI I/F
MAX1153 MAX1154
REMOTE TEMP
Chip Information
TRANSISTOR COUNT: 89,473 PROCESS: 0.6µm BiCMOS
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