19-3259; Rev 0; 5/04
KIT ATION EVALU LE B AVAILA
40Msps, 12-Bit ADC
General Description Features
o Excellent Dynamic Performance 68.6dB SNR at fIN = 20MHz 90dBc SFDR at fIN = 20MHz o Low-Power Operation 159mW at 3.0V (Single-Ended Clock) 181mW at 3.3V (Single-Ended Clock) 198mW at 3.3V (Differential Clock) o Differential or Single-Ended Clock o Accepts 20% to 80% Clock Duty Cycle o Fully Differential or Single-Ended Analog Input o Adjustable Full-Scale Analog Input Range o Common-Mode Reference o Power-Down Mode o CMOS-Compatible Outputs in Two’s Complement or Gray Code o Data-Valid Indicator Simplifies Digital Design o Out-of-Range and Data-Valid Indicators o Miniature, 40-Pin Thin QFN Package with Exposed Paddle o Pin-Compatible, IF Sampling ADC Available (MAX1211ETL) o Evaluation Kit Available (Order MAX1211EVKIT)
MAX1206
The MAX1206 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-andhold (T/H) input, driving the internal quantizer. The MAX1206 is optimized for low power, small size, and high dynamic performance. This ADC operates from a single 3.0V to 3.6V supply, consuming only 159mW, while delivering a typical signal-to-noise ratio (SNR) performance of 68.6dB at a 20MHz input frequency. The T/H-driven input stage accepts single-ended or differential inputs. In addition to low operating power, the MAX1206 features a 0.15mW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX1206 to use its internal precision bandgap reference or accept an externally applied reference. A common-mode reference is provided to simplify design and reduce external component count in differential analog input circuits. The MAX1206 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer. The MAX1206 features parallel, CMOS-compatible outputs. The digital output format is pin selectable to be either two’s complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate power input for the digital outputs accepts a voltage from 1.7V to 3.6V for flexible interfacing with various logic levels. The MAX1206 is available in a 6mm x 6mm x 0.8mm, 40pin thin QFN package with exposed paddle (EP), and is specified for the extended industrial (-40°C to +85°C) temperature range. Refer to the MAX1209 and MAX1211 (see Pin-Compatible Higher/Speed Versions table) for applications that require high dynamic performance for IF input frequencies.
Ordering Information
PART MAX1206ETL TEMP RANGE -40°C to +85°C PIN-PACKAGE 40 Thin QFN (6mm x 6mm)
Applications
Communication Receivers Cellular, LMDS, Point-to-Point Microwave, MMDS, HFC, WLAN Ultrasound and Medical Imaging Portable Instrumentation Low-Power Data Acquisition
PART MAX1206 MAX1207 MAX1208 MAX1211 MAX1209
Pin-Compatible Higher Speed Versions
SPEED GRADE (Msps) 40 65 80 65 80 TARGET APPLICATION Baseband Baseband Baseband IF IF
Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
40Msps, 12-Bit ADC MAX1206
ABSOLUTE MAXIMUM RATINGS
VDD to GND ...........................................................-0.3V to +3.6V OVDD to GND........-0.3V to the lower of (VDD + 0.3V) and +3.6V INP, INN to GND ...-0.3V to the lower of (VDD + 0.3V) and +3.6V REFIN, REFOUT, REFP, REFN, COM to GND.....-0.3V to the lower of (VDD + 0.3V) and +3.6V CLKP, CLKN, CLKTYP, G/T, DCE, PD to GND ........-0.3V to the lower of (VDD + 0.3V) and +3.6V D11–D0, I.C., DAV, DOR to GND ............-0.3V to (OVDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 40-Pin Thin QFN 6mm x 6mm x 0.8mm (derated 26.3mW/°C above +70°C)........................2105.3mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering 10s) ..................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 40MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER DC ACCURACY Resolution Integral Nonlinearity Differential Nonlinearity Offset Error Gain Error ANALOG INPUT (INP, INN) Differential Input Voltage Range Common-Mode Input Voltage Input Resistance Input Capacitance CONVERSION RATE Maximum Clock Frequency Minimum Clock Frequency Data Latency Figure 5 8.5 fCLK 40 5 MHz MHz Clock cycles RIN CIN Switched capacitor load VDIFF Differential or single-ended inputs ±1.024 VDD / 2 24 4 V V kΩ pF INL DNL fIN = 20MHz (Note 2) fIN = 20MHz, no missing codes over temperature (Note 2) VREFIN = 2.048V VREFIN = 2.048V 12 ±0.3 ±0.3 ±0.2 ±0.3 ±0.7 ±0.7 ±1.1 ±4.8 Bits LSB LSB %FS %FS SYMBOL CONDITIONS MIN TYP MAX UNITS
DYNAMIC CHARACTERISTICS (Differential inputs, 4096-point FFT) Signal-to-Noise Ratio Signal-to-Noise and Distortion Single-Tone Spurious-Free Dynamic Range Total Harmonic Distortion SNR SINAD SFDR THD fIN = 3MHz at -0.5dBFS fIN = 20MHz at -0.5dBFS (Note 2) fIN = 3MHz at -0.5dBFS fIN = 20MHz at -0.5dBFS (Note 2) fIN = 3MHz at -0.5dBFS fIN = 20MHz at -0.5dBFS (Note 2) fIN = 3MHz at -0.5dBFS fIN = 20MHz at -0.5dBFS (Note 2) 83.2 66.9 67.0 68.4 68.6 68.3 68.5 89.5 90 -88.4 -88.4 -81 dB dB dBc dBc
2
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40Msps, 12-Bit ADC
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 40MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER Second Harmonic Third Harmonic Third-Order Intermodulation Two-Tone Spurious-Free Dynamic Range Aperture Delay Aperture Jitter Output Noise Overdrive Recovery Time SYMBOL HD2 HD3 IM3 SFDRTT tAD tAJ nOUT CONDITIONS fIN = 3MHz at -0.5dBFS fIN = 20MHz at -0.5dBFS (Note 3) fIN = 3MHz at -0.5dBFS fIN = 20MHz at -0.5dBFS (Note 3) fIN1 = 69MHz at -7dBFS, fIN2 = 71MHz at -7dBFS fIN1 = 69MHz at -7dBFS, fIN2 = 71MHz at -7dBFS Figure 14 Figure 14 INP = INN = COM ±10% beyond full scale MIN TYP -92.5 -96.3 -93.8 -92.1 -89 88 0.9 50 1.70 1.070
BUFFERED EXTERNAL REFERENCE (REFIN driven externally, VREFIN = 2.048V, VREFP, VREFN, and VCOM are generated internally) REFIN Input Voltage REFP Output Voltage REFN Output Voltage COM Output Voltage Differential Reference Output Voltage Differential Reference Temperature Coefficient Maximum REFP Current Maximum REFN Current Maximum COM Current REFIN Input Resistance V V V V V ppm/°C mA mA mA MΩ
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3
40Msps, 12-Bit ADC MAX1206
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 40MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER COM Input Voltage REFP Input Voltage REFN Input Voltage Differential Reference Input Voltage REFP Sink Current REFN Source Current COM Sink Current REFP, REFN, Capacitance COM Capacitance CLOCK INPUTS (CLKP, CLKN) Single-Ended Input High Threshold Single-Ended Input Low Threshold Differential Input Voltage Swing Differential Input Common-Mode Voltage Minimum Clock Duty Cycle Maximum Clock Duty Cycle Input Resistance Input Capacitance DIGITAL INPUTS (CLKTYP, G/T, PD) Input High Threshold Input Low Threshold Input Leakage Current Input Capacitance CDIN VIH VIL VIH = OVDD VIL = 0 5 0.8 x OVDD 0.2 x OVDD ±5 ±5 V V µA pF RCLK CCLK VIH VIL CLKTYP = GND, CLKN = GND CLKTYP = GND, CLKN = GND CLKTYP = high CLKTYP = high DCE = OVDD DCE = GND DCE = OVDD DCE = GND Figure 4 1.4 VDD / 2 20 45 80 60 5 2 0.8 x VDD 0.2 x VDD V V VP-P V % % kΩ pF VREF IREFP IREFN ICOM SYMBOL VCOM VDD / 2 VREFP - VCOM VREFN - VCOM VREF = VREFP - VREFN VREFP = 2.162V VREFN = 1.138V CONDITIONS MIN TYP 1.65 0.512 -0.512 1.024 1.1 1.1 0.3 13 6 MAX UNITS V V V V mA mA mA pF pF
UNBUFFERED EXTERNAL REFERENCE (REFIN = GND, VREFP, VREFN, and VCOM are applied externally)
4
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40Msps, 12-Bit ADC
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 40MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS D0–D11, DOR, ISINK = 200µA DAV, ISINK = 600µA D0–D11, DOR, ISOURCE = 200µA Output-Voltage High VOH DAV, ISOURCE = 600µA Tri-State Leakage Current D11–D0, DOR Tri-State Output Capacitance DAV Tri-State Output Capacitance POWER REQUIREMENTS Analog Supply Voltage Digital Output Supply Voltage VDD OVDD Normal operating mode, fIN = 20MHz at -0.5dBFS, CLKTYP = GND, single-ended clock Analog Supply Current IVDD Normal operating mode, fIN = 20MHz at -0.5dBFS, CLKTYP = OVDD, differential clock Power-down mode; clock idle, PD = OVDD Normal operating mode, fIN = 20MHz at -0.5dBFS, CLKTYP = GND, single-ended clock Analog Power Dissipation PDISS Normal operating mode, fIN = 20MHz at -0.5dBFS, CLKTYP = OVDD, differential clock Power-down mode, clock idle, PD = OVDD 3.0 1.7 3.3 2.0 3.6 VDD + 0.3V V V ILEAK COUT CDAV (Note 4) (Note 4) (Note 4) 3 6 OVDD - 0.2 V OVDD - 0.2 ±5 µA pF pF MIN TYP MAX 0.2 0.2 UNITS DIGITAL OUTPUTS (D0–D11, DAV, DOR) Output-Voltage Low VOL V
MAX1206
54.7
60.1
66
mA
0.045
181
198
218
mW
0.15
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5
40Msps, 12-Bit ADC MAX1206
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.3V, OVDD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), CREFOUT = 0.1µF, CL ≈ 5pF at digital outputs, VIN = -0.5dBFS, CLKTYP = high, DCE = high, PD = low, G/T = low, fCLK = 40MHz (50% duty cycle), CREFP = CREFN = 0.1µF to GND, 1µF in parallel with 10µF between REFP and REFN, CCOM = 0.1µF in parallel with 2.2µF to GND, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS Normal operating mode, fIN = 20MHz at -0.5dBFS, OVDD = 2.0V, CL ≈ 5pF Power-down mode; clock idle, PD = OVDD TIMING CHARACTERISTICS (Figure 5) Clock Pulse-Width High Clock Pulse-Width Low Data Valid Delay Data Setup Time Before Rising Edge of DAV Data Hold Time After Rising Edge of DAV Wake-Up Time from Power-Down tCH tCL tDAV tSETUP tHOLD tWAKE CL = 5pF (Note 5) CL = 5pF (Notes 3, 5) CL = 5pF (Notes 3, 5) VREFIN = 2.048V 13.9 10.7 10 12.5 12.5 6.4 ns ns ns ns ns ms MIN TYP 6.1 MAX UNITS mA
Digital Output Supply Current
IOVDD
6
µA
Note 1: Note 2: Note 3: Note 4: Note 5:
Specifications ≥+25°C guaranteed by production test,