MAX13013

19-3266; Rev 1; 8/04 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators General Description The MAX13013–MAX13017/MAX3023–MAX3028 single-/ dual-/quad-level translators provide the level shifting necessary to allow 100Mbps data transfer in a multivoltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. Logic signals present on the VL side of the device appear as a higher voltage logic signal on the VCC side of the device, and vice-versa. The MAX13013 single-, the MAX13014–MAX13017 dual-, and the MAX3023–MAX3028 (UCSP™ package) quad-level translators feature an enable (EN) input. The MAX3023–MAX3028 (TSSOP package) quad-level translators feature EN and EN inputs. When disabled, each device places all inputs/outputs on both sides in tri-state and reduces the VCC supply current to 0.03µA, and the VL supply current to 0.1µA. These devices operate at a guaranteed 100Mbps data rate for VL > 1.8V. The MAX13013–MAX13017/MAX3023–MAX3028 accept a +1.65V to +3.6V VCC voltage and a +1.2V to (VCC 0.4V) VL voltage, making them ideal for data transfer between low-voltage ASICs/programmable logic devices (PLDs) and higher voltage systems. The MAX13013 is available in 3 x 2 UCSP and 6-pin SC70 packages. The MAX13014–MAX13017 are available in 3 x 3 UCSP and 8-pin SOT23 packages. The MAX3023–MAX3028 are available in 4 x 3 UCSP and 14-pin TSSOP packages. All devices operate over the extended -40°C to +85°C temperature range. Features ♦ 100Mbps Guaranteed Data Rate ♦ Bidirectional Level Translation MAX13013 (Single) MAX13014 (Dual) MAX3023 (Quad) ♦ Unidirectional Level Translation MAX13015/MAX13016/MAX13017 (Dual) MAX3024–MAX3028 (Quad) ♦ VL Operation Down to +1.2V ♦ Ultra-Low 0.1µA Supply Current When Disabled ♦ Low-Quiescent Current (0.1µA) ♦ UCSP, SC70, SOT23, and TSSOP Packages MAX13013–MAX13017/MAX3023–MAX3028 Pin Configurations TOP VIEW VCC 1 6 EN A VCC GND 2 I/O VCC1 GND 1 2 3 MAX13013 5 VL B MAX13013 VL I/O VL1 EN I/O VCC1 3 4 I/O VL1 SC70 3 x 2 UCSP TOP VIEW (BUMPS ON BOTTOM OF DIE) Typical Operating Circuit +1.8V 0.1µF 0.1µF +3.3V Applications CMOS Logic-Level Translation Low-Voltage ASIC Level Translation Cell Phones SPI™, MICROWIRE™ Level Translation Portable POS Systems Portable Communication Devices GPS Telecommunications Equipment +1.8V SYSTEM CONTROLLER CLK DATA GND VL VCC +3.3V SYSTEM MAX13014 I/O VL1 I/O VL2 I/O VCC1 I/O VCC2 GND CLK DATA GND Ordering Information/Selector Guide PART MAX13013EXT TEMP RANGE -40°C to +85°C PIN-PACKAGE 6 SC70 PACKAGE CODE — TOP MARK ACD NUMBER OF VL → VCC TRANSLATORS 1 Number of VCC → VL TRANSLATORS 1 EN ✓ EN — MICROWIRE is a trademark of National Semiconductor Corp. SPI is a trademark of Motorola, Inc. UCSP is a trademark of Maxim Integrated Products, Inc. Pin Configurations continued at end of data sheet. Ordering Information/Selector Guide continued at end of data sheet. 1 ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 ABSOLUTE MAXIMUM RATINGS All voltages are referenced to GND. VCC ...........................................................................-0.3V to +4V VL...........................................................................................-0.3V to +4V I/O VCC_......................................................-0.3V to (VCC + 0.3V) I/O VL_ ...........................................................-0.3V to (VL + 0.3V) EN, EN ...........................................................-0.3V to (VL + 0.3V) Short-Circuit Duration I/O VL_, I/O VCC_ to GND ....................................................Continuous Continuous Power Dissipation (TA = +70°C) 6-Pin SC70 (derate 3.1mW/°C above +70°C) ..............245mW 6-Bump UCSP (derate 3.9mW/°C above +70°C).........308mW 8-Bump UCSP (derate 4.7mW/°C above +70°C).........379mW 8-Pin SOT23 (derate 9.1mW/°C above +70°C)............727mW 12-Bump UCSP (derate 6.5mW/°C above +70°C) ...518.8mW 14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +1.65V to +3.6V, VL = +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023–MAX3028 TSSOP package only), CIOVL ≤ 15pF, CIOVCC ≤ 40pF, TA = TMIN to TMAX. Typical values are at TA = +25°C.) (Notes 1, 2) PARAMETER POWER SUPPLY VL Supply Range VCC Supply Range Supply Current from VCC VL VCC IQVCC I/O VCC_ = 0, I/O VL_ = 0 or I/O VCC_ = VCC, I/O VL_ = VL I/O VCC_ = 0, I/O VL_ = 0 or I/O VCC_ = VCC, I/O VL_ = VL Supply Current from VL IQVL I/O VCC_ = 0, I/O VL_ = 0 or I/O VCC_ = VCC, I/O VL_ = VL, VL < VCC - 0.2V TA = +25°C, EN = 0 TA = +25°C, EN = 0 TA = +25°C, EN = 0, VL = VCC - 0.2V TA = +25°C, EN = 0 ITS-VL TA = +25°C, EN = 0, VL = VCC - 0.2V TA = +25°C, EN = 0 TA = +25°C, EN = 0, VL = VCC - 0.2V 1.2 1.65 0.1 0.2 VCC - 0.4 3.60 1 2 µA 10 100 V V µA SYMBOL CONDITIONS MIN TYP MAX UNITS VCC Tri-state Output-Mode Supply Current VL Tri-state Output-Mode Supply Current (MAX13013–MAX13017) VL Tri-state Output-Mode Supply Current (MAX3023–MAX3028 TSSOP Package Only) I/O Tri-state Output-Mode Leakage Current ITS-VCC ITS-VL 0.03 0.1 1 50 55 1 0.2 2 70 µA µA µA 74 0.15 20 µA 2 _______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators ELECTRICAL CHARACTERISTICS (continued) (VCC = +1.65V to +3.6V, VL = +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023–MAX3028 TSSOP package only), CIOVL ≤ 15pF, CIOVCC ≤ 40pF, TA = TMIN to TMAX. Typical values are at TA = +25°C.) (Notes 1, 2) PARAMETER LOGIC-LEVEL THRESHOLDS I/O VL_ Input-Voltage High I/O VL_ Input-Voltage Low Pullup Resistance on I/O VL_ Pulldown Resistance on I/O VL_ I/O VCC_ Input-Voltage High I/O VCC_ Input-Voltage Low Pullup Resistance on I/O VCC_ Pulldown Resistance on I/O VCC_ EN, EN Input-Voltage High EN, EN Input-Voltage Low EN Input Current Pullup Resistance on EN Pulldown Resistance on EN I/O VL_ Output-Voltage High I/O VL_ Output-Voltage Low I/O VCC_ Output-Voltage High I/O VCC_ Output-Voltage Low VOHL VOLL VOHC VOLC VIH VIL MAX13013–MAX13017 MAX3023–MAX3028 MAX3023–MAX3028, TSSOP package only I/O VL source current = 20µA I/O VL sink current = 20µA I/O VCC source current = 20µA I/O VCC sink current = 20µA 2/3 x VCC 1/3 x VCC -5 46 46 2/3 x VL 1/3 x VL 62 62 VIHC VILC 2.5 2.5 2/3 x VL 1/3 x VL +5 81 81 VIHL VILL 120 75 2/3 x VCC 1/3 x VCC 2/3 x VL 1/3 x VL V V Ω Ω V V kΩ kΩ V V µA kΩ kΩ V V V V SYMBOL CONDITIONS MIN TYP MAX UNITS MAX13013–MAX13017/MAX3023–MAX3028 _______________________________________________________________________________________ 3 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 TIMING CHARACTERISTICS (VCC = +1.65V to +3.6V, VL = +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023–MAX3028 TSSOP package only), CIOVL ≤ 15pF, CIOVCC ≤ 40pF, TA = TMIN to TMAX. Typical values are at TA = +25°C.) (Notes 1, 2) PARAMETER I/O VCC_ Rise Time SYMBOL tRVCC CONDITIONS CIOVCC = 15pF, Figure 1 CIOVCC = 20pF, Figure 1 CIOVCC = 40pF, Figure 1 CIOVCC = 15pF, Figure 1 I/O VCC_ Fall Time I/O VCC_ One-Shot Output Impedance I/O VL_ Rise Time I/O VL_ Fall Time I/O VL_ One-Shot Output Impedance Propagation Delay, Driving I/O VL_ Propagation Delay, Driving I/O VCC_ Part-to-Part Skew (Note 3) Propagation Delay from I/O VL_ to I/O VCC_ after Enable Propagation Delay from I/O VCC_ to I/O VL_ after Enable Maximum Data Rate I/OVL-VCC CIOVCC = 15pF, Figure 1 I/OVCC-VL CIOVL = 15pF, Figure 2 tPPSKEW tEN-VCC tEN-VL CIOVCC = 15pF, CIOVL = 15pF, VCC = 2.5V, VL = 1.8V CIOVCC = 15pF, Figure 3 CIOVL = 15pF, Figure 4 CIOVCC = 15pF, CIOVL = 15pF, VL > 1.8V CIOVCC = 15pF, CIOVL = 15pF, VL > 1.2V 100 80 tRVL tFVL CIOVL = 15pF, Figure 2 CIOVL = 15pF, Figure 2 tFVCC CIOVCC = 20pF, Figure 1 CIOVCC = 40pF, Figure 1 MIN TYP MAX 2.5 3 4 2.5 3 4 18.5 2.5 2.5 12.5 6.5 6 4 1000 1000 Ω ns ns Ω ns ns ns ns ns Mbps ns ns UNITS Note 1: VL must be less than or equal to VCC - 0.4V during normal operation. However, VL can be greater than VCC during startup and shutdown conditions. Note 2: All units are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design and not production tested. Note 3: Not production tested. Guaranteed by design. 4 _______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Typical Operating Characteristics (Data rate = 100Mbps, VCC = 3.3V, VL = 1.8V, TA = +25°C, unless otherwise noted.) VL SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX13013 toc01 VL SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX13013 toc02 VCC SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX13013 toc03 1.0 0.6 0.5 VL SUPPLY CURRENT (mA) 0.4 0.3 0.2 0.1 0 DRIVING I/O VL_ VL = 1.2V CIOVCC = 15pF 1.5 2.0 2.5 3.0 3.5 25 VCC SUPPLY CURRENT (mA) VL SUPPLY CURRENT (mA) 0.8 20 0.6 15 0.4 DRIVING I/O VL_ VL = 1.8V CIOVCC = 15pF 2.0 2.5 3.0 3.5 4.0 10 DRIVING I/O VL_ VL = 1.8V CIOVCC = 15pF 2.0 2.5 3.0 3.5 4.0 0.2 5 0 VCC SUPPLY VOLTAGE (V) 0 4.0 VCC SUPPLY VOLTAGE (V) VCC SUPPLY VOLTAGE (V) VCC SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX13013 toc04 VL SUPPLY CURRENT vs. TEMPERATURE MAX13013 toc05 VCC SUPPLY CURRENT vs. TEMPERATURE DRIVING I/O VCC_ CIOVL = 15pF MAX13013 toc06 25 4.0 16 15 VCC SUPPLY CURRENT (mA) 14 13 12 11 10 VCC SUPPLY CURRENT (mA) 15 VL SUPPLY CURRENT (mA) 20 3.6 3.2 10 DRIVING I/O VL_ VL = 1.2V CIOVCC = 15pF 1.5 2.0 2.5 3.0 3.5 4.0 2.8 5 2.4 DRIVING I/O VCC_ CIOVL = 15pF -40 -15 10 35 60 85 0 VCC SUPPLY VOLTAGE (V) 2.0 TEMPERATURE (°C) -40 -15 10 35 60 85 TEMPERATURE (°C) VL SUPPLY CURRENT vs. CAPACITIVE LOAD ON I/O VCC_ MAX13013 toc07 VCC SUPPLY CURRENT vs. CAPACITIVE LOAD ON I/O VCC_ MAX13013 toc08 RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VCC_ MAX13013 toc09 1.0 25 1.5 VCC SUPPLY CURRENT (mA) VL SUPPLY CURRENT (mA) 0.8 22 1.2 RISE/FALL TIME (ns) tRISE 0.9 0.6 19 0.4 16 0.6 tFALL 0.2 DRIVING I/O VL_ 0 0 10 20 30 40 CAPACITIVE LOAD (pF) 13 DRIVING I/O VL_ 10 0 10 20 30 40 CAPACITIVE LOAD (pF) 0.3 DRIVING I/O VL_ 0 0 10 20 30 40 CAPACITIVE LOAD (pF) _______________________________________________________________________________________ 5 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Typical Operating Characteristics (continued) (Data rate = 100Mbps, VCC = 3.3V, VL = 1.8V, TA = +25°C, unless otherwise noted.) RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O VL_ MAX13013 toc10 PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VCC_ MAX13013 toc11 PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O VL_ DRIVING I/O VCC_ PROPAGATION DELAY (ns) 4 MAX13013 toc12 1.2 tRISE 1.0 RISE/FALL TIME (ns) 0.8 0.6 0.4 0.2 DRIVING I/O VCC_ 0 0 5 10 15 tFALL 5 DRIVING I/O VL_ PROPAGATION DELAY (ns) 4 tPLH 5 3 3 tPLH 2 2 1 tPHL 0 20 0 10 20 30 40 CAPACITIVE LOAD (pF) CAPACITIVE LOAD (pF) 1 tPHL 0 0 5 10 15 20 CAPACITIVE LOAD (pF) tEN-VCC vs. TEMPERATURE (CIOVCC = 15pF) MAX13013 toc13 tEN-VL vs. TEMPERATURE (CIOVL = 15pF) MAX13013 toc14 TYPICAL I/O VL_ DRIVING (CIOVCC = 40pF) MAX13013 toc15 250 100 230 tEN-VCC (ns) 80 2V/div tEN-VL (ns) 210 60 190 40 2V/div 170 20 150 -40 -15 10 35 60 85 TEMPERATURE (°C) 0 -40 -15 10 35 60 85 4ns/div TEMPERATURE (°C) TYPICAL I/O VCC_ DRIVING (CIOVL = 15pF) MAX13013 toc16 TYPICAL I/O VL_ DRIVING (VCC = 1.65V, VL = 1.2V, CIOVCC = 40pF) MAX13013 toc17 TYPICAL I/O VCC_ DRIVING (VCC = 1.65V, VL = 1.2V, CIOVL = 15pF) MAX13013 toc18 2V/div 1V/div 1V/div 2V/div 1V/div 1V/div 4ns/div 4ns/div 4ns/div 6 _______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators Pin Description—MAX13013/MAX13014/ MAX3023 (Bidirectional Devices) PIN MAX3023 TSSOP 1 2 3 4 5 6 7 4x3 UCSP A1 B2 A2 — B3 A3 A4 MAX13013 SC70 4 — 5 — — — 6 3x2 UCSP B2 — B1 — — — B3 MAX13014 SOT23 7 6 8 — — — 5 3x3 UCSP A2 A3 A1 — — — B1 I/O VL1 I/O VL2 VL N.C. I/O VL3 I/O VL4 EN Input/Output 1, Referenced to VL Input/Output 2, Referenced to VL VL Input Voltage, +1.2V ≤ VL ≤ VCC - 0.4V. Bypass VL to GND with a 0.1µF capacitor. No Connection Input/Output 3, Referenced to VL Input/Output 4, Referenced to VL Active-High Enable Input. If EN is pulled low, all inputs/outputs are in tristate. Drive EN high (VL) for normal operation. Active-Low Enable Input. If EN is pulled high (VL), all inputs/ outputs are in tri-state. Drive EN low for normal operation (MAX3023 TSSOP package only). Input/Output 4, Referenced to VCC Input/Output 3, Referenced to VCC Ground VCC Input Voltage, +1.65V ≤ VCC ≤ +3.6V. Bypass VCC to GND with a 0.1µF capacitor. Input/Output 2, Referenced to VCC Input/Output 1, Referenced to VCC NAME FUNCTION MAX13013–MAX13017/MAX3023–MAX3028 8 9 10 11 12 13 14 — B4 C4 C3 C2 C1 B1 — — — 2 1 — 3 — — — A3 A1 — A2 — — — 4 1 3 2 — — — B3 C1 C3 C2 EN I/O VCC4 I/O VCC3 GND VCC I/O VCC2 I/O VCC1 Pin Description—MAX13015/MAX13016/MAX13017/ MAX3024–MAX3028 (Unidirectional Devices) NAME VCC VL GND EN EN I VL1–I VL4 O VL1–O VL4 I VCC1–I VCC4 O VCC1–O VCC4 FUNCTION (Note 4) VCC Input Voltage, +1.65V ≤ VCC ≤ +3.6V. Bypass VCC to GND with a 0.1µF capacitor. VL Input Voltage, +1.2V ≤ VL ≤ VCC - 0.4V. Bypass VL to GND with a 0.1µF capacitor. Ground Active-High Enable Input. If EN is pulled low, all inputs/outputs are in tri-state. Drive EN high (VL) for normal operation. Active-Low Enable Input (MAX3024–MAX3028 TSSOP Package Only). If EN is pulled high (VL), all inputs/outputs are in tri-state. Drive EN low for normal operation. Inputs Referenced to VL, Numbers 1 to 4 Outputs Referenced to VL, Numbers 1 to 4 Inputs Referenced to VCC, Numbers 1 to 4 Outputs Referenced to VCC, Numbers 1 to 4 Note 4: For specific pin numbers, see the Pin Configurations for more information. _______________________________________________________________________________________ 7 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Test Circuits/Timing Diagrams tRISE/FALL ≤ 3ns I/O VL_ VL VCC 90% 50% 10% I/OVL-VCC I/OVL-VCC MAX13013 EN I/O VL_ I/O VCC_ CIOVCC I/O VCC_ 90% 50% SOURCE 10% tFVCC tRVCC Figure 1. Driving I/O VL_ Test Circuit and Timing tRISE/FALL ≤ 3ns I/O VCC_ VL VCC 90% 50% 10% I/OVCC-VL I/OVCC-VL MAX13013 EN I/O VL_ CIOVL_ I/O VCC_ I/O VL_ SOURCE 90% 50% 10% tFVL tRVL Figure 2. Driving I/O VCC_ Test Circuit and Timing 8 _______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators Test Circuits/Timing Diagrams (continued) EN VL MAX13013–MAX13017/MAX3023–MAX3028 MAX13013 SOURCE I/O VL_ VL 1MΩ CIOVCC I/O VCC_ EN t'EN-VCC 0 VL 0 VCC I/O VL_ I/O VCC_ VCC EN VCC / 2 0 VL MAX13013 SOURCE I/O VL_ 1MΩ EN t"EN-VCC 0 VL 0 I/O VCC_ CIOVCC I/O VL_ I/O VCC_ VCC / 2 VCC 0 tEN-VCC IS WHICH EVER IS LARGER BETWEEN t'EN-VCC AND t"EN-VCC. Figure 3. Propagation Delay from I/O VL_ to I/O VCC_ After EN EN VL MAX13013 SOURCE I/O VCC_ VCC EN t'EN-VL 0 VCC 0 I/O VL_ 100kΩ CIOVL I/O VCC_ VL I/O VL_ VL / 2 0 EN VL SOURCE 100kΩ I/O VL_ CIOVL I/O VL_ VL / 2 VL MAX13013 I/O VCC_ EN t"EN-VL 0 VCC 0 VL 0 I/O VCC_ tEN-VCC IS WHICH EVER IS LARGER BETWEEN t'EN-VCC AND t"EN-VCC. Figure 4. Propagation Delay from I/O VCC_ to I/O VL_ After EN _______________________________________________________________________________________ 9 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Detailed Description The MAX13013–MAX13017/MAX3023–MAX3028 logiclevel translators provide the level shifting necessary to allow 100Mbps data transfer in a multivoltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. Logic signals present on the VL side of the device appear as a highervoltage logic signal on the VCC side of the device, and vice-versa. The MAX13013/MAX13014/MAX3023 bidirectional level translators allow data translation in either direction (V L ↔ V CC ) on any single data line. The MAX13015/MAX13016/MAX13017/MAX3024–MAX3028 unidirectional level translators, level shift data in one direction (VL→ VCC or VCC→VL) on any single data line. The MAX13013–MAX13017/MAX3023–MAX3028 accept VL from +1.2V to (VCC - 0.4V) and operate with VCC from +1.65V to +3.6V, making them ideal for data transfer between low-voltage ASICs/PLDs and higher voltage systems. When in tri-state mode, the MAX13013–MAX13017/ MAX3023–MAX3028 reduce the VCC supply current to 0.03µA, and the V L supply current to 0.1µA. These devices operate at a guaranteed data rate of 100Mbps for VL > 1.8V. For proper operation, ensure that +1.65V ≤ VCC ≤ +3.6V, and +1.2V ≤ V L ≤ V CC - 0.4V. During power-up sequencing, VL ≥ VCC does not damage the device. VL I/O VL_ TO I/O VCC_ PATH P ONE-SHOT 4kΩ I/O VL N ONE-SHOT I/O VCC During power-supply sequencing, when VCC is floating and V L is powering up, up to 40mA current can be sourced to each load on the VL side, without the device latching up. The maximum data rate depends heavily on the load capacitance (see the T ypical Operating Characteristics Rise/Fall Time graph), output impedance of the driver, and the operating voltage range (Table 1). Input Driver Requirements The MAX13013–MAX13017/MAX3023–MAX3028 architecture is based on a one-shot accelerator output stage (see Figure 5). Accelerator output stages are in tri-state mode except when there is a transition on any of the translators on the input side, either I/O VL_ or I/O VCC_. A short pulse is then generated during which the accelerator output stages become active and charge/discharge the capacitances at the I/Os. Due to the architecture, both sides become active during the oneshot pulse. This can lead to some current feeding into the external source that is driving the translator. However, this behavior simply helps to speed up the transition on the driven side. Table 1. Data Rate VL (V) VL < 1.8 VL ≥ 1.8 GUARANTEED DATA RATE (Mbps) 80 100 Level Translation VCC P ONE-SHOT 150Ω N ONE-SHOT I/O VCC_ TO I/O VL_ PATH Figure 5. Simplified Functional Diagram (One I/O Line) 10 ______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators For proper operation, the driver has to meet the following conditions: less than 25Ω output impedance and greater than 20mA peak output current capability. Figure 6 shows a graph of typical input current versus input voltage. MAX13013–MAX13017/MAX3023–MAX3028 Table 2. MAX3023–MAX3028 (TSSOP Package) Operating Mode EN 0 VL 0 VL EN 0 0 VL VL OPERATING MODE Both I/O VL_ and I/O VCC_ are in tri-state. Normal operation. Both I/O VL_ and I/O VCC_ are in tri-state. Both I/O VL_ and I/O VCC_ are in tri-state. Output Load Requirements The MAX13013–MAX13017/MAX3023–MAX3028 I/O are designed to drive CMOS inputs. Do not load the I/O lines with a resistive load less than 25kΩ. Also, do not place an RC circuit at the input of these devices to slow down the edges. If a slower rise/fall time is required, refer to the MAX3000E/MAX3001E logic-level-translators data sheet. For I 2 C™ level translation, refer to the MAX3372EMAX3379E/MAX3390E–MAX3393E data sheet. Applications Information Power-Supply Decoupling To reduce ripple and the chance of introducing data errors, bypass VL and V CC to ground with a 0.1µF ceramic capacitor. Place all capacitors as close to the power-supply inputs as possible. Enable Inputs The MAX13013 single-, the MAX13014–MAX13017 dualand the MAX3023–MAX3028 (UCSP package) quad-level translators feature an EN input. The MAX3023–MAX3028 (TSSOP package) quad-level translators feature both EN and EN inputs (see Table 2 for operating mode). Note that the MAX3023–MAX3028 (TSSOP package) have internal pullup and pulldown circuitry on EN and EN, respectively. If left unconnected, EN is pulled up to VL and EN is pulled down to GND. IIN Unidirectional vs. Bidirectional Level Translator The MAX13013/MAX13014/MAX3023 bidirectional translators can operate as a unidirectional device to translate signals without inversion. The MAX13015/ MAX13016/MAX13017/MAX3024–MAX3028 unidirectional level translators, level shift data in one direction (VL→ VCC or VCC→VL) on any single data line (see the Ordering Information ). These devices provide the smallest solution (UCSP package) for unidirectional level translation without inversion. VTH_IN / RIN* UCSP Applications Information For the latest application details on UCSP construction, dimensions, tape carrier information, PC board techniques, bump-pad layout, and recommended reflow temperature profiles, as well as the latest information on reliability testing results, go to Maxim’s web site at www.maxim-ic.com/ucsp to find the Application Note: UCSP—A Wafer-Level Chip-Scale Package. 0 VTH_IN -(VS - VTH_IN) / RIN* VS WHERE VS = VCC OR VL VIN *RIN = 4kΩ WHEN DRIVING VL SIDE; RIN = 150Ω WHEN DRIVING VCC SIDE. Figure 6. Typical IIN vs. VIN I2C is a trademark of Philips Corp. Purchase of I2C components from Maxim Integrated Products, Inc. or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. ______________________________________________________________________________________ 11 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Pin Configurations (continued) 1 2 3 TOP VIEW VCC 1 8 7 6 5 VL I/O VL1 I/O VL2 EN B EN C VCC I/O VCC1 I/O VCC2 A VL I/O VL1 I/O VL2 I/O VCC1 2 I/O VCC2 3 MAX13014 GND GND 4 MAX13014 SOT23 UCSP (BUMPS ON BOTTOM OF DIE) 1 VCC 1 8 7 6 5 VL I VL1 I VL2 EN B EN C VCC O VCC1 O VCC2 A VL I VL1 I VL2 2 3 O VCC1 2 O VCC2 3 MAX13015 GND GND 4 MAX13015 SOT23 UCSP (BUMPS ON BOTTOM OF DIE) 1 VCC 1 8 7 6 5 VL O VL1 I VL2 EN B EN C VCC I VCC1 O VCC2 A VL I VL2 O VL1 2 3 I VCC1 2 O VCC2 3 MAX13016 GND GND 4 MAX13016 SOT23 UCSP (BUMPS ON BOTTOM OF DIE) 1 VCC 1 8 7 6 5 VL O VL1 O VL2 EN B EN C VCC I VCC1 I VCC2 A VL O VL1 O VL2 2 3 I VCC1 2 I VCC2 3 MAX13017 GND GND 4 MAX13017 SOT23 UCSP (BUMPS ON BOTTOM OF DIE) 12 ______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators Pin Configurations (continued) 1 2 3 4 MAX13013–MAX13017/MAX3023–MAX3028 TOP VIEW I/O VL1 1 I/O VL2 VL 2 3 14 I/O VCC1 13 I/O VCC2 12 VCC MAX3023 A I/O VL1 B I/O VCC1 C I/O VCC2 VCC GND I/O VCC3 I/O VL2 I/O VL3 I/O VCC4 VL I/O VL4 EN N.C. 4 I/O VL3 5 I/O VL4 6 EN 7 MAX3023 11 GND 10 I/O VCC3 9 8 I/O VCC4 EN TSSOP UCSP (BUMPS ON BOTTOM OF DIE) 1 I VL1 1 I VL2 VL 2 3 14 O VCC1 13 O VCC2 12 VCC 2 3 4 MAX3024 A I VL1 B O VCC1 C O VCC2 VCC GND O VCC3 I VL2 I VL3 O VCC4 VL I VL4 EN N.C. 4 I VL3 5 I V L4 6 EN 7 MAX3024 11 GND 10 O VCC3 9 8 O VCC4 EN TSSOP UCSP (BUMPS ON BOTTOM OF DIE) 1 O VL1 1 I VL2 VL 2 3 14 I VCC1 13 O VCC2 12 VCC 2 3 4 MAX3025 A O VL1 B I VCC1 C O VCC2 VCC GND O VCC3 I VL2 I VL3 O VCC4 VL I VL4 EN N.C. 4 I VL3 5 I VL4 6 EN 7 MAX3025 11 GND 10 O VCC3 9 8 O VCC4 EN TSSOP UCSP (BUMPS ON BOTTOM OF DIE) ______________________________________________________________________________________ 13 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Pin Configurations (continued) TOP VIEW O VL1 1 O VL2 VL 2 3 14 I VCC1 13 I VCC2 12 VCC 1 A O VL1 B I VCC1 C I VCC2 VCC GND O VCC3 O VL2 I VL3 O VCC4 VL I VL4 EN 2 3 4 MAX3026 N.C. 4 I VL3 5 I V L4 6 EN 7 MAX3026 11 GND 10 O VCC3 9 8 O VCC4 EN TSSOP UCSP (BUMPS ON BOTTOM OF DIE) 1 O VL1 1 O VL2 VL 2 3 14 I VCC1 13 I VCC2 12 VCC A O VL1 B I VCC1 C I VCC2 2 3 4 MAX3027 VL I VL4 EN N.C. 4 O VL3 5 I V L4 6 EN 7 MAX3027 11 GND 10 I VCC3 9 8 O VCC4 EN O VL2 O VL3 O VCC4 VCC GND I VCC3 TSSOP UCSP (BUMPS ON BOTTOM OF DIE) 1 O VL1 1 O VL2 VL 2 3 14 I VCC1 13 I VCC2 12 VCC A O VL1 B I VCC1 C I VCC2 2 3 4 MAX3028 VL O VL4 EN N.C. 4 O VL3 5 O V L4 6 EN 7 MAX3028 11 GND 10 I VCC3 9 8 I VCC4 EN O VL2 O VL3 I VCC4 VCC GND I VCC3 TSSOP UCSP (BUMPS ON BOTTOM OF DIE) 14 ______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators Ordering Information/Selector Guide (continued) PART MAX13013EBT-T MAX13014EKA MAX13014EBL-T MAX13015EKA* MAX13015EBL-T* MAX13016EKA* MAX13016EBL-T* MAX13017EKA* MAX13017EBL-T* MAX3023EUD MAX3023EBC-T MAX3024EUD* MAX3024EBC-T* MAX3025EUD* MAX3025EBC-T* MAX3026EUD* MAX3026EBC-T* MAX3027EUD* MAX3027EBC-T* MAX3028EUD* MAX3028EBC-T* TEMP RANGE -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C PIN-PACKAGE 3 x 2 UCSP-6 8 SOT23 3 x 3 UCSP-9 8 SOT23 3 x 3 UCSP-9 8 SOT23 3 x 3 UCSP-9 8 SOT23 3 x 3 UCSP-9 14 TSSOP 4 x 3 UCSP-12 14 TSSOP 4 x 3 UCSP-12 14 TSSOP 4 x 3 UCSP-12 14 TSSOP 4 x 3 UCSP-12 14 TSSOP 4 x 3 UCSP-12 14 TSSOP 4 x 3 UCSP-12 PACKAGE CODE B6-1 — B9-2 — B9-2 — B9-2 — B9-2 — B12-1 — B12-1 — B12-1 — B12-1 — B12-1 — B12-1 TOP MARK ADF AEKB AEN AEKC AEO AEKD AEP AEKE AEQ — ABW — ABX — ABY — ABZ — ACA — ACB NUMBER OF VL → VCC TRANSLATORS 1 2 2 2 2 1 1 0 0 4 4 4 4 3 3 2 2 1 1 0 0 Number of VCC → VL TRANSLATORS 1 2 2 0 0 1 1 2 2 4 4 0 0 1 1 2 2 3 3 4 4 EN ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ EN — — — — — — — — — ✓ — ✓ — ✓ — ✓ — ✓ — ✓ — MAX13013–MAX13017/MAX3023–MAX3028 *Future product—contact factory for availability. Chip Information TRANSISTOR COUNT: MAX13013: 261 MAX13014–MAX13017: 444 MAX3023–MAX3028: 791 PROCESS: BiCMOS ______________________________________________________________________________________ 15 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) SC70, 6L.EPS 16 ______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 6L, UCSP.EPS MAX13013–MAX13017/MAX3023–MAX3028 PACKAGE OUTLINE, 3x2 UCSP 21-0097 G 1 1 ______________________________________________________________________________________ 17 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) SOT23, 8L .EPS REV. SEE DETAIL "A" b e C L SYMBOL A A1 A2 b C D E E1 L L2 e e1 MIN 0.90 0.00 0.90 0.28 0.09 2.80 2.60 1.50 0.30 MAX 1.45 0.15 1.30 0.45 0.20 3.00 3.00 1.75 0.60 0.25 BSC. C L E C L E1 PIN 1 I.D. DOT (SEE NOTE 6) e1 D C C L 0 0.65 BSC. 1.95 REF. 0∞ 8∞ L2 A A2 A1 SEATING PLANE C GAUGE PLANE NOTE: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF HEEL OF THE LEAD PARALLEL TO SEATING PLANE C. 3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR. 4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING. 5. COPLANARITY 4 MILS. MAX. 6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1. 7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP. 8. MEETS JEDEC MO178. L 0 DETAIL "A" PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, SOT-23, 8L BODY APPROVAL DOCUMENT CONTROL NO. 21-0078 D 1 1 18 ______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 9LUCSP, 3x3.EPS MAX13013–MAX13017/MAX3023–MAX3028 PACKAGE OUTLINE, 3x3 UCSP 21-0093 I 1 1 ______________________________________________________________________________________ 19 +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators MAX13013–MAX13017/MAX3023–MAX3028 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) TSSOP4.40mm.EPS 20 ______________________________________________________________________________________ +1.2V to +3.6V, 0.1µA, 100Mbps, Single-/Dual-/Quad-Level Translators Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 12L, UCSP 4x3.EPS MAX13013–MAX13017/MAX3023–MAX3028 PACKAGE OUTLINE, 4x3 UCSP 21-0104 F 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21 © 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.