MAX1452

19-1829; Rev 2; 4/09 KIT ATION EVALU BLE AVAILA Low-Cost Precision Sensor Signal Conditioner MAX1452 General Description Features o Provides Amplification, Calibration, and Temperature Compensation o Accommodates Sensor Output Sensitivities from 4mV/V to 60mV/V o Single Pin Digital Programming o No External Trim Components Required o 16-Bit Offset and Span Calibration Resolution o Fully Analog Signal Path o On-Chip Lookup Table Supports Multipoint Calibration Temperature Correction o Supports Both Current and Voltage Bridge Excitation o Fast 150µs Step Response o On-Chip Uncommitted Op Amp o Secure-Lock™ Prevents Data Corruption o Low 2mA Current Consumption The MAX1452 is a highly integrated analog-sensor signal processor optimized for industrial and process control applications utilizing resistive element sensors. The MAX1452 provides amplification, calibration, and temperature compensation that enables an overall performance approaching the inherent repeatability of the sensor. The fully analog signal path introduces no quantization noise in the output signal while enabling digitally controlled trimming with the integrated 16-bit DACs. Offset and span are calibrated using 16-bit DACs, allowing sensor products to be truly interchangeable. The MAX1452 architecture includes a programmable sensor excitation, a 16-step programmable-gain amplifier (PGA), a 768-byte (6144 bits) internal EEPROM, four 16-bit DACs, an uncommitted op amp, and an onchip temperature sensor. In addition to offset and span compensation, the MAX1452 provides a unique temperature compensation strategy for offset TC and FSOTC that was developed to provide a remarkable degree of flexibility while minimizing testing costs. The MAX1452 is packaged for the commercial, industrial, and automotive temperature ranges in 16-pin SSOP/ TSSOP and 24-pin TQFN packages. Customization Maxim can customize the MAX1452 for high-volume dedicated applications. Using our dedicated cell library of more than 2000 sensor-specific functional blocks, Maxim can quickly provide a modified MAX1452 solution. Contact Maxim for further information. PART MAX1452CAE+ MAX1452EAE+ MAX1452AAE+ MAX1452AUE+ MAX1452ATG+ Ordering Information TEMP RANGE 0°C to +70°C -40°C to +85°C -40°C to +125°C -40°C to +125°C -40°C to +125°C PIN-PACKAGE 16 SSOP 16 SSOP 16 SSOP 16 TSSOP 24 TQFN-EP* Applications Pressure Sensors Transducers and Transmitters Strain Gauges Pressure Calibrators and Controllers Resistive Elements Sensors Accelerometers Humidity Sensors MAX1452C/D 0°C to +70°C Dice** +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. **Dice are tested at TA = +25°C, DC parameters only. Detailed Block Diagram and Pin Configurations appear at the end of data sheet. Outputs Supported 4–20mA 0 to +5V (rail-to-rail) +0.5V to +4.5V Ratiometric +2.5V to ±2.5V Secure-Lock is a trademark of Maxim Integrated Products. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Low-Cost Precision Sensor Signal Conditioner MAX1452 ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD to VSS.........................................-0.3V, +6V Supply Voltage, VDD to VDDF ................................-0.5V to +0.5V All Other Pins ...................................(VSS - 0.3V) to (VDD + 0.3V) Short-Circuit Duration, FSOTC, OUT, BDR, AMPOUT ................................................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin SSOP/TSSOP (derate 8.00mW/°C above +70°C) ..640mW 24-Pin TQFN (derate 20.8mW/°C above +70°C) ...........1.67W Operating Temperature: MAX1452CAE+/MAX1452C/D ............................0°C to +70°C MAX1452EAE+ ................................................-40°C to +85°C MAX1452AAE+ ..............................................-40°C to +125°C MAX1452ATG+..............................................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) ................................ +300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = VDDF = +5V, VSS = 0V, TA = +25°C, unless otherwise noted.) PARAMETER GENERAL CHARACTERISTICS Supply Voltage EEPROM Supply Voltage Supply Current Maximum EEPROM Erase/Write Current Maximum EEPROM Read Current Oscillator Frequency ANALOG INPUT Input Impedance Input Referred Offset Tempco Input Referred Adjustable Offset Range Amplifier Gain Nonlinearity Common-Mode Rejection Ratio Input Referred Adjustable FSO Range ANALOG OUTPUT Differential Signal-Gain Range Selectable in 16 steps Configuration [5:2] 0000bin Configuration [5:2] 0001bin Differential Signal Gain Configuration [5:2] 0010bin Configuration [5:2] 0100bin Configuration [5:2] 1000bin Maximum Output-Voltage Swing No load from each supply 34 47 58 82 133 39 to 234 39 52 65 91 143 0.02 46 59 74 102 157 V V/V V/V CMRR RIN (Notes 2, 3) Offset TC = 0 at minimum gain (Note 4) Percent of +4V span, VOUT = +0.5V to 4.5V Specified for common-mode voltages between VSS and VDD (Note 2) (Note 5) 1 ±1 ±150 0.01 90 4 to 60 MΩ µV/°C mV % dB mV/V VDD VDDF IDD IDDFW IDDFR fOSC 0.85 (Note 1) 4.5 4.5 5.0 5.0 2.0 30 12 1 1.15 5.5 5.5 2.5 V V mA mA mA MHz SYMBOL CONDITIONS MIN TYP MAX UNITS 2 _______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner ELECTRICAL CHARACTERISTICS (continued) (VDD = VDDF = +5V, VSS = 0V, TA = +25°C, unless otherwise noted.) PARAMETER Output-Voltage Low Output-Voltage High Output Impedance at DC Output Offset Ratio Output Offset TC Ratio Step Response and IC (63% Final Value) Maximum Capacitive Load Output Noise BRIDGE DRIVE Bridge Current Current Mirror Ratio VSPAN Range (Span Code) DIGITAL-TO-ANALOG CONVERTERS DAC Resolution ODAC Bit Weight OTCDAC Bit Weight FSODAC Bit Weight FSOTCDAC Bit Weight COARSE OFFSET DAC IRODAC Resolution IRODAC Bit Weight FSOTC BUFFER Minimum Output-Voltage Swing Maximum Output-Voltage Swing Current Drive INTERNAL RESISTORS Current-Source Reference Resistor RISRC 75 kΩ No load No load VFSOTC = +2.5V VDD - 1.0 -40 +40 VSS + 0.1 V V µA ΔVOUT/ ΔCode Including sign Input referred, DAC reference = VDD = +5.0V (Note 6) 4 9 Bits mV/bit ΔVOUT/ ΔCode ΔVOUT/ ΔCode ΔVOUT/ ΔCode ΔVOUT/ ΔCode DAC reference = VDD = +5.0V DAC reference = VBDR = +2.5V DAC reference = VDD = +5.0V DAC reference = VBDR = +2.5V 16 76 38 76 38 Bits µV/bit µV/bit µV/bit µV/bit IBDR AA RL = 1.7kΩ RISOURCE = internal TA = TMIN to TMAX 0.1 10 4000 0.5 12 2 14 C000 mA A/A hex DC to 1kHz (gain = minimum, source impedance = 5kΩ VDDF filter) ΔVOUT/ ΔOffset ΔVOUT/ ΔOffset TC 0.90 0.9 SYMBOL CONDITIONS IOUT = 1mA sinking, TA = TMIN to TMAX IOUT = 1mA sourcing, TA = TMIN to TMAX 4.75 MIN TYP 0.100 4.87 0.1 1.05 1 150 1 0.5 1.20 1.2 MAX 0.20 UNITS V V Ω V/V V/V µs µF mVRMS MAX1452 3 _______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 ELECTRICAL CHARACTERISTICS (continued) (VDD = VDDF = +5V, VSS = 0V, TA = +25°C, unless otherwise noted.) PARAMETER Current-Source Reference Resistor Temperature Coefficient FSOTC Resistor FSOTC Resistor Temperature Coefficient Temperature ADC Resolution Offset Gain Nonlinearity Lowest Digital Output Highest Digital Output UNCOMMITTED OP AMP Open-Loop Gain Input Common-Mode Range Output Swing Output-Voltage High Output-Voltage Low Offset Unity Gain Bandwidth EEPROM Maximum Erase/Write Cycles Minimum Erase Time Minimum Write Time (Note 7) (Note 8) 10k 6 100 Cycles ms µs No load, TA = TMIN to TMAX 1mA source, TA = TMIN to TMAX 1mA sink, TA = TMIN to TMAX VIN+ = +2.5V, unity gain buffer -20 2 RL = 100kΩ VSS VSS + 0.02 4.85 4.90 0.05 0.15 +20 90 VDD VDD 0.02 dB V V V V mV MHz SYMBOL ΔRISRC RFTC ΔRFTC CONDITIONS MIN TYP 1300 75 1300 MAX UNITS ppm/°C kΩ ppm/°C TEMPERATURE-TO-DIGITAL CONVERTER 8 ±3 1.45 ±0.5 00 AF Bits LSB °C/bit LSB hex hex Excludes sensor or load current. All electronics temperature errors are compensated together with sensors errors. The sensor and the MAX1452 must be at the same temperature during calibration and use. This is the maximum allowable sensor offset. This is the sensor's sensitivity normalized to its drive voltage, assuming a desired full span output of +4V and a bridge voltage range of +1.7V to +4.25V. Note 6: Bit weight is ratiometric to VDD. Note 7: Programming of the EEPROM at room temperature is recommended. Note 8: Allow a minimum of 6ms elapsed time before sending any command. Note 1: Note 2: Note 3: Note 4: Note 5: 4 _______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 Typical Operating Characteristics (VDD = +5V, TA = +25°C, unless otherwise noted.) OFFSET DAC DNL MAX1452 toc01 AMPLIFIER GAIN NONLINEARITY OUTPUT ERROR FROM STRAIGHT LINE (mV) ODAC = 6250hex OTCDAC = 0 FSODAC = 4000hex FSOTCDAC = 8000hex PGA INDEX = 0 IRO = 2 MAX1452 toc02 5.0 5.0 2.5 DNL (mV) 2.5 0 0 -2.5 -2.5 -5.0 -5.0 0 10k 20k 30k 40k 50k 60k 70k DAC CODE -50 -40 -30 -20 -10 0 10 20 30 40 50 INPUT VOLTAGE [INP - INM] (mV) OUTPUT NOISE MAX1452 toc03 OUT 10mV/div 400μs/div C = 4.7μF, RLOAD = 1kΩ Pin Description PIN SSOP/TSSOP 1 2 3 4 5 6 7 — 8 TQFN-EP 1 2 3 4 5 6 7 8, 9, 13, 16, 20, 22, 23, 24 10 NAME ISRC OUT VSS INM BDR INP VDD N.C. TEST FUNCTION Bridge Drive Current Mode Setting High ESD and Scan Path Output Signal. May need a 0.1µF capacitor, in noisy environments. OUT may be parallel connected to DIO. Negative Supply Voltage Bridge Negative Input. Can be swapped to INP by configuration register. Bridge Drive Bridge Positive Input. Can be swapped to INM by configuration register. Positive Supply Voltage. Connect a 0.1µF capacitor from VDD to VSS. No Connection. Not internally connected; leave unconnected (TQFN package only). Internally Connected. Connect to VSS. _______________________________________________________________________________________ 5 Low-Cost Precision Sensor Signal Conditioner MAX1452 Pin Description (continued) PIN SSOP/TSSOP 9 10 11 12 13 14 15 16 — TQFN-EP 11 12 14 15 17 18 19 21 — NAME FUNCTION Positive Supply Voltage for EEPROM. Connect a 1µF capacitor from VDDF to VSS. Connect VDDF to VDD or for improved noise performance connect a 30Ω resistor to VDD. Secure-Lock Disable. Allows communication to the device. Digital Input Output. DIO allows communication with the device. 1MHz Clock Output. The output can be controlled by a configuration bit. Uncommitted Amplifier Output Uncommitted Amplifier Negative Input Uncommitted Amplifier Positive Input Full Span TC Buffered Output Exposed Pad (TQFN Only). Internally connected; connect to VSS. VDDF UNLOCK DIO CLK1M AMPOUT AMPAMP+ FSOTC EP Detailed Description The MAX1452 provides amplification, calibration, and temperature compensation to enable an overall performance approaching the inherent repeatability of the sensor. The fully analog signal-path introduces no quantization noise in the output signal while enabling digitally controlled trimming with the integrated 16-bit DACs. Offset and span can be calibrated to within ±0.02% of span. The MAX1452 architecture includes a programmable sensor excitation, a 16-step programmable-gain amplifier (PGA), a 768-byte (6144 bits) internal EEPROM, four 16-bit DACs, an uncommitted op amp, and an on-chip temperature sensor.The MAX1452 also provides a unique temperature compensation strategy for offset TC and FSOTC that was developed to provide a remarkable degree of flexibility while minimizing testing costs. The customer can select from one to 114 temperature points to compensate their sensor. This allows the latitude to compensate a sensor with a simple first order linear correction or match an unusual temperature curve. Programming up to 114 independent 16-bit EEPROM locations corrects performance in 1.5°C temperature increments over a range of -40°C to +125°C. For sensors that exhibit a characteristic temperature performance, a select number of calibration points can be used with a number of preset values that define the temperature curve. In cases where the sensor is at a different temperature than the MAX1452, the MAX1452 uses the sensor bridge itself to provide additional temperature correction. 6 The single pin, serial Digital Input-Output (DIO) communication architecture and the ability to timeshare its activity with the sensor’s output signal enables output sensing and calibration programming on a single line by parallel connecting OUT and DIO. The MAX1452 provides a Secure-Lock feature that allows the customer to prevent modification of sensor coefficients and the 52-byte user definable EEPROM data after the sensor has been calibrated. The Secure-Lock feature also provides a hardware override to enable factory rework and recalibration by assertion of logic high on the UNLOCK pin. The MAX1452 allows complete calibration and sensor verification to be performed at a single test station. Once calibration coefficients have been stored in the MAX1452, the customer can choose to retest in order to verify performance as part of a regular QA audit or to generate final test data on individual sensors. The MAX1452’s low current consumption and the integrated uncommitted op amp enables a 4–20mA output signal format in a sensor that is completely powered from a 2-wire current loop. Frequency response can be user-adjusted to values lower than the 3.2kHz bandwidth by using the uncommitted op amp and simple passive components. The MAX1452 (Figure 1) provides an analog amplification path for the sensor signal. It also uses an analog architecture for first-order temperature correction. A digitally controlled analog path is then used for nonlinear temperature correction. Calibration and correction is achieved by varying the offset and gain of a programmable-gain-amplifier (PGA) and by varying the _______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner VDD Offset Correction Initial offset correction is accomplished at the input stage of the signal gain amplifiers by a coarse offset setting. Final offset correction occurs through the use of a temperature indexed lookup table with 176 16-bit entries. The on-chip temperature sensor provides a unique 16-bit offset trim value from the table with an indexing resolution of approximately 1.5°C from -40°C to +125°C. Every millisecond, the on-chip temperature sensor provides indexing into the offset lookup table in EEPROM and the resulting value transferred to the offset DAC register. The resulting voltage is fed into a summing junction at the PGA output, compensating the sensor offset with a resolution of ±76µV (±0.0019% FSO). If the offset TC DAC is set to zero then the maximum temperature error is equivalent to one degree of temperature drift of the sensor, given the Offset DAC has corrected the sensor at every 1.5°C. The temperature indexing boundaries are outside of the specified Absolute Maximum Ratings . The minimum indexing value is 00hex corresponding to approximately -69°C. All temperatures below this value output the coefficient value at index 00hex. The maximum indexing value is AFhex, which is the highest lookup table entry. All temperatures higher than approximately 184°C output the highest lookup table index value. No indexing wraparound errors are produced. MAX1452 VDD IRO DAC INP BIAS GENERATOR MAX1452 OSCILLATOR CLK1M TEST OUT ∑ INM ISRC BDR CURRENT SOURCE PGA ANAMUX A=1 16 BIT DAC - FSO (176) POINT 16 BIT DAC - OFFSET (176) 16 BIT DAC - OFFSET TC 16 BIT DAC - FSO TC FSOTC TEMP SENSOR 8-BIT ADC VDDF DIO UNLOCK INTERNAL EEPROM 6144 BITS 416 BITS FOR USER VDD AMP+ AMP- 176 TEMPERATURE LOOK UP POINTS FOR OFFSET AND SPAN. BDR OP-AMP AMPOUT VSS Figure 1. Functional Diagram FSO Correction Two functional blocks control the FSO gain calibration. First, a coarse gain is set by digitally selecting the gain of the PGA. Second, FSO DAC sets the sensor bridge current or voltage with the digital input obtained from a temperature-indexed reference to the FSO lookup table in EEPROM. FSO correction occurs through the use of a temperature indexed lookup table with 176 16-bit entries. The on-chip temperature sensor provides a unique FSO trim from the table with an indexing resolution approaching one 16-bit value at every 1.5°C from -40°C to +125°C. The temperature indexing boundaries are outside of the specified A bsolute Maximum Ratings. The minimum indexing value is 00hex corresponding to approximately -69°C. All temperatures below this value output the coefficient value at index 00hex. The maximum indexing value is AFhex, which is the highest lookup table entry. All temperatures higher than approximately 184°C output the highest lookup table index value. No indexing wrap-around errors are produced. sensor bridge excitation current or voltage. The PGA utilizes a switched capacitor CMOS technology, with an input referred offset trimming range of more than ±150mV with an approximate 3µV resolution (16 bits). The PGA provides gain values from 39V/V to 234V/V in 16 steps. The MAX1452 uses four 16-bit DACs with calibration coefficients stored by the user in an internal 768 x 8 EEPROM (6144 bits). This memory contains the following information, as 16-bit wide words: • Configuration Register • • • • • Offset Calibration Coefficient Table Offset Temperature Coefficient Register FSO (Full-Span Output) Calibration Table FSO Temperature Error Correction Coefficient Register 52 bytes (416 bits) uncommitted for customer programming of manufacturing data (e.g., serial number and date) _______________________________________________________________________________________ 7 Low-Cost Precision Sensor Signal Conditioner MAX1452 Linear and Nonlinear Temperature Compensation Writing 16-bit calibration coefficients into the offset TC and FSOTC registers compensates first-order temperature errors. The piezoresistive sensor is powered by a current source resulting in a temperature-dependent bridge voltage due to the sensor's temperature resistance coefficient (TCR). The reference inputs of the offset TC DAC and FSOTC DAC are connected to the bridge voltage. The DAC output voltages track the bridge voltage as it varies with temperature, and by varying the offset TC and FSOTC digital code a portion of the bridge voltage, which is temperature dependent, is used to compensate the first order temperature errors. The internal feedback resistors (RISRC and RSTC) for FSO temperature compensation are optimized to 75kΩ for silicon piezoresistive sensors. However, since the required feedback resistor values are sensor dependent, external resistors may also be used. The internal resistors selection bit in the configuration register selects between internal and external feedback resistors. To calculate the required offset TC and FSOTC compensation coefficients, two test-temperatures are needed. After taking at least two measurements at each temperature, calibration software (in a host computer) calculates the correction coefficients and writes them to the internal EEPROM. With coefficients ranging from 0000hex to FFFFhex and a +5V reference, each DAC has a resolution of 76µV. Two of the DACs (offset TC and FSOTC) utilize the sensor bridge voltage as a reference. Since the sensor bridge voltage is approximately set to +2.5V the FSOTC and offset TC exhibit a step size of less than 38µV. For high accuracy applications (errors less than 0.25%), the first-order offset and FSOTC should be compensated with the offset TC and FSOTC DACs, and the residual higher order terms with the lookup table. The offset and FSO compensation DACs provide unique compensation values for approximately 1.5°C of temperature change as the temperature indexes the address pointer through the coefficient lookup table. Changing the offset does not effect the FSO, however changing the FSO affects the offset due to nature of the bridge. The temperature is measured on both the MAX1452 die and at the bridge sensor. It is recommended to compensate the first-order temperature errors using the bridge sensor temperature. Typical Ratiometric Operating Circuit Ratiometric output configuration provides an output that is proportional to the power supply voltage. This output can then be applied to a ratiometric ADC to produce a digital value independent of supply voltage. Ratiometricity is an important consideration for batteryoperated instruments, automotive, and some industrial applications. The MAX1452 provides a high-performance ratiometric output with a minimum number of external components (Figure 2). These external components include the following: • One supply bypass capacitor. • • One optional output EMI suppression capacitor. Two optional resistors, RISRC and RSTC, for special sensor bridge types. 7 5 6 VDD BDR INP VDDF 9 +5V VDD OUT 2 MAX1452 16 FSOTC OUT SENSOR 4 INM ISRC TEST VSS 8 3 1 RSTC RISRC 0.1μF 0.1μF GND Figure 2. Basic Ratiometric Output Configuration 8 _______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 G 2N4392 1 S D IN MAX15006B 8 7 5 6 VDD BDR INP VDDF 9 30Ω OUT GND 5 VPWR +12V TO +40V OUT 2 MAX1452 16 FSOTC OUT SENSOR 4 INM ISRC TEST VSS 8 3 1 RSTC RISRC 1.0μF 2.2μF 0.1μF 0.1μF GND Figure 3. Basic Nonratiometric Output Configuration Typical Nonratiometric Operating Circuit (12VDC < VPWR < 40VDC) Nonratiometric output configuration enables the sensor power to vary over a wide range. A high performance voltage reference, such as the MAX15006B, is incorporated in the circuit to provide a stable supply and reference for MAX1452 operation. A typical example is shown in Figure 3. Nonratiometric operation is valuable when wide ranges of input voltage are to be expected and the system A/D or readout device does not enable ratiometric operation. Internal Calibration Registers (ICRs) The MAX1452 has five 16-bit internal calibration registers that are loaded from EEPROM, or loaded from the serial digital interface. Data can be loaded into the internal calibration registers under three different circumstances. Normal Operation, Power-On Initialization Sequence • The MAX1452 has been calibrated, the SecureLock byte is set (CL[7:0] = FFhex) and UNLOCK is low. • • • • Power is applied to the device. The power-on-reset functions have completed. Registers CONFIG, OTCDAC, and FSOTCDAC are refreshed from EEPROM. Registers ODAC, and FSODAC are refreshed from the temperature indexed EEPROM locations. Typical 2-Wire, Loop Powered, 4–20mA Operating Circuit Process Control systems benefit from a 4–20mA current loop output format for noise immunity, long cable runs, and 2-wire sensor operation. The loop voltages can range from 12VDC to 40VDC and are inherently nonratiometric. The low current consumption of the MAX1452 allows it to operate from loop power with a simple 4–20mA drive circuit efficiently generated using the integrated uncommitted op amp (Figure 4). Normal Operation, Continuous Refresh • The MAX1452 has been calibrated, the SecureLock byte has been set (CL[7:0] = FFhex) and UNLOCK is low. • • • Power is applied to the device. The power-on-reset functions have completed. The temperature index timer reaches a 1ms time period. 9 _______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 2N4392 G D 100Ω S IN MAX15006B 8 7 5 6 VDD BDR INP VDDF FSOTC MAX1452 4 ISRC INM 2 13 14 15 0.1μF 4.99kΩ 1 RISRC 4.99MΩ 499kΩ 0.1μF 2N2222A OUT AMPOUT AMPAMP+ TEST VSS 8 3 9 16 1.0μF 2.2μF 0.1μF 30Ω OUT GND 5 1 Z1 VIN+ +12V TO +40V RSTC SENSOR 100kΩ 100kΩ 47Ω VIN- Figure 4. Basic 4–20mA Output, Loop-Powered Configuration • • Registers CONFIG, OTCDAC, and FSOTCDAC are refreshed from EEPROM. Registers ODAC and FSODAC are refreshed from the temperature indexed EEPROM locations. Calibration Operation, Registers Updated by Serial Communications • The MAX1452 has not had the Secure-Lock byte set (CL[7:0] = 00hex) or UNLOCK is high. • • • Power is applied to the device. The power-on-reset functions have completed. The registers can then be loaded from the serial digital interface by use of serial commands. See the section on Serial I/O and Commands. page. Each page can be individually erased. The memory structure is arranged as shown in Table 1. The lookup tables for ODAC and FSODAC are also shown, with the respective temp-index pointer. Note that the ODAC table occupies a continuous segment, from address 000hex to address 15Fhex, whereas the FSODAC table is divided in two parts, from 200hex to 2FFhex, and from 1A0hex to 1FFhex. With the exception of the general purpose user bytes, all values are 16-bit wide words formed by two adjacent byte locations (high byte and low byte). The MAX1452 compensates for sensor offset, FSO, and temperature errors by loading the internal calibration registers with the compensation values. These compensation values can be loaded to registers directly through the serial digital interface during calibration or loaded automatically from EEPROM at power-on. In this way the device can be tested and configured during calibration and test and the appropriate compensation values Internal EEPROM The internal EEPROM is organized as a 768 by 8-bit memory. It is divided into 12 pages, with 64 bytes per 10 ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 Table 1. EEPROM Memory Address Map PAGE 0 1 2 3 4 LOW-BYTE ADDRESS (hex) 000 03E 040 07E 080 0BE 0C0 0FE 100 13E 140 15E 160 162 5 164 166 168 16A 16C 17E 180 19E 6 1A0 1BE 7 8 9 A B 1C0 1FE 200 23E 240 27E 280 2BE 2C0 2FE HIGH-BYTE ADDRESS (hex) 001 03F 041 07F 081 0BF 0C1 0FF 101 13F 141 15F 161 163 165 167 169 16B 16D 17F 181 19F 1A1 1BF 1C1 1FF 201 23F 241 27F 281 2BF 2C1 2FF 80 8F 90 AF to FF 00 1F 20 3F 40 5F 60 7F FSODAC Lookup Table 52 General-Purpose User Bytes TEMP-INDEX[7:0] (hex) 00 1F 20 3F 40 5F 60 7F 80 9F A0 AF to FF Configuration Reserved OTCDAC Reserved FSOTCDAC Control Location ODAC Lookup Table CONTENTS stored in internal EEPROM. The device auto-loads the registers from EEPROM and be ready for use without further configuration after each power-up. The EEPROM is configured as an 8-bit wide array so each of the 16-bit registers is stored as two 8-bit quantities. The configuration register, FSOTCDAC and OTCDAC registers are loaded from the pre-assigned locations in the EEPROM. ______________________________________________________________________________________ 11 Low-Cost Precision Sensor Signal Conditioner MAX1452 The ODAC and FSODAC are loaded from the EEPROM lookup tables using an index pointer that is a function of temperature. An ADC converts the integrated temperature sensor output to an 8-bit value every 1ms. This digitized value is then transferred into the temp-index register. The typical transfer function for the temp-index is as follows: temp-index = 0.6879  Temperature (°C) + 44.0 where temp-index is truncated to an 8-bit integer value. Typical values for the temp-index register are given in Table 6. Note that the EEPROM is byte wide and the registers that are loaded from EEPROM are 16 bits wide. Thus each index value points to two bytes in the EEPROM. Maxim programs all EEPROM locations to FFhex with the exception of the oscillator frequency setting and Secure-Lock byte. OSC[2:0] is in the Configuration Register (Table 3). These bits should be maintained at the factory preset values. Programming 00hex in the Secure-Lock byte (CL[7:0] = 00hex), configures the DIO as an asynchronous serial input for calibration and test purposes. to complete and the DIO pin to be configured by Secure-Lock or the UNLOCK pin. Reinitialization Sequence The MAX1452 allows for relearning the baud rate. The reinitialization sequence is one byte transmission of FFhex, as follows: 11111111011111111111111111 When a serial reinitialization sequence is received, the receive logic resets itself to its power-up state and waits for the initialization sequence. The initialization sequence must follow the reinitialization sequence in order to re-establish the baud rate. Serial Interface Command Format All communication commands into the MAX1452 follow a defined format utilizing an interface register set (IRS). The IRS is an 8-bit command that contains both an interface register set data (IRSD) nibble (4-bit) and an interface register set address (IRSA) nibble (4-bit). All internal calibration registers and EEPROM locations are accessed for read and write through this interface register set. The IRS byte command is structured as follows: IRS[7:0] = IRSD[3:0], IRSA[3:0] Where: • IRSA[3:0] is the 4-bit interface register set address and indicates which register receives the data nibble IRSD[3:0]. • • • IRSA[0] is the first bit on the serial interface after the start bit. IRSD[3:0] is the 4-bit interface register set data. IRSD[0] is the fifth bit received on the serial interface after the start bit. Communication Protocol The DIO serial interface is used for asynchronous serial data communications between the MAX1452 and a host calibration test system or computer. The MAX1452 automatically detects the baud rate of the host computer when the host transmits the initialization sequence. Baud rates between 4800bps and 38,400bps can be detected and used regardless of the internal oscillator frequency setting. Data format is always 1 start bit, 8 data bits, 1 stop bit and no parity. Communications are only allowed when Secure-Lock is disabled (i.e., CL[7:0] = 00hex) or the UNLOCK pin is held high. The IRS address decoding is shown in Table 10. Initialization Sequence S ending the initialization sequence shown below enables the MAX1452 to establish the baud rate that initializes the serial port. The initialization sequence is one byte transmission of 01hex, as follows: 1111111101000000011111111 The first start bit 0 initiates the baud rate synchronization sequence. The 8 data bits 01hex (LSB first) follow this and then the stop bit, which is indicated above as a 1, terminates the baud rate synchronization sequence. This initialization sequence on DIO should occur after a period of 1ms after stable power is applied to the device. This allows time for the power-on-reset function 12 Special Command Sequences A s pecial command register to internal logic (CRIL[3:0]) causes execution of special command sequences within the MAX1452. These command sequences are listed as CRIL command codes as shown in Table 11. Write Examples A 16-bit write to any of the internal calibration registers is performed as follows: 1) Write the 16 data bits to DHR[15:0] using four byte accesses into the interface register set. 2) Write the address of the target internal calibration register to ICRA[3:0]. ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 DRIVEN BY TESTER DIO THREE-STATE NEED WEAK PULLUP DRIVEN BY MAX1452 THREE-STATE NEED WEAK PULLUP 11111 0 1 0 0 11 0 1 0 11 LSB START-BIT STOP-BIT MSB 1111111 1 0 0 0 0 0 1 0 0 0 11 LSB START-BIT MSB STOP-BIT 1111111 11 Figure 5. DIO Output Data Format 3) Write the load internal calibration register (LdICR) command to CRIL[3:0]. When a LdICR command is issued to the CRIL register, the calibration register loaded depends on the address in the internal calibration register address (ICRA). Table 12 specifies which calibration register is decoded. Serial Digital Output When a RdIRS command is written to CRIL[3:0], DIO is configured as a digital output and the contents of the register designated by IRSP[3:0] are sent out as a byte framed by a start bit and a stop bit. Once the tester finishes sending the RdIRS command, it must three-state its connection to DIO to allow the MAX1452 to drive the DIO line. The MAX1452 threestates DIO high for 1 byte time and then drive with the start bit in the next bit period followed by the data byte and stop bit. The sequence is shown in Figure 5. The data returned on a RdIRS command depends on the address in IRSP. Table 13 defines what is returned for the various addresses. Erasing and Writing the EEPROM The internal EEPROM needs to be erased (bytes set to FFhex) prior to programming the desired contents. Remember to save the 3 MSBs of byte 161hex (highbyte of the configuration register) and restore it when programming its contents to prevent modification of the trimmed oscillator frequency. The internal EEPROM can be entirely erased with the ERASE command, or partially erased with the PageErase command (see Table 11, CRIL command). It is necessary to wait 6ms after issuing the ERASE or PageErase command. After the EEPROM bytes have been erased (value of every byte = FFhex), the user can program its contents, following the procedure below: 1) Write the 8 data bits to DHR[7:0] using two byte accesses into the interface register set. 2) Write the address of the target internal EEPROM location to IEEA[9:0] using three byte accesses into the interface register set. 3) Write the EEPROM write command (EEPW) to CRIL[3:0]. Multiplexed Analog Output When a RdAlg command is written to CRIL[3:0] the analog signal designated by ALOC[3:0] is asserted on the OUT pin. The duration of the analog signal is determined by ATIM[3:0] after which the pin reverts to threestate. While the analog signal is asserted in the OUT pin, DIO is simultaneously three-stated, enabling a parallel wiring of DIO and OUT. When DIO and OUT are connected in parallel, the host computer or calibration system must three-state its connection to DIO after asserting the stop bit. Do not load the OUT line when reading internal signals, such as BDR, FSOTC...etc. T he analog output sequence with DIO and OUT is shown in Figure 6. The duration of the analog signal is controlled by ATIM[3:0] as given in Table 14. ______________________________________________________________________________________ 13 Low-Cost Precision Sensor Signal Conditioner MAX1452 DRIVEN BY TESTER DIO THREE-STATE NEED WEAK PULLUP THREE-STATE 2ATIM +1 BYTE TIMES THREE-STATE NEED WEAK PULLUP 11111 0 1 0 0 11 0 1 0 11 LSB START-BIT HIGH IMPEDANCE STOP-BIT MSB 11111111111111111111111111 11 OUT VALID OUT Figure 6. Analog Output Timing The analog signal driven onto the OUT pin is determined by the value in the ALOC register. The signals are specified in Table 15. • • Calibrate the output offset and FSO of the transducer using the ODAC and FSODAC, respectively. Store calibration data in the test computer or MAX1452 EEPROM user memory. Calibrate offset and FSO using the ODAC and FSODAC, respectively. Store calibration data in the test computer or MAX1452 EEPROM user memory. Calculate the correction coefficients. Download correction coefficients to EEPROM. Perform a final test. Test System Configuration The MAX1452 is designed to support an automated production test system with integrated calibration and temperature compensation. Figure 7 shows the implementation concept for a low-cost test system capable of testing many transducer modules connected in parallel. The MAX1452 allows for a high degree of flexibility in system calibration design. This is achieved by use of single-wire digital communication and three-state output nodes. Depending upon specific calibration requirements one may connect all the OUTs in parallel or connect DIO and OUT on each individual module. • • • • • Set next test temperature: Sensor Compensation Overview Compensation requires an examination of the sensor performance over the operating pressure and temperature range. Use a minimum of two test pressures (e.g., zero and full-span) and two temperatures. More test pressures and temperatures result in greater accuracy. A typical compensation procedure can be summarized as follows: Set reference temperature (e.g., +25°C): • Initialize each transducer by loading their respective registers with default coefficients (e.g., based on mean values of offset, FSO and bridge resistance) to prevent overload of the MAX1452. • Set the initial bridge voltage (with the FSODAC) to half of the supply voltage. Measure the bridge voltage using the BDR or OUT pins, or calculate based on measurements. Sensor Calibration and Compensation Example The MAX1452 temperature compensation design corrects both sensor and IC temperature errors. This enables the MAX1452 to provide temperature compensation approaching the inherent repeatability of the sensor. An example of the MAX1452’s capabilities is shown in Figure 8. A repeatable piezoresistive sensor with an initial offset of 16.4mV and a span of 55.8mV was converted into a compensated transducer (utilizing the piezoresistive sensor with the MAX1452) with an offset of 0.5000V and a span of 4.0000V. Nonlinear sensor offset and FSO temperature errors, which were on the order of 20% to 30% FSO, were reduced to under ±0.1% FSO. The following graphs show the output of the uncompensated sensor and the output of the compensated transducer. Six temperature points were used to obtain this result. 14 ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 DIGITAL MULTIPLEXER DIO[1:N] DIO1 DIO2 DION MODULE 1 MODULE 2 MODULE N MAX1452 MAX1452 DATA VOUT +5V VDD VSS VDD DATA VOUT VSS VDD VOUT VSS VOUT DVM TEST OVEN Figure 7. Automated Test System Concept MAX1452 Evaluation Kit To expedite the development of MAX1452 based transducers and test systems, Maxim has produced the MAX1452 evaluation kit (EV kit). First-time users of the MAX1452 are strongly encouraged to use this kit. The EV kit is designed to facilitate manual programming of the MAX1452 with a sensor. It includes the following: 1) Evaluation Board with or without a silicon pressure sensor, ready for customer evaluation. 2) Design/Applications Manual, which describes in detail the architecture and functionality of the MAX1452. This manual was developed for test engineers familiar with data acquisition of sensor data and provides sensor compensation algorithms and test procedures. 3) MAX1452 Communication Software, which enables programming of the MAX1452 from a computer keyboard (IBM compatible), one module at a time. 4) Interface Adapter, which allows the connection of the evaluation board to a PC serial port. ______________________________________________________________________________________ MAX1452 15 Low-Cost Precision Sensor Signal Conditioner MAX1452 80 VOUT (mV) 60 40 6 0 0 20 40 60 80 100 RAW SENSOR OUTPUT TA = +25°C ERROR (% FSO) 30.0 20.0 10.0 0.0 -10.0 -20.0 -50 UNCOMPENSATED SENSOR TEMPERATURE ERROR FSO OFFSET 0 50 TEMPERATURE (°C) 100 150 PRESSURE (kPs) COMPENSATED TRANSDUCER ERROR ERROR (% FSO) 0.15 0.1 0.05 0 -0.05 -0.1 -0.15 -50 0 50 100 TEMPERATURE (°C) 150 FSO OFFSET VOUT (V) 5.0 4.0 3.0 2.0 1.0 0 0 COMPENSATED TRANSDUCER TA = +25°C 20 40 60 PRESSURE (kPs) 80 100 Figure 8. Comparison of an Uncalibrated Sensor and a Calibrated Transducer Table 2. Registers REGISTER CONFIG ODAC OTCDAC FSODAC FSOTCDAC Configuration Register Offset DAC Register Offset Temperature Coefficient DAC Register Full Span Output DAC Register Full Span Output Temperature Coefficient DAC Register DESCRIPTION 16 ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 Table 3. Configuration Register (CONFIG[15:0]) FIELD 15:13 12 11 10 9 8:6 5:2 1 0 NAME OSC[2:0] REXT CLK1M EN PGA Sign IRO Sign IRO[2:0] PGA[3:0] ODAC Sign OTCDAC Sign DESCRIPTION Oscillator frequency setting. Factory preset, do not change. Logic ‘1’ selects external RISRC and RSTC. Logic ‘1’ enables CLK1M output driver. Logic ‘1’ inverts INM and INP polarity. Logic ‘1’ for positive input referred offset (IRO). Logic ‘0’ for negative input referred offset (IRO). Input referred coarse offset adjustment. Programmable gain amplifier setting. Logic ‘1’ for positive offset DAC output. Logic ‘0’ for negative offset DAC output. Logic ‘1’ for positive offset TC DAC output. Logic ‘0’ for negative offset TC DAC output. Table 4. Input Referred Offset (IRO[2:0]) IRO SIGN, IRO[2:0] 1,111 1,110 1,101 1,100 1,011 1,010 1,001 1,000 0,000 0,001 0,010 0,011 0,100 0,101 0,110 0,111 INPUT REFERRED OFFSET CORRECTION AS % OF VDD +1.25 +1.08 +0.90 +0.72 +0.54 +0.36 +0.18 0 0 -0.18 -0.36 -0.54 -0.72 -0.90 -1.08 -1.25 INPUT REFERRED OFFSET, CORRECTION AT VDD = 5VDC IN mV +63 +54 +45 +36 +27 +18 +9 0 0 -9 -18 -27 -36 -45 -54 -63 ______________________________________________________________________________________ 17 Low-Cost Precision Sensor Signal Conditioner MAX1452 Table 5. PGA Gain Setting (PGA[3:0]) PGA[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 PGA GAIN (V/V) 39 52 65 78 91 104 117 130 OSC[2:0] 143 156 169 182 195 208 221 234 100 101 110 111 000 001 010 011 OSCILLATOR FREQUENCY -37.5% -28.1% -18.8% -9.4% 1MHz (nominal) +9.4% +18.8% +28.1% -40 25 85 125 Table 6. Temp-Index Typical Values TEMPERATURE (°C) TEMP-INDEX[7:0] DECIMAL 20 65 106 134 HEXADECIMAL 14 41 6A 86 Table 7. Oscillator Frequency Setting Table 8. EEPROM ODAC and FSODAC Lookup Table Memory Map TEMP-INDEX[7:0] 00hex to 7Fhex 80hex to AFhex EEPROM ADDRESS ODAC LOW BYTE AND HIGH BYTE 000hex and 001hex to 0FEhex and 0FFhex 100hex and 101hex to 15Ehex and 15Fhex EEPROM ADDRESS FSODAC LOW BYTE AND HIGH BYTE 200hex and 201hex to 2FEhex and 2FFhex 1A0hex and 1A1hex to 1FEhex and 1FFhex 18 ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 Table 9. Control Location (CL[15:0]) FIELD 15:8 7:0 NAME CL[15:8] CL[7:0] Reserved Control Location. Secure-Lock is activated by setting this to FFhex which disables DIO serial communications and connects OUT to PGA output. DESCRIPTION Table 10. IRSA Decoding IRSA[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 to 1110 1111 DESCRIPTION Write IRSD[3:0] to DHR[3:0] (data hold register) Write IRSD[3:0] to DHR[7:4] (data hold register) Write IRSD[3:0] to DHR[11:8] (data hold register) Write IRSD[3:0] to DHR[15:12] (data hold register) Reserved Reserved Write IRSD[3:0] to ICRA[3:0] or IEEA[3:0], (internal calibration register address or internal EEPROM address nibble 0) Write IRSD[3:0] to IEEA[7:4] (internal EEPROM address, nibble 1) Write IRSD[3:0] to IRSP[3:0] or IEEA[9:8], (interface register set pointer where IRSP[1:0] is IEEA[9:8]) Write IRSD[3:0] to CRIL[3:0] (command register to internal logic) Write IRSD[3:0] to ATIM[3:0] (analog timeout value on read) Write IRSD[3:0] to ALOC[3:0] (analog location) Reserved Write IRSD[3:0] = 1111bin to relearn the baud rate ______________________________________________________________________________________ 19 Low-Cost Precision Sensor Signal Conditioner MAX1452 Table 11. CRIL Command Codes CRIL[3:0] 0000 0001 0010 0011 0100 0101 0110 NAME LdICR EEPW ERASE RdICR RdEEP RdIRS RdAlg DESCRIPTION Load internal calibration register at address given in ICRA with data from DHR[15:0]. EEPROM write of 8 data bits from DHR[7:0] to address location pointed by IEEA [9:0]. Erase all of EEPROM (all bytes equal FFhex). Read internal calibration register as pointed to by ICRA and load data into DHR[15:0]. Read internal EEPROM location and load data into DHR[7:0] pointed by IEEA [9:0]. Read interface register set pointer IRSP[3:0]. See Table 13. Output the multiplexed analog signal onto OUT. The analog location is specified in ALOC[3:0] (Table 15) and the duration (in byte times) that the signal is asserted onto the pin is specified in ATIM[3:0] (Table 14). Erases the page of the EEPROM as pointed by IEEA[9:6]. There are 64 bytes per page and thus 12 pages in the EEPROM. Reserved. 0111 1000 to 1111 PageErase Reserved Table 12. IRCA Decode ICRA[3:0] 0000 0001 0010 0011 0100 0101 0110 to 1111 NAME CONFIG ODAC OTCDAC FSODAC FSOTCDAC Configuration Register Offset DAC Register Offset Temperature Coefficient DAC Register Full Scale Output DAC Register Full Scale Output Temperature Coefficient DAC Register Reserved. Do not write to this location (EEPROM test). Reserved. Do not write to this location. DESCRIPTION 20 ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner MAX1452 Table 13. IRSP Decode IRSP[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010-1111 DHR[7:0] DHR[15:8] IEEA[7:4], ICRA[3:0] concatenated CRIL[3:0], IRSP[3:0] concatenated ALOC[3:0], ATIM[3:0] concatenated IEEA[7:0] EEPROM address byte IEED[7:0] EEPROM data byte TEMP-Index[7:0] BitClock[7:0] Reserved. Internal flash test data. 11001010 (CAhex). This can be used to test communication. RETURNED VALUE Table 14. ATIM Definition ATIM[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0 DURATION OF ANALOG SIGNAL SPECIFIED IN BYTE TIMES (8-BIT TIME) 2 + 1 = 2 byte times i.e. (2 ✕ 8)/baud rate 21 + 1 = 3 byte times 22 + 1 = 5 byte times 23 + 1 = 9 byte times 24 + 1 = 17 byte times 25 + 1 = 33 byte times 26 + 1 = 65 byte times 27 + 1 = 129 byte times 28 + 1 = 257 byte times 29 + 1 = 513 byte times 210 + 1 = 1025 byte times 211 + 1 = 2049 byte times 212 + 1 = 4097 byte times 213 + 1 = 8193 byte times 214 + 1 = 16,385 byte times In this mode OUT is continuous, however DIO accepts commands after 32,769 byte times. Do not parallel connect DIO to OUT. ______________________________________________________________________________________ 21 Low-Cost Precision Sensor Signal Conditioner MAX1452 Table 15. ALOC Definition ALOC[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 ANALOG SIGNAL OUT BDR ISRC VDD VSS BIAS5U AGND FSODAC FSOTCDAC ODAC OTCDAC VREF VPTATP VPTATM INP INM PGA Output Bridge Drive Bridge Drive Current Setting Internal Positive Supply Internal Ground Internal Test Node Internal Analog Ground. Approximately half of VDD. Full Scale Output DAC Full Scale Output TC DAC Offset DAC Offset TC DAC Bandgap Reference Voltage (nominally 1.25V) Internal Test Node Internal Test Node Sensor’s Positive Input Sensor’s Negative Input DESCRIPTION Table 16. Effects of Compensation TYPICAL UNCOMPENSATED INPUT (SENSOR) Offset…………………..…….…………………………..±100%FSO FSO…………………………….………………………..4 to 60mV/V Offset TC…………………………………………………...20% FSO Offset TC Nonlinearity…..………………………………….4% FSO FSOTC…………………………..………………………..-20% FSO FSOTC Nonlinearity…..……..…………………………….5% FSO Temperature Range..….….……………………..-40°C to +125°C TYPICAL COMPENSATED TRANSDUCER OUTPUT OUT..…….……………………………..Ratiometric to VDD at 5.0V Offset at +25°C……………………………………0.500V ± 200μV FSO at +25°C……………………………………...4.000V ± 200μV Offset accuracy over temp. range….………±4mV (±0.1% FSO) FSO accuracy over temp. range……………±4mV (±0.1% FSO) 22 ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner Detailed Block Diagram MAX1452 EEPROM (LOOKUP PLUS CONFIGURATION DATA) VDD EEPROM ADDRESS VDD FSO DAC ISRC VSS 16-BIT 000H + 001H : 15EH + 15FH 160H + 161H 162H + 163H 164H + 165H 166H + 167H VDD 16-BIT RISRC 75kΩ VSS VDD BANDGAP TEMP SENSOR RSTC 75kΩ OFFSET DAC VSS 168H + 169H 16AH + 16BH 16CH + 16DH : 19EH + 19FH 1A0H + 1A1H : 2FEH + 2FFH 8-BIT LOOKUP ADDRESS UNLOCK DIGITAL INTERFACE DIO FSO DAC LOOKUP TABLE (176 ✕ 16-BITS) VDDF USAGE OFFSET DAC LOOKUP TABLE (176 ✕ 16-BITS) VDD VSS TEST CLK1M CONFIGURATION REGISTER SHADOW RESERVED OFFSET TC REGISTER SHADOW RESERVED FSOTC REGISTER SHADOW CONTROL LOCATION REGISTER USER STORAGE (52 BYTES) ±1 BDR FSOTC FSOTC DAC INP PHASE REVERSAL MUX MUX INM INPUT REFERRED OFFSET (COARSE OFFSET) IRO (3, 2:0) 1,111 1,110 1,101 1,100 1,011 1,010 1,001 1,000 0,000 0,001 0,010 0,011 0,100 0,101 0,110 0,111 OFFSET mV 63 54 45 36 27 18 9 0 0 -9 -18 -27 -36 -45 -54 -63 OTC REGISTER ±1 VSS 16-BIT ΣΔ VSS FSOTC REGISTER PGA BANDWIDTH ≈ 3kHz ± 10% Σ ✕ 26 PGA Σ MUX OUT AMPPROGRAMMABLE GAIN STAGE PGA (3:0) 0000 0001 0010 0011 0100 0101 0110 0111 1000 *INPUT REFERRED OFFSET VALUE IS PROPORTIONAL TO VDD. VALUES GIVEN ARE FOR VDD = 5V. 1001 1010 1011 1100 1101 1110 1111 PGA GAIN 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 TOTAL GAIN 39 52 65 78 91 104 117 130 143 156 169 182 195 208 221 234 UNCOMMITTED OP AMP PARAMETER I/P RANGE I/P OFFSET O/P RANGE NO LOAD 1mA LOAD UNITY GBW VALUE VSS TO VDD ±20mV VSS, VDD ±0.01V VSS, VDD ±0.25V 10MHz TYPICAL AMPOUT VSS 16-BIT OFFSET TC DAC VSS AMP+ PGA BANDWIDTH ≈ 3kHz ± 10% ______________________________________________________________________________________ 23 Low-Cost Precision Sensor Signal Conditioner MAX1452 Pin Configurations FSOTC N.C. N.C. ISRC 1 OUT 2 VSS 3 INM 4 BDR 5 INP 6 VDD 7 TEST 8 + N.C. 16 FSOTC 15 AMP+ 14 AMPMAX1452 13 AMPOUT 12 CLK1M 11 DIO 10 UNLOCK 9 VDDF BDR INP 5 6 ISRC OUT VSS INM 1 24 23 22 21 20 N.C. TOP VIEW 19 18 AMPAMPOUT N.C. CLK1M DIO N.C. + 2 3 4 17 16 MAX1452 AMP+ 15 14 13 12 UNLOCK SSOP/TSSOP 7 VDD 8 N.C. 9 N.C. 10 TEST 11 VDDF TQFN Chip Information SUBSTRATE CONNECTED TO: VSS PACKAGE TYPE 16 SSOP 16 TSSOP 24 TQFN-EP Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE CODE A16-2 U16-2 T2444-4 DOCUMENT NO. 21-0056 21-0066 21-0188 24 ______________________________________________________________________________________ Low-Cost Precision Sensor Signal Conditioner Revision History REVISION NUMBER REVISION DATE DESCRIPTION Added TQFN and TSSOP package information, changed packages to lead free, changed all occurrences of ASIC to MAX1452, changed VDDF RC filter values, recommended a more suitable voltage reference for non-ratiometric application circuits, corrected MAX1452 input range, and added typical EEPROM current requirements to EC table, and added gain nonlinearity graph. PAGES CHANGED MAX1452 2 4/09 1–7, 9, 10, 12, 18, 22, 24 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.