MAX14521E

19-4477; Rev 0; 2/09 KIT ATION EVALU ILABLE AVA Quad, High-Voltage EL Lamp Driver with I2C Interface Features ♦ 300VP-P Maximum Output for Highest Brightness ♦ ESD-Protected EL Lamp Outputs ±15kV Human Body Model ±6kV IEC 61000-4-2 Contact ESD Protection ±8kV IEC 61000-4-2 Air Gap Discharge ♦ 2.7V to 5.5V Input Voltage Range ♦ I2C Interface for Control of Brightness, EL Frequency, Boost Frequency, Shape ♦ Sinusoidal Output for Low Audible Noise ♦ Individual Dimming Control ♦ Individually Adjustable Output Brightness Ramping Rate ♦ ±3% EL Output Frequency Accuracy for Truest EL Panel Color ♦ Audio Input for Dynamic Lighting Effects ♦ Spread-Spectrum Boost Converter ♦ 100nA Shutdown Current ♦ Space-Saving, 4mm x 4mm, 24-Pin TQFN Package General Description The MAX14521E is a quad-output high-voltage DC-AC converter that drives four electroluminescent (EL) lamps. The device features a 2.7V to 5.5V input range that allows the device to accept a variety of voltage sources such as single-cell lithium-ion (Li+) batteries. The lamp outputs of the device generate up to 300VP-P for maximum lamp brightness. The high-voltage outputs are ESD protected up to ±15kV Human Body Model (HBM), ±6kV Contact Discharge, and ±8kV Air Gap Discharge, as specified in IEC 61000-4-2. The MAX14521E uses a high-voltage full-bridge output stage to convert the high voltage generated by the boost converter to a sinusoidal output waveform. The MAX14521E utilizes a high-frequency spread-spectrum oscillator to reduce the amount of EMI/EFI generated by the boost-converter circuit. The MAX14521E provides an I2C interface to set the boost converter and EL output switching frequencies through an 8-bit register and the peak output voltages with 5 bits of resolution. The MAX14521E also provides an adjustable automatic ramping feature that slowly increases or decreases the peak output voltage when a change is made to the output amplitude. The slew rate of the automatic ramp is set with 3 bits of resolution through the I2C interface and it is independent for each channel. The MAX14521E features an audio auxiliary input AUX that modulates the EL output voltage and frequency for dynamic lighting effects. The MAX14521E is available in a small, 4mm x 4mm, 24-pin TQFN package, and specified over the extended -40°C to +85°C operating temperature range. MAX14521E Ordering Information PART MAX14521EETG+ TEMP RANGE -40°C to +85°C PIN-PACKAGE 24 TQFN-EP* Applications Keypad Backlighting LCD Backlighting PDAs Smartphones Automotive Instruments Clusters +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Typical Operating Circuit VDD 0.1μF VBAT LX D 3 6 5 10 TO BASEBAND/PMIC 11 7 8 12 RB GND 15 CS PGND LX SDA SCL A0 A1 EL4 COM AUX 9 VDD EL1 1 EL LAMP1 EL2 23 EL LAMP1 EL LAMP1 Pin Configuration appears on last page 10μF CSN 330pF RSN 20Ω CCS MAX14521E EL3 19 EL LAMP1 17 21 13 AUDIO LINE-IN ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) VDD ........................................................................-0.3V to +6.0V CS, EL1, EL2, EL3, EL4, COM..............................-0.3V to +160V LX ...........................................................................-0.3V to +33V RB, A0, A1, AUX....................................................-0.3V to +6.0V SCL, SDA....................................................-0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 24-Pin TQFN-EP (derate 27.8mW/°C above +70°C)..2222mW Package Junction-to-Ambient Thermal Resistance (θJA) (Note 1) ........................................................................36°C/W Package Junction-to-Case Thermal Resistance (θJC) (Note 1) ..........................................................................3°C/W Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +2.7V to +5.5V, total CLAMP = 10nF, CCS = 3.3nF, tapped inductor = 2.3µH/115µH, 1:7 ratio (ISAT = 0.7A, RS = 1Ω), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C and VDD = 3.7V.) (Note 2) PARAMETER Input Voltage Battery Voltage Input Supply Current SYMBOL VDD VBAT IDD (Note 3) All channels on, 300VP-P, fEL = 200Hz, sinewave output shape RB, A0, A1 = 0V or VDD; SCL = SDA = GND or VDD; not toggling TA = +25°C TA = -40°C to +85°C 350 25 CONDITIONS MIN 2.7 TYP MAX 5.5 13.2 900 100 300 2100 VDD rising 1.6 2.0 70 VEL_ - VCOM; EL_ _[4:0] = 01000; VDD = 3.7V Peak-to-Peak Output Voltage Max Average Output Voltage EL_ High-Side Switch On-Resistance EL_ Low-Side Switch On-Resistance COM High-Side Switch On-Resistance COM Low-Side Switch On-Resistance VP-P VAVG RONHS_EL_ RONLS_EL_ RONHS_COM RONLS_COM VEL_ - VCOM; EL_ _[4:0] = 10000; VDD = 3.7V VEL_ - VCOM; EL_ _[4:0] = 11111; VDD = 3.7V VEL_ - VCOM 66 136 268 78 154 300 1 1270 700 390 175 90 172 320 V Ω Ω Ω Ω V 2.5 nA UNITS V V µA Shutdown Supply Current Shutdown Tapped-Inductor Supply Current Undervoltage Lockout UVLO Hysteresis EL OUTPUTS (EL_, COM) ISHDN ILX_SHDN VUV VUV_HYST nA V mV 2 _______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.5V, total CLAMP = 10nF, CCS = 3.3nF, tapped inductor = 2.3µH/115µH, 1:7 ratio (ISAT = 0.7A, RS = 1Ω), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C and VDD = 3.7V.) (Note 2) PARAMETER EL_ High-Side Switch OffLeakage EL_ Low-Side Switch OffLeakage COM High-Side Switch OffLeakage COM Low-Side Switch OffLeakage SYMBOL ILKGHS_EL_ ILKGLS_EL_ ILKGHS_COM ILKGLS_COM fEL_LR EL Lamp Switching Frequency fEL_HR BOOST CONVERTER EL_ _[4:0] = 01000; VDD = 3.7V Peak Output Voltage Vcs EL_ _[4:0] = 10000; VDD = 3.7V EL_ _[4:0] = 11111; VDD = 3.7V FSW[4:0] = 10000 Tapped-Inductor Center Switching Frequency fSW FSW[4:0] = 11111 FSW[4:0] = 00000 (default) FSW[4:0] = 01111 Tapped-Inductor Switching Frequency Spreading Factor Tapped-Inductor Switching Frequency Modulation Frequency Switch On-Resistance LX Current CS Input Current CONTROL INPUT AUX Input Range Input Capacitance CONTROL INPUT RB Input Logic-Low Voltage Input Logic-High Voltage Input Hysteresis Input Leakage Current Input Capacitance Input Logic-Low Voltage Input Logic-High Voltage Input Hysteresis VIL_RB VIH_RB IHYS_RB ILKG_RB CIN VIL VIH IHYS 1.5 130 VRB = 5.5V or 0 -1 10 0.5 1.5 130 +1 0.5 V V mV µA pF V V mV AUXRNG AUXCAP 0 10 VDD V pF SF fM RLX ILX ICS SS[1:0] = 01, 10, or 11 SS[1:0] = 11 ISINK = 25mA, VDD = 3.7V VLX = 30V No load, VCS = 150V -1 33 68 134 39 77 150 400 800 800 1600 8 fSW/128 3 +10 27 % kHz Ω µA µA kHz 45 86 160 V FEL[7:0] = 1000 0000; VDD = 3.7V FEL[7:0] = 1011 1111; VDD = 3.7V TA = +25°C TA = -40°C to +85°F TA = +25°C TA = -40°C to +85°F CONDITIONS MIN -1 -1 -1 -1 194 186 388 376 200 200 400 400 TYP MAX +1 +1 +1 +1 206 212 412 424 Hz UNITS µA µA µA µA MAX14521E I2C INTERFACE LOGIC (SDA, SCL, A1, AND A0) (Figure 1) _______________________________________________________________________________________ 3 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.5V, total CLAMP = 10nF, CCS = 3.3nF, tapped inductor = 2.3µH/115µH, 1:7 ratio (ISAT = 0.7A, RS = 1Ω), TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C and VDD = 3.7V.) (Note 2) PARAMETER Input Leakage Current Output Low Voltage Input/Output Capacitance Serial-Clock Frequency Clock Low Period Clock High Period Bus Free Time START Setup Time START Hold Time STOP Setup Time Data In Setup Time Data In Hold Time Receive SCL/SDA Minimum Rise Time Receive SCL/SDA Maximum Rise Time Receive SCL/SDA Minimum Fall Time Receive SCL/SDA Maximum Fall Time Transmit SDA Fall Time SCL/SDA Noise Suppression Time ESD PROTECTION Human Body Model EL_, COM THERMAL PROTECTION Thermal Shutdown Thermal Shutdown Hysteresis TSHDN THYST 160 12 °C °C IEC 61000-4-2 Contact Discharge IEC 61000-4-2 Air Gap Discharge ±15 ±6 ±8 kV SYMBOL ILKG VOL CI/O fSCL tLOW tHIGH tBUF tSU,STA tHD,STA tSU,STO tSU,DAT tHD,DAT tR tR tF tF tF tI CB = 400pF 20 + 0.1CB 50 1.3 0.6 1.3 0.6 0.6 0.6 100 0 20 + 0.1CB 300 20 + 0.1CB 300 300 900 ISINK = 3mA 10 400 CONDITIONS MIN -1 TYP MAX +1 0.4 UNITS µA V pF kHz µs µs µs µs µs µs ns ns ns ns ns ns ns ns Note 2: All parameters are 100% production tested at TA = +25°C and TA = +85°C, unless otherwise noted. Parameters at -40°C are guaranteed by design. Note 3: See the fSW Selection section when VBAT is above 5.5V. 4 _______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E SDA tSU, DAT tLOW SCL tHD, STA tR START CONDITION tHIGH tF REPEATED START CONDITION STOP CONDITION START CONDITION tHD, DAT tSU, STA tBUF tHD, STA tSU, STO Figure 1. I2C Timing Specifications Typical Operating Characteristics (VDD = 3.7V, total CLAMP = 10nF, CCS = 3.3nF, LX = 2.3µH/115µH, 1:7 ratio, (ISAT = 0.7A, RS = 1Ω), TA = +25°C, sine-wave output, fSW = 800kHz, fEL = 200Hz, unless otherwise noted.) TOTAL INPUT CURRENT vs. SUPPLY VOLTAGE MAX14521E toc01 TOTAL INPUT CURRENT vs. TEMPERATURE 60 56 52 48 44 40 36 32 28 24 20 16 12 8 4 0 -40 MAX14521E toc02 TOTAL INPUT CURRENT vs. BOOST CONVERTER FREQUENCY VFI = 300VP-P VFI = 200VP-P POINT WHERE SET VEL DECREASES AS FREQUENCY INCREASES MAX14521E toc03 MAX14521E toc06 60 50 40 30 20 10 0 2.7 3.1 3.5 3.9 4.3 80 VFI = 300VP-P VFI = 200VP-P VFI = 300VP-P TOTAL INPUT CURRENT (mA) TOTAL INPUT CURRENT (mA) TOTAL INPUT CURRENT (mA) 60 40 20 0 -15 10 35 60 85 400 600 800 1000 1200 1400 1600 TEMPERATURE (°C) BOOST CONVERTER FREQUENCY (kHz) 4.7 5.1 5.5 SUPPLY VOLTAGE (V) TOTAL INPUT CURRENT vs. LOAD MAX14521E toc04 SHUTDOWN CURRENT vs. SUPPLY VOLTAGE MAX14521E toc05 SHUTDOWN CURRENT vs. TEMPERATURE 100 200 VEL = 250VP-P, fSW = 800kHz, UNLESS OTHERWISE NOTED TOTAL INPUT CURRENT (mA) 160 VDD = 3.3V fSW = 400kHz VEL = 200VP-P VDD = 5V fSW = 700kHz 2 SHUTDOWN CURRENT (nA) 1.5 SHUTDOWN CURRENT (nA) 10 120 1 80 1 40 0.5 0 0 20 40 60 80 TOTAL COMBINED LOAD (nF) 0 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 SUPPLY VOLTAGE (V) 0.1 -40 -15 10 35 60 85 TEMPERATURE (°C) _______________________________________________________________________________________ 5 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E Typical Operating Characteristics (continued) (VDD = 3.7V, total CLAMP = 10nF, CCS = 3.3nF, LX = 2.3µH/115µH, 1:7 ratio, (ISAT = 0.7A, RS = 1Ω), TA = +25°C, sine-wave output, fSW = 800kHz, fEL = 200Hz, unless otherwise noted.) PEAK-TO-PEAK OUTPUT VOLTAGE vs. SUPPLY VOLTAGE PEAK-TO-PEAK OUTPUT VOLTAGE (V) PEAK-TO-PEAK OUTPUT VOLTAGE (V) 240 230 220 210 200 190 180 170 160 150 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 SUPPLY VOLTAGE (V) 190 -40 -15 10 35 60 85 TEMPERATURE (°C) CLOAD = 20nF CLOAD = 10nF VFI = 200VP-P MAX14521E toc07 PEAK-TO-PEAK OUTPUT VOLTAGE vs. TEMPERATURE PEAK-TO-PEAK OUTPUT VOLTAGE (V) VFI = 200VP-P 205 MAX14521E toc08 PEAK-TO-PEAK OUTPUT VOLTAGE vs. CODE MAX14521E toc09 250 210 350 300 250 200 150 100 50 0 0 8 16 24 200 195 32 EL_ _[4:0] CODE (DECIMAL VALUE) AVERAGE OUTPUT VOLTAGE vs. SUPPLY VOLTAGE MAX14521E toc10 AVERAGE OUTPUT VOLTAGE vs. TEMPERATURE MAX14521E toc11 EL SWITCHING FREQUENCY vs. FEL[7:0] 900 EL SWITCHING FREQUENCY (Hz) 800 700 600 500 400 300 200 100 0 MAX14521E toc12 0 -100 AVERAGE OUTPUT VOLTAGE (mV) -200 -300 -400 -500 -600 -700 -800 -900 -1000 2.7 3.1 3.5 3.9 4.3 4.7 5.1 0 -100 AVERAGE OUTPUT VOLTAGE (mV) -200 -300 -400 -500 -600 -700 -800 -900 -1000 1000 5.5 -40 -15 10 35 60 85 0 64 128 192 256 SUPPLY VOLTAGE (V) TEMPERATURE (°C) FEL[7:0] CODE (DECIMAL VALUE) EL SWITCHING FREQUENCY vs. SUPPLY VOLTAGE MAX14521E toc13 EL SWITCHING FREQUENCY vs. TEMPERATURE BOOST CONVERTER FREQUENCY (kHz) VFI = 200VP-P EL SWITCHING FREQUENCY (Hz) 205 MAX14521E toc14 BOOST CONVERTER FREQUENCY vs. FSW[4:0] 1600 1400 1200 1000 800 600 400 200 0 0 4 8 12 16 20 24 28 32 MAX14521E toc15 210 EL SWITCHING FREQUENCY (Hz) 210 1800 205 200 200 195 195 190 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 SUPPLY VOLTAGE (V) 190 -40 -15 10 35 60 85 TEMPERATURE (°C) FSW[4:0] CODE (DECIMAL VALUE) 6 _______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface Typical Operating Characteristics (continued) (VDD = 3.7V, total CLAMP = 10nF, CCS = 3.3nF, LX = 2.3µH/115µH, 1:7 ratio, (ISAT = 0.7A, RS = 1Ω), TA = +25°C, sine-wave output, fSW = 800kHz, fEL = 200Hz, unless otherwise noted.) NORMALIZED BRIGHTNESS vs. SUPPLY VOLTAGE MAX14521E toc16 MAX14521E toc17 MAX14521E RAMP TIME vs. CODE 2000 2 BOOST CONVERTER MAGNITUDE vs. FREQUENCY (SPREAD SPECTRUM DISABLED) BOOST CONVERTER MAGNITUDE (dBV) RBW = 100Hz fSW = 1.6MHz VEL = 300VP-P SS[1:0] = 00 MAX14521E toc18 0 VFI = 200VP-P NORMALIZED BRIGHTNESS 1.5 1500 RAMP TIME (ms) -20 -40 1000 1 -60 500 0.5 -80 0 0 2 4 6 8 RT_ _[2:0] CODE (DECIMAL VALUE) 0 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 SUPPLY VOLTAGE (V) -100 0 10 FREQUENCY (MHz) 100 BOOST CONVERTER MAGNITUDE vs. FREQUENCY (SPREAD SPECTRUM ENABLED) BOOST CONVERTER MAGNITUDE (dBV) RBW = 100Hz fSW = 1.6MHz VEL = 300VP-P SS[1:0] = 10 MAX14521E toc19 SCOPE SHOT WITH SL[1:0] = 00 MAX14521E toc20 SCOPE SHOT WITH SL[1:0] = 01 MAX14521E toc21 0 -20 Math Freq 201.7 Hz Math Pk-Pk 205 V Math Freq 201.3 Hz Math Pk-Pk 208 V -40 -60 -80 -100 0 10 FREQUENCY (MHz) 100 SCOPE SHOT WITH SL[1:0] = 10 MAX14521E toc22 SCOPE SHOT WITH SL[1:0] = 11 MAX14521E toc23 RAMPING TIME MAX14521E toc24 Math Freq 201.8 Hz Math Pk-Pk 208 V Math Freq 202.0 Hz Math Pk-Pk 208 V Math Pk-Pk 298 V VEL 50V/div 1s/div _______________________________________________________________________________________ 7 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E Pin Description PIN 1 2, 4, 16, 18, 20, 22, 24 3 5 6 7 8 9 10 11 12 13 14 15 17 19 21 23 — NAME EL1 N.C. CS LX PGND A0 A1 VDD SDA SCL RB AUX I.C. GND EL4 EL3 COM EL2 EP FUNCTION High-Voltage EL Panel Output 1. Connect EL1 to segment 1 of the EL lamp. No Connection. Not internally connected. Feedback Connection. Connect CS to the output of the boost converter (cathode of the rectifying diode). Internal Switching DMOS Drain Connection. Connect LX to the middle terminal of the tapped inductor. Power Ground. Connect to GND. Address Input 0. Address inputs allow up to four connections on one common bus. Connect A0 to GND or VDD. Address Input 1. Address inputs allow up to four connections on one common bus. Connect A1 to GND or VDD. Input Supply Voltage Open-Drain, Serial Data Input/Output. SDA requires an external pullup resistor. Serial-Clock Input. SCL requires an external pullup resistor. Reset Input. Drive RB low to clear all registers to zero and put the device into a low-power shutdown mode. The device does not respond to I2C communications when RB is held low. Audio Effects Input. Modulates amplitude/frequency of the EL output with the AUX input voltage amplitude. Internally Connected. Connect I.C. to GND. Ground High-Voltage EL Panel Output 4. Connect EL4 to segment 4 of the EL lamp. High-Voltage EL Panel Output 3. Connect EL3 to segment 3 of the EL lamp. High-Voltage COM Output. Connect COM to common terminal of the EL lamp. High-Voltage EL Panel Output 2. Connect EL2 to segment 2 of the EL lamp. Exposed Pad. Connect EP to GND. Detailed Description The MAX14521E is a quad-output high-voltage DC-AC converter that drives four EL lamps. The device features a 2.7V to 5.5V input range that allows the device to accept a variety of sources such as single-cell Li+ batteries. The lamp outputs of the device generate up to 300VP-P for maximum lamp brightness. The MAX14521E utilizes a high-frequency spreadspectrum boost converter that reduces the amount of EMI/EFI generated by the circuit. The boost-converter switching frequency is set with an 8-bit register through the I2C interface. The MAX14521E uses a high-voltage full-bridge output stage to convert the high voltage generated by the boost converter to an AC waveform suitable for driving an EL lamp. An internal register controlled through the I2C interface sets the shape of the EL output waveshape. The EL output switching frequency for all outputs is set with an 8-bit register through the I2C interface. The MAX14521E provides a serial digital interface that allows the user to set the peak voltage of each output independently with 5 bits of resolution. The MAX14521E also provides an adjustable automatic ramping feature that slowly increases or decreases the peak output voltage when the set value is changed. The slew rate of the ramp is set with 3 bits of resolution through the I2C interface and it is independent for each channel. The MAX14521E features an audio auxiliary input AUX that modulates the EL output voltage and frequency for dynamic lighting effects. The high-voltage outputs are ESD protected up to ±15kV Human Body Model, ±8kV Air Gap Discharge, and ±6kV Contact Discharge, as specified in IEC 61000-4-2. 8 _______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface Functional Diagram LX PGND CS MAX14521E HALF H-BRIDGE VDD SPREAD SPECTRUM AND SOFT-START fSW OSCILLATOR HIGH ESD PROT COM HALF H-BRIDGE MAX14521E FEL OSC SHAPE CONTROL VSENSE HIGH ESD PROT EL1 HALF H-BRIDGE DMOS DRIVER THERMAL SHUTDOWN UVLO NO-OPERATION SIGNAL HIGH ESD PROT EL2 HALF H-BRIDGE SHDN AUX PWM CONVERTER EL PEAK CONTROL HIGH ESD PROT EL3 HALF H-BRIDGE HIGH ESD PROT EL4 RB I2C SDA SCL A1 A0 GND EL Output Voltage The shape, slope, frequency, ramp-on/-off times, and peak-to-peak voltage of the MAX14521E lamp outputs are programmed using internal registers. The MAX14521E is capable of producing output waveforms with varying shapes and slew rates. The user sets the shape and slew rate of the output using bits in the EL shape registers. The MAX14521E EL lamp output frequency uses an internal EL oscillator to set the desired frequency. The output frequency is adjusted by the FEL[7:0] bits of the EL output frequency register. The EL frequency increases and decreases linearly with FEL[7:0]. The peak-to-peak voltage of the EL lamp output is varied from 0 to 300VP-P by programming the EL_ _[4:0] bits of the EL ramping time and EL peak voltage registers. The peak-to-peak voltage increases and decreases linearly with EL_ _[4:0]. The MAX14521E also features a slow fade-on and slow fade-off time feature programmed by the RT_ _ [2:0] bits of the EL ramping time and EL peak voltage registers. This slow fade-on/-off feature causes the peak-topeak voltage of the EL outputs to slowly rise from the previously set value to the maximum set value. This feature also causes the peak-to-peak voltage of the EL outputs to fall from the maximum set value to zero when the device is placed into shutdown. The slow rise and fall of the peak-to-peak EL output voltage creates a soft fade-on and fade-off of the EL lamp. 9 _______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E Boost Converter The MAX14521E boost converter consists of an external-tapped inductor from VDD to the LX input, an internal DMOS switch, an external diode from the secondary of the tapped inductor to the CS output, an external capacitor from the CS output to GND, and an EL lamp connected to the EL lamp outputs. When the DMOS switch is turned on, LX is connected to GND, and the inductor is charged. When the DMOS switch is turned off, the energy stored in the inductor is transferred to the capacitor CCS and the EL lamp. Note: The MAX14521E exhibits high-voltage spikes on the LX node. The addition of a snubber circuit to the LX node protects the device by suppressing the highvoltage spikes. The values of RSN and CSN should be optimized for the specific tapped inductor used. Typical values are RSN = 20Ω and CSN = 330pF. The MAX14521E boost-converter frequency uses an internal oscillator to set the frequency of the boost converter. The oscillator frequency is adjusted by the FSW[4:0] bits of the boost-converter frequency register. The boost converter increases and decreases linearly with FSW[3:0]. To further reduce the amount of EMI/EFI generated by the circuit, the boost-converter frequency can be modulated (see the SS[1:0] bits of the boost-converter frequency register). Enabling modulation spreads the switching energy of the oscillator in the frequency domain, thus decreasing EMI. Auxiliary Audio Input (AUX) The MAX14521E uses an auxiliary input AUX that accepts an audio signal to produce visual effects on the EL outputs. The frequency and amplitude modulation (FR_AM) bit is set to modulate the EL output voltage or frequency. The AUX audio signal modulates the EL output voltage when FR_AM is set to 0 and modulates the EL output frequency when FR_AM is set to 1. When the NO_SAMPLE bit is enabled, the voltage of the EL outputs is proportional to the voltage at AUX. For example, when FR_AM = 0, NO_SAMPLE = 1, and any of the AU1, AU2, AU3, AU4 bits are set to 1, the peak value of those particular channels follow AUX directly. If AUX is a DC value, the EL output voltage is VEL = 250 x AUX (VP-P) with a maximum of 300VP-P. AUX can also accept a PWM signal with a frequency ranging from 100kHz to 10MHz, where the EL output voltage is V EL = 300 x DutyCycle% (V P-P ). The NO_SAMPLE bit has no effect when FR_AM = 1. When FR_AM = 1, frequency modulation is enabled and the AUXDIV1 and AUXDIV0 bits are used to divide the audio frequency and apply this to the EL outputs. AU1, AU2, AU3, and AU4 must be set to 1 to enable this feature. Shutdown The MAX14521E features two methods to place the device in shutdown: 1) a reset input, RB, to clear all registers to zero and put the device into low-power shutdown mode, and 2) the EN bit of the system register. Using method 1, the device does not respond to I 2 C communications when RB is held low. Using method 2, the EL outputs are shut down; however, the register contents remain unchanged. Independent Dimming Control The brightness of an EL lamp is proportional to the peak-to-peak voltage applied across the lamp. The MAX14521E provides four registers to control the EL peak-to-peak voltage of each EL output using the EL_ _[4:0] bits of the EL ramping time and EL peak voltage registers. Undervoltage Lockout (UVLO) The MAX14521E has a UVLO threshold of +2.0V (typ). When VDD falls below +2.0V (typ), the device enters a nonoperative mode. The contents of the I2C registers are not guaranteed below UVLO. EL Output Waveshape The MAX14521E can produce sine-wave to squarewave waveshapes on the EL output by varying the slope of the EL output. This is achieved by using bits SL[1:0] of the EL shape register. If the EL shape configuration is set to sine and if all EL outputs have the same amplitude settings, then each EL output has a sinusoidal waveshape. If the EL outputs have different amplitude settings, then the EL output with the highest setting has a sine waveshape while the remaining EL outputs have a clamped sine waveshape. Thermal Protection The MAX14521E enters a nonoperative mode if the internal die temperature of the device reaches or exceeds +160°C (typ). The MAX14521E is latched, and only placing RB to 0 resets the thermal protection bit as well as all registers. 10 ______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface I2C Registers and Bit Descriptions Ten internal registers program the MAX14521E. Table 1 lists all the registers, their addresses, and power-on reset states. All registers are read/write. Register 0x0A is reserved as a command to update all EL peak voltage output registers. Register 0x0B is reserved and should not be written to. MAX14521E Table 1. Register Map REGISTER SYSTEM Device ID Power Mode EL FREQUENCY EL Output Frequency EL SHAPE Slope/Shape X ENDAMP X X SHAPE1 SHAPE0 SL1 SL0 0x03 0x00 FEL7 FEL6 FEL5 FEL4 FEL3 FEL2 FEL1 FEL0 0x02 0x00 DEVID3 DEVID2 DEVID1 DEVID0 OVR TEMP* X X X REV3 X REV2 X REV1 X REV0 EN 0x00 0x01 0xB2 0x00 B7 B6 B5 B4 B3 B2 B1 B0 REGISTER ADDRESS POWER-ON RESET STATE BOOST-CONVERTER FREQUENCY Boost-Converter Frequency AUDIO Audio Effects FR_AM NO_ AUXDIV1 AUXDIV0 SAMPLE AU4 AU3 AU2 AU1 0x05 0x00 SS1 SS0 X FSW4 FSW3 FSW2 FSW1 FSW0 0x04 0x00 EL RAMPING TIME AND EL PEAK VOLTAGE EL1 Ramping Time and EL Peak Voltage** EL2 Ramping Time and EL Peak Voltage** EL3 Ramping Time and EL Peak Voltage** EL4 Ramping Time and EL Peak Voltage** RT1_2 RT1_1 RT1_0 EL1_4 EL1_3 EL1_2 EL1_1 EL1_0 0x06 0x00 RT2_2 RT2_1 RT2_0 EL2_4 EL2_3 EL2_2 EL2_1 EL2_0 0x07 0x00 RT3_2 RT3_1 RT3_0 EL3_4 EL3_3 EL3_2 EL3_1 EL3_0 0x08 0x00 RT4_2 RT4_1 RT4_0 EL4_4 EL4_3 EL4_2 EL4_1 EL4_0 0x09 0x00 X = Don’t Care *Read back only. **Send command 0Ah (update all EL ramping time and EL peak voltage registers) to have the programmed voltage effectively applied to the EL lamp. ______________________________________________________________________________________ 11 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E Slave Address The MAX14521E device address is set through external inputs. The slave address consists of five fixed bits (B7–B3, set to 11110) followed by two input programmable bits (A1 and A0). For example: If A1 and A0 are hardwired to ground, then the complete address is 1111000. The full address is defined as the seven most significant bits followed by the read/write bit. Set the read/write bit to 1 to configure the MAX14521E to read mode. Set the read/write bit to 0 to configure the MAX14521E to write mode. The address is the first byte of information sent to the MAX14521E after the START condition. System Enable (EN) 1 = EL outputs enabled. 0 = EL outputs disabled. EN = 1 places the MAX14521E in a normal operating mode. Register contents are restored to values prior to shutdown. EN = 0 disables the EL outputs and places the device in a low-power shutdown state. EL Frequency Register (0x02) EL Frequency (FEL[7:0]) FEL[7:6] sets the EL frequency range of all EL outputs and FEL[5:0] sets the EL frequency within the frequency range; see Table 4. FEL[5:0] = 000000 sets the frequency to the minimum value of the frequency range. FEL[5:0] = 111111 sets the frequency to the maximum value of the frequency range. EL frequency increases linearly with FEL[5:0]; see Table 3. System Registers (0x00, 0x01) Device ID (DEVID3/DEVID2/DEVID1/DEVID0) DEVID[3:0] is preprogrammed to 1011 to identify the MAX14521E; see Table 2. Revision (REV3/REV2/REV1/REV0) REV[3:0] is preprogrammed to the current revision of the MAX14521E and is REV[3:0] = 0010. System Overtemperature (OVRTEMP) 1 = Thermal shutdown temperature exceeded. 0 = Analog circuitry operating properly. OVRTEMP = 1 turns the EL outputs off. To set OVRTEMP to 0 and restart in default condition (all register reset), the user must place RB = 0. Table 2. Device Identification, Status, and Enable REGISTER 0x00 0x01 B7 DEVID3 OVRTEMP B6 DEVID2 X B5 DEVID1 X B4 DEVID0 X B3 REV3 X B2 REV2 X B1 REV1 X B0 REV0 EN X = Don’t Care Table 3. EL Output Frequency REGISTER 0x02 B7 FEL7 B6 FEL6 B5 FEL5 B4 FEL4 B3 FEL3 B2 FEL2 B1 FEL1 B0 FEL0 Table 4. EL Frequency Range FEL[7:6] 00 01 10 11 EL FREQUENCY RANGE (Hz) 50–100 100–200 200–400 400–800 12 ______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface EL Shape Register (0x03) Damping Enable (ENDAMP) 1 = Active damping on LX node enabled. 0 = Active damping on LX node disabled. ENDAMP = 1 actively damps the oscillation on the LX pin and could reduce EMI. EL Shape (SHAPE1/SHAPE0) SHAPE[1:0] sets the desired EL output waveform; see Tables 5 and 6. EL Slew Rate (SL1/SL0) SL[1:0] sets the slope of the EL output; see Table 7. Boost-Converter Frequency Register (0x04) Spread Spectrum (SS1/SS0) SS[1:0] sets the spread-spectrum modulation frequency to a fraction of the boost-converter frequency; see Tables 8 and 9. Boost-Converter Switching Frequency (FSW[4:0]) FSW4 sets the switching frequency range of the boost converter and FSW[3:0] sets the switching frequency within the frequency range; see Table 10. The frequency range for FSW4 = 0 is 800kHz–1600kHz. The frequency range for FSW4 = 1 is 400kHz–800kHz. FSW[3:0] = 0000 sets the frequency to the minimum value of the frequency range. FSW[3:0] = 1111 sets the frequency to the maximum value of the frequency range. Boost-converter switching frequency increases linearly with FSW[3:0]. MAX14521E Table 5. EL Shape Configuration REGISTER 0x03 B7 X B6 ENDAMP B5 X B4 X B3 SHAPE1 B2 SHAPE0 B1 SL1 B0 SL0 X = Don’t Care Table 6. EL Output Shape Configuration SHAPE[1:0] 0X 10 11 EL OUTPUT SHAPE Sine Do Not Use Do Not Use Table 7. EL Slope Configuration SL[1:0] 00 01 10 11 EL OUTPUT SLOPE Sine Fast Slope Faster Slope Fastest Slope (Square Wave) X = Don’t Care Table 8. Boost-Converter Configurations REGISTER 0x04 B7 SS1 B6 SS0 B5 X B4 FSW4 B3 FSW3 B2 FSW2 B1 FSW1 B0 FSW0 X = Don’t Care Table 9. Spread-Spectrum Configuration SS[1:0] 00 01 10 11 SPREAD SPECTRUM Disabled 1/8 1/32 1/128 ______________________________________________________________________________________ 13 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E Audio Input Register (0x05) Frequency and Amplitude Modulation (FR_AM) 0 = AUX input signal modulates EL output voltage. 1 = AUX input frequency modulates EL output frequency. AUX Envelope on EL Output (NO_SAMPLE) 1 = The EL output envelope follows that of the AUX envelope. 0 = AUX is sampled every fEL cycle and the corresponding EL output cycle has zero DC average. Set FR_AM = 0 when NO_SAMPLE = 1 and enable the corresponding EL outputs by bits AU[4:1]. If FR_AM = 1, the NO_SAMPLE bit has no effect. If AUX is a DC value, the EL output peak-to-peak voltage is EL_ (VP-P) = 250 x AUX (V) with a maximum of 300VP-P. If AUX is a PWM signal with a frequency from 100kHz to 10MHz, the EL output voltage is VEL = 300 x DutyCycle% (VP-P). Table 10. Boost-Converter Frequency Range FSW3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 FSW2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 FSW1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 FSW0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 BOOST-CONVERTER SWITCHING FREQUENCY (kHz) FSW4 = 0 800 853 907 960 1013 1067 1120 1173 1227 1280 1333 1387 1440 1493 1547 1600 FSW4 = 1 400 427 453 480 507 533 560 587 613 640 667 693 720 747 773 800 Table 11. Audio Input Configurations REGISTER 0x05 B7 FR_AM B6 NO_ SAMPLE B5 AUXDIV1 B4 AUXDIV0 B3 AU4 B2 AU3 B1 AU2 B0 AU1 14 ______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface Frequency Divider (AUXDIV1/AUXDIV0) AUXDIV[1:0] sets the divisor to divide down the AUX input frequency; see Table 12. Audio Enable (AU4/AU3/AU2/AU1) 1 = Enable audio effect to EL output. 0 = Disable audio effect to EL output. When FR_AM = 0 the EL outputs can be enabled and disabled independently according to AU[4:1]. When FR_AM = 1 then all AU[4:1] bits must be set to 1 (i.e. AU[4:1] = 1111) to enable the audio effect on the EL outputs. lows COM. When EL_ _[4:0] = 11111, the EL output has a 150V peak with respect to COM. The EL output voltage rises linearly with EL_ _[4:0]. MAX14521E EL Peak Ramping Time and EL Peak Voltage Register (0x06, 0x07, 0x08, 0x09) EL Ramping Time (RT4_ _/RT3_ _/RT2_ _/RT1_ _) RT_ _[2:0] sets the ramp time of each EL output; see Table 14. EL Peak-to-Peak Voltage (EL1_ _/EL2_ _/ EL3_ _/EL4_ _) EL _ _[4:0] controls the peak-to-peak voltage of each EL output. When EL _ _[4:0] = 00000, the EL output fol- Table 12. AUX Frequency Divider Configuration AUXDIV[1:0] 00 01 10 11 AUX FREQUENCY DIVIDER 16 8 4 2 I2C Interface The MAX14521E features an I2C-compatible as a slave device, 2-wire serial interface consisting of a serial data line (SDA) and a serial-clock line (SCL). SDA and SCL facilitate communication to the device at clock rates up to 400kHz. Figure 1 shows the 2-wire interface timing diagram. The master generates SCL and initiates data transfer on the bus. A master device writes data to the MAX14521E by transmitting the proper slave address followed by the register address and then the data word. Each transmit sequence is framed by a START (S) or REPEATED START (Sr) condition and a STOP (P) condition. Each word transmitted to the MAX14521E is 8 bits long and is followed by an acknowledge clock pulse. A master reading data from the MAX14521E transmits data on SDA in sync with the master-generated SCL pulses. The master acknowledges receipt of each byte of data. Each read sequence is framed by a START or REPEATED START condition, a not acknowledge, and a STOP condition. SDA operates as both an input and an open-drain output. A pullup resistor, typically greater than 500Ω, is required on SCL if there are multiple masters on the bus, or if the master in a singlemaster system has an open-drain SCL output. Series resistors in line with SDA and SCL are optional. Series resistors protect the digital inputs of the MAX14521E from high-voltage spikes on the bus lines, and minimize crosstalk and undershoot of the bus signals. Table 13. EL Output Configuration REGISTER 0x06 0x07 0x08 0x09 B7 RT1_2 RT2_2 RT3_2 RT4_2 B6 RT1_1 RT2_1 RT3_1 RT4_1 B5 RT1_0 RT2_0 RT3_0 RT4_0 B4 EL1_4 EL2_4 EL3_4 EL4_4 B3 EL1_3 EL2_3 EL3_3 EL4_3 B2 EL1_2 EL2_2 EL3_2 EL4_2 B1 EL1_1 EL2_1 EL3_1 EL4_1 B0 EL1_0 EL2_0 EL3_0 EL4_0 Table 14. Ramping Time Configuration RT_ _[2:0] 000 001 010 011 100 101 110 111 RAMPING TIME (ms) < 0.1 62.5 125 250 500 750 1000 2000 ______________________________________________________________________________________ 15 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E Bit Transfer One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the SCL pulse. Changes in SDA while SCL is high are control signals (see the S TART and STOP Conditions section). SDA and SCL idle high when the I2C bus is not busy. 0 to configure the MAX14521E to write mode. The address is the first byte of information sent to the MAX14521E after the START condition. Acknowledge The acknowledge bit (ACK) is a clocked 9th bit that the MAX14521E uses to handshake receipt each byte of data when in write mode (see Figure 3). The MAX14521E pull down SDA during the entire mastergenerated 9th clock pulse if the previous byte is successfully received. Monitoring ACK allows for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a system fault had occurred. In the event of an unsuccessful data transfer, the bus master may retry communication. The master pulls down SDA during the 9th clock cycle to acknowledge receipt of data when the MAX14521E are in read mode. An acknowledge is sent by the master after each read byte to allow data transfer to continue. A not acknowledge is sent when the master reads the final byte of data from the MAX14521E followed by a STOP condition. START and STOP Conditions SDA and SCL idle high when the bus is not in use. A master initiates communication by issuing a START condition. A START condition is a high-to-low transition on SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (Figure 2). A START condition from the master signals the beginning of a transmission to the MAX14521E. The master terminates transmission and frees the bus by issuing a STOP condition. The bus remains active if a REPEATED START condition is generated instead of a STOP condition. S Sr P SCL START CONDITION CLOCK PULSE FOR ACKNOWLEDGMENT SDA SCL 1 2 8 NOT ACKNOWLEDGE 9 SDA Figure 2. START, STOP, and REPEATED START Conditions ACKNOWLEDGE Early STOP Conditions The MAX14521E recognizes a STOP condition at any point during data transmission except if the STOP condition occurs in the same high pulse as a START condition. For proper operation, do not send a STOP condition during the same SCL high pulse as the START condition. Figure 3. Acknowledge Write Data Format A write to the MAX14521E includes transmission of a START condition, the slave address with the R/W bit set to 0, one byte of data to configure the internal register address pointer, one or more bytes of data, and a STOP condition. Figure 4 illustrates the proper frame format for writing one byte of data to the MAX14521E. Figure 5 illustrates the frame format for writing n-bytes of data to the MAX14521E. The slave address with the R/W bit set to 0 indicates that the master intends to write data to the MAX14521E. The MAX14521E acknowledge receipt of the address byte during the master-generated 9th SCL pulse. Slave Address The MAX14521E has selectable device addresses through external inputs. The slave address consists of five fixed bits (B7–B3, set to 11110) followed by two pin programmable bits (A1 and A0). For example: If A1 and A0 are hardwired to ground, the complete address is 1111000. The full address is defined as the seven most significant bits followed by the read/write bit. Set the read/write bit to 1 to configure the MAX14521E to read mode. Set the read/write bit to 16 ______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface The second byte transmitted from the master configures the MAX14521E internal register address pointer. The pointer tells the MAX14521E where to write the next byte of data. An acknowledge pulse is sent by the MAX14521E upon receipt of the address pointer data. The third byte sent to the MAX14521E contains the data that will be written to the chosen register. An acknowledge pulse from the MAX14521E signals receipt of the data byte. The address pointer autoincrements to the next register address after each received data byte. This autoincrement feature allows a master to write to sequential registers within one continuous frame. Attempting to write to register addresses higher than 0x0B results in repeated writes of 0x0B. Figure 5 illustrates how to write to multiple registers with one frame. The master signals the end of transmission by issuing a STOP condition. MAX14521E ACKNOWLEDGE FROM MAX14521E B7 ACKNOWLEDGE FROM MAX14521E S SLAVE ADDRESS R/W 0 A ACKNOWLEDGE FROM MAX14521E REGISTER ADDRESS A DATA BYTE 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER A P B6 B5 B4 B3 B2 B1 B0 Figure 4. Writing One Byte of Data to the MAX14521E ACKNOWLEDGE FROM MAX14521E ACKNOWLEDGE FROM MAX14521E S SLAVE ADDRESS R/W 0 ACKNOWLEDGE FROM MAX14521E A REGISTER ADDRESS A B7 B6 B5 B4 B3 B2 B1 B0 ACKNOWLEDGE FROM MAX14521E B7 B6 B5 B4 B3 B2 B1 B0 DATA BYTE 1 1 BYTE A DATA BYTE n 1 BYTE A P AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER Figure 5. Writing n-Bytes of Data to the MAX14521E ______________________________________________________________________________________ 17 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E Read Data Format Send the slave address with the R/W set to 1 to initiate a read operation. The MAX14521E acknowledges receipt of its slave address by pulling SDA low during the 9th SCL clock pulse. A START command followed by a read command resets the address pointer to register 0x00. The first byte transmitted from the MAX14521E will be the contents of register 0x00. Transmitted data is valid on the rising edge of the master-generated serial clock (SCL). The address pointer autoincrements after each read data byte. This autoincrement feature allows all registers to be read sequentially within one continuous frame. A STOP condition can be issued after any number of read data bytes. If a STOP condition is issued followed by another read operation, the first data byte to be read will be from register 0x00 and subsequent reads will autoincrement the address pointer until the next STOP condition. The address pointer can be preset to a specific register before a read command is issued. The master presets the address pointer by first sending the MAX14521E’s slave address with the R/W bit set to 0 followed by the register address. A REPEATED START condition is then sent, followed by the slave address with the R/W set to 1. The MAX14521E transmits the contents of the specified register. The address pointer autoincrements after transmitting the first byte. Attempting to read from register addresses higher than 0x0B results in repeated reads of 0x0B. The master acknowledges receipt of each read byte during the acknowledge clock pulse. The master must acknowledge all correctly received bytes except the last byte. The final byte must be followed by a not acknowledge from the master and then a STOP condition. Figure 6 illustrates the frame format for reading one byte from the MAX14521E. Figure 7 illustrates the frame format for reading multiple bytes from the MAX14521E. ACKNOWLEDGE FROM MAX14521E S SLAVE ADDRESS R/W 0 A ACKNOWLEDGE FROM MAX14521E REGISTER ADDRESS A NOT ACKNOWLEDGE FROM MASTER ACKNOWLEDGE FROM MAX14521E Sr SLAVE ADDRESS R/W 1 A DATA BYTE 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER A P REPEATED START Figure 6. Reading One Indexed Byte of Data from the MAX14521E ACKNOWLEDGE FROM MAX14521E S SLAVE ADDRESS R/W 0 A ACKNOWLEDGE FROM MAX14521E REGISTER ADDRESS A ACKNOWLEDGE FROM MAX14521E Sr SLAVE ADDRESS R/W 1 A DATA BYTE 1 BYTE AUTOINCREMENT INTERNAL REGISTER ADDRESS POINTER A P REPEATED START Figure 7. Reading n-Bytes of Indexed Data from the MAX14521E 18 ______________________________________________________________________________________ Quad, High-Voltage EL Lamp Driver with I2C Interface ESD Test Conditions ESD performance depends on a number of conditions. The MAX14521E are specified for ±15kV (HBM) typical ESD resistance on the EL lamp outputs. Design Procedure LX Inductor Selection The recommended tapped-inductor ratio is 1:7 with a 2.3µH primary inductance and 115µH secondary inductance. For most applications, the primary series resistance (DCR) should be below 1Ω for reasonable efficiency. Do not exceed the inductor’s saturation current. See Table 15 for a list of recommended tappedinductors. MAX14521E HBM ESD Protection Figure 8a shows the Human Body Model, and Figure 8b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5kΩ resistor. RC 1MΩ CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1.5kΩ DISCHARGE RESISTANCE DEVICE UNDER TEST IP 100% 90% AMPERES 36.8% 10% 0 0 tRL Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) Cs 100pF STORAGE CAPACITOR TIME tDL CURRENT WAVEFORM Figure 8a. Human Body ESD Test Model Figure 8b. Human Body Current Waveform Table 15. Inductor Vendors INDUCTOR VALUE (µH) 2.3/115 2.3/115 VENDOR Coilcraft Cooper URL www.coilcraft.com www.cooper.com PART NUMBER GA3250-BL CTX03-18210-R ______________________________________________________________________________________ 19 Quad, High-Voltage EL Lamp Driver with I2C Interface MAX14521E CCS Capacitor Selection CCS is the output of the boost converter and provides the high-voltage source for the EL lamp. Connect a 3.3nF capacitor from CS to GND and place as close to the CS input as possible. Diode Selection Connect a diode, D1, from the LX node to CS to rectify the boost voltage on CS. The diode should be a fast recovery diode that is tolerant to +200V. not exceeded. Special attention must be given to program the FSW bits properly when VBAT > 5.5V to avoid destruction of the device. In general, it is good practice to start from the highest f SW setting (1.6MHz) and decrease accordingly to obtain the acquired waveshape on the EL outputs and to prevent exceeding the saturation current of the tapped-inductor. Applications Information PCB Layout Keep PCB traces as short as possible. Ensure that bypass capacitors are as close to the device as possible. Use large ground planes where possible. EL Lamp Selection EL lamps have a capacitance of approximately 2.5nF to 3.5nF per square inch. See the Total Input Current vs. Load graph in the Typical Operating Characteristics section for compatible lamp sizes. An RSN value of 20Ω and CSN value of 330pF is sufficient for VDD < 5V and CLAMP_TOTAL < 40nF. For higher capacitive loads on the EL output or for VDD > 5V, CSN must be increased to keep LX spikes less than 30V. Chip Information PROCESS: BiCMOS-DMOS Snubber Selection Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 24 TQFN-EP PACKAGE CODE T2444M-1 DOCUMENT NO. 21-0139 fSW Selection Choose a boost-converter frequency such that the saturation current of the tapped-inductor primary coil is Pin Configuration TOP VIEW GND N.C. N.C. AUX 13 12 11 MAX14521E 10 9 8 RB SCL SDA VDD A1 A0 *EP 2 N.C. 3 CS 4 N.C. 5 LX 6 PGND 7 EL4 I.C. 14 18 EL3 N.C. COM N.C. EL2 N.C. 19 20 21 22 23 24 17 16 15 + 1 EL1 TQFN-EP *EXPOSED PAD. CONNECT EP TO GND. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.