MAX14578E

19-5821; Rev 1; 2/12 TION KIT EVALUA BLE ILA AVA USB Battery Charger Detectors Features S Compliant to USB Battery Charging Revision 1.1 S Data Contact Detection for Foolproof Connector Insertion Detection S USB Dead-Battery Charging Support S Charging Downstream Detection S Apple/Sony Charger Detection S Dedicated Charger Detection S China YD/T1591-Compliant Charger Detection S Internal Switches Isolate the USB Transceiver During the Charger Detection Process S VBUS Connection Capable of 28V S Device Status Change Interrupt S Low Supply Current S High-ESD Protection on CD+ and CD±15kV Human Body Model ±8kV IEC 61000-4-2 Contact Discharge General Description The MAX14578E/MAX14578AE are USB charger detectors compliant with USB Battery Charging Revision 1.1. The USB charger-detection circuitry detects USB standard downstream ports (SDPs), USB charging downstream ports (CDPs), or dedicated charger ports (DCPs), and controls an external lithium-ion (Li+) battery charger. The devices implement USB Battery Charging Revision 1.1-compliant detection logic including data contact detection, D+/D- short detection, charging downstream port identification, and optional USB dead-battery charging support. Dead-battery charging support features a 45-minute (max) charge timer and weak battery voltage monitor controlled by I2C communication (MAX14578E only.) The MAX14578AE features an enable (EN) input and an LDO output. In addition, the internal USB switch is compliant to Hi-Speed USB, full-speed USB, and low-speed USB signals. The devices feature low on-resistance, low on-resistance flatness, and very low capacitance. The devices also feature high-ESD protection up to Q15kV Human Body Model on the CD+ and CD- pins. In addition, the MAX14578E/MAX14578AE feature Apple and Sony charger detection that allows identification of resistor-divider networks on D+/D-. The MAX14578E/MAX14578AE are available in both a 12-bump, 0.4mm pitch, 1.3mm x 1.68mm WLP package and 16-pin TQFN package, and operate over the -40NC to +85NC extended temperature range. MAX14578E/MAX14578AE Applications DSC and Camcorder Media Players Cell Phones e-Book Readers Mobile Internet Devices (MIDs) Ordering Information/Selector Guide PART MAX14578EEWC+T MAX14578EETE+T MAX14578AEEWC+T MAX14578AEETE+T I2C Yes Yes No No EN No No Yes Yes LDO No No Yes Yes TEMP RANGE -40NC to +85NC -40NC to +85NC -40NC to +85NC -40NC to +85NC PIN-PACKAGE 12 WLP 16 TQFN-EP* 12 WLP 16 TQFN-EP* TOP MARK +ABW AJA +ABX AJB +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed Pad. T = Tape and reel. _______________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. USB Battery Charger Detectors MAX14578E/MAX14578AE ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) BAT, INT, SDA, SCL, CE0, CE1, CE2, EN .......... -0.3V to +6.0V LOUT ........................................... -0.3V to (VB + 0.3V, 6V) (min) VB .......................................................................... -0.3V to +30V Switch Disabled or CP_ENA = 1 (Note 1) CD+, CD- ........................................ -2.1V to (VSWPOS + 0.3V) TD+, TD- ......................................... -0.3V to (VSWPOS + 0.3V) Switch Enabled or CP_ENA = 0 (Note 2) CD+, CD-, TD+, TD- .......................-0.3V to (VVCCINT + 0.3V) Note 1: VSWPOS = (VVCCINT or 3.3V) (min) Note 2: VVCCINT = (VBAT, [(VB or 4.2V) (min)]) (max) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Continuous Current into LOUT ..................................... ±150mA Continuous Current into Any Other Terminal .................. ±50mA Continuous Power Dissipation (TA = +70NC) WLP (derate 13.7mW/NC above +70NC) ................. 1096mW TQFN (derate 20.8mW/NC above +70NC).................. 1667mW Operating Temperature Range ........................ -40NC to +85NC Junction Temperature .................................................. +150NC Storage Temperature Range ......................... -65NC to +150NC Soldering Temperature (reflow) ......................................+260NC PACKAGE THERMAL CHARACTERISTICS (Note 3) WLP Junction-to-Ambient Thermal Resistance (BJA) .......... 73°C/W TQFN Junction-to-Ambient Thermal Resistance (BJA) .......... 48°C/W Junction-to-Case Thermal Resistance (BJC) .............. 10°C/W Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (VBAT = +2.8V to +5.5V, VB = +3.5V to +5.5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VBAT = +3.6V, VB = +5.0V, TA = +25NC.) (Note 4) PARAMETER DC CHARACTERISTICS Supply Voltage Range Internal Positive Switch Regulator Internal Negative Switch Regulator VBAT UVLO VBUS UVLO VBAT VB VSWPOS VSWNEG VBATUVLO VBUSUVLO VBAT = 4.2V, VB = 0V VBAT = 0V, VB = 5.5V 2.8 3.5 3.25 -2.06 0.90 1.0 3.4 -1.90 1.65 1.33 5.5 28 3.6 -1.76 2.45 3.30 V V V V V SYMBOL CONDITIONS MIN TYP MAX UNITS 2 ______________________________________________________________________________________ USB Battery Charger Detectors ELECTRICAL CHARACTERISTICS (continued) (VBAT = +2.8V to +5.5V, VB = +3.5V to +5.5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VBAT = +3.6V, VB = +5.0V, TA = +25NC.) (Note 4) PARAMETER SYMBOL CONDITIONS VBAT = +3.6V, VB = 0V, CP_ENA = 0, USBSWC = 0 MAX14578E VBAT = +4.2V, VB = 0V, CP_ENA = 1, USBSWC = 1, VSDA = VSCL = 1.8V VBAT = +3.6V, VB < VVBRAW, VEN = +3.6V MAX14578AE VBAT = +4.2V, VB = 0V, VEN = 0V Supply current increase when VEN = 1.6V, VBAT = +4.2V MAX14578E VB Supply Current IVB MAX14578AE VB = +5.5V, CP_ENA = 0, USBSWC = 0 VB = +5.5V, VEN = 0V VB = +5.5V, VEN = +5.5V MIN TYP 1 MAX 2.5 UNITS MAX14578E/MAX14578AE 34.5 59 FA BAT Supply Current IBAT 1 1.3 2.5 30 1.3 3.5 87 140 FA 190 75 2.95 125 LOUT (LDO OUT) (MAX14578AE ONLY) LOUT Current Limit LOUT Voltage LOUT Debounce Time LOUT Turn-On Time Themal Shutdown Themal Shutdown Hysteresis CHARGER DETECTION VDP_SRC Voltage VDAT_REF Voltage VLGC Voltage IDP_SRC Current CD+ and CD- Sink Current RCD Resistance TD+ Pulldown Resistor TD- Pulldown Resistor Charger Detection Weak Sink VDP_SRC VDAT_REF VLGC IDP_SRC ICD+_SINK ICD-_SINK RCD RTD+_DWN RTD-_DWN IWEAK 0.5 0.25 0.8 6.6 50 200 15 14.25 330 20 0.7 0.4 2.0 11 150 500 25 24.8 0.18 V V V FA FA kI kI kI FA 3 ILOUT VLOUT tLOUT_DEB ILOUT = 10mA, VB = 5.0V ILOUT = 0mA, VB = 6.0V VB = 5.0V to VLOUT = 4.5V 4.87 4.0 95 4.94 5.3 20 100 +141 20 5.5 mA V ms Fs NC NC _______________________________________________________________________________________ USB Battery Charger Detectors MAX14578E/MAX14578AE ELECTRICAL CHARACTERISTICS (continued) (VBAT = +2.8V to +5.5V, VB = +3.5V to +5.5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VBAT = +3.6V, VB = +5.0V, TA = +25NC.) (Note 4) PARAMETER VBUS25 Ratio VBUS47 Ratio VBUS60 Ratio DCD M Time DCD C Time DCD Timer Charger-Detect Source Time Charger-Detect-Type Detection Time Charger-Detect Delay Time VB Attach to CE1 and CE2 Output Time VB Raw-Detect Threshold VB-Detect Threshold VB-Detect Threshold Hysteresis tDP_SRC_ON tDP_RES_ON tDP_SRC_HICRNT From VB > VVBDET or CHG_TYP_M = 1 (DCHK = 0) to CE1 and/or CE2 change From VB > VVBDET or CHG_TYP_M = 1 (DCHK = 1) to CE1 and/or CE2 change 1.7 3.2 38 2.6 3.5 50 DCHK = 0 DCHK = 1 120 40 80 520 ms 1450 3.5 3.3 V V mV SYMBOL VBUS25 VBUS47 VBUS60 tMDEB tCDEB All comparators All comparators 2 40 625 CONDITIONS Reference ratio for special charger as a percentage of VBUS voltage, VB = 5V Reference ratio for special charger as a percentage of VBUS voltage, VB = 5V MIN 24 44 57.5 20 TYP 26 47 60.3 30 MAX 29 50 63.5 40 5 UNITS % % % ms ms s ms ms ms tVBSW VVBRAW VVBDET VVBDET_HYS USB ANALOG SWITCHES (CD-, CD+) Analog-Signal Range On-Resistance On-Resistance Match Between Channels On-Resistance Flatness Off-Leakage Current On-Leakage Current VDN2, VDP2 RONUSB DRONUSB RFLATUSB ILUSB(OFF) ILUSB(ON) CP_ENA = 0 (MAX14578E) CP_ENA = 1 VBAT = +3.0V, ICD+ = ICD- = 10mA, VCD+, VCD- = 0 to +3.0V VBAT = +3.0V, ICD+ = ICD- = 10mA, VCD+, VCD- = +400mV VBAT = +3.0V, ICD+ = ICD- = 10mA, VCD+, VCD- = 0 to +3.3V VBAT = 4.2V, switch open, VCD+ = VCD- = +0.3V or +2.5V; VTD+ or VTD- = +2.5V or +0.3V VBAT = 4.2V, switch closed, VCD+ or VCD- = +0.3V or +2.5V -360 -360 0.06 0 VSWNEG 3.3 VVCCINT VSWPOS 6 0.5 0.26 +360 +360 V I I I nA nA DIGITAL SIGNALS (INT, SCL, SDA, EN, CE0, CE1, CE2) Input Logic-High VIH Input Logic-Low Input Leakage Current Open-Drain Low VIL IINLEAK VODOL ISINK = 1mA 1.4 0.4 -1 +1 0.4 V V FA V 4 ______________________________________________________________________________________ USB Battery Charger Detectors ELECTRICAL CHARACTERISTICS (continued) (VBAT = +2.8V to +5.5V, VB = +3.5V to +5.5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VBAT = +3.6V, VB = +5.0V, TA = +25NC.) (Note 4) PARAMETER Output Logic-High Output Logic-Low DYNAMIC (Note 5) Charge-Pump Delay Time Analog-Switch Turn-On Time Analog-Switch Turn-Off Time Break-Before-Make Delay Time Off-Capacitance tCP tON tOFF tBBM CP_ENA from 0 to 1 until switch on MAX14578E, I2C STOP to switch on, RL = 50I MAX14578E, I2C STOP to switch off, RL = 50I RL = 50I, TA = +25NC TD-, TD+, applied voltage is 0.5VP-P, DC bias = 0V, f = 240MHz; CD-, CD+ not connected to TD-, TD+ TD-, TD+, applied voltage is 0.5VP-P, DC bias = 0V, f = 240MHz; CD-, CD+ connected to TD-, TD+; RL = 50I VCD_ = 0.5VP-P RL = 50I, f = 20kHz, VCD_ = 0.5VP-P >0 0.1 0.1 1 1 1 ms ms ms Fs SYMBOL VOH VOL CONDITIONS ISOURCE = 1mA ISINK = 1mA MIN VIO 0.2 0.2 TYP MAX UNITS V V MAX14578E/MAX14578AE COFF 2 pF On-Capacitance -3dB Bandwidth Off-Isolation I2C TIMING SPECIFICATIONS I2C Max Clock Bus Free Time Between STOP and START Conditions START Condition Setup Time Repeat START Condition Setup Time START Condition Hold Time STOP Condition Setup Time Clock Low Period Clock High Period Data Valid to SCL Rise Time Data Hold Time to SCL Fall ESD PROTECTION CD+, CD- CON BW VISO fI2CCLK tBUF 4.5 1000 -60 400 1.3 0.6 pF MHz dB kHz Fs Fs Fs Fs Fs Fs Fs ns 0 ns tSU:STA tHD:STA tSU:STO tLOW tHIGH tSU:DAT tHD:DAT 90% to 90% 10% of SDA to 90% of SCL 90% of SCL to 10% of SDA 10% to 10% 90% to 90% Write setup time Write hold time Human Body Model IEC 61000-4-2 Contact Discharge 0.6 0.6 0.6 1.3 0.6 100 ±15 ±8 kV Note 4: All units are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by design and not production tested. Note 5: Guaranteed by design; not production tested. _______________________________________________________________________________________ 5 USB Battery Charger Detectors MAX14578E/MAX14578AE Typical Operating Characteristics (VBAT = +4.2V, VB = +5.0V, CBAT = 1FF, CVB = 1FF, unless otherwise noted.) BAT SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX14578E toc01 BAT SUPPLY CURRENT INCREASE vs. SUPPLY VOLTAGE MAX14578E toc02 BAT SUPPLY CURRENT vs. SUPPLY VOLTAGE VB = 0V, CP_ENA = 1, USBSWC = 0 TA = +85°C MAX14578E toc03 2.0 VB = 0V, CP_ENA = 0, USBSWC = 0 VSDA = VSCL = 0V 10 8 6 VB = 0V, CP_ENA = 0, USBSWC = 0 VSDA = VSCL = 1.8V 50 40 30 20 10 BAT SUPPLY CURRENT (µA) BAT SUPPLY CURRENT (µA) 1.5 TA = +85°C 1.0 TA = +85°C 4 2 BAT SUPPLY CURRENT (µA) 0.5 TA = +25°C TA = -40°C TA = +25°C TA = +25°C TA = -40°C TA = -40°C 0 2.8 3.3 3.8 4.3 BAT SUPPLY VOLTAGE (V) 0 2.8 3.3 3.8 4.3 BAT SUPPLY VOLTAGE (V) 0 2.8 3.3 3.8 4.3 BAT SUPPLY VOLTAGE (V) BAT SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX14578E toc04 VB SUPPLY CURRENT vs. SUPPLY VOLTAGE (MAX14578E) MAX14578E toc05 VB SUPPLY CURRENT vs. SUPPLY VOLTAGE (MAX14578AE) VBAT = +3.6V, EN = HIGH MAX14578E toc06 25 20 15 10 5 0 VB = 0V, CP_ENA = 0, USBSWC = 1 200 VBAT = +3.6V, CP_ENA = 0, USBSWC = 0 200 BAT SUPPLY CURRENT (µA) VB SUPPLY CURRENT (µA) 150 VB SUPPLY CURRENT (µA) 150 TA = +85°C 100 TA = +85°C TA = +85°C 100 TA = +25°C TA = -40°C 50 TA = +25°C 50 TA = -40°C 0 TA = +25°C TA = -40°C 5.1 5.3 5.5 2.8 3.3 3.8 4.3 0 4.5 4.7 4.9 5.1 5.3 5.5 VB SUPPLY VOLTAGE (V) 4.5 4.7 4.9 BAT SUPPLY VOLTAGE (V) VB SUPPLY VOLTAGE (V) LOUT VOLTAGE REGULATION (MAX14578AE) MAX14578E toc07 LOUT LOAD REGULATION (MAX14578AE) VB = 6V TA = +85°C MAX14578E toc08 ANALOG-SWITCH EYE DIAGRAM 0.5 0.4 DIFFERENTIAL SIGNAL (V) 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 6.0 5.5 LOUT VOLTAGE (V) 5.0 4.5 4.0 3.5 3.0 ILOUT = 1mA TA = +85°C 6.0 5.5 LOUT VOLTAGE (V) 5.0 4.5 4.0 3.5 3.0 MAX14578E toc09 TA = +25°C TA = -40°C TA = +25°C TA = -40°C 4.0 4.5 5.0 5.5 6.0 6.5 7.0 0 2 4 6 8 10 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 TIME (x 10-9s) VB SUPPLY VOLTAGE (V) LOUT CURRENT (mA) 6 ______________________________________________________________________________________ USB Battery Charger Detectors Typical Operating Characteristics (continued) (VBAT = +4.2V, VB = +5.0V, CBAT = 1FF, CVB = 1FF, unless otherwise noted.) CD+/CD- ON-RESISTANCE vs. VCD_ VOLTAGE MAX14578E toc10 MAX14578E/MAX14578AE CD+/CD- FREQUENCY RESPONSE MAX14578E toc11 CD+/CD- LEAKAGE CURRENT vs. TEMPERATURE MAX14578E toc12 5 4 3 2 1 0 0 ICD_ = 10mA TA = +85°C 0 CD+/CD- FREQUENCY RESPONSE (dB) 50 CD+/CD- LEAKAGE CURRENT (nA) 40 30 20 10 ON-LOSS -20 CD+/CD- ON-RESISTANCE (Ω) -40 OFF-ISOLATION ON-LEAKAGE TA = +25°C TA = -40°C -60 OFF-LEAKAGE -80 0.01 1 100 10,000 0 -40 -15 10 35 60 85 TEMPERATURE (°C) 0.5 1.0 1.5 2.0 2.5 3.0 VCD_ VOLTAGE (V) FREQUENCY (MHz) LOGIC-INPUT THRESHOLD vs. SUPPLY VOLTAGE MAX14578E toc13 CE_ vs. VBUS CONNECTION (MAX14578E) USB CHARGING DOWNSTREAM PORT, USB COMPLIANT (USB_CPL = 1, USBSWC = 0, VTD+ = 3V) MAX14578E toc14 2.0 LOGIC-INPUT THRESHOLD (V) 1.5 VB 5V/div VCD+ 0.5V/div VCE2 5V/div VCE1 5V/div VIH 1.0 0.5 VIL 0 2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5 BAT SUPPLY VOLTAGE (V) 40ms/div CE_ vs. VBUS CONNECTION (MAX14578E) APPLE 1A CHARGER, USB COMPLIANT (USB_CPL = 1, USBSWC = 0, VTD+ = 3V) MAX14578E toc15 CE_ vs. VBUS CONNECTION (MAX14578AE) USB CHARGING DOWNSTREAM PORT (VTD+ = 3V) MAX14578E toc16 VB 5V/div VCD+ 2V/div VCE2 5V/div VCE1 5V/div 20ms/div 100ms/div VB 5V/div VCD+ 2V/div VCE2 5V/div VCE1 5V/div _______________________________________________________________________________________ 7 USB Battery Charger Detectors MAX14578E/MAX14578AE Pin/Bump Configurations TOP VIEW CE2 1 2 3 4 INT (LOUT) SDA 13 (CEO) SCL 14 (EN) TD- 15 CE2 N.C. 16 CE1 N.C. (LOUT_SNS) 10 TOP VIEW (BUMP SIDE DOWN) MAX14578E/MAX14578AE + A CD+ CDVB 12 11 INT (LOUT) 9 8 7 6 EP* VB BAT CDGND B GND SCL (EN) SDA (CE0) CE1 MAX14578E MAX14578AE + 1 TD+ 2 N.C. 3 N.C. C TD+ TD- BAT 5 () MAX14578AE ONLY. () MAX14578AE ONLY. *CONNECT EP TO GND. TQFN Pin/Bump Description PIN MAX14578E TQFN-EP 1 2, 3, 10, 16 4 5 6 7 WLP C1 — A1 B1 A2 C3 MAX14578AE TQFN-EP 1 2, 3, 16 4 5 6 7 WLP C1 — A1 B1 A2 C3 TD+ N.C. CD+ GND CDBAT USB Transceiver D+ Connection No Connection. Not internally connected. USB Connector D+ Connection Ground USB Connector D- Connection Battery Connection Input. Connect a 1FF capacitor as close as possible between BAT and GND. USB Connector VBUS Connection. Connect a 1FF capacitor as close as possible between VB and GND for Q15kV ESD protection. Active-Low Interrupt Request, Open-Drain Output +5.3V USB Transceiver VBUS Power Output. Connect a 1FF capacitor as close as possible between LOUT and GND. Connect Externally to LOUT (MAX14578AE, TQFN Only) Charger-Enable Control 1, Open-Drain Output Charger-Enable Control 2, Open-Drain Output I2C Serial-Data Input/Output. Connect SDA to an external pullup resistor. Charger-Enable Control 0, Open-Drain Output Active-Low Enable Input. Drive EN low to enable the charger ID detection and close the USB switches after charger detection is complete. NAME FUNCTION 8 9 — — 11 12 13 — — A3 A4 — — B4 C4 B3 — — 8 — 9 10 11 12 — 13 14 A3 — A4 — B4 C4 — B3 B2 VB INT LOUT LOUT_SNS CE1 CE2 SDA CE0 EN 8 ______________________________________________________________________________________ CD+ WLP 4 USB Battery Charger Detectors Pin/Bump Description (continued) PIN MAX14578E TQFN-EP WLP 14 15 — B2 C2 — MAX14578AE TQFN-EP WLP — 15 — — C2 — NAME FUNCTION I2C Serial-Clock Input. Connect SCL to an external pullup resistor. USB Transceiver D- Connection Exposed Pad (TQFN Only). EP is internally connected to GND. Connect to a large ground plane to maximize thermal performance. Not intended as an electrical connection point. MAX14578E/MAX14578AE SCL TDEP MAX14578E Functional Diagram/Typical Application Circuit VCC ID USB TRANSCEIVER DD+ VIO VB MAX14578E TDTD+ CDCD+ 1µF VBUS DD+ ID GND MICRO-B USB CONNECTOR USB CHARGER DETECTION INT SCL PROCESSOR SDA INT SCL SDA BAT 1µF CE1 CE2 VIO VIO GND CONTROL LOGIC AUDIO CODEC/ AMPLIFIER BATTERY PMIC/ CHARGER _______________________________________________________________________________________ 9 USB Battery Charger Detectors MAX14578E/MAX14578AE MAX14578AE Functional Diagram/Typical Application Circuit BATTERY MAX14544 VCC ID USB TRANSCEIVER DD+ 1µF LOUT LDO VB 1µF VBUS DD+ ID GND MICRO-B USB CONNECTOR TDTD+ MAX14578AE CDCD+ USB CHARGER DETECTION EN PROCESSOR 1µF CE2 CE1 CE0 GND EN BAT CONTROL LOGIC AUDIO CODEC/ AMPLIFIER VIO VCC IUSB DCM USUS CHG SWITCH MODE CHARGER BATTERY MAX8903/MAX8934 MAX8677 10 _____________________________________________________________________________________ USB Battery Charger Detectors Table 1. Register Map ADDRESS 0x00 0x01 0x02 0x03 0x04 NAME DEVICE ID CONTROL 1 INTERRUPT CONTROL 2 CONTROL 3 DCD_EN RFU INTPOL BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 CHIP_REV CP_ENA VBCOMP DB_IDLE RFU SUS_LOW CDP_DET LOW_POW DBCHG CE_FRC USB_CPL DCHK DCD_T CHG_TYP_M USB_CHGDET CHGRUN CE SFOUT_EN SFOUTASRT DCD_EXIT RFU BIT 0 VENDOR_ID INTEN CHG_TYP DB_EXIT RFU USBSWC MAX14578E/MAX14578AE Table 2. Detailed Register Map FIELD NAME VENDOR_ID CHIP_REV READ/WRITE Read Only Read Only BIT [7:4] [3:0] DEFAULT 0010 0001 Vendor Identification Chip Revision Interrupt Polarity 0 = Active low 1 = Active high Interrupt Enable. If interrupt is disabled, pending interrupts are not cleared and the INT pin deasserts. INTEN is a global setting to mask all interrupts. 0 = Interrupt disabled 1 = Interrupt enabled Opens/Closes USB Switch 0 = Switch open 1 = Switch closed Charge-Pump Enable 0 = Charge pump disabled 1 = Charge pump enabled Low-Power Mode 0 = Low-power mode disabled; oscillator/bandgap always on 1 = Low-power mode enabled; oscillator/bandgap turned off under the following conditions: no VBUS, USBSWC = 0, and CP_ENA = 0 Charger-Type Source-Detection Time 0 = DCHK, tDP_SRC_ON = 40ms 1 = DCHK, tDP_SRC_ON = 625ms Charger-Type Manual-Detection Enable. Set CHG_TYP_M to 1 to force the internal logic to open the USB switches and perform a charger-type detection. After the detection state matching completes, this bit resets to 0. 0 = Charger detection disabled 1 = Force a manual charge detection 11 DESCRIPTION DEVICE ID (I2C ADDRESS = 0x00) CONTROL 1 (I2C ADDRESS = 0x01) INTPOL Read/Write 7 0 INTEN Read/Write 6 0 USBSWC Read/Write 5 0 CP_ENA Read/Write 4 0 LOW_POW Read/Write 3 1 DCHK Read/Write 2 0 CHG_TYP_M Read/Write 1 0 ______________________________________________________________________________________ USB Battery Charger Detectors MAX14578E/MAX14578AE Table 2. Detailed Register Map (continued) FIELD NAME READ/WRITE BIT DEFAULT DESCRIPTION Charger-Detection-Enable Start. Charger detection starts with any change in VB. 0 = Charger detection disabled 1 = Charger detection enabled Output of USB Charger Detection 000 = Nothing attached 001 = USB cable attached 010 = Charging dowstream port: current depends on USB operating speed 011 = Dedicated charger: current up to 1.8A 100 = Special charger: 500mA max 101 = Special charger: current up to 1A 110 = RFU 111 = Dead-battery charging: 100mA max Output of VB Comparator. Changes in VBCOMP triggers interrupt. 0 = VB < VVBDET 1 = VB R VVBDET Dead-Battery Charger Mode. If DBCHG = 1, the 45-minute timer is running. 0 = Not in dead-battery charge mode 1 = In dead-battery charge mode Data-Contact Detection (DCD) Time Wait. DCD_T generates an interrupt after a 0-to-1 transition. 0 = Data contact detection not running 1 = Data contact detection running for > 2s Charger-Detection State Machine Running. For information only—no interrupt generated. 0 = Charger detection not running 1 = Charger detection running (DCD, dead battery, D+/Dshort) Reserved DCD Enable. If DCD_EN = 1, D+/D- is tested for a short after DCD passes. If DCD_EN = 0, DCD is skipped and D+/D- short detection begins when VBUS is connected or CHG_TYP_M = 1. If DCD is stuck (DCD_T) = 1, setting DCD_EN = 0 bypasses DCD and D+/D- short detection begins. 0 = Disabled 1 = Enabled USB_CHGDET Read/Write 0 1 INTERRUPT (I2C ADDRESS = 0x02) CHG_TYP Read Only [7:5] 000 VBCOMP Read Only 4 0 DBCHG Read Only 3 0 DCD_T Read Only 2 0 CHGRUN Read Only 1 0 RFU Read Only CONTROL 2 (I2C ADDRESS = 0x03) 0 0 DCD_EN Read/Write 7 1 12 _____________________________________________________________________________________ USB Battery Charger Detectors Table 2. Detailed Register Map (continued) FIELD NAME READ/WRITE BIT DEFAULT DESCRIPTION Exit Dead-Battery Charge Mode. If DBCHG = 1, setting DB_EXIT to 1 stops the 45-minute timer, sets DBCHG to 0, and leaves CHG_EN = 1. DB_EXIT is automatically reset to 0 if VBAT reaches the dead-battery threshold. 0 = Do not exit dead-battery mode 1 = Exit dead-battery mode Dead-Battery Idle Mode. DB_IDLE = 1 in dead-battery mode to forces the USB switch to close. DB_IDLE is automatically reset when the USB switch is closed. 0 = Dead-battery mode off or test completed 1 = Dead-battery mode on or test still needed Suspend Mode Selection 0 = When the charger is disabled, CE1 = CE2 = 1 1 = When the charger is disabled, CE1 = CE2 = 0 CE Outputs Force Enable 0 = CE outputs follow the charger-detection finite state machine (FSM) 1 = CE outputs follow the CE[2:0] register regardless of the result from the charger-detection FSM CE Outputs (CE2, CE1, CE0). If CE_FRC = 0, registers are set by the result of charger FSM. If CE_FRC = 1, registers are set by I2C command only. Reserved 0 = Normal detection 1 = Resistive detection USB Compliance 0 = Device is not USB compliant 1 = Device is USB compliant LOUT Enable 0 = LOUT off 1 = LOUT on as per SFOUTASRT LOUT Assert Timing 0 = LOUT asserts when the charger-detection FSM completes 1 = LOUT asserts after valid VBUS voltage detection Exit Charger-Type-Detection Routine After DCD_T is Set to 1 0 = Disabled 1 = Enabled MAX14578E/MAX14578AE DB_EXIT Read/Write 6 0 DB_IDLE Read/Write 5 0 SUS_LOW Read/Write 4 0 (1)* CE_FRC Read/Write 3 0 CE Read/Write [2:0] 000 CONTROL 3 (I2C ADDRESS = 0x04) RFU CDP_DET Read/Write Read/Write [7:5] 4 000 0 USB_CPL Read/Write 3 1 (0)* SFOUT_EN Read/Write 2 0 (1)* SFOUTASRT Read/Write 1 1 DCD_EXIT Read/Write 0 1 Note: CP_ENA, DCHK, USB_CHGDET, DCD_EN, SUS_LOW, CE_FRC, CE, USB_CPL, SFOUT_EN, SFOUTASRT, and DCD_EXIT can be configured to have different default values. Contact the factory for more information. *Default value for MAX14578AE only. ______________________________________________________________________________________ 13 USB Battery Charger Detectors MAX14578E/MAX14578AE Detailed Description The MAX14578E/MAX14578AE are USB charger detectors compliant with USB Battery Charging Revision 1.1. The USB charger-detection circuitry detects USB standard downstream ports (SDPs), USB charging downstream ports (CDPs), or dedicated charger ports (DCPs), and controls an external lithium-ion (Li+) battery charger. The MAX14578E features I2C communication, while the MAX14578AE features an EN pin and an LDO output pin. The internal USB switch is compliant to Hi-Speed USB, full-speed USB, and low-speed USB signals. Both devices feature low on-resistance, low on-resistance flatness, and very low capacitance. The typical Micro/Mini-USB connector has five signal lines: USB power, two USB signal lines (D-, D+), ID line, and ground. The USB power on the Micro/Mini-USB connector connects to VB on the MAX14578E/MAX14578AE. The two USB signal lines, D- and D+, connect to CD- and CD+. USB (CD-, CD+) The MAX14578E/MAX14578AE support Hi-Speed (480Mbps), full-speed (12Mbps), and low-speed USB (1.5Mbps) signal levels. The USB channel is bidirectional and has low 3.3I (typ) on-resistance and 4.5pF (typ) on-capacitance. The low on-resistance is stable as the analog input signals are swept from ground to VSWPOS for low signal distortion. The LOUT LDO provides a 5.3V (typ) output, used to power a USB transceiver. Most USB transceivers are powered from a 3.3V or higher voltage that is difficult to derive from a Li+ battery. One solution is to power the transceivers from the USB VBUS power; however, VBUS can rise as high as +28V in a fault condition. The LOUT pin provides a voltage-limited supply that protects the USB transceiver from these high voltages. When VBUS rises above 9.0V (typ), the MAX14578AE detects an overvoltage fault and LOUT goes to 0V. Additionally, LOUT features a 100mA (typ) current limit to protect the device in the event of a short circuit. The MAX14578E generates an interrupt for any change in VBCOMP, and when DBCHG or DCD_T transitions from 0 to 1. The INTEN bit in the CONTROL 1 register (0x01) enables interrupt output. When INTEN is set to zero, all interrupts are masked but not cleared. A read to the INTERRUPT register (0x02) is required to clear interrupts. Detection Debounce To avoid multiple interrupts at the insertion of an accessory and for added noise/disturbance protection, a 30ms (typ) debounce timer is present that requires an inserted or removed state hold for the debounce time before it sends an interrupt. The MAX14578E has two I2C bits in the CONTROL 1 register (0x01) dedicated to low-power operation: LOW_POW and CP_ENA. Interrupts Input Sources and Routing Low-Power Modes LOW_POW sets low-power mode. In low-power mode, the internal oscillator is turned off under the following conditions: no VBUS, USBSWC = 0, and CP_ENA = 0. When enabled, all switches are high impedance (note that no negative rail voltage can be applied). CP_ENA controls the charge pump required for proper operation of the analog switches. When set to disable, no negative rail voltage can be applied. A factory default sets CP_ENA = 0 automatically. The MAX14578E includes internal logic to detect if a valid USB charger is connected. When a valid VBUS voltage is applied to VB or when CHG_TYP_M in the CONTROL 1 register is set to 1, the MAX14578E/MAX14578AE begin the charger-type-detection sequence (see Figure 1). During the charger-type-detection sequence, the CDand CD+ switches are open, and once the sequence completes, the switches return to their previous state. Figure 2 shows a timing diagram for an example charger-type-detection sequence. LOUT LDO Output (MAX14578AE Only) USB Charger Detection 14 _____________________________________________________________________________________ USB Battery Charger Detectors MAX14578E/MAX14578AE DORMANT CE_ = HI-Z VB > VVBDET MAX14578E: USB_CHGDET = 1 MAX14578AE: VEN = 0V VB < VVBDET DCD BEGIN DCD TEST DCD COMPLIANT NOT DCD COMPLIANT SPECIAL CHARGER SONY CHARGER TEST APPLE CHARGER TEST D+/D- SHORT TEST DCP/CDP TEST () MAX14578AE ONLY. CHARGER CONFIGURATION (USB SWITCH CLOSED) CONFIGURE CE_ VB < VVBDET Figure 1. Charger-Type-Detection Sequence tMDEB VB tDP_SRC_ON tMDEB tMDEB tMDEB DCD START ENABLE STANDARD DOWNSTREAM PORT DETECTION ENABLE COMPARATORS ENABLE CHARGING DOWNSTREAM PORT DETECTION LOUT ENABLE (MAX14578AE) (SFOUTASRT = 0) CHGRUN VVBDET DCD PASS D+/D- SHORT DEDICATED CHARGER CHG_TYP = 011 Figure 2. Charger-Detection Timing ______________________________________________________________________________________ 15 USB Battery Charger Detectors MAX14578E/MAX14578AE STANDARD USB HOST CHARGING DOWNSTREAM PORT VLOAD PU 3.6V HLPU 300kΩ D+ HPD 14.25kΩ TO 24.8kΩ D+ ADPPD 49.9kΩ APPLE CHARGER SONY CHARGER DEDICATED CHARGER VBUS 5.0V ADPPU 75.0kΩ D+ VBUS 5.0V SDPPU 5.1kΩ D+ SDPPD 10kΩ VBUS 5.0V 2MΩ (MIN) VLOAD PU 3.6V HLPU 300kΩ DHPD 14.25kΩ TO 24.8kΩ D- VBUS 5.0V ADMPU 43.2kΩ (FOR 1A) 75.0kΩ (FOR 0.5A) DADMPD 49.9kΩ VBUS 5.0V SDPPU 5.1kΩ DSDPPD 10kΩ 2MΩ (MIN) Figure 3. Standard USB Host/Charging Downstream Port, Apple Charger, Sony Charger, and Dedicated Charger Figure 3 shows D+/D- terminations for a standard USB host/charging downstream port, an Apple charger, a Sony charger, and a dedicated charger. The MAX14578E/MAX14578AE feature digital open-drain outputs—CE0 (MAX14578AE only), CE1, and CE2—to control an external charger autonomously. See Table 3. Charger-Enable Control Outputs Table 3. Charger-Enable Control Outputs SUS_LOW 0 1 0 1 0 1 X 0 1 X X X X X X = Don’t care. 16 _____________________________________________________________________________________ EN 1 1 0 0 0 0 0 0 0 0 0 0 0 0 CHG_TYP X X 000 000 110 110 001 001 001 010 011 100 101 111 USB_CPL X X X X X X 0 1 1 X X X X X CE2 1 0 1 0 1 0 1 1 0 0 0 1 0 0 CE1 1 0 1 0 1 0 0 1 0 1 1 0 1 0 CE0 1 1 1 1 1 1 0 1 1 0 0 0 0 0 Note: When CE_FRC = 1, CE[2:0] are set by an I2C command. USB Battery Charger Detectors I2C Serial Interface (MAX14578E) The MAX14578E operates as a slave device that sends and receives data through an I2C-compatible 2-wire interface. The interface uses a serial-data line (SDA) and a serial-clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and from the MAX14578E and generates the SCL clock that synchronizes the data transfer. The SDA line operates as both an input and an open-drain output. A pullup resistor is required on SDA. The SCL line operates only as an input. A pullup resistor is required on SCL if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition (Figure 4) sent by a master, followed by the MAX14578E 7-bit slave address plus a R/W bit, a register address byte, one or more data bytes, and finally a STOP condition. Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high (see Figure 5). When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission. MAX14578E/MAX14578AE Serial Addressing START and STOP Conditions tR SDA tSU:DAT tLOW SCL tHD:STA tHIGH tHD:DAT tBUF tHD:STA tSU:STO tSU:STA tR REPEATED START CONDITION STOP CONDITION START CONDITION START CONDITION Figure 4. I2C Interface Timing Details SDA SCL S START CONDITION P STOP CONDITION Figure 5. START and STOP Conditions ______________________________________________________________________________________ 17 USB Battery Charger Detectors MAX14578E/MAX14578AE One data bit is transferred during each clock pulse (Figure 6). The data on SDA must remain stable while SCL is high. Bit Transfer recipient. When the MAX14578E is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. The MAX14578E has a 7-bit long slave address. The bit following a 7-bit slave address is the R/W bit, which is low for a write command and high for a read command. The slave address is 01011001 for read commands and 01011000 for write commands. See Figure 8. The MAX14578E resets the bus with the I2C START condition for reads. When the R/W bit is set to 1, the MAX14578E transmits data to the master, thus the master is reading from the device. The acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (Figure 7). Thus, each byte transferred effectively requires nine bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse. The SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX14578E, it generates the acknowledge bit because the MAX14578E is the Acknowledge Slave Address Bus Reset SDA SCL DATA LINE STABLE; DATA VALID CHANGE OF DATA ALLOWED Figure 6. Bit Transfer START CONDITION 1 2 8 CLOCK PULSE FOR ACKNOWLEDGE 9 SCL SDA BY TRANSMITTER SDA BY RECEIVER S Figure 7. Acknowledge SDA SCL 0 MSB 1 0 1 1 0 0 R/W LSB ACK Figure 8. Slave Address 18 _____________________________________________________________________________________ USB Battery Charger Detectors MAX14578E/MAX14578AE ADDRESS = 0x58 0 = WRITE REGISTER ADDRESS = 0x01 S 0 1 0 1 1 0 0 0 A 0 0 0 0 0 0 0 1 A REGISTER 0x01 WRITE DATA S = START BIT P = STOP BIT A = ACK d7 d6 d5 d4 d3 d2 d1 d0 A P N = NACK d_ = DATA BIT Figure 9. Format for I2C Write ADDRESS = 0x58 0 = WRITE REGISTER ADDRESS = 0x01 S 0 1 0 1 1 0 0 0 A 0 0 0 0 0 0 0 1 A REGISTER 0x01 WRITE DATA REGISTER 0x02 WRITE DATA d7 d6 d5 d4 d3 d2 d1 d0 A d7 d6 d5 d4 d3 d2 d1 d0 A/N P Figure 10. Format for Writing to Multiple Registers A write to the MAX14578E comprises the transmission of the slave address with the R/W bit set to zero, followed by at least one byte of information. The first byte of information is the register address or command byte. The register address determines which register of the MAX14578E is to be written by the next byte, if received. If a STOP (P) condition is detected after the register address is received, the MAX14578E takes no further action beyond storing the register address (Figure 9). Any bytes received after the register address are data bytes. The first data byte goes into the register selected by the register address, and subsequent data bytes go into subsequent registers (Figure 10). If multiple data bytes are transmitted before a STOP condition, these Format for Writing bytes are stored in subsequent registers because the register addresses autoincrements. The MAX14578E is read using the internally stored register address as an address pointer, the same way the stored register address is used as an address pointer for a write. The pointer autoincrements after each data byte is read using the same rules as for a write. Thus, a read is initiated by first configuring the register address by performing a write (Figure 11). The master can now read consecutive bytes from the MAX14578E, with the first data byte being read from the register address pointed by the previously written register address. Once the master sends a NACK, the MAX14578E stops sending valid data. Format for Reading ______________________________________________________________________________________ 19 USB Battery Charger Detectors MAX14578E/MAX14578AE ADDRESS = 0x58 0 = WRITE REGISTER ADDRESS = 0x01 S 0 1 0 1 1 0 0 0 A 0 0 0 0 0 0 0 1 A/N P ADDRESS = 0x59 1 = READ REGISTER 0x00 READ DATA S 0 1 0 1 1 0 0 1 A d7 d6 d5 d4 d3 d2 d1 d0 A/N P Figure 11. Format for Reads (Repeated START) Table 4. CE_ Outputs for Different Charger Control CE_ OUTPUTS (CE0) SUS_LOW = 0 CE1 CE2 CE_ OUTPUTS (CE0) SUS_LOW = 1 () MAX14578AE only. CE1 CE2 OFF 1 1 1 OFF 1 0 0 100mA 0 0 0 100mA 0 0 0 500mA 0 0 1 500mA 0 0 1 ISET 0 1 0 ISET 0 1 0 MAX8606, MAX8856 — EN1 EN2 MAX8934, MAX8677 USUS PEN1 PEN2 MAX8814, MAX8845 EN — — MAX8903 USUS DCM IUSB Applications Information The MAX14578E charger-enable control outputs are ideal for autonomous external charger control. Table 4 shows example connections for various Maxim chargers. Hi-Speed USB requires careful PCB layout with 45I single-ended/90I differential controlled-impedance matched traces of equal lengths. Bypass VB and BAT with 1FF ceramic capacitors to GND as close as possible to the device. Charger Control be made in choosing pullup resistor values. Every device connected to the bus introduces some capacitance even when device is not in operation. I2C specifies 300ns rise times to go from low to high (30% to 70%) for fast-mode, which is defined for a clock frequency up to 400kHz (see the I2C Serial Interface (MAX14578E) section for details). To meet the rise time requirement, choose pullup resistors so that tR = 0.85 x RPULLUP x CBUS < 300ns. If the transition time becomes too slow, the setup and hold times may not be met and waveforms may not be recognized. ESD-protection structures are incorporated on all pins to protect against electrostatic discharges up to ±2kV (Human Body Model) encountered during handling and assembly. The CD- and CD+ pins are further protected against ESD up to ±15kV (Human Body Model) and Q8kV IEC 61000-4-2 Contact Discharge without damage. Hi-Speed USB Power-Supply Bypassing Extended ESD Protection I2C requires pullup resistors to provide a logic-high level to data and clock lines. There are trade-offs between power dissipation and speed, and a compromise must Choosing I2C Pullup Resistors 20 _____________________________________________________________________________________ USB Battery Charger Detectors MAX14578E/MAX14578AE RC 1MΩ CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1.5kΩ DISCHARGE RESISTANCE DEVICE UNDER TEST HIGHVOLTAGE DC SOURCE RC 50MΩ TO 100MΩ CHARGE-CURRENTLIMIT RESISTOR RD 330Ω DISCHARGE RESISTANCE DEVICE UNDER TEST CS 100pF STORAGE CAPACITOR CS 150pF STORAGE CAPACITOR Figure 12. Human Body ESD Test Model Figure 14. IEC 61000-4-2 ESD Test Model IPEAK (AMPS) IPEAK (AMPS) 100% 90% Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE) 100% 90% 36.8% 10% 0 10% tR = 0.7ns TO 1ns 30ns 60ns t 0 TIME tRL tDL Figure 13. Human Body Current Waveform Figure 15. IEC 61000-4-2 ESD Generator Current Waveform The VB input withstands up to ±15kV (HBM) if bypassed with a 1FF ceramic capacitor close to the pin. The ESD structures withstand high ESD both in normal operation and when the devices are powered down. After an ESD event, the MAX14578E/MAX14578AE continue to function without latchup. ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results. Figure 12 shows the Human Body Model, and Figure 13 shows the current waveform it generates when discharged into a low-impedance state. This model consists of a 100pF capacitor charged to the ESD voltage of interest that is then discharged into the device through a 1.5kI resistor. ESD Test Conditions The IEC 61000-4-2 standard covers ESD testing and performance of finished equipment. However, it does not specifically refer to integrated circuits. The MAX14578E/ MAX14578AE assist in designing equipment to meet IEC 61000-4-2 without the need for additional ESD-protection components. The major difference between tests done using the Human Body Model and IEC 61000-4-2 is higher peak current in IEC 61000-4-2, because series resistance is lower in the IEC 61000-4-2 model. Hence, the ESD withstand voltage measured to IEC 61000-4-2 is generally lower than that measured using the Human Body Model. Figure 14 shows the IEC 61000-4-2 model, and Figure 15 shows the current waveform for IEC 61000-4-2 ESD Contact Discharge test. IEC 61000-4-2 Human Body Model ______________________________________________________________________________________ 21 USB Battery Charger Detectors MAX14578E/MAX14578AE Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 12 WLP 16 TQFN PACKAGE CODE W121A1+1 T1633+5 OUTLINE NO. 21-0449 21-0136 LAND PATTERN NO. Refer to Application Note 1891 90-0032 22 _____________________________________________________________________________________ USB Battery Charger Detectors Revision History REVISION NUMBER 0 1 REVISION DATE 3/11 2/12 Initial release Added TQFN package, corrected MAX14578E Functional Diagram/Typical Operating Circuit, and corrected default values for MAX14578AE in Table 2 DESCRIPTION PAGES CHANGED — 1, 2, 8, 9, 13, 22 MAX14578E/MAX14578AE Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 23 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.