19-5819; Rev 0; 3/11
EVALUATION KIT AVAILABLE
MAX14895E Enhanced VGA Port Protector
General Description
The MAX14895E integrates level-translating buffers and features RED, GRN, and BLU (RGB) port protection for VGA signals. The device has horizontal sync (SYNCH_) and vertical sync (SYNCV_) translating buffers that convert low-level CMOS inputs from a graphics controller to meet full 5V, TTL-compatible outputs. Each output can drive Q10mA and meets the VESASM specification. In addition, the device translates the direct digital control (DDC) signals to a lower level that is safe for the graphics controller. The device features both EN and EN inputs, accepting active-high or active-low enable inputs. The device also switches and current limits the 5V supply to a VGA connector or monitor. The RED, GRN, and BLU terminals protect graphics controller outputs against electrostatic discharge (ESD) events. All eight outputs and EN have high-level ESD protection. The MAX14895E is specified over the extended -40NC to +85NC temperature range and is available in a 16-pin, 3mm x 3mm TQFN package with exposed pad.
Benefits and Features
S Saves Power in Portable Applications Low Quiescent Supply Current: 430µA (typ) S Eliminates Need for Costly External Components High-ESD Protection on SDA1, SCL1, SYNCH1, SYNCV1, RED, GRN, BLU, EN, VS ±15kV Human Body Model (HBM) ±8kV IEC 61000-4-2 Contact Discharge S Innovative Design Enables a High Level of Integration for Performance Output Current-Limit Switch with Power-Off Protection Low Capacitance on RGB Ports (2.2pF typ) ±10mA Drive on SYNCH1, SYNCV1 S Fully Integrated Solutions Saves Space in Portable Applications DDC Outputs have Internal Pullups 3mm x 3mm, 16-Pin TQFN Package
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part, refer to www.maxim-ic.com/MAX14895E.related.
Applications
Notebook Computers Desktops Servers Graphics Cards
Typical Operating Circuit
+5V 1µF
EN EN SYNCH0, SYNCV0 SDA0, SCL0 RED GRN BLU
VCC
VS 1µF
2 VGA OUTPUTS 2
SYNCH1, SYNCV1 SDA1, SCL1
2 2 VGA PORT
MAX14895E
GND
VESA is a service mark of the Video Electronics Standards Association Corporation.
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For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX14895E Enhanced VGA Port Protector
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND.) VCC, VS, EN, SDA0, SCL0 ...................................... -0.3V to +6V SDA1, SCL1 ................................................ -0.3V to (VS + 0.3V) EN, RED, GRN, BLU, SYNCH0, SYNCH1, SYNCV0, SYNCV1 ................ -0.3V to (VCC + 0.3V) Continuous Current through SDA_, SCL_ ....................... Q30mA Continuous Short-Circuit Current SYNCH1, SYNCV1 ..... Q20mA Continuous Power Dissipation (TA = +70NC) TQFN (derate 20.8mW/NC above +70NC).................. 1667mW Operating Temperature Range .......................... -40NC to +85NC Junction Temperature .....................................................+150NC Storage Temperature Range............................ -65NC to +150NC Lead Temperature (soldering, 10s) ................................+300NC Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TQFN Junction-to-Ambient Thermal Resistance (BJA) .......... 48NC/W Junction-to-Case Thermal Resistance (BJC) ................. 7NC/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +5V, TA = +25NC.) (Note 2) PARAMETER POWER SUPPLY Power-Supply Range Quiescent Supply Current VCC IQ EN = VCC, EN = GND, SYNCH0 = SYNCV0 = GND, SDA0 = SCL0 = unconnected EN = GND, EN = VCC, SYNCH0 = SYNCV0 = GND, SDA0 = SCL0 = unconnected VCC rising 0.1 VCC = +4.75V to +5.25V, SDA1/SCL1 = unconnected, measure SDA0/SCL0 Internal Logic Supply Voltage VL VCC = +4.75V to +5.25V, SDA0/SCL0 = 200kI to GND, measure SDA0/SCL0, SDA1/SCL1 = unconnected f = 1MHz, VRED, GRN, BLU = 1VP-P -1 VIH VIL 2.0 0.8 1.6 1.6 2.9 V 2.8 4.75 430 5.25 800 V FA SYMBOL CONDITIONS MIN TYP MAX UNITS
Shutdown Supply Current Undervoltage Lockout Threshold Undervoltage Lockout Hysteresis
ISHDN VUVLO
8 4.3
FA V V
RED, GRN, BLU RED, GRN, BLU Capacitance RED, GRN, BLU Leakage Current SYNCH0, SYNCV0, EN, EN Input Logic-High Input Logic-Low V V COUT 2.2 +1 pF FA
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*The parametric values (min, typ, max limits) shown in the Electrical Characteristics table supersede values quoted elsewhere in this data sheet.
MAX14895E Enhanced VGA Port Protector
ELECTRICAL CHARACTERISTICS* (continued)
(VCC = +4.75V to +5.25V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +5V, TA = +25NC.) (Note 2) PARAMETER SYNCH0, SYNCV0 Leakage Current EN, EN Input Resistance SYNCH1, SYNCV1 Output Logic-High Output Logic-Low Rising Time Falling Time Propagation Delay Enable Time SDA�, SCL� (DDC) On-Resistance SDA0, SCL0 Off-Leakage Current SDA1, SCL1 Reverse-Leakage Current SDA1, SCL1 Pullup Resistor VS OUTPUT Forward Voltage Drop Reverse-Leakage Current Current Limit Discharge Resistor THERMAL SHUTDOWN Thermal Shutdown Threshold Thermal Shutdown Hysteresis ESD PROTECTION SDA1, SCL1, SYNCH1, SYNCV1, RED, GRN, BLU, EN, VS HBM IEC 61000-4-2 Contact ±15 ±8 kV kV +150 10 NC NC ILIM RVS ILOAD = 1mA ILOAD = 60mA, VCC = 5V VCC = 0V, VS = 5.25V 200 300 0.25 10 600 500 V FA mA I RPULLUP RON VSDA0 = VSCL0 = 0.5V, ILOAD = 10mA EN = GND, EN = VCC, SDA0 = SCL0 = VCC, SDA1 = SCL1 = GND VCC = 0V, VS = +5.25V, VSDA1 = VSCL1 = +5.25V VCC = +4.75V, SDA0 = SCL0 = unconnected, EN = VCC , EN = GND, ILOAD = 100FA -1 -10 1.25 2.5 55 +1 +10 4.0 I FA FA kI VOH VOL tR tF tPD tEN VCC = +4.75V, source 10mA VCC = +4.75V, sink 10mA RL = 2.2kI, CL = 10pF, 10% to 90% of VCC (Note 3) RL = 2.2kI, CL = 10pF, 90% to 10% of VCC (Note 3) RL = 2.2kI, CL = 10pF, EN = VCC, EN = GND (Figure 1) RL = 2.2kI, CL = 10pF, VSYNCH1, VSYNCV1 = +4.75V (Figure 1) 16 17 2.4 0.5 4 4 V V ns ns ns Fs SYMBOL CONDITIONS SYNCH0/SYNCV0 = GND or VCC EN = VCC, EN = GND MIN -1 200 TYP MAX +1 800 UNITS FA kI
Note 2: All devices are 100% production tested at TA = +25NC. Limits over the operating temperature range are guaranteed by design and not production tested. Note 3: Guaranteed by design.
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*The parametric values (min, typ, max limits) shown in the Electrical Characteristics table supersede values quoted elsewhere in this data sheet.
MAX14895E Enhanced VGA Port Protector
2.4V VSYNCH0/VSYNCV0 50% 50% 0V OUTPUT HIGH VSYNCH1/VSYNCV1 50% 50% OUTPUT LOW tPLH tPHL
tPD = MAX(tPLH, tPHL)
2.4V VEN 50% 0V 2.4V VEN 50% 0V OUTPUT HIGH VSYNCH1/VSYNCV1 50% OUTPUT LOW tEN
Figure 1. Timing Diagram
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MAX14895E Enhanced VGA Port Protector
Typical Operating Characteristics
(VCC = +5V, TA = +25NC, unless otherwise noted.)
ON-RESISTANCE vs. SDA0 VOLTAGE
MAX14895E toc01
HV BUFFER OUTPUT-VOLTAGE HIGH vs. TEMPERATURE
5.8 5.6 OUTPUT VOLTAGE (V) 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.0 -40 -15 10 35 60 85 TEMPERATURE (°C)
70 60 RON (Ω) 50 40 30 20 10 0 0
SDA0, SCL0 ARE INTERCHANGEABLE
IOUT = 8mA
TA = +25°C TA = +85°C TA = -40°C
0.5 1.0 1.5 VSDA0 (V) 2.0 2.5
HV BUFFER OUTPUT-VOLTAGE LOW vs. TEMPERATURE
0.9 0.8 OUTPUT VOLTAGE (V) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 -15 10 35 60 85 TEMPERATURE (°C)
IOUT = 8mA
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MAX14895E toc03
1.0
MAX14895E toc02
80
6.0
MAX14895E Enhanced VGA Port Protector
Pin Configuration
SYNCH1
SCL1 10
12 SYNCV0 13 SYNCV1 14 VCC 15 EN 16
11
SCL0 9 8 7 6 SDA1 SDA0 EN VS *EP 5 4 GND
TOP VIEW
MAX14895E
+
1 RED 2 GRN 3 BLU
TQFN (3mm x 3mm)
*CONNECT EP TO GND.
SYNCH0
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 — NAME RED GRN BLU GND VS EN SDA0 SDA1 SCL0 SCL1 SYNCH0 SYNCH1 SYNCV0 SYNCV1 VCC EN EP High-ESD Protection Diodes for RGB Signals High-ESD Protection Diodes for RGB Signals High-ESD Protection Diodes for RGB Signals Ground Supply Voltage Output with Current-Limit Switch. VS provides a current-limited voltage from VCC when the device is enabled. Bypass VS to GND with a 1FF or larger ceramic capacitor as close as possible to the device. Active-Low Enable Input. Drive EN high and EN low to disable the device. EN is weakly pulled up internally. DDC Data Input from Graphics Controller DDC Data Output to VGA Monitor. Internally pulled up to VCC. DDC Clock Input from Graphics Controller DDC Clock Output to VGA Monitor. Internally pulled up to VCC. Horizontal Sync Input Horizontal Sync Output Vertical Sync Input Vertical Sync Output Supply Voltage Input. Apply a voltage between +4.75V and +5.25V to VCC to power the device. Bypass VCC to GND with a 1FF or larger ceramic capacitor as close as possible to the device. Active-High Enable Input. Drive EN low and EN high to disable the device. EN is weakly pulled down internally. Exposed Pad. Connect EP to GND. For enhanced thermal dissipation, connect EP to a large ground plane. Do not use EP as the only ground connection.
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FUNCTION
MAX14895E Enhanced VGA Port Protector
Functional Diagram/Truth Table
VCC
THERMAL SHUTDOWN CURRENT-LIMIT SWITCH
MAX14895E
VS SDA/SCL PULLUP RESISTOR SWITCHES RPULLUP RVS HIGH ESD
EN EN HIGH ESD
LOGIC
RPULLUP SDA0 I2C LEVEL SHIFTER SCL0
VS PULLUP-TO-GND SWITCHES SDA1 HIGH ESD SCL1 HIGH ESD
SYNCH0 HIGH ESD SYNCV0 RED GRN BLU HIGH ESD GND HIGH ESD HIGH ESD HIGH ESD
SYNCH1
SYNCV1
EN 0 0 1 1 DEVICE LOGIC/ EVENT Enable No Overcurrent Enable Overcurrent Enable Overcurrent Thermal Shutdown Disable VCC = 0V SYNCH_/SYNCV_ BUFFER On On Output 0V Output 0V Off I2C LEVEL SHIFTER On On Off Off Off
EN 0 1 0 1
DEVICE LOGIC Enable Disable Enable Enable SDA/SCL PULLUP RESISTOR SWITCHES On On Off Off Off VS PULL-TO-GND SWITCH Off Off On On Off
CURRENT-LIMIT SWITCH On Current Limit Off Off Off
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MAX14895E Enhanced VGA Port Protector
Detailed Description
The MAX14895E integrates level-translating buffers and features RED, GRN, and BLU port protection for VGA signals. Horizontal and vertical synchronization (SYNCH0, SYNCV0) inputs feature level-shifting buffers to support low-voltage CMOS or standard TTL-compatible graphics controllers. Each output can drive Q10mA and meets VESA specifications. The device also features I2C level shifting using two nMOS devices. The device generates its own internal bias supply to clamp SCL0 and SDA0 to a safe level, removing the need for another external supply. The device also provides a current-limited VCC output with power-off protection. This output can be used to switch power to a VGA connector or the VGA interface of a monitor. SYNCH0 and SYNCV0 are buffered to provide level shifting and drive capability to meet the VESA specification. The level-shifted outputs (SYNCH1, SYNCV1) are pulled low when EN is low and EN is high, or when the device is in thermal shutdown (see the Functional Diagram/ Truth Table). Logic-level outputs (VOL, VOH) are 5V TTLcompatible. These two buffers are identical and each can drive either the horizontal or the vertical synch signal. The device incorporates two nMOS switches for I2C level shifting. The SDA0 and SCL0 terminals are voltage clamped to a diode drop less than the internal VL voltage. Voltage clamping provides protection and compatibility with the SDA0 and SCL0 signals and low-voltage ASICs. When power is off (VCC = 0V), SDA1 and SCL1 are protected against reverse-leakage current up to VS = +5.25V. The SDA_ and SCL_ switches are identical, and each switch can be used to route SDA_ or SCL_ signals. The device includes three terminals for RED, GRN, and BLU signals. These terminals provide high-level ESD protection to the RGB lines while keeping the capacitance on the RGB lines to a minimum. The RED, GRN, BLU terminals are identical, and any of the three terminals can be used to protect red, green, or blue video signals. The device has dual complementary EN and EN enable inputs and can accept either active-low or active-high enable signals. Pull EN low and EN high to place the device in shutdown (see the Functional Diagram/Truth Table). The device provides a current-limited voltage on VS when the part is enabled. VS is used as the pullup voltage for internal pullup resistors on SDA1 and SCL1, and can be used as an external supply. The internal pullup resistors from SDA1 and SCL1 to VS are active when the device is enabled, and are disabled when the device is in thermal shutdown (see the Functional Diagram/Truth Table). The VS supply includes an internal resistor to discharge the supply when the device is in thermal shutdown or is disabled (see the Functional Diagram/Truth Table). VS is current limited to prevent damage to host devices. When power is off (VCC = 0V), VS is protected against reverseleakage current up to VS = +5.25V. Thermal-shutdown circuitry protects the device from overheating. The device enters thermal shutdown when the junction temperature exceeds +150NC (typ) and returns to normal operation when the temperature drops by approximately +10NC (typ) below the thermal-shutdown threshold. When the device is in thermal shutdown, both SYNCH1 and SYNCV1 are pulled down to ground, the I2C level shifters are disabled, the SDA1 and SCL1 pullups are off, and the VS discharge resistor is on (see the Functional Diagram/Truth Table).
VS Output
Thermal Shutdown
Horizontal/Vertical Sync Level Shifter
Display Data Channel Switches
Applications Information
Bypass VCC and VS to ground with 1FF ceramic capacitors as close as possible to the device.
Power-Supply Decoupling
RGB Ports
High-speed switches such as the MAX14895E require proper PCB layout for optimum performance. Ensure that impedance-controlled PCB traces for high-speed signals are matched in length and are as short as possible. Connect the exposed pad to a solid ground plane. As with all Maxim devices, ESD protection structures are incorporated on all terminals to protect against electrostatic discharges encountered during handling and assembly. Additionally, the device is protected to Q15kV on the RED, GRN, BLU, EN, VS, SYNCH1, SYNCV1, SCL1, and SDA1 terminals by the HBM. For optimum ESD performance, bypass VCC to ground with a 1FF ceramic capacitor.
PCB Layout
ESD Protection
EN, EN
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MAX14895E Enhanced VGA Port Protector
ESD protection can be tested in various ways. The RED, GRN, BLU, EN, VS, SYNCH1, SYNCV1, SCL1, and SDA1 terminals of the device are characterized for protection to the following limits: • Q15kV using the HBM • Q8kV using IEC 61000-4-2 Contact Discharge Figure 2 shows the HBM. Figure 3 shows the current waveform it generates when discharged into a lowimpedance state. This model consists of a 100pF capacitor charged to the ESD voltage of interest that is then discharged into the device through a 1.5kI resistor. The IEC 6100-4-2 standard covers ESD testing and performance of finished equipment. However, it does not specifically refer to integrated circuits. The device assists in designing equipment to meet IEC 61000-4-2 without the need for additional ESD protection components. The major difference between tests done using the HBM and IEC 61000-4-2 is higher peak current in IEC 610004-2 because series resistance is lower in the IEC 610004-2 model. Hence, the ESD withstand voltage measured to IEC 61000-4-2 is generally lower than that measured using the HBM. Figure 4 shows the IEC 61000-4-2 model, and Figure 5 shows the current waveform for the IEC 61000-4-2 ESD Contact Discharge test.
RC 50MΩ TO 100MΩ CHARGE-CURRENTLIMIT RESISTOR DEVICE UNDER TEST HIGHVOLTAGE DC SOURCE RD 330Ω DISCHARGE RESISTANCE DEVICE UNDER TEST
IEC 61000-4-2
Human Body Model
RC 1MΩ CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE
RD 1.5kΩ DISCHARGE RESISTANCE
CS 100pF
STORAGE CAPACITOR
CS 150pF
STORAGE CAPACITOR
Figure 2. Human Body ESD Test Model
Figure 4. IEC 61000-4-2 ESD Test Model
IPEAK (AMPS) 100% 90% Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
IPEAK (AMPS) 100% 90%
36.8% 10% 0 10% tR = 0.7ns TO 1ns 30ns 60ns t
0
TIME tRL tDL
Figure 3. Human Body Current Waveform
Figure 5. IEC 61000-4-2 ESD Generator Current Waveform
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MAX14895E Enhanced VGA Port Protector
Ordering Information
PART MAX14895EETE+T TEMP RANGE -40NC to +85NC PIN-PACKAGE 16 TQFN-EP*
Package Information
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 16 TQFN-EP PACKAGE CODE T1633+4 OUTLINE NO. 21-0136 LAND PATTERN NO. 90-0031
+Denotes lead(Pb)-free/RoHS-compliant package. T = Tape and reel. *EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
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MAX14895E Enhanced VGA Port Protector
Revision History
REVISION NUMBER 0 REVISION DATE 3/11 Initial release DESCRIPTION PAGES CHANGED —
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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11
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