MAX15013CASA

19-0530; Rev 1; 12/07 175V/2A, High-Speed, Half-Bridge MOSFET Drivers General Description The MAX15012/MAX15013 high-frequency, 175V halfbridge, n-channel MOSFET drivers drive high- and lowside MOSFETs in high-voltage applications. These drivers are independently controlled and their 35ns typical propagation delay, from input to output, are matched to within 2ns (typ). The high-voltage operation with very low and matched propagation delay between drivers, and high source/sink current capabilities make these devices suitable for the high-power, high-frequency telecom power converters. A reliable on-chip bootstrap diode connected between V DD and BST eliminates the need for an external discrete diode. The MAX15012A/C and MAX15013A/C offer both noninverting drivers (see the S elector Guide ). The MAX15012B/D and MAX15013B/D offer a noninverting high-side driver and an inverting low-side driver. The MAX15012A/B/C/D feature CMOS (VDD/2) logic inputs. The MAX15013A/B/C/D feature TTL logic inputs. The drivers are available in the industry-standard 8-pin SO footprint and pin configuration and a thermally enhanced 8-pin SO package. All devices operate over the -40°C to +125°C automotive temperature range. Features ♦ HIP2100/HIP2101 Pin Compatible (MAX15012A/C and MAX15013A/C) ♦ Up to 175V Input Operation ♦ 8V to 12.6V VDD Input Voltage Range ♦ 2A Peak Source and Sink Current Drive Capability ♦ 35ns Typical Propagation Delay ♦ Guaranteed 8ns Propagation Delay Matching Between Drivers ♦ Up to 500kHz Switching Frequency ♦ Available in CMOS (VDD/2) or TTL Logic-Level Inputs with Hysteresis ♦ Up to 14V Logic Inputs Independent of Input Voltage ♦ Low 2.5pF Input Capacitance ♦ Low 70µ A Supply Current ♦ Versions Available with Combination of Noninverting and Inverting Drivers (MAX15012B/D and MAX15013B/D) ♦ Available in Industry-Standard 8-Pin SO and Thermally Enhanced SO Packages MAX15012/MAX15013 Applications Telecom Half-Bridge Power Supplies Two-Switch Forward Converters Full-Bridge Converters Active-Clamp Forward Converters Power-Supply Modules Motor Control Pin Configurations and Typical Operating Circuit appear at the end of data sheet. PART MAX15012AASA+ MAX15012BASA+ MAX15012CASA+* MAX15012DASA+* Ordering Information TEMP RANGE -40°C to +125°C -40°C to +125°C -40°C to +125°C -40°C to +125°C PINPACKAGE 8 SO 8 SO 8 SO-EP** 8 SO-EP** PKG CODE S8-5 S8-5 S8E+14 S8E+14 Ordering Information continued at end of data sheet. +Denotes lead-free package. *Future product—contact factory for availability. **EP = Exposed pad. Selector Guide PART MAX15012AASA+ MAX15012BASA+ MAX15012CASA+ MAX15012DASA+ MAX15013AASA+ MAX15013BASA+ MAX15013CASA+ MAX15013DASA+ HIGH-SIDE DRIVER Noninverting Noninverting Noninverting Noninverting Noninverting Noninverting Noninverting Noninverting LOW-SIDE DRIVER Noninverting Inverting Noninverting Inverting Noninverting Inverting Noninverting Inverting LOGIC LEVELS CMOS (VDD/2) CMOS (VDD/2) CMOS (VDD/2) CMOS (VDD/2) TTL TTL TTL TTL PIN COMPATIBLE HIP 2100IB — HIP 2100IB — HIP 2101IB — HIP 2101IB — ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND, unless otherwise noted.) VDD, IN_H, IN_L......................................................-0.3V to +14V DL ...............................................................-0.3V to (VDD + 0.3V) HS............................................................................-5V to +180V DH to HS.....................................................-0.3V to (VDD + 0.3V) BST to HS ...............................................................-0.3V to +14V dV/dt at HS ........................................................................50V/ns Continuous Power Dissipation (TA = +70°C) 8-Pin SO (derate 5.9mW/°C above +70°C)...............470.6mW 8-Pin SO-EP (derate 19.2mW/°C above +70°C) .....1538.5mW Junction-to-Case Thermal Resistance (θJC)(Note 1) 8-Pin SO .......................................................................40°C/W 8-Pin SO-EP....................................................................6°C/W Junction-to-Ambient Thermal Resistance (θJA)(Note 1) 8-Pin SO .....................................................................170°C/W 8-Pin SO-EP..................................................................52°C/W Maximum Junction Temperature .....................................+150°C Operating Temperature Range .........................-40°C to +125°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C *Per JEDEC 51 Standard Multilayer board. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JE5D51-7, using a fourlayer board. For detailed information on package thermal considerations, see www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (VDD = VBST = +8V to +12.6V, VHS = GND = 0V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = VBST = +12V and TA = +25°C.) (Note 2) PARAMETER POWER SUPPLIES Operating Supply Voltage VDD Quiescent Supply Current (No Switching) VDD Operating Supply Current BST Quiescent Supply Current BST Operating Supply Current UVLO (VDD to GND) UVLO (BST to HS) UVLO Hysteresis LOGIC INPUT Input-Logic High VIH_ MAX15012_, CMOS (VDD/2) version MAX15013_, TTL version Input-Logic Low VIL_ MAX15012_, CMOS (VDD/2) version MAX15013_, TTL version Logic-Input Hysteresis VHYS MAX15012_, CMOS (VDD/2) version MAX15013_, TTL version 0.67 x VDD 2 0.55 x VDD 1.65 0.4 x VDD 1.4 1.6 0.25 0.33 x VDD 0.8 V V V VDD IDD IDDO IBST IBSTO UVLOVDD UVLOBST (Notes 3 and 4) IN_H = IN_L = GND (for A/C versions), IN_H = GND, IN_L = VDD (for B/D versions) fSW = 500kHz, VDD = +12V IN_H = IN_L = GND (for A/C versions), IN_H = GND, IN_L = VDD (for B/D versions) fSW = 500kHz, VDD = VBST = +12V VDD rising BST rising 6.5 6.0 7.3 6.9 0.5 15 8.0 70 12.6 140 3 40 3 8.0 7.8 V µA mA µA mA V V V SYMBOL CONDITIONS MIN TYP MAX UNITS 2 _______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers ELECTRICAL CHARACTERISTICS (continued) (VDD = VBST = +8V to +12.6V, VHS = GND = 0V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = VBST = +12V and TA = +25°C.) (Note 2) PARAMETER SYMBOL CONDITIONS VIN_L = VDD for MAX15012B/MAX15012D/ MAX15013B/MAX15013D Logic-Input Current I_IN VIN_H = 0V VIN_L = 0V for MAX15012A/MAX15012C/ MAX15013A/MAX15013C IN_H to GND Input Resistance RIN IN_L to VDD for MAX15012B/MAX15012D/ MAX15013B/MAX15013D IN_L to GND for MAX15012A/MAX15012C/ MAX15013A/MAX15013C Input Capacitance HIGH-SIDE GATE DRIVER HS Maximum Voltage BST Maximum Voltage Driver Output Resistance (Sourcing) Driver Output Resistance (Sinking) DH Reverse Current (Latchup Protection) Power-Off Pulldown Clamp Voltage Peak Output Current (Sourcing) Peak Output Current (Sinking) LOW-SIDE GATE DRIVER Driver Output Resistance (Sourcing) Driver Output Resistance (Sinking) Reverse Current at DL (Latchup Protection) Power-Off Pulldown Clamp Voltage Peak Output Current (Sourcing) Peak Output Current (Sinking) INTERNAL BOOTSTRAP DIODE Forward Voltage Drop Turn-On and Turn-Off Time VF tR IBST = 100mA IBST = 100mA 0.91 40 1.11 V ns IPK_LP IPK_LN RON_LP RON_LN VDD = 12V, IDL = 100mA (sourcing) VDD = 12V, IDL = 100mA (sinking) (Note 5) VDD = 0V or floating, IDL = 1mA (sinking) CL = 10nF, VDL = 0V CL = 10nF, VDL = 12V TA = +25°C TA = +125°C TA = +25°C TA = +125°C 400 0.95 2 2 1.16 2.5 3.5 2.1 3.2 3.3 4.6 2.8 4.2 Ω Ω mA V A A IDH_PEAK VHS_MAX VBST_MAX RON_HP RON_HN VDD ≤ 10.5V (Note 4) VDD ≤ 10.5V (Note 4) VDD = 12V, IDH = 100mA (sourcing) VDD = 12V, IDH = 100mA (sinking) (Note 5) VBST = 0V or floating, IDH = 1mA (sinking) CL = 10nF, VDH = 0V CL = 10nF, VDH = 12V TA = +25°C TA = +125°C TA = +25°C TA = +125°C 400 0.94 2 2 1.16 175 189 2.5 3.5 2.1 3.2 3.3 4.6 2.8 4.2 V V Ω Ω mA V A A CIN 2.5 pF 1 MΩ -1 +0.001 +1 µA MIN TYP MAX UNITS MAX15012/MAX15013 _______________________________________________________________________________________ 3 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 ELECTRICAL CHARACTERISTICS (continued) (VDD = VBST = +8V to +12.6V, VHS = GND = 0V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at VDD = VBST = +12V and TA = +25°C.) (Note 2) PARAMETER SYMBOL CL = 1000pF Rise Time tR CL = 5000pF CL = 10,000pF CL = 1000pF Fall Time tF CL = 5000pF CL = 10,000pF Turn-On Propagation Delay Time Turn-Off Propagation Delay Time Delay Matching Between DriverLow and Driver-High Internal Nonoverlap Minimum Pulse Width Input Logic (Note 6) tPW-min VDD = VBST = 12V VDD = VBST = 8V tD_ON tD_OFF tMATCH Figure 1, CL = 1000pF (Note 5) Figure 1, CL = 1000pF (Note 5) CMOS TTL CMOS TTL CONDITIONS MIN TYP 7 33 65 7 33 65 30 35 30 35 2 1 135 170 55 63 55 63 8 ns ns ns ns ns ns ns MAX UNITS SWITCHING CHARACTERISTICS FOR HIGH- AND LOW-SIDE DRIVERS (VDD = VBST = +12V) CL = 1000pF, Figure 1 (Note 5) Note 2: All devices are 100% tested at TA = +125°C. Limits over temperature are guaranteed by design. Note 3: Ensure that the VDD-to-GND or BST-to-HS transient voltage does not exceed 13.2V. Note 4: Maximum operating supply voltage (VDD) reduces linearly from 12.6V to 10.5V with its maximum voltage (VHS_MAX) increasing from 125V to 175V. See the Typical Operating Characteristics and Applications Information sections. Note 5: Guaranteed by design, not production tested. Note 6: See the Minimum Input Pulse Width section. 4 _______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Typical Operating Characteristics (Typical values are at VDD = VBST = +12V and TA = +25°C, unless otherwise specified.) UNDERVOLTAGE LOCKOUT (VDD AND VBST RISING) vs. TEMPERATURE MAX15012/13 toc01 VDD AND BST UNDERVOLTAGE LOCKOUT HYSTERESIS vs. TEMPERATURE 0.9 0.8 UVLO HYSTERESIS (V) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0μA UVLOVDD HYSTERESIS UVLOBST HYSTERESIS 0V MAX15012/13 toc02 IDD vs. VDD MAX15012/13 toc03 7.5 7.4 7.3 7.2 UVLO (V) 7.1 7.0 6.9 6.8 6.7 6.6 6.5 UVLOBST UVLOVDD 1.0 IN_H = GND IN_L = VDD VDD 2V/div IDD 50μA/div 4ms/div -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) IDDO + IBSTO vs. VDD (fSW = 250kHz) 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 MAX15012/13 toc04 INTERNAL BST DIODE (I-V) CHARACTERISTICS 180 160 140 IDIODE (mA) 120 100 80 60 40 20 0 TA = +125°C TA = +25°C TA = 0°C TA = -40°C MAX15012/13 toc05 200 IDDO + IBSTO (mA) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 VDD (V) 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VDD - VBST (V) VDD QUIESCENT CURRENT vs. VDD (NO SWITCHING) MAX15012/13 toc06 BST QUIESCENT CURRENT vs. BST VOLTAGE 18 15 IBST (μA) 12 9 6 3 TA = +125°C VBST = VDD + 1V, NO SWITCHING MAX15012/13 toc07 160 140 120 100 IDD (μA) 80 60 40 20 TA = -40°C 0 0 2 4 6 VDD (V) 8 10 12 TA = +25°C VDD = VBST VHS = GND IN_H = GND IN_L = VDD TA = +125°C 21 TA = -40°C, TA = 0°C, TA = +25°C 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 VBST (V) _______________________________________________________________________________________ 5 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Typical Operating Characteristics (continued) (Typical values are at VDD = VBST = +12V and TA = +25°C, unless otherwise specified.) VDD AND BST OPERATING SUPPLY CURRENT vs. FREQUENCY MAX15012/13 toc08 DH OR DL OUTPUT LOW VOLTAGE vs. TEMPERATURE 0.34 0.32 0.30 0.28 0.26 0.24 0.22 0.20 0.18 0.16 0.14 0.12 0.10 SINKING 100mA MAX15012/13 toc09 10 9 8 IDDO + IBSTO (mA) 7 6 5 4 3 2 1 0 CL = 0 OUTPUT LOW VOLTAGE (V) 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (kHz) -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) PEAK DH AND DL SOURCE/SINK CURRENT MAX15012/13 toc10 DH OR DL RISE TIME vs. TEMPERATURE (CL = 10nF) 108 DH OR DL 5V/div tR (ns) 96 84 72 60 48 36 24 12 0 VDD = VBST = 12V MAX15012/13 toc11 MAX15012/13 toc13 120 VDD = VBST = 8V CL = 100nF SINK AND SOURCE CURRENT 2A/div 1μs/div -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) DH OR DL FALL TIME vs. TEMPERATURE (CLOAD = 10nF) 110 100 90 80 tF (ns) 70 60 50 40 30 20 10 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) VDD = VBST = 12V VDD = VBST = 8V MAX15012/13 toc12 DH OR DL RISE PROPAGATION DELAY vs. TEMPERATURE 60 55 50 PROPAGATION DELAY (ns) 45 40 35 30 25 20 15 10 5 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) DL DH 120 6 _______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers Typical Operating Characteristics (continued) (Typical values are at VDD = VBST = +12V and TA = +25°C, unless otherwise specified.) DH OR DL FALL PROPAGATION DELAY vs. TEMPERATURE 55 50 PROPAGATION DELAY (ns) 45 40 35 30 25 20 15 10 5 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 0 8 10.5 VDD_MAX (V) 12.6 DL DH MAX15012/13 toc14 MAX15012/MAX15013 VHS_MAX vs. VDD_MAX MAX15012/13 toc15 60 175 VHS_MAX (V) 125 DELAY MATCHING (DH/DL RISING) MAX15012/13 toc16 DELAY MATCHING (DH/DL FALLING) MAX15012/13 toc17 CL = 0 INPUT 5V/div CL = 0 INPUT 5V/div DH/DL 5V/div DH/DL 5V/div 10ns/div 10ns/div DH/DL RESPONSE TO VDD GLITCH MAX15012/13 toc18 DH 10V/div DL 10V/div VDD 10V/div INPUT 5V/div 40μs/div _______________________________________________________________________________________ 7 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Pin Description PIN 1 2 3 4 5 6 7 8 — NAME VDD BST DH HS IN_H IN_L GND DL EP FUNCTION Power Input. Bypass VDD to GND with a parallel combination of 0.1µF and 1µF ceramic capacitors. Boost Flying Capacitor Connection. Connect a 0.1µF ceramic capacitor between BST and HS for the high-side MOSFET driver supply. High-Side-Gate Driver Output. Driver output for the high-side MOSFET gate. Source Connection for High-Side MOSFET. Also serves as a return terminal for the high-side driver. High-Side Noninverting Logic Input Low-Side Noninverting Logic Input (MAX15012A/C and MAX15013A/C). Low-side inverting logic input (MAX15012B/D and MAX15013B/D). Ground. Use GND as a return path to the DL driver output and IN_H/IN_L inputs. Low-Side-Gate Driver Output. Drives low-side MOSFET gate. Exposed Pad. Internally connected to GND. Externally connect the exposed pad to a large ground plane to aid in heat dissipation (MAX15012C/D and MAX15013C/D only). IN_L (MAX15012A/C MAX15013A/C) VIH VIL 90% DL 10% tD_OFF1 tF IN_L (MAX15012B/D MAX15013B/D) VIH VIL tD_OFF2 tD_ON2 VIH VIL tD_ON1 tR IN_H 90% DH 10% tD_OFF3 tF tD_ON3 tR tMATCH = (tD_ON3 - tD_ON1) or (tD_OFF3 - tD_OFF1) FOR "A/C" VERSION tMATCH = (tD_ON3 - tD_ON2) or (tD_OFF3 - tD_OFF2) FOR "B/D" VERSION Figure 1. Timing Characteristics for Noninverting and Inverting Logic Inputs 8 _______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Detailed Description The MAX15012/MAX15013 are 175V/2A high-speed, half-bridge MOSFET drivers that operate from a supply voltage of +8V to +12.6V. The drivers are intended to drive a high-side switch without any isolation device like an optocoupler or drive transformer. The high-side driver is controlled by a TTL/CMOS logic signal referenced to ground. The 2A source and sink drive capability is achieved by using low R DS_ON , p- and n-channel driver output stages. The BiCMOS process allows extremely fast rise/fall times and low propagation delays. The typical propagation delay from the logic-input signal to the driver output is 35ns with a matched propagation delay of 2ns typical. Matching these propagation delays is as important as the absolute value of the delay itself. The high 175V input voltage range allows plenty of margin above the 100V transient specification per telecom standards. The maximum operating supply voltage (VDD) must be reduced linearly from 12.6V to 10.5V when the maximum voltage (VHS_MAX) increases from 125V to 175V. See the Typical Operating Characteristics. escent current. The maximum on-time is dependent on the size of CBST, IBST (40µA max), and UVLOBST. Output Driver The MAX15012/MAX15013 have low 2.5Ω RDS_ON pchannel and n-channel devices (totem pole) in the output stage. This allows for a fast turn-on and turn-off of the high gate-charge switching MOSFETs. The peak source and sink current is typically 2A. Propagation delays from the logic inputs to the driver outputs are matched to within 8ns. The internal p- and n-channel MOSFETs have a 1ns break-before-make logic to avoid any cross conduction between them. This internal break-before-make logic eliminates shoot-through currents reducing the operating supply current as well as the spikes at VDD. See the Minimum Input Pulse Width section to understand the effects of propagation delays on DH and DL. The DL voltage is approximately equal to VDD, the DHto-HS voltage is approximately equal to VDD minus a diode drop, when they are in a high state and to zero when in a low state. The driver RDS_ON is lower at higher VDD. Lower RDS_ON means higher source and sink currents and faster switching speeds. Undervoltage Lockout Both the high- and low-side drivers feature undervoltage lockout (UVLO). The low-side driver’s UVLOLOW threshold is referenced to GND and pulls both driver outputs low when VDD falls below 6.8V. The high-side driver has its own UVLO threshold (UVLOHIGH), referenced to HS, and pulls DH low when BST falls below 6.4V with respect to HS. During turn-on, once VDD rises above its UVLO threshold, DL starts switching and follows the IN_L logic input. At this time, the bootstrap capacitor is not charged and the BST-to-HS voltage is below UVLOBST. For synchronous buck and half-bridge converter topologies, the bootstrap capacitor can charge up in one cycle and normal operation begins in a few microseconds after the BST-to-HS voltage exceeds UVLOBST. In the two-switch forward topology, the BST capacitor takes some time (a few hundred microseconds) to charge and increase its voltage above UVLOBST. The typical hysteresis for both UVLO thresholds is 0.5V. The bootstrap capacitor value should be selected carefully to avoid unintentional oscillations during turn-on and turn-off at the DH output. Choose the capacitor value about 20 times higher than the total gate capacitance of the MOSFET. Use a low-ESR-type X7R dielectric ceramic capacitor at BST (typically a 0.1µF ceramic capacitor is adequate) and a parallel combination of 1µF and 0.1µF ceramic capacitors from VDD to GND. The high-side MOSFET’s continuous on-time is limited due to the charge loss from the high-side driver’s qui- Internal Bootstrap Diode An internal diode connects from VDD to BST and is used in conjunction with a bootstrap capacitor externally connected between BST and HS. The diode charges the capacitor from VDD when the DL low-side switch is on and isolates VDD when HS is pulled high as the highside driver turns on (see the Typical Operating Circuit). The internal bootstrap diode has a typical forward voltage drop of 0.9V and has a 10ns typical turn-off/turn-on time. For lower voltage drops from VDD to BST, connect an external Schottky diode between VDD and BST. Driver Logic Inputs (IN_H, IN_L) The MAX15012A/B/C/D are CMOS (VDD / 2) logic-input drivers while the MAX15013A/B/C/D have TTL-compatible logic inputs. The logic-input signals are independent of VDD. For example, the IC can be powered by a 10V supply while the logic inputs are provided from a 12V CMOS logic. Also, the logic inputs are protected against voltage spikes up to 14V, regardless of the VDD voltage. The TTL and CMOS logic inputs have 250mV and 1.6V hysteresis, respectively, to avoid double pulsing during transition. The logic inputs are high-impedance pins and should not be left floating. The low 2.5pF input capacitance reduces loading and increases switching speed. The noninverting inputs are pulled down to GND and the inverting inputs are pulled up to VDD internally using a 1MΩ resistor. The PWM output from the controller must assume a proper state while powering up the device. With the logic inputs floating, the DH and DL outputs pull low as VDD rises up above the UVLO threshold. 9 _______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Minimum Input Pulse Width The MAX15012/MAX15013 use a single-shot level-shifter architecture to achieve low propagation delay. Typical level shifter architecture causes a minimum (high or low) pulse width (tDmin) at the output that may be higher than the logic-input pulse width. For the MAX15012/ MAX15013 devices, the DH minimum high pulse-width (tDmin-DH-H) is lower than the DL minimum low pulse width (t Dmin-DL-L) to avoid any shoot-through in the absence of external BBM delay during the narrow pulse at low duty cycle. See Figure 2. VDD VIN PWMIN At high duty cycle (close to 100%), the DH minimum low pulse width (tDmin-DH-L) must be higher than the DL minimum low pulse width (tDmin-DL-L) to avoid the overlap and shoot-through. See Figure 3. In case of the MAX15012/MAX15013, there is a possibility of about 40ns overlap if an external BBM delay is not provided. It is recommended to add external delay in the INH path so that the minimum low pulse width seen at INH is always longer than t PW-min . See the E lectrical Characteristics table for the typical values of tPW-min. INH DH HS N VOUT N INL DL MAX15012B/ MAX15012D/ MAX15013B/ MAX15013D PWMIN tDMIN-DH-H DH IN-BUILT DEAD TIME DL tDMIN-DL-L Figure 2. Minimum Pulse-Width Behavior for Narrow Duty-Cycle Input (On-Time < tPW-min) 10 ______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 VDD EXTERNAL BBM DELAY VIN INH DH HS INL DL N N VOUT PWMIN MAX15012B/ MAX15012D/ MAX15013B/ MAX15013D VDD EXTERNAL BBM DELAY VIN INH DH HS INL DL N N VOUT PWMIN MAX15012A/C MAX15013A/C PWMIN tDMIN-DH-L DH EXTERNAL BBM DELAY POTENTIAL OVERLAP TIME DL tDMIN-DL-H Figure 3. Minimum Pulse-Width Behavior for High Duty-Cycle Input (Off-Time < tPW-min) ______________________________________________________________________________________ 11 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Applications Information Supply Bypassing and Grounding Pay extra attention to bypassing and grounding the MAX15012/MAX15013. Peak supply and output currents may exceed 4A when both drivers are driving large external capacitive loads in-phase. Supply drops and ground shifts create forms of negative feedback for inverters and may degrade the delay and transition times. Ground shifts due to insufficient device grounding may also disturb other circuits sharing the same AC ground return path. Any series inductance in the VDD, DH, DL, and/or GND paths can cause oscillations due to the very high di/dt when switching the MAX15012/ MAX15013 with any capacitive load. Place one or more 0.1µF ceramic capacitors in parallel as close to the device as possible to bypass V DD to GND. Use a ground plane to minimize ground return resistance and series inductance. Place the external MOSFET as close as possible to the MAX15012/MAX15013 to further minimize board inductance and AC path resistance. Layout Information The MAX15012/MAX15013 drivers source and sink large currents to create very fast rise and fall edges at the gates of the switching MOSFETs. The high di/dt can cause unacceptable ringing if the trace lengths and impedances are not well controlled. Use the following PC board layout guidelines when designing with the MAX15012/MAX15013: • It is important that the VDD voltage (with respect to ground) or BST voltage (with respect to HS) does not exceed 13.2V. Voltage spikes higher than 13.2V from VDD to GND or BST to HS can damage the device. Place one or more low ESL 0.1µF decoupling ceramic capacitors from VDD to GND, and from BST to HS as close as possible to the part. The ceramic decoupling capacitors should be at least 20 times the gate capacitance being driven. • There are two AC current loops formed between the device and the gate of the MOSFET being driven. The MOSFET looks like a large capacitance from gate to source when the gate is being pulled low. The active current loop is from the MOSFET driver output (DL or DH) to the MOSFET gate, to the MOSFET source, and to the return terminal of the MOSFET driver (either GND or HS). When the gate of the MOSFET is being pulled high, the active current loop is from the MOSFET driver output, (DL or DH), to the MOSFET gate, to the MOSFET source, to the return terminal of the drivers decoupling capacitor, to the positive terminal of the decoupling capacitor, and to the supply connection of the MOSFET driver. The decoupling capacitor is either the flying capacitor connected between BST and HS or the decoupling capacitor for VDD. Care must be taken to minimize the physical length and the impedance of these AC current paths. Power Dissipation Power dissipation in the MAX15012/MAX15013 is primarily due to power loss in the internal boost diode and the nMOS and pMOS FETs. For capacitive loads, the total power dissipation for the device is: PD = ⎛ CL × VDD2 × fSW ⎞ + (IDDO + IBSTO ) × VDD ⎝ ⎠ where CL is the combined capacitive load at DH and DL. VDD is the supply voltage and fSW is the switching frequency of the converter. PD includes the power dissipated in the internal bootstrap diode. The internal power dissipation reduces by PDIODE, if an external bootstrap Schottky diode is used. The power dissipation in the internal boost diode (when driving a capacitive load) is the charge through the diode per switching period multiplied by the maximum diode forward voltage drop (Vf = 1V). PDIODE ≅ CDH × (VDD − 1) × fSW × Vf The total power dissipation when using the internal boost diode is P D and, when using an external Schottky diode, is PD - PDIODE. The total power dissipated in the device must be kept below the maximum of 0.471W for the 8-pin SO package at TA = +70°C ambient. 12 ______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Typical Application Circuits VDD = 8V TO 12.6V VIN = 0 TO 175V* VDD BST DH N MAX15012A/C IN_H MAX15013A/C PWM CONTROLLER IN_L HS DL GND N VOUT PIN COMPATIBLE WITH THE HIP2100/HIP2101 *DERATE VDD IF VIN INCREASES ABOVE 125V. SEE NOTE 3 IN THE ELECTRICAL CHARACTERISTICS. Figure 4. MAX15012A/MAX15013A Half-Bridge Conversion VDD = 8V TO 12.6V CBST VDD BST DH PWM IN_H MAX15012A/C HS N VIN = 0 TO 175V* VOUT MAX15013A/C IN_L DL GND N *DERATE VDD IF VIN INCREASES ABOVE 125V. SEE NOTE 3 IN THE ELECTRICAL CHARACTERISTICS. Figure 5. Two-Switch Forward Conversion ______________________________________________________________________________________ 13 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Functional Diagrams MAX15012A/C VDD/2 CMOS BST 2 5 IN_H DH 3 5 IN_H MAX15012B/D VDD/2 CMOS BST 2 DH 3 HS 4 VDD 1 6 IN_L DL 8 GND 7 SO SO 6 IN_L HS 4 VDD 1 DL 8 GND 7 MAX15013A/C TTL BST 2 5 IN_H DH 3 5 IN_H MAX15013B/D TTL BST 2 DH 3 HS 4 VDD 1 6 IN_L DL 8 GND 7 SO SO 6 IN_L HS 4 VDD 1 DL 8 GND 7 14 ______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Typical Operating Circuit VDD = 8V TO 12.6V CBST DH IN_H N VIN = 0 TO 175V* VDD PWM BST MAX15012B/D MAX15013B/D HS VOUT IN_L GND DL N *DERATE VDD IF VIN INCREASES ABOVE 125V. SEE NOTE 3 IN THE ELECTRICAL CHARACTERISTICS. Pin Configurations TOP VIEW + VDD 1 8 7 DL GND IN_L IN_H BST 2 DH 3 Ordering Information (continued) PART MAX15013AASA+ MAX15013BASA+ MAX15013CASA+* MAX15013DASA+* TEMP RANGE -40°C to +125°C -40°C to +125°C -40°C to +125°C -40°C to +125°C PINPACKAGE 8 SO 8 SO 8 SO-EP** 8 SO-EP** PKG CODE S8-5 S8-5 S8E+14 S8E+14 MAX15012A/B MAX15013A/B 6 5 HS 4 +Denotes lead-free package. *Future product—contact factory for availability. **EP = Exposed pad. SO Chip Information + VDD 1 8 7 DL GND IN_L IN_H BST 2 DH 3 TRANSISTOR COUNT: 790 PROCESS: HV BiCMOS MAX15012C/D MAX15013C/D 6 5 HS 4 SO-EP ______________________________________________________________________________________ 15 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) SOICN .EPS INCHES DIM A A1 B C e E H L MAX MIN 0.069 0.053 0.010 0.004 0.014 0.019 0.007 0.010 0.050 BSC 0.150 0.157 0.228 0.244 0.016 0.050 MILLIMETERS MAX MIN 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 1.27 BSC 3.80 4.00 5.80 6.20 0.40 1.27 N E H VARIATIONS: 1 INCHES MILLIMETERS MIN 4.80 8.55 9.80 MAX 5.00 8.75 10.00 N MS012 8 AA 14 AB 16 AC TOP VIEW DIM D D D MIN 0.189 0.337 0.386 MAX 0.197 0.344 0.394 D A e B A1 L C 0∞-8∞ FRONT VIEW SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, .150" SOIC APPROVAL DOCUMENT CONTROL NO. REV. 21-0041 B 1 1 16 ______________________________________________________________________________________ 175V/2A, High-Speed, Half-Bridge MOSFET Drivers Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 8L, SOIC EXP. PAD.EPS MAX15012/MAX15013 PACKAGE OUTLINE 8L SOIC, .150" EXPOSED PAD 21-0111 C 1 1 ______________________________________________________________________________________ 17 175V/2A, High-Speed, Half-Bridge MOSFET Drivers MAX15012/MAX15013 Revision History REVISION NUMBER 0 1 REVISION DATE 5/06 12/07 Initial release Added exposed paddle versions of the MAX15012A/B and MAX15013A/B, added Figures 2 and 3 and added SO-EP package outline DESCRIPTION PAGES CHANGED — 1–4, 8–11, 13–17 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc. Heaney