MAX16008_11

19-3869; Rev 1; 1/11 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN General Description The MAX16008/MAX16009 are adjustable quad window voltage detectors in a small thin QFN package. These devices are designed to provide a higher level of system reliability by monitoring multiple supply voltages and providing a fault signal when any of the voltages exceed their overvoltage thresholds or fall below their undervoltage thresholds. These devices offer user-adjustable thresholds that allow voltages to be monitored down to 0.4V. These devices allow the upper and lower trip thresholds of each window detector to be set externally with the use of three external resistors. Each monitored threshold has an independent opendrain output for signaling a fault condition. The outputs can be wire OR’ed together to provide a single fault output. The open-drain outputs are internally pulled up with a 30µA current, but can be externally driven to other voltage levels for interfacing to other logic levels. Both devices feature a margin input to disable the outputs during margin testing or any other time after power-up operations. The MAX16009 offers a reset output that deasserts after a reset timeout period after all voltages are within their threshold specifications. The reset timeout is internally set to 140ms (min), but can be externally adjusted to other reset timeouts using an external capacitor. In addition, the MAX16009 offers a manual reset input. All devices are offered in a 4mm x 4mm TQFN package and are fully specified from -40°C to +125°C. ♦ 1.5% Accuracy Over Temperature ♦ User-Adjustable Thresholds (Down to 0.4V) ♦ Open-Drain Outputs with Internal Pullups Reduce the Number of External Components ♦ Manual Reset Input (MAX16009) ♦ Margin Enable Input ♦ Fixed or Adjustable RESET Timeout (MAX16009) ♦ Guaranteed Correct Output Logic State Down to VCC = 1V ♦ Fully Specified from -40°C to +125°C ♦ Small, 4mm x 4mm TQFN Package Features ♦ Monitor Four Undervoltage/Overvoltage Conditions MAX16008/MAX16009 Ordering Information PART MAX16008TP+ MAX16009TG+ TEMP RANGE -40°C to +125°C -40°C to +125°C PIN-PACKAGE 20 TQFN 24 TQFN +Denotes a lead(Pb)-free/RoHS-compliant package. For tape-and-reel, add a “T” after the “+.” Tape-and-reel are offered in 2.5k increments. Typical Operating Circuit 3.5V 2.5V 1.8V 1.5V UVIN1 VCC RESET UVOUT1 VCC RESET μC GND Applications Storage Equipment Networking/Telecommunications Equipment Multivoltage ASICs Servers OVIN1 OVOUT1 UVIN2 UVOUT2 MAX16009 OVIN2 OVOUT2 UVIN3 UVOUT3 OVIN3 OVOUT3 UVIN4 UVOUT4 OVIN4 GND OVOUT4 Pin Configurations and Selector Guide appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008/MAX16009 ABSOLUTE MAXIMUM RATINGS VCC, OVOUT_, UVOUT_, RESET, UVIN_, OVIN_ to GND .........................................-0.3V to +6V MARGIN, MR, TOL, SRT to GND................-0.3V to (VCC + 0.3V) Input/Output Current (RESET, MARGIN, SRT, MR, UVOUT_, OVOUT_) .......±20mA Continuous Power Dissipation (TA = +70°C) 20-Pin Thin QFN (derate 16.9mW/°C above +70°C) ....1355mW 24-Pin Thin QFN (derate 16.9mW/°C above +70°C) ....1666mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature .....................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 2.0V to 5.5V, TOL = GND, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V, TA = +25°C.) (Note 1) PARAMETER Operating Voltage Range Supply Current (Note 3) UVLO (Undervoltage Lockout) UVIN_/OVIN_ Adjustable Threshold (UVIN_ Falling/OVIN_ Rising) UVIN_/OVIN_ Hysteresis UVIN_/OVIN_ Input Current RESET SRT = VCC Reset Timeout tRP CSRT = 1500pF (Note 4) CSRT = 100pF CSRT = open SRT Ramp Current SRT Threshold SRT Hysteresis UVIN_/OVIN_ to Reset Delay tRD UVIN_ falling/OVIN_ rising ISRT VTH_SRT VSRT = 0V 460 1.173 140 2.43 200 3.09 0.206 0.05 600 1.235 100 20 740 1.293 nA V mV µs 280 3.92 ms VTH VTH_HYS IIB UVIN_ falling/OVIN_ rising (percentage of the threshold) -100 0.388 0.394 0.5 +100 0.400 V % VTH nA SYMBOL VCC ICC VUVLO (Note 2) VCC = 3.3V, outputs deasserted VCC = 5V, outputs deasserted VCC rising 1.62 CONDITIONS MIN 1.0 45 45 1.8 TYP MAX 5.5 65 70 1.98 UNITS V µA V 2 _______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN ELECTRICAL CHARACTERISTICS (continued) (VCC = 2.0V to 5.5V, TOL = GND, TA = -40°C to +125°C, unless otherwise specified. Typical values are at VCC = 3.3V, TA = +25°C.) (Note 1) PARAMETER RESET Output-Voltage Low SYMBOL VOL CONDITIONS VCC = 3.3V, ISINK = 10mA, RESET asserted VCC = 2.5V, ISINK = 6mA, RESET asserted VCC = 1.2V, ISINK = 50µA, RESET asserted RESET Output-Voltage High MR Input-Voltage Low MR Input-Voltage High MR Minimum Pulse Width MR Glitch Rejection MR to RESET Delay MR Pullup Resistance OUTPUTS (UVOUT_/OVOUT_) UVOUT_, OVOUT_ OutputVoltage Low OVOUT_, OVOUT_ OutputVoltage High UVIN_/OVIN_ to UVOUT_/ OVOUT_ Propagation Delay DIGITAL LOGIC TOL Input-Voltage Low TOL Input-Voltage High TOL Input Current MARGIN Input-Voltage Low MARGIN Input-Voltage High MARGIN Pullup Resistance MARGIN Delay Time tMD VIL VIH Pulled up to VCC Rising or falling (Note 5) 0.7 x VCC 12 20 50 28 VIL VIH TOL = VCC 0.7 x VCC 100 0.3 x VCC 0.3 x VCC V V nA V V kΩ µs VOL VOH tD VCC = 3.3V, ISINK = 2mA VCC = 2.5V, ISINK = 1.2mA VCC ≥ 2.0V, ISOURCE = 6µA (VTH - 100mV) to (VTH + 100mV) 0.8 x VCC 20 0.30 0.30 V V µs 12 VOH VIL VIH 0.7 x VCC 1 100 200 20 28 VCC ≥ 2.0V, ISOURCE = 6µA, RESET deasserted 0.8 x VCC 0.3 x VCC MIN TYP MAX 0.30 0.30 0.30 V V V µs ns ns kΩ V UNITS MAX16008/MAX16009 Note 1: Note 2: Note 3: Note 4: Devices are tested at TA = +25°C and guaranteed by design for TA = TMIN to TMAX. The outputs are guaranteed to be in the correct logic state down to VCC = 1V. Measured with MR and MARGIN unconnected. The minimum and maximum specifications for this parameter are guaranteed by using the worse case of the SRT current and SRT threshold specifications. Do not set the reset timeout period to more than 1.12s. Note 5: Amount of time required for logic to lock/unlock outputs from margin testing _______________________________________________________________________________________ 3 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008/MAX16009 Typical Operating Characteristics (VCC = 3.3V, TA = +25°C, unless otherwise noted.) SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX16008 toc01 SUPPLY CURRENT vs. TEMPERATURE MARGIN AND MR UNCONNECTED VCC = 5V MAX16008 toc02 UVIN_/OVIN_ THRESHOLD vs. SUPPLY VOLTAGE MAX16008 toc03 60 55 SUPPLY CURRENT (μA) 50 45 40 35 30 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 MARGIN AND MR UNCONNECTED 65 60 SUPPLY CURRENT (μA) 55 50 45 VCC = 3.3V 40 35 30 VCC = 2.5V 0.450 0.425 INPUT THRESHOLD 0.400 0.375 0.350 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 5.5 SUPPLY VOLTAGE (V) UVIN_/OVIN_ THRESHOLD vs. TEMPERATURE MAX16008 toc04 OUTPUT VOLTAGE vs. SINK CURRENT MAXIMUM TRANSIENT DURATION (μs) 100 MAX16008 toc05 MAXIMUM TRANSIENT DURATION vs. INPUT OVERDRIVE OUTPUT GOES LOW ABOVE THIS LINE MAX16008 toc06 0.45 0.44 0.43 INPUT THRESHOLD 0.42 600 500 400 300 200 100 0 75 VOUT_ (mV) 0.41 0.40 0.39 0.38 0.37 0.36 0.35 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 50 25 UVOUT_ / OVOUT_ LOW 0 0 1 2 3 4 5 6 7 8 SINK CURRENT (mA) 1 10 100 1000 INPUT OVERDRIVE (mV) 4 _______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN Typical Operating Characteristics (continued) (VCC = 3.3V, TA = +25°C, unless otherwise noted.) MAX16008/MAX16009 RESET TIMEOUT PERIOD vs. TEMPERATURE 197 RESET TIMEOUT PERIOD (ms) 196 195 194 193 192 191 190 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) MAX16008 toc07 RESET TIMEOUT DELAY MAX16008 toc08 198 UVIN1 1V/div UVOUT1 2V/div RESET 2V/div SRT = VCC 40ms/div UVIN_ TO UVOUT_ DELAY TIME MAX16008 toc09 MARGIN ENABLE FUNCTION MAX16008 toc10 UVIN1 2V/div MARGIN 2V/div UVOUT_ 2V/div UVOUT1 2V/div RESET 2V/div UVIN_ BELOW RESPECTIVE THRESHOLDS 4μs/div 100μs/div _______________________________________________________________________________________ 5 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008/MAX16009 Pin Description PIN MAX16008 MAX16009 NAME FUNCTION 1 2 3 4 5 6, 20 7 1 2 3 4 6 7, 24 8 UVIN3 OVIN3 UVIN4 OVIN4 GND VCC Undervoltage Threshold Input 3. When the voltage on UVIN3 falls below its threshold, UVOUT3 asserts low. Overvoltage Threshold Input 3. When the voltage on OVIN3 rises above its threshold, OVOUT3 asserts low. Undervoltage Threshold Input 4. When the voltage on UVIN4 falls below its threshold, UVOUT4 asserts low. Overvoltage Threshold Input 4. When the voltage on OVIN4 rises above its threshold, OVOUT4 asserts low. Ground Unmonitored Power to the Device Active-Low Undervoltage Output 3. When the voltage at UVIN3 falls below its threshold, UVOUT3 asserts low and stays asserted until the voltage at UVIN3 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. Active-Low Overvoltage Output 3. When the voltage at OVIN3 rises above its threshold, OVOUT3 asserts low and stays asserted until the voltage at OVIN3 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. Active-Low Undervoltage Output 4. When the voltage at UVIN4 falls below its threshold, UVOUT4 asserts low and stays asserted until the voltage at UVIN4 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. Active-Low Overvoltage Output 4. When the voltage at OVIN4 rises above its threshold, OVOUT4 asserts low and stays asserted until the voltage at OVIN4 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. Active-Low Margin Enable Input. Pull MARGIN low to deassert all outputs (go into high state) regardless of the voltage at any monitored input. Active-Low Overvoltage Output 2. When the voltage at OVIN2 rises above its threshold, OVOUT2 asserts low and stays asserted until the voltage at OVIN2 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. UVOUT3 8 9 OVOUT3 9 10 UVOUT4 10 11 OVOUT4 11 14 MARGIN 12 15 OVOUT2 6 _______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN Pin Description (continued) PIN MAX16008 MAX16009 NAME FUNCTION MAX16008/MAX16009 13 16 UVOUT2 Active-Low Undervoltage Output 2. When the voltage at UVIN2 falls below its threshold, UVOUT2 asserts low and stays asserted until the voltage at UVIN2 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. Active-Low Overvoltage Output 1. When the voltage at OVIN1 rises above its threshold, OVOUT1 asserts low and stays asserted until the voltage at OVIN1 falls below its threshold. The open-drain output has a 30µA internal pullup to VCC. Active-Low Undervoltage Output 1. When the voltage at UVIN1 falls below its threshold, UVOUT1 asserts low and stays asserted until the voltage at UVIN1 exceeds its threshold. The open-drain output has a 30µA internal pullup to VCC. Undervoltage Threshold Input 1. When the voltage on UVIN1 falls below its threshold, UVOUT1 asserts low. Overvoltage Threshold Input 1. When the voltage on OVIN1 rises above its threshold, OVOUT1 asserts low. Undervoltage Threshold Input 2. When the voltages on UVIN2 falls below its threshold, UVOUT2 asserts low. Overvoltage Threshold Input 2. When the voltage on OVIN2 rises above its threshold, OVOUT2 asserts low. Not Internally Connected Active-Low Manual Reset Input. Pull MR low to assert RESET low. RESET remains low for the reset timeout period after MR is deasserted. MR is pulled up to VCC through a 20kΩ resistor. Set Reset Timeout Input. Connect a capacitor from SRT to GND to set the reset timeout period. The reset timeout period can be calculated as follows: Reset Timeout (s) = 2.06 x 106 (Ω) x CSRT (F). Do not set the reset timeout period to more than 1.12s. For the internal timeout period of 140ms (min), connect SRT to VCC. Active-Low Reset Output. RESET asserts low when the voltage on any of the UVIN_ inputs falls below their respective thresholds, the voltage on any of the OVIN_ inputs goes above its respective threshold, or MR is asserted. RESET remains asserted for at least the minimum reset timeout after all monitored UVIN_ inputs exceed their respective thresholds, all OVIN_ inputs fall below their respective thresholds, and MR is deasserted. This open-drain output has a 30µA internal pullup. Exposed Pad. EP is internally connected to GND. Connect EP to the ground plane to provide a low thermal resistance path from the IC junction to the PC board. Do not use as the only electrical connection to GND. 14 17 OVOUT1 15 18 UVOUT1 16 17 18 19 — — 20 21 22 23 5 12 UVIN1 OVIN1 UVIN2 OVIN2 N.C. MR — 13 SRT — 19 RESET — — EP _______________________________________________________________________________________ 7 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008/MAX16009 (MR) (SRT) VCC VCC TIMING RESET CIRCUIT UVIN1 (RESET) UVOUT1 OVIN1 OVOUT1 UVIN2 UVOUT2 OUTPUT DRIVER OVIN2 OVOUT2 UVIN3 UVOUT3 OVOUT3 OVIN3 UVIN4 UVOUT4 OVOUT4 OVIN4 VCC UNDERVOLTAGE LOCKOUT REFERENCE VCC VCC MAX16008/ MAX16009 ( ) MAX16009 ONLY MARGIN Figure 1. Functional Diagram 8 _______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN Detailed Description The MAX16008/MAX16009 are adjustable quad window voltage detectors in a small thin QFN package. These devices are designed to provide a higher level of system reliability by monitoring multiple supply voltages and providing a fault signal when any of the voltages exceeds its overvoltage threshold or falls below its undervoltage threshold. These devices offer user-adjustable thresholds that allow voltages to be monitored down to 0.4V. The devices allow the upper and lower trip thresholds of each window detector to be set externally with the use of three external resistors. Each monitored threshold has an independent opendrain output for signaling a fault condition. The outputs can be wire OR’ed together to provide a single fault output. The open-drain outputs are internally pulled up with a 30µA current, but can be externally driven to other voltage levels for interfacing to other logic levels. Both devices feature a margin input to disable the outputs during margin testing or any other time after power-up operations. The MAX16009 offers a reset output that deasserts after a reset timeout period after all voltages are within their threshold specification. The reset timeout is internally set to 140ms (min), but can be externally adjusted to other reset timeouts using an external capacitor. In addition, the MAX16009 offers a manual reset input. +5V R1 UVIN_ R2 OVIN_ R3 MAX16008/ MAX16009 VCC UVOUT_ OVOUT_ EN IN OUT DC-DC REGULATOR GND MAX16008/MAX16009 Figure 2. MAX16008/MAX16009 Monitor Circuit The resistor values R1, R2, and R3 can be calculated as shown: ⎛R ⎞ VTRIPLOW = VTH ⎜ TOTAL ⎟ R2 + R 3 ⎠ ⎝ ⎛R ⎞ VTRIPHIGH = VTH ⎜ TOTAL ⎟ ⎝ R3 ⎠ where RTOTAL = R1 + R2 + R3. Use the following steps to determine the values for R1, R2, and R3: 1) Choose a value for RTOTAL, the sum of R1, R2, and R3. Because the MAX16008/MAX16009 have very low input bias current (2nA typ), RTOTAL can be up to 2MΩ. Large-value resistors help minimize power consumption. Lower-value resistors can be used to maintain overall accuracy. Applications Information Voltage Monitoring The MAX16008/MAX16009 feature undervoltage and overvoltage comparators for window detection (see Figure 2). UVOUT_ / OVOUT_ deassert high when the monitored voltage is within the “selected window.” When the monitored voltage falls below the lower limit of the window (VTRIPLOW), UVOUT_ asserts low; or if the monitored voltage exceeds the upper limit (VTRIPHIGH), OVOUT_ asserts low. The application in Figure 2 shows the MAX16008/MAX16009 enabling the DC-DC converter when the monitored voltage is in the selected window. _______________________________________________________________________________________ 9 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008/MAX16009 Use the following formulas to calculate the error: ⎛ RR ⎞ IIB ⎜ R1 + 1 3 ⎟ R2 + R3 ⎠ ⎝ EUV (%) = x 100 VTRIPLOW I (R + (2 x R1)) x 100 EOV (%) = IB 2 VTRIPHIGH where EUV and EOV are the undervoltage and overvoltage error (in %), respectively. 2) Calculate R3 based on RTOTAL and the desired upper trip point: R3 = VTH x R TOTAL VTRIPHIGH The MAX16008/MAX16009 are powered directly from the system voltage supply. Select R1 and R2 to set the trip voltage. When the supply voltage remains below the selected threshold, a low logic level on UVOUT_ turns on the p-channel MOSFET. In the case of an overvoltage event, UVOUT_ goes high turning off the MOSFET, and shuts down the power to the load. Figure 4 shows a similar application using a fuse and a silicon-controlled rectifier (SCR). An overvoltage event turns on the SCR and shorts the supply to ground. The surge of current through the short circuit blows the fuse and terminates the current to the load. Select R3 so that the gate of the SCR is properly biased when UVOUT_ goes high. Unused Inputs Any unused UVIN_ inputs must be connected to VCC, and any unused OVIN_ inputs must be connected to GND. UVOUT_ / OVOUT_ Outputs UVOUT_ and OVOUT_ outputs assert low when UVIN_ and OVIN_, respectively, drop below or exceed their specified thresholds. The undervoltage/overvoltage outputs are open-drain with a (30µA) internal pullup to VCC. For many applications, no external pullup resistor is required to interface with other logic devices. An external pullup resistor to any voltage up to 5.5V overdrives the internal pullup if interfacing to different logic supply voltages. Internal circuitry prevents reverse current flow from the external pullup voltage to VCC (Figure 5). When choosing the external pullup resistor, the resistance value should be large enough to ensure that the output can sink the necessary current during a logic-low condition and small enough to be able to overdrive the internal pullup current and meet output high specifications 3) Calculate R2 based on R TOTAL , R3, and the desired lower trip point: R2 = VTH x R TOTAL − R3 VTRIPLOW 4) Calculate R1 based on RTOTAL, R3, and R2: R1 = R TOTAL − R2 − R 3 Overvoltage Shutdown The MAX16008/MAX16009 are ideal for overvoltageshutdown applications. Figure 3 shows a typical circuit for this application using a pass p-channel MOSFET. VSUPPLY R1 UVIN_ R2 MAX16008/ MAX16009 UVOUT_ GND R3* VCC LOAD FUSE VSUPPLY VCC MAX16008/ MAX16009 UVIN_ UVOUT_ R2 GND R3 SCR LOAD R1 *OPTIONAL. VALUES OF 10kΩ AND ABOVE ARE RECOMMENDED. Figure 3. Overvoltage Shutdown Circuit (with External Pass MOSFET) 10 Figure 4. Overvoltage Shutdown Circuit (with SCR Fuse) ______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN (VOH). Resistor values of 50kΩ to 200kΩ can generally be used. RESET Output (MAX16009 Only) RESET asserts low when the voltage on any of the UVIN_ inputs falls below its respective threshold, the voltage on any of the OVIN_ inputs goes above its respective threshold, or M R is asserted. R ESET remains asserted for the reset timeout period after all monitored UVIN_ inputs exceed their respective thresholds, all OVIN_ inputs fall below their respective thresholds, and M R is deasserted (see Figure 6). This open-drain output has a 30µA internal pullup. Do not use capacitor (CSRT) values higher than 390nF. Connect SRT to VCC for a factory-programmed reset timeout of 140ms (min). MAX16008/MAX16009 Manual Reset Input (MR) (MAX16009 Only) Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic-low on M R asserts RESET low. RESET remains asserted while MR is low, and during the reset timeout period (140ms min) after MR returns high. The MR input has an internal 20kΩ pullup resistor to VCC, so it can be left open if it is not used. MR can be driven with TTL or CMOS-logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connecting a 0.1µF capacitor from MR to GND provides additional noise immunity. Reset Timeout Capacitor The reset timeout period can be adjusted to accommodate a variety of microprocessor (µP) applications from 50µs to 1.12s. Adjust the reset timeout period (tRP) by connecting a capacitor (CSRT) between SRT and GND. Calculate the reset timeout capacitor as follows: tRP (s) CSRT (F) = ⎛ VTH _ SRT ⎞ ⎜I ⎟ ⎝ SRT ⎠ Margin Output Disable (MARGIN) MARGIN allows system-level testing while power supplies are adjusted from their nominal voltages. Drive MARGIN low to deassert all outputs ( UVOUT_ , UVIN_ VTH_ VTH_ + VTH_HYS VCC = 3.3V 5V RESET 90% 10% 100kΩ VCC VCC tRD tRP UVOUT_ UVOUT_ RESET 10% tD tD 90% MAX16008/ MAX16009 VTH_ OVIN_ VTH_ - VTH_HYS GND GND OVOUT_ 90% 10% tD tD Figure 5. Interfacing to a Different Logic Supply Voltage Figure 6. Output Timing Diagram 11 ______________________________________________________________________________________ Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN MAX16008/MAX16009 OVOUT_, and RESET) regardless of the voltage at any monitored input. The state of each output does not change while MARGIN = GND. While MARGIN is low, the IC continues to monitor all voltages. When MARGIN is deasserted, the outputs go to their monitored states after a short propagation delay. The MARGIN input is internally pulled up to VCC. Leave unconnected or connect to VCC if unused. Power-Supply Bypassing The MAX16008/MAX16009 operate from a 2.0V to 5.5V supply. An undervoltage lockout ensures that the outputs are in the correct states when the UVLO is exceeded. In noisy applications, bypass VCC to ground with a 0.1µF capacitor as close to the device as possible. In addition, the additional capacitor improves transient immunity. For fast-rising VCC transients, additional capacitance may be required. Selector Guide PART MAX16008 MAX16009 NUMBER OF MONITORED LEVELS 4 4 UNDERVOLTAGE/ OVERVOLTAGE THRESHOLDS Adjustable Adjustable RESET — ✔ ADJUSTABLE RESET TIMEOUT — ✔ MR — ✔ Pin Configurations MARGIN UVOUT1 OVOUT1 UVOUT2 OVOUT2 15 UVIN1 16 OVIN1 17 UVIN2 18 OVIN2 19 VCC 20 + 14 13 12 11 RESET 19 10 OVOUT4 UVIN1 20 9 UVOUT4 OVIN1 21 18 17 16 15 14 13 12 11 10 MR OVOUT4 UVOUT4 OVOUT3 UVOUT3 VCC MAX16008 8 7 6 OVOUT3 UVIN2 22 UVOUT3 OVIN2 23 VCC VCC 24 1 UVIN3 + MAX16009 SRT 9 8 7 6 GND TOP VIEW TOP VIEW 1 UVIN3 2 OVIN3 3 UVIN4 4 OVIN4 5 GND 2 OVIN3 3 UVIN4 4 OVIN4 TQFN 4mm x 4mm TQFN 4mm x 4mm Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 20 TQFN-EP 24 TQFN-EP PACKAGE CODE T2044+3 T2444+4 OUTLINE NO. 21-0139 21-0139 LAND PATTERN NO. 90-0037 90-0022 12 ______________________________________________________________________________________ N.C. MARGIN 5 UVOUT1 OVOUT1 UVOUT2 OVOUT2 Low-Voltage, High-Accuracy, Quad Window Voltage Detectors in Thin QFN Revision History REVISION NUMBER 0 1 REVISION DATE 10/05 1/11 Initial release Added soldering temperature in the Absolute Maximum Rating section and added symbol in Electrical Characteristics table DESCRIPTION PAGES CHANGED — 2 MAX16008/MAX16009 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 © 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.