MAX16922

19-5039; Rev 5; 1/12 KIT ATION EVALU BLE AVAILA 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET General Description Features ♦ 1.2A High-Efficiency 2.2MHz DC-DC Converter 3.7V to 28V Operating Supply Voltage 45V Load-Dump Protection Output Voltage: 3.0V to 5.5V ♦ 600mA High-Efficiency 2.2MHz DC-DC Converter 2.7V to 5.5V Supply Voltage Output Voltage: 1.0V to 3.9V 180° Out-of-Phase Operation Forced-PWM and Auto-PWM Modes ♦ LDO Linear Regulators OUT3: 1.0V to 4.15V at 300mA OUT4: 1.0V to 4.15V at 300mA Separate Inputs for Increased Efficiency ♦ Enable Input ♦ RESET Output Monitoring on OUT1 and OUT2 ♦ Overtemperature and Short-Circuit Protection ♦ Available in 5mm x 5mm x 0.8mm, 20-Pin TQFN-EP 4.5mm x 6.5mm, 20-Pin TSSOP-EP MAX16922 The MAX16922 power-management integrated circuit (PMIC) is designed for medium power-level automotive applications and integrates multiple supplies in a small footprint. The device includes one high-voltage stepdown converter (OUT1) and three low-voltage cascaded DC-DC converters (OUT2, OUT3, OUT4). OUT1 and OUT2 are step-down DC-DC converters, and OUT3/ OUT4 are linear regulators. The device also includes a reset output (RESET) and a high-voltage-compatible enable input (EN). The 1.2A output high-efficiency, step-down DC-DC converter (OUT1) operates from a voltage up to 28V continuous and is protected from load-dump transients up to 45V. The 600mA output high-efficiency step-down DCDC converter (OUT2) runs from a voltage up to 5.5V. The two 300mA LDO linear regulators offer low dropout of only 130mV (typ). The power-good RESET output provides voltage monitoring for OUT1 and OUT2. OUT1 and OUT2 use fast 2.2MHz PWM switching and small external components. The high-voltage converter (OUT1) enters skip mode automatically under light loads to prevent an overvoltage condition from occurring at the output. The low-voltage synchronous DC-DC converter (OUT2) can operate in forced-PWM mode to prevent any AM band interference or high-efficiency auto-PWM mode. The MAX16922 includes overtemperature shutdown and overcurrent limiting. The device is designed to operate from -40°C to +125°C ambient temperature. Ordering Information PART MAX16922ATP_ /V+* MAX16922AUP_ /V+* TEMP RANGE -40°C to +125°C -40°C to +125°C PIN-PACKAGE 20 TQFN-EP** 20 TSSOP-EP** *Insert the desired suffix letters (from the Selector Guide) into the blank “_” to complete the part number. +Denotes a lead(Pb)-free/RoHS-compliant package. /V denotes an automotive qualified part. **EP = Exposed pad. Typical Operating Circuit VPV1 4.7μF VOUT1 4.7μF PV1 EN PWM PV3 PV2 BST 0.1μF 4.7μH LX1 OUTS1 VOUT1 10μF VOUT1 1μF EP RESET 20kΩ 4.7μF OUTS2 LX2 PGND2 2.2μH VOUT2 10μF MAX16922 VOUT3 4.7μF VOUT2 4.7μF VOUT4 4.7μF OUT4 GND GND2 OUT3 GND1 GND3 PV4 LSUP ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET MAX16922 ABSOLUTE MAXIMUM RATINGS PV1, EN to GND .....................................................-0.3V to +45V LX1 to GND.................................................-0.5V to (PV1 + 0.3V) LX2 to GND.................................................-0.5V to (PV2 + 0.3V) BST to LX1.............................................................-0.3V to +6.0V PV2, PV3, PV4, OUTS1, PWM, RESET to GND_....-0.3V to +6.0V OUTS2 .......................................................-0.3V to (PV2 + 0.3V) OUT3 .........................................................-0.3V to (PV3 + 0.3V) OUT4 .........................................................-0.3V to (PV4 + 0.3V) LX1 RMS Current .................................................................2.0A LX2 RMS Current .................................................................1.2A PGND2 to GND_....................................................-0.3V to +0.3V LSUP to GND............................................................-0.3V to +6V OUTS_, OUT_ Output Short-Circuit Duration .............Continuous Continuous Power Dissipation (TA = +70°C) TQFN (derate 31.3 mW/°C above +70°C) ........................ 2500mW TSSOP (derate 26.5 mW/°C above +70°C) ...................... 2122mW ESDHB (all pins) ...................................................................±2kV ESDMM (all pins) ................................................................±200V ESDCDM (corner pins) .......................................................±750V ESDCDM (other pins)..........................................................±500V Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Soldering Temperature (reflow) .......................................+260°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) TQFN Junction-to-Ambient Thermal Resistance (θJA) ........... 32°C/W Junction-to-Case Thermal Resistance (θJC) ............... 2.7°C/W TSSOP Junction-to-Ambient Thermal Resistance (θJA) ........ 37.7°C/W Junction-to-Case Thermal Resistance (θJC) .................. 2°C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. ELECTRICAL CHARACTERISTICS (VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C under normal conditions, unless otherwise noted.) (Note 2) PARAMETER SYMBOL (Note 3) Operation < 500ms PV1 rising PV1 falling PV1 falling (option enabled) 6V VPV1 28V 4.75 2.0 -3 -2 300 1.4 1.75 2.2 2.85 3.7 3.3 6.45 0.65 VLSUP I PV1 f SW VOUT1 5.0 14 2.2 2.4 +3 +4 700 2.1 m A ms 5.45 EN = low Internally generated Duty cycle = 20% to 90%; ILOAD = 3 00mA to 1.2A SKIP mode (Note 4) DMOS On-Resistance Current-Limit Threshold Soft-Start Ramp Time VPV1 = 4V, VBST = 9V, ILX1 = 0.2A CONDITIONS MIN 3.7 TYP MAX 28 45 4.0 UNITS OUT1—SYNCHRONOUS STEP-DOWN DC-DC CONVERTER Supply-Voltage Range PV1 Undervoltage Lockout BST Refresh Load Enable BST Refresh Load Hysteresis LSUP Regulator Voltage Supply Current PWM Switching Frequency Voltage Accuracy VPV1 VUVLO,R VUVLO,F VBRLE V V V V V μA MHz % 2 _______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET ELECTRICAL CHARACTERISTICS (continued) (VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C under normal conditions, unless otherwise noted.) (Note 2) PARAMETER Maximum Output Current LX1 Leakage Current Maximum Duty Cycle Minimum Duty Cycle OUTS1 Discharge Resistance DCMAX DCMIN f SW = 2.2MHz EN = low (or optionally EN = high and VPV1 < 5.7V) VPV2 f SW VOUT2 Fully operational Internally generated Duty cycle = 20% to 90%; ILOAD = 1 mA to 600mA, PWM = high SKIP mode (Note 4) pMOS On-Resistance n MOS On-Resistance pMOS Current-Limit Threshold n MOS Zero-Crossing Threshold Soft-Start Ramp Time Maximum Output Current LX2 Leakage Current Duty-Cycle Range OUTS2 Discharge Resistance OUT3—LDO REGULATOR Input Voltage Voltage Accuracy Load Regulation Dropout Voltage Current Limit Power-Supply Rejection Ratio Shutdown Output Resistance OUT4—LDO REGULATOR Input Voltage Voltage Accuracy Load Regulation Dropout Voltage Current Limit VPV4 VOUT4 (VOUT4 + 0.4V) VPV4 5.5V, ILOAD = 1 mA ILOAD = 0 to 300mA VPV4 = 1.8V, ILOAD = 2 50mA (Note 4) 1.7 -2 -0.2 130 450 320 5.5 +2 V % % mV mA I OUT3 = 3 0mA, f = 1kHz EN = low VPV3 VOUT3 VOUT3 + 0 .4V VPV3 5 .5V, ILOAD = 1 mA ILOAD = 0 to 300mA VPV3 = 1.8V, ILOAD = 2 50mA (Note 4) 1.7 -2 -0.2 130 450 57 1 320 5.5 +2 V % % mV mA dB k I OUT2 VOUT2 + 0 .5V VPV2 5 .5V 600 ±1 15 70 100 VPV2 = 6V, LX2 = PGND2 or VPV2; TA = -40°C to +85°C Forced-PWM mode only, minimum duty cycle in skip mode is 0% (Note 4) VEN = 0V VPV2 = 5.0V, ILX2 = 0.2A VPV2 = 5.0V, ILX2 = 0.2A 0.75 2.7 2.0 -3 -2 150 200 0.9 50 1.5 2.2 SYMBOL I OUT1 (VOUT1 + 1.0V) CONDITIONS VPV1 2 8V VPV1 = 12V, LX1 = GND or VPV1; TA = -40°C to +85°C MIN 1.2 ±1 94 20 70 TYP MAX UNITS A μA % % MAX16922 OUT2—SYNCHRONOUS STEP-DOWN DC-DC CONVERTER Supply-Voltage Range PWM Switching Frequency Voltage Accuracy 5.5 2.4 +3 +4 250 350 1.05 V MHz % % m m A mA ms mA μA % _______________________________________________________________________________________ 3 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET MAX16922 ELECTRICAL CHARACTERISTICS (continued) (VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C under normal conditions, unless otherwise noted.) (Note 2) PARAMETER Power-Supply Rejection Ratio Shutdown Output Resistance THERMAL OVERLOAD Thermal-Shutdown Temperature Thermal-Shutdown Hysteresis R ESET OUT1 OV Threshold OUT1 Reset Threshold OUT2 Reset Threshold Reset option 1 (see the Selector Guide) Reset option 2 (see the Selector Guide) Percentage of nominal output Reset timeout option 1 (see the Selector Guide) Reset timeout option 2 (see the Selector Guide) Output-High Leakage Current Output Low Level UV Propagation Time EN LOGIC INPUT EN Threshold Voltage EN Threshold Hysteresis Input Current P WM LOGIC INPUT Input High Level Input Low Level Logic-Input Current PWM rising PWM falling 0 V PWM 5.5V 1 1.8 0.4 V V μA VEN = 5V EN rising 1.4 1.8 0.4 0.5 2.2 V V μA Sinking -3mA 28 85 75 85 110 90 80 90 14.9 ms 1.9 1 0.4 μA V μs 95 85 95 % % % (Note 4) 150 175 15 °C °C SYMBOL EN = low CONDITIONS I OUT4 = 3 0mA, f = 1kHz MIN TYP 57 1 MAX UNITS dB k Reset Timeout Period Note 2: All units are 100% production tested at TA = +25°C. All temperature limits are guaranteed by design. Note 3: Once PVI exceeds undervoltage-lockout rising threshold 4.0V and the device is in regulation. Note 4: Guaranteed by design; not product tested. 4 _______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET Typical Operating Characteristics (VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = +25°C, unless otherwise specified.) MAX16922 OUT1 EFFICIENCY vs. LOAD CURRENT MAX16922 toc01 OUT1 EFFICIENCY vs. LOAD CURRENT MAX16922 toc02 OUT2 EFFICIENCY vs. LOAD CURRENT MAX16922 toc03 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 PV1 = 18V PV1 = 8V PV1 = 13.5V 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 PV1 = 13.5V TA = -40°C 100 90 EFFICIENCY (%) TA = +125°C TA = +25°C TA = +125°C TA = +25°C 80 70 60 PV2 = 5V OUT2 = 2.7V 50 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 LOAD CURRENT (A) 0.1 0.2 0.3 0.4 0.5 0.6 LOAD CURRENT (A) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 LOAD CURRENT (A) SUPPLY CURRENT vs. TEMPERATURE MAX16922 toc04 NORMALIZED OUT1 VOLTAGE vs. LOAD CURRENT MAX16922 toc05 OUT1 VOLTAGE vs. VPV1 IOUT1 = 1A 5.15 5.10 OUT1 VOLTAGE (V) 5.05 5.00 4.95 4.90 4.85 4.80 MAX16922 toc06 1.8 1.7 SUPPLY CURRENT (mA) 1.6 1.5 1.4 1.3 1.2 1.1 1.0 NO LOAD PWM = GND 2.0 NORMALIZED OUT1 VOLTAGE (%) 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 5.20 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 IPV1 (A) 6 9 12 VPV1 (V) 15 18 POWER-UP ENABLE TURNING ON MAX16922 toc07 POWER-UP/DOWN AT THERMAL SHUTDOWN EN 10V/div OUT1 5V/div OUT2 2V/div OUT3 2V/div OUT4 1V/div MAX16922 toc08 RESET 5V/div OUT1 5V/div OUT2 2V/div OUT3 2V/div OUT4 1V/div 1ms/div 2ms/div _______________________________________________________________________________________ 5 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET MAX16922 Typical Operating Characteristics (continued) (VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = +25°C, unless otherwise specified.) SWITCHING FREQUENCY vs. LOAD CURRENT 2.0 1.6 1.2 0.8 0.4 0 0 200 400 600 800 1000 1200 LOAD CURRENT (mA) 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 OUT3 MAX16922 toc09 DROPOUT VOLTAGE vs. LOAD CURRENT MAX16922 toc10 OUT1 DROPOUT VOLTAGE vs. TEMPERATURE IOUT1 = 1.2A 1.3 DROPOUT VOLTAGE (V) 1.2 1.1 1.0 0.9 0.8 0.7 MAX16922 toc11 1.4 SWITCHING FREQUENCY (MHz) DROPOUT VOLTAGE (V) OUT1 OUT2 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 LOAD CURRENT (A) -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) OUT2 DROPOUT VOLTAGE vs. TEMPERATURE IOUT2 = 600mA 0.6 DROPOUT VOLTAGE (V) 0.5 0.4 0.3 0.2 0.1 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) MAX16922 toc12 OUT1 LOAD TRANSITION MAX16922 toc13 0.7 IOUT1 500mA/div VOUT1 AC-COUPLED 50mV/div 20ms/div OUT2 LOAD TRANSIENT MAX16922 toc14 OUT1 LINE TRANSIENT MAX16922 toc15 IOUT2 200mA/div PV1 5V/div VOUT2 AC-COUPLED 20mV/div OUT1 AC-COUPLED 20mV/div 20ms/div 4ms/div 6 _______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET Typical Operating Characteristics (continued) (VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = +25°C, unless otherwise specified.) MAX16922 SWITCHING FREQUENCY vs. TEMPERATURE MAX16922 toc16 POWER-SUPPLY REJECTION RATIO vs. FREQUENCY -10 -20 -30 PSRR (dB) -40 -50 -60 -70 -80 -90 -100 OUT3 OUT4 LOAD CURRENT = 100mA 100mVP-P RIPPLE MAX16922 toc17 MAX16922 toc19 2.30 2.28 SWITCHING FREQUENCY (MHz) 2.26 2.24 2.22 2.20 2.18 2.16 2.14 2.12 2.10 PWM = OUT1 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 10 100 1k FREQUENCY (Hz) 10k 100k OUT3 OUTPUT-NOISE DENSITY vs. FREQUENCY MAX16922 toc18 OUT4 OUTPUT-NOISE DENSITY vs. FREQUENCY 2000 1800 OUTPUT-NOISE DENSITY (nV/ Hz) 1600 1400 1200 1000 800 600 400 200 0 RL = 100Ω 4000 3600 OUTPUT-NOISE DENSITY (nV/ Hz) 3200 2800 2400 2000 1600 1200 800 400 0 10 RL = 100Ω 100 1k FREQUENCY (Hz) 10k 100k 10 100 1k FREQUENCY (Hz) 10k 100k _______________________________________________________________________________________ 7 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET MAX16922 Functional Diagram VOUT1 20kΩ RESET POR GENERATION GND1 STEP-DOWN PWM OUT1 3.0V TO 5.5V 1.2A EN OUT3 4.7μF 1.0V TO 4.15V GND2 EN LINEAR REGULATOR LSUP 1μF BST PV1 VPV1 4.7μF VOUT1 4.7μF PV3 LDO REG 1: 300mA LX1 4.7μH VOUT1 10μF OUTS1 MAX16922 PWM MODE SELECT PV2 4.7μF PV4 4.7μF LDO REG 2: 300mA STEP-DOWN PWM OUT2 EN VOUT4 4.7μF OUT4 1.0V TO 4.15V PWM EN OUTS2 1.0V TO 3.9V 600mA PGND2 LX2 2.2μH VOUT2 10μF VOUT2 EN 100kΩ EP 8 _______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET Pin Configurations TOP VIEW GND2 OUT4 OUT3 PV3 PV2 MAX16922 TOP VIEW GND1 EN BST 10 9 MAX16922 8 7 LX2 PGND2 OUTS2 GND PWM PWM 2 3 4 5 GND OUTS2 8 9 10 EP 13 12 11 PV2 LX2 PGND2 1 2 3 4 5 6 7 MAX16922 + 20 19 18 17 16 15 14 RESET LSUP PV4 OUT4 GND2 OUT3 PV3 15 14 13 12 PV4 LSUP RESET GND1 EN 16 17 18 19 20 11 PV1 LX1 GND3 OUTS1 + 1 EP 6 BST PV1 LX1 GND3 TQFN OUTS1 TSSOP Pin Description PIN TQFN 1 2 3 4 TSSOP 3 4 5 6 NAME BST PV1 LX1 GND3 FUNCTION Bootstrap Capacitor Input. Connect a 0.1µF ceramic capacitor from BST to LX1. OUT1 Supply Input. Connect a 4.7µF or larger ceramic capacitor from PV1 to PGND. Inductor Connection for OUT1. Connect a 4.7µH inductor between LX1 and OUTS1, and a Schottky diode between LX1 (cathode) and the power-ground plane (anode) as shown in the Functional Diagram. Ground. Connect GND, GND1, GND2, and GND3 together. OUT1 Voltage-Sensing Input. Connect OUTS1 directly to the OUT1 output voltage and bypass to power-ground plane with a minimum total capacitance of 15µF. The total capacitance can include input bypass capacitors cascaded from OUT1, discharged by a 70Ω resistance between OUTS1 and GND3 when disabled. PWM Control Input. Connect PWM to OUTS1 to force LX2 to switch every cycle. Connect PWM to high for forced-PWM operation on OUT2. Connect low for auto-PWM operation to improve efficiency at light loads. Ground. Connect GND, GND1, GND2, and GND3 together. 5 7 OUTS1 6 7 8 9 PWM GND _______________________________________________________________________________________ 9 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET MAX16922 Pin Description (continued) PIN TQFN TSSOP NAME FUNCTION OUT2 Voltage Sense Input. Connect OUTS2 directly to the OUT2 output voltage and bypass to PGND2 with a minimum total capacitance of 10µF. The total capacitance can include input bypass capacitors cascaded from OUT2, discharged by a 70Ω resistance between OUTS2 and PGND2 when disabled. Power Ground for BUCK 2. Connect PGND2 and GND_ together near the device. Inductor Connection for OUT2. Connect a 2.2µH inductor between LX2 and OUT2 as shown in the Functional Diagram. OUT2 Supply Input. Connect a 4.7µF or larger ceramic capacitor from PV2 to ground. Linear-Regulator Power Input for OUT3. Bypass PV3 to GND with a minimum 2.2µF ceramic capacitor. Linear-Regulator 1 Output. Bypass OUT3 to GND with a minimum 2.2µF ceramic capacitor internally discharged by a 1kΩ resistance when disabled. Ground. Connect GND, GND1, GND2, and GND3 together. Linear-Regulator 2 Output. Bypass OUT4 to GND with a minimum 2.2µF ceramic capacitor. Internally discharged by a 1kΩ resistance when disabled. Linear-Regulator Power Input for OUT4. Bypass PV4 to GND with a minimum 2.2µF ceramic capacitor. 5V Logic Supply to Provide Power to Internal Circuitry. Bypass LSUP to GND1 with a 1µF ceramic capacitor. Open-Drain Reset Output for the Input Monitoring OUT1 and OUT2. External pullup required. Ground. Connect GND, GND1, GND2, and GND3 together. Active-High Enable Input. Connect EN to PV1 or a logic-high voltage to turn on all regulators. Pull EN input low to place the regulators in shutdown. Exposed Pad. Connect the exposed pad to ground. Connecting the exposed pad to ground does not remove the requirement for proper ground connections to PGND2 and GND_. The exposed pad is attached with epoxy to the substrate of the die, making it an excellent path to remove heat from the device. 8 10 OUTS2 9 10 11 12 13 14 15 16 17 18 19 20 11 12 13 14 15 16 17 18 19 20 1 2 PGND2 LX2 PV2 PV3 OUT3 GND2 OUT4 PV4 LSUP RESET GND1 EN — — EP 10 ______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET Detailed Description The MAX16922 PMIC is designed for medium power level automotive applications requiring multiple supplies in a small footprint. As shown in the T ypical Applications Circuit , the MAX16922 integrates one high-voltage power supply and three low-voltage cascaded power supplies. OUT1 and OUT2 are step-down DC-DC converters, and OUT3 and OUT4 are linear regulators. The device also includes a reset output (RESET) and a high-voltage compatible enable input (EN). The operating input voltage range is from 3.5V to 28V and tolerant of transient voltages up to 45V. OUT1 Step-Down DC-DC Regulator Step-Down Regulator Architecture OUT1 is a high-input voltage, high-efficiency 2.2MHz PWM current-mode step-down DC-DC converter that delivers up to 1.2A. OUT1 has an internal high-side nchannel switch and uses a low forward-drop freewheeling diode for rectification. Under normal operating conditions, OUT1 is fixed frequency to prevent unwanted AM radio interference. However, under light loads and high-input voltage, the step-down regulator skips cycles to maintain regulation. The output voltage is factory selectable from 3.0V to 5.5V in 50mV increments. Soft-Start When initially powered up or enabled with EN, the OUT1 step-down regulator soft-starts by gradually ramping up the output voltage for approximately 2.2ms. This reduces inrush current during startup. During softstart the full output current is available. Before a softstart sequence begins, the outputs of both DC-DC regulators discharge below 1.25V through an internal resistor. See the startup waveforms in the T ypical Operating Characteristics section. Current Limit The MAX16922 limits the peak inductor current sourced by the n-channel MOSFET. When the peak current limit is reached, the internal n-channel MOSFET turns off for the remainder of the cycle. If the current limit is exceeded for 16 consecutive cycles and the output voltage is less than 1.25V, the n-channel MOSFET is turned off for 256 clock cycles to allow the inductor current to discharge and then initiate a softstart sequence for all four outputs. Dropout The high-voltage, step-down converter (OUT1) of the MAX16922 is designed to operate near 100% dutycycle. When the input voltage is close to the output voltage, the device tries to maintain the high-side switch on with 100% duty cycle. However, to maintain proper gate charge, the high-side switch must be turned off periodically so the LX pin can go to ground and charge the BST capacitor. As the input voltage approaches the output voltage, the effective duty cycle of the n-channel MOSFET approaches 94%. Every 4th cycle is limited to a maximum duty cycle of 75% (recharge period is approximately 112ns) while the remaining cycles can go to 100% duty cycle. As a result, when the MAX16922 is in dropout, the switching frequency is reduced by a factor of 4. During dropout conditions under light load, the load current may not be sufficient to enable the LX pin to reach ground during the recharge period. To ensure the LX pin is pulled to ground and proper BST capacitor recharge occurs, an internal load is applied to OUTS1 when PV1 falls below approximately 6.5V. This load is approximately 70Ω and is connected between OUTS1 and GND3 through an internal switch. MAX16922 OUT2 Step-Down DC-DC Regulator Step-Down Regulator Architecture OUT2 is a low-input voltage, high-efficiency 2.2MHz PWM current-mode step-down DC-DC converter that outputs up to 600mA. OUT2 has an internal high-side p-channel switch, and low-side n-channel switch for synchronous rectification. The DC-DC regulator supports auto-PWM operation so that under light loads the device automatically enters high-efficiency skip mode. The auto-PWM mode can be disabled by connecting the PWM input to OUTS1. The output voltage is factory selectable from 1.0V to 3.9V in 50mV increments. Soft-Start OUT2 enters soft-start when OUT1 finishes its soft-start sequence to prevent high startup current from exceeding the maximum capability of OUT1. The step-down regulator executes a soft-start by gradually ramping up the output voltage for approximately 1.5ms. This reduces inrush current during startup. During soft-start, the full output current is available. The soft-start sequence on OUT2 begins after the soft-start sequence is completed on OUT1. See the startup waveforms in the Typical Operating Characteristics section. ______________________________________________________________________________________ 11 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET Current Limit The MAX16922 limits the peak inductor current sourced by the p-channel MOSFET. When the peak current limit is reached, the internal p-channel MOSFET turns off for the remainder of the cycle. If the current limit is exceeded for 16 consecutive cycles, and the output voltage is less than 1.25V, the p-channel MOSFET is turned off and enters output discharge mode for 256 clock cycles, allowing the inductor current and output voltage to discharge. Once completed, a soft-start sequence is initiated on OUT2. Dropout As the input voltage approaches the output voltage, the duty cycle of the p-channel MOSFET reaches 100%. In this state, the p-channel MOSFET is turned on constantly (not switching), and the dropout voltage is the voltage drop due to the output current across the on-resistance of the internal p-channel MOSFET (RPCH) and the inductor’s DC resistance (RL): VDO = ILOAD (RPCH + RL) MAX16922 Input Supply and Undervoltage Lockout An undervoltage-lockout circuit turns off the LDO regulators when the input supply voltage is too low to guarantee proper operation. When PV3 falls below 1.25V (typ), OUT3 powers down. When PV4 falls below 1.5V (typ), OUT4 powers down. Soft-Start OUT3 enters soft-start when PV3 exceeds 1.25V, and OUT4 enters soft-start when PV4 exceeds 1.5V. This staggers the surge current during startup to prevent excess current draw from OUT1 or OUT2 that could trigger an overcurrent shutdown. The soft-start time for each LDO is 0.1ms (typ). See the startup waveforms in the Typical Operating Characteristics section. Current Limit The OUT3 and OUT4 output current is limited to 450mA (typ). If the output current exceeds the current limit, the corresponding LDO output voltage drops out of regulation. Excess power dissipation in the device can cause the device to turn off due to thermal shutdown. Dropout The dropout voltage for the linear regulators is 320mV (max) at 250mA load. To avoid dropout, make sure the input supply voltage corresponding to OUT3 and OUT4 is greater than the corresponding output voltage plus the dropout voltage based on the application output current requirements. PWM The MAX16922 operates in either auto-PWM or forcedPWM modes. At light load, auto-PWM switches only as needed to supply the load to improve light-load efficiency of the step-down converter. At higher load currents (~160mA), the step-down converter transitions to fixed 2.2MHz switching frequency. Forced PWM always operates with a constant 2.2MHz switching frequency regardless of the load. Connect PWM high for forced-PWM applications or low for auto-PWM applications. LSUP Linear Regulator LSUP is the output of a 5V linear regulator that powers MAX16922 internal circuitry. LSUP is internally powered from PV1 and automatically powers up when EN is high and PV1 exceeds approximately 3.7V. LSUP automatically powers down when EN is taken low. Bypass LSUP to GND with a 1µF ceramic capacitor. LSUP remains on even during a thermal fault. LDO Linear Regulators The MAX16922 contains two low-dropout linear regulators (LDOs), OUT3 and OUT4. The LDO output voltages are factory preset, and each LDO supplies loads up to 300mA. The LDOs include an internal reference, error amplifier, p-channel pass transistor, and internal voltage-dividers. Each error amplifier compares the reference voltage to the output voltage (divided by the internal voltage-divider) and amplifies the difference. If the divided feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled lower, allowing more current to pass to the outputs and increasing the output voltage. If the divided feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to pass to the output. Each output voltage is factory selectable from 1.0V to 4.15V in 50mV increments. If not using one of the LDO outputs, then tie the associated input power pin (PV_) to ground. Thermal-Overload Protection Thermal-overload protection limits the total power dissipation in the MAX16922. Thermal-protection circuits monitor the die temperature. If the die temperature exceeds +175°C, the device shuts down, allowing it to cool. Once the device has cooled by 15°C, the device is enabled again. This results in a pulsed output during continuous thermal-overload conditions. The thermaloverload protection protects the MAX16922 in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction temperature of +150°C. See the Thermal Considerations section for more information. 12 ______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET Typical Applications Circuit VBAT 0.1μF 220μF 4.7μF VOUT1 PV1 EN PWM PV3 4.7μF PV2 4.7μF 0.1μF 4.7μH LX1 OUTS1 VOUT1 10μF VOUT1 1μF RESET 20kΩ OUTS2 LX2 PGND2 MAX16922 2.2μH VOUT2 10μF MAX16922 OUT3 4.7μF VOUT2 PV4 4.7μF OUT4 4.7μF GND GND2 EP GND1 GND3 BST LSUP Applications Information Power-On Sequence When the EN input is pulled high and PV1 is greater than 3.7V (typ), the 5V LSUP linear regulator turns on. Once LSUP exceeds 2.5V, the internal reference and bias are enabled. When the internal bias has stabilized OUT1, soft-start is initiated. After completion of soft-start on OUT1 (2.8ms typ), OUT2 soft-start is initiated. OUT3 soft-start is enabled when PV3 is greater than or equal to 1.25V (typ), and OUT4 soft-start is enabled when PV4 is greater than or equal to 1.5V (typ). Care must be taken when driving the EN pin. Digital input signals deliver a fast edge that is properly detected by the MAX16922. If driving the EN pin with an analog voltage that has a slew rate of less than 1V/ms or a voltage-divider from PV1, then the input voltage on PV1 must always be less than 6V when the voltage at EN is near the turn-off threshold of 1.6V. If this cannot be guaranteed, then a 1kΩ resistor or 5.6V zener diode must be placed in parallel with the LSUP output capacitor to prevent possible damage to the device. or when PV1 falls below 3.0V (typ). When a shutdown occurs, all outputs discharge through an internal resistor connected between each output and ground. When enable is high, the die temperature is okay, the LSUP linear regulator is greater than 2.5V (typ), and OUT1 is less than 1.25V (typ); a complete soft-start power-on sequence is reinitiated. Inductor Selection The OUT1 step-down converter operates with a 4.7µH inductor and the OUT2 step-down converter operates with a 2.2µH inductor. The inductor’s DC current rating must be high enough to account for peak ripple current and load transients. The step-down converter’s architecture has minimal current overshoot during startup and load transients. In most cases, an inductor capable of 1.3 times the maximum load current is acceptable. For optimum performance choose an inductor with DCseries resistance in the 50mΩ to 150mΩ range. For higher efficiency at heavy loads (above 400mA) and minimal load regulation, the inductor resistance should be kept as small as possible. For light-load applications (up to 200mA), higher resistance is acceptable with very little impact on performance. Power-Down and Restart Sequence The MAX16922 can be shut down by thermal shutdown, enable low (EN), LSUP regulator undervoltage, ______________________________________________________________________________________ 13 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET MAX16922 Capacitor Selection Input Capacitors The input capacitor, CIN1, reduces the current peaks drawn from the supply and reduces switching noise in the MAX16922. The impedance of CIN1 at the switching frequency should be kept very low. Ceramic capacitors with X5R or X7R dielectrics are recommended due to their small size, low ESR, and small temperature coefficients. Use a 4.7µF ceramic capacitor or an equivalent amount of multiple capacitors in parallel between PV1 and ground. Connect CIN1 as close to the device as possible to minimize the impact of PCB trace inductance. Connect a minimum 4.7µF ceramic capacitor between PV2 to ground, and a 2.2µF ceramic capacitor between PV3 to ground and PV4 to ground. Since PV2 is cascaded from OUT1, the input capacitor connected to PV2 can be used as part of the total output capacitance for OUT1. Step-Down Output Capacitors The step-down output capacitors are required to keep the output-voltage ripple small and to ensure regulation loop stability. These capacitors must have low impedance at the switching frequency. Surface-mount ceramic capacitors are recommended due to their small size and low ESR. The capacitor should maintain its capacitance overtemperature and DC bias. Ceramic capacitors with X5R or X7R temperature characteristics generally perform well. The output capacitance can be very low. Place a minimum of 15µF ceramic capacitance from OUTS1 to ground and a minimum of 10µF from OUTS2 to ground. When the OUT2 output voltage selection is below 2.35V, the output capacitance should be increased to prevent instability. For optimum loadtransient performance and very low output ripple, the output capacitance can be increased. The maximum output capacitance should not exceed 3.8mF for OUT1 and 2.0mF for OUT2. LDO Output Capacitors and Stability Connect a 4.7µF ceramic capacitor between OUT3 and GND, and a second 4.7µF ceramic capacitor from OUT4 to GND. When the input voltage of an LDO is greater than 2.35V, the output capacitor can be decreased to 2.2µF. The equivalent series resistance (ESR) of the LDO output capacitors affects stability and output noise. Use output capacitors with an ESR of 0.1Ω or less to ensure stable operation and optimum transient response. Connect these capacitors as close as possible to the device to minimize PCB trace inductance. Thermal Considerations The maximum package power dissipation of the MAX16922 in the 20-pin thin QFN package is 2500mW. The power dissipated by the MAX16922 should not exceed this rating. The total device power dissipation is the sum of the power dissipation of the four regulators: PD = PD1 + PD2 + PD3 + PD4 Estimate the OUT1 and OUT2 power dissipations as follows: 1− η η 1− η PD2 = IOUT2 × VOUT2 × η PD1 = IOUT1 × VOUT1 × where η is the efficiency (see the Typical Operating Characteristics section). Calculate the OUT3 and OUT4 power dissipations as follows: PD3 = IOUT3 x (VPV3 – VOUT3) PD4 = IOUT4 x (VPV4 – VOUT4) The maximum junction temperature of the MAX16922 is +150°C. The junction-to-case thermal resistance (θJC) of the MAX16922 is 2.7°C/W. When mounted on a single-layer PCB, the junction to ambient thermal resistance ( θ JA ) is approximately 48°C/W. Mounted on a multilayer PCB, θJA is approximately 32°C/W. Calculate the junction temperature of the MAX16922 as follows: TJ = TA x PD x θJA where TA is the maximum ambient temperature. Make sure the calculated value of TJ does not exceed the +150°C maximum. 14 ______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET PCB Layout High-switching frequencies and relatively large peak currents make PCB layout a very important aspect of design. Good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Connect the input capacitors as close as possible to the PV_ and ground. Connect the inductor and output capacitors as close as possible to the device and keep the traces short, direct, and wide to minimize the current loop area. The OUTS_ feedback connections are sensitive to inductor magnetic field interference so route these traces away from the inductors and noisy traces such as LX_. Connect GND_ and PGND2 to the ground plane. Connect the exposed paddle to the ground plane with multiple vias to help conduct heat away from the device. Refer to the MAX16922 evaluation kit for a PCB layout example. MAX16922 Selector Guide MAX16922 ATP x /V + LEAD FREE AEC Q100 QUALIFIED OUTPUT VOLTAGES RESET THRESHOLD, RESET TIMEOUT -40°C TO +125°C OPERATION, TQFN, 20 PINS MAX16922 AUP x /V + LEAD FREE AEC Q100 QUALIFIED OUTPUT VOLTAGES RESET THRESHOLD, RESET TIMEOUT -40°C TO +125°C OPERATION, TSSOP, 20 PINS PART NUMBER SUFFIX* A B C D E F G H I J K OUT1 VOLTAGE (V) 5.00 5.00 5.00 3.6 5.00 5.00 3.30 3.30 3.30 3.80 3.30 OUT2 VOLTAGE (V) 2.70 1.20 3.30 1.2 3.30 1.20 Off 1.20 1.20 3.30 2.20 OUT3 VOLTAGE (V) 3.30 1.80 1.20 3.3 2.50 3.15 2.80 2.50 2.85 2.50 1.60 OUT4 VOLTAGE (V) 1.0 3.3 3.0 3.3 1.80 3.00 1.80 1.80 1.80 1.20 1.80 OUT1 RESET THRESHOLD (%) 90 90 90 90 90 90 90 90 90 90 90 RESET TIMEOUT (ms) 14.9 14.9 14.9 14.9 14.9 14.9 14.9 14.9 14.9 14.9 14.9 BST REFRESH LOAD ENABLE On On On Off On On On Off Off Off On *Other standard versions may be available. Contact factory for availability. ______________________________________________________________________________________ 15 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET MAX16922 Chip Information PROCESS: BiCMOS Package Information For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE 20 TQFN-EP 20 TSSOP-EP PACKAGE CODE T2055+4 U20E+1 OUTLINE NO. 21-0140 21-0108 LAND PATTERN NO. 90-0009 90-0114 16 ______________________________________________________________________________________ 2.2MHz, Dual, Step-Down DC-DC Converters, Dual LDOs, and RESET Revision History REVISION NUMBER 0 1 2 3 4 5 REVISION DATE 10/09 5/10 10/10 11/10 4/11 1/12 Initial release Updated Absolute Maximum Ratings, Electrical Characteristics, Typical Operating Characteristics, Dropout, and Power-On Sequence sections Added a new voltage trim option (I) to the Selector Guide Added a new voltage trim option (J) to the Selector Guide Added a new voltage trim option (K) to the Selector Guide Updated the F unctional Diagram t o eliminate the PWM signal on OUT1 and changed PV2 polarized capacitor to an unpolarized capacitor DESCRIPTION PAGES CHANGED — 1, 2, 4, 6, 11, 13 15 15 15 8 MAX16922 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17 © 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.